1 #as: 2 #objdump: -dw -Mintel 3 #name: i386 GFNI insns (Intel disassembly) 4 #source: gfni.s 5 6 .*: +file format .* 7 8 9 Disassembly of section \.text: 10 11 00000000 <_start>: 12 [ ]*[a-f0-9]+:[ ]*66 0f 38 cf ec[ ]*gf2p8mulb xmm5,xmm4 13 [ ]*[a-f0-9]+:[ ]*66 0f 38 cf ac f4 c0 1d fe ff[ ]*gf2p8mulb xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] 14 [ ]*[a-f0-9]+:[ ]*66 0f 38 cf aa f0 07 00 00[ ]*gf2p8mulb xmm5,XMMWORD PTR \[edx\+0x7f0\] 15 [ ]*[a-f0-9]+:[ ]*66 0f 3a ce ec ab[ ]*gf2p8affineqb xmm5,xmm4,0xab 16 [ ]*[a-f0-9]+:[ ]*66 0f 3a ce ac f4 c0 1d fe ff 7b[ ]*gf2p8affineqb xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b 17 [ ]*[a-f0-9]+:[ ]*66 0f 3a ce aa f0 07 00 00 7b[ ]*gf2p8affineqb xmm5,XMMWORD PTR \[edx\+0x7f0\],0x7b 18 [ ]*[a-f0-9]+:[ ]*66 0f 3a cf ec ab[ ]*gf2p8affineinvqb xmm5,xmm4,0xab 19 [ ]*[a-f0-9]+:[ ]*66 0f 3a cf ac f4 c0 1d fe ff 7b[ ]*gf2p8affineinvqb xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b 20 [ ]*[a-f0-9]+:[ ]*66 0f 3a cf aa f0 07 00 00 7b[ ]*gf2p8affineinvqb xmm5,XMMWORD PTR \[edx\+0x7f0\],0x7b 21 [ ]*[a-f0-9]+:[ ]*66 0f 38 cf ec[ ]*gf2p8mulb xmm5,xmm4 22 [ ]*[a-f0-9]+:[ ]*66 0f 38 cf ac f4 c0 1d fe ff[ ]*gf2p8mulb xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] 23 [ ]*[a-f0-9]+:[ ]*66 0f 38 cf aa f0 07 00 00[ ]*gf2p8mulb xmm5,XMMWORD PTR \[edx\+0x7f0\] 24 [ ]*[a-f0-9]+:[ ]*66 0f 3a ce ec ab[ ]*gf2p8affineqb xmm5,xmm4,0xab 25 [ ]*[a-f0-9]+:[ ]*66 0f 3a ce ac f4 c0 1d fe ff 7b[ ]*gf2p8affineqb xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b 26 [ ]*[a-f0-9]+:[ ]*66 0f 3a ce aa f0 07 00 00 7b[ ]*gf2p8affineqb xmm5,XMMWORD PTR \[edx\+0x7f0\],0x7b 27 [ ]*[a-f0-9]+:[ ]*66 0f 3a cf ec ab[ ]*gf2p8affineinvqb xmm5,xmm4,0xab 28 [ ]*[a-f0-9]+:[ ]*66 0f 3a cf ac f4 c0 1d fe ff 7b[ ]*gf2p8affineinvqb xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b 29 [ ]*[a-f0-9]+:[ ]*66 0f 3a cf aa f0 07 00 00 7b[ ]*gf2p8affineinvqb xmm5,XMMWORD PTR \[edx\+0x7f0\],0x7b 30 #pass 31