1 /*========================== begin_copyright_notice ============================
2
3 Copyright (C) 2017-2021 Intel Corporation
4
5 SPDX-License-Identifier: MIT
6
7 ============================= end_copyright_notice ===========================*/
8
9 #include <string.h>
10 #include <sstream>
11 #include "Common_ISA_util.h"
12 #include "Common_ISA_framework.h"
13 #include "G4_Opcode.h"
14 #include "PreDefinedVars.h"
15
16
17 vISAPreDefinedSurface vISAPreDefSurf[COMMON_ISA_NUM_PREDEFINED_SURF_VER_3_1] =
18 {
19 { 0, PREDEF_SURF_0, "%slm" },
20 { 1, PREDEF_SURF_1, "T1" },
21 { 2, PREDEF_SURF_2, "T2" },
22 { 3, PREDEF_SURF_3, "TSS" },
23 { 4, PREDEF_SURF_252, "%bss" },
24 { 5, PREDEF_SURF_255, "%scratch" },
25 };
26
27 typedef struct {
28 VISA_Align CISAAlign;
29 const char* AlignName;
30 uint16_t AlignBytes;
31 } CISAAlignInfo;
32
33 static CISAAlignInfo CISAAlignTable[ALIGN_TOTAL_NUM] =
34 {
35 { ALIGN_BYTE, "byte", 1 },
36 { ALIGN_WORD, "word", 2 },
37 { ALIGN_DWORD, "dword", 4 },
38 { ALIGN_QWORD, "qword", 8 },
39 { ALIGN_OWORD, "oword", 16 },
40 { ALIGN_GRF, "GRF", 0 }, // dynamic
41 { ALIGN_2_GRF, "GRFx2", 0 }, // dynamic
42 { ALIGN_HWORD, "hword", 32 },
43 { ALIGN_32WORD, "wordx32", 64 },
44 { ALIGN_64WORD, "wordx64", 128 }
45 };
46
Common_ISA_Get_Align_Name(VISA_Align align)47 const char* Common_ISA_Get_Align_Name(VISA_Align align)
48 {
49 return CISAAlignTable[align].AlignName;
50 }
51
getAlignInBytes(VISA_Align A)52 uint32_t getAlignInBytes(VISA_Align A)
53 {
54 switch (A)
55 {
56 case ALIGN_GRF: return getGRFSize();
57 case ALIGN_2_GRF: return 2 * getGRFSize();
58 default:
59 break;
60 }
61 return CISAAlignTable[A].AlignBytes;
62 }
63
getCISAAlign(uint32_t AlignInBytes)64 VISA_Align getCISAAlign(uint32_t AlignInBytes)
65 {
66 if (AlignInBytes >= 128)
67 return ALIGN_64WORD;
68 if (AlignInBytes >= 64)
69 return ALIGN_32WORD;
70 if (AlignInBytes >= 32)
71 return ALIGN_HWORD;
72 if (AlignInBytes >= 16)
73 return ALIGN_OWORD;
74 if (AlignInBytes >= 8)
75 return ALIGN_QWORD;
76 if (AlignInBytes >= 4)
77 return ALIGN_DWORD;
78 if (AlignInBytes >= 2)
79 return ALIGN_WORD;
80 return ALIGN_BYTE;
81 }
82
83 GenPrecision_Info_t GenPrecisionTable[] = {
84 /* 0 */ { GenPrecision::INVALID, 0, nullptr },
85 /* 1 */ { GenPrecision::U1, 1, "u1" },
86 /* 2 */ { GenPrecision::S1, 1, "s1" },
87 /* 3 */ { GenPrecision::U2, 2, "u2" },
88 /* 4 */ { GenPrecision::S2, 2, "s2" },
89 /* 5 */ { GenPrecision::U4, 4, "u4" },
90 /* 6 */ { GenPrecision::S4, 4, "s4" },
91 /* 7 */ { GenPrecision::U8, 8, "u8" },
92 /* 8 */ { GenPrecision::S8, 8, "s8" },
93 /* 9 */ { GenPrecision::BF16, 16, "bf" },
94 /* 10 */ { GenPrecision::FP16, 16, "hf" },
95 /* 11 */ { GenPrecision::BF8, 8, "bf8" },
96 /* 12 */ { GenPrecision::TF32, 32, "tf32" },
97 };
98 static_assert((int)GenPrecision::INVALID == 0);
99 static_assert((int)GenPrecision::U1 == 1);
100 static_assert((int)GenPrecision::S1 == 2);
101 static_assert((int)GenPrecision::U2 == 3);
102 static_assert((int)GenPrecision::S2 == 4);
103 static_assert((int)GenPrecision::U4 == 5);
104 static_assert((int)GenPrecision::S4 == 6);
105 static_assert((int)GenPrecision::U8 == 7);
106 static_assert((int)GenPrecision::S8 == 8);
107 static_assert((int)GenPrecision::BF16 == 9);
108 static_assert((int)GenPrecision::FP16 == 10);
109 static_assert((int)GenPrecision::BF8 == 11);
110 static_assert((int)GenPrecision::TF32 == 12);
111 static_assert((int)GenPrecision::TOTAL_NUM == 13);
112
113
Common_ISA_Get_Modifier_Name(VISA_Modifier modifier)114 const char* Common_ISA_Get_Modifier_Name(VISA_Modifier modifier)
115 {
116 switch (modifier)
117 {
118 case MODIFIER_NONE: return "";
119 case MODIFIER_ABS: return "(abs)";
120 case MODIFIER_NEG: return "(-)";
121 case MODIFIER_NEG_ABS: return "(-abs)";
122 case MODIFIER_SAT: return "sat";
123 case MODIFIER_NOT: return "(~)";
124 default:
125 MUST_BE_TRUE(false, "Invalid modifier.");
126 return "invalid_modifier";
127 }
128 }
129
Common_ISA_Get_Region_Value(Common_ISA_Region_Val val)130 short Common_ISA_Get_Region_Value(Common_ISA_Region_Val val)
131 {
132 switch (val) {
133 case REGION_NULL:
134 return -1;
135 case REGION_0:
136 return 0;
137 case REGION_1:
138 return 1;
139 case REGION_2:
140 return 2;
141 case REGION_4:
142 return 4;
143 case REGION_8:
144 return 8;
145 case REGION_16:
146 return 16;
147 case REGION_32:
148 return 32;
149 default:
150 MUST_BE_TRUE(false, " illegal region value: " << (int)val);
151 return -1;
152 }
153 }
154
GetGenOpcodeFromVISAOpcode(ISA_Opcode opcode)155 G4_opcode GetGenOpcodeFromVISAOpcode(ISA_Opcode opcode)
156 {
157 switch (opcode)
158 {
159 case ISA_RESERVED_0:
160 return G4_illegal;
161 case ISA_ADD:
162 return G4_add;
163 case ISA_AVG:
164 return G4_avg;
165 case ISA_DIV:
166 return G4_math;
167 case ISA_DP2:
168 return G4_dp2;
169 case ISA_DP3:
170 return G4_dp3;
171 case ISA_DP4:
172 return G4_dp4;
173 case ISA_DPH:
174 return G4_dph;
175 case ISA_DP4A:
176 return G4_dp4a;
177 case ISA_DPAS:
178 return G4_dpas;
179 case ISA_DPASW:
180 return G4_dpasw;
181 case ISA_ADD3:
182 case ISA_ADD3O:
183 return G4_add3;
184 case ISA_BFN:
185 return G4_bfn;
186 case ISA_BF_CVT:
187 case ISA_FCVT:
188 return G4_fcvt;
189 case ISA_SRND:
190 return G4_srnd;
191 case ISA_EXP:
192 return G4_math;
193 case ISA_FRC:
194 return G4_frc;
195 case ISA_LINE:
196 return G4_line;
197 case ISA_LOG:
198 return G4_math;
199 case ISA_LRP:
200 return G4_lrp;
201 case ISA_MAD:
202 return G4_pseudo_mad;
203 case ISA_MOD:
204 return G4_math;
205 case ISA_MUL:
206 return G4_mul;
207 case ISA_PLANE:
208 return G4_pln;
209 case ISA_POW:
210 return G4_math;
211 case ISA_RNDD:
212 return G4_rndd;
213 case ISA_RNDE:
214 return G4_rnde;
215 case ISA_RNDU:
216 return G4_rndu;
217 case ISA_RNDZ:
218 return G4_rndz;
219 case ISA_SAD2:
220 return G4_sad2;
221 case ISA_SAD2ADD:
222 return G4_pseudo_sada2;
223 case ISA_SIN:
224 return G4_math;
225 case ISA_COS:
226 return G4_math;
227 case ISA_SQRT:
228 return G4_math;
229 case ISA_RSQRT:
230 return G4_math;
231 case ISA_INV:
232 return G4_math;
233 case ISA_LZD:
234 return G4_lzd;
235 case ISA_AND:
236 return G4_and;
237 case ISA_OR:
238 return G4_or;
239 case ISA_XOR:
240 return G4_xor;
241 case ISA_NOT:
242 return G4_not;
243 case ISA_SHL:
244 return G4_shl;
245 case ISA_SHR:
246 return G4_shr;
247 case ISA_ASR:
248 return G4_asr;
249 case ISA_ROL:
250 return G4_rol;
251 case ISA_ROR:
252 return G4_ror;
253 case ISA_BFE:
254 return G4_bfe;
255 case ISA_BFI:
256 return G4_bfi1;
257 case ISA_BFREV:
258 return G4_bfrev;
259 case ISA_CBIT:
260 return G4_cbit;
261 case ISA_FBL:
262 return G4_fbl;
263 case ISA_FBH:
264 return G4_fbh;
265 case ISA_ADDR_ADD:
266 return G4_add;
267 case ISA_MOV:
268 return G4_mov;
269 case ISA_SEL:
270 case ISA_FMINMAX:
271 return G4_sel;
272 case ISA_SETP:
273 break;
274 case ISA_CMP:
275 return G4_cmp;
276 case ISA_SUBROUTINE:
277 break;
278 case ISA_LABEL:
279 return G4_label;
280 case ISA_JMP:
281 return G4_jmpi;
282 case ISA_CALL:
283 return G4_call;
284 case ISA_RET:
285 return G4_return;
286 case ISA_MULH:
287 return G4_mulh;
288 case ISA_ADDC:
289 return G4_addc;
290 case ISA_SUBB:
291 return G4_subb;
292 case ISA_OWORD_LD:
293 case ISA_OWORD_ST:
294 case ISA_MEDIA_LD:
295 case ISA_MEDIA_ST:
296 case ISA_GATHER:
297 case ISA_SCATTER:
298 case ISA_OWORD_LD_UNALIGNED:
299 case ISA_SAMPLE:
300 case ISA_SAMPLE_UNORM:
301 case ISA_FILE:
302 case ISA_LOC:
303 case ISA_DWORD_ATOMIC:
304 break;
305 case ISA_GOTO:
306 return G4_goto;
307 case ISA_MADW:
308 return G4_madw;
309 break;
310 default:
311 MUST_BE_TRUE(0, "Invalid opcode in common ISA.");
312 break;
313 }
314 return G4_illegal;
315 }
316
GetGenTypeFromVISAType(VISA_Type type)317 G4_Type GetGenTypeFromVISAType(VISA_Type type)
318 {
319 switch (type)
320 {
321 case ISA_TYPE_UD:
322 return Type_UD;
323 case ISA_TYPE_D:
324 return Type_D;
325 case ISA_TYPE_UW:
326 return Type_UW;
327 case ISA_TYPE_W:
328 return Type_W;
329 case ISA_TYPE_UB:
330 return Type_UB;
331 case ISA_TYPE_B:
332 return Type_B;
333 case ISA_TYPE_DF:
334 return Type_DF;
335 case ISA_TYPE_F:
336 return Type_F;
337 case ISA_TYPE_VF:
338 return Type_VF;
339 case ISA_TYPE_V:
340 return Type_V;
341 case ISA_TYPE_BOOL:
342 return Type_BOOL;
343 case ISA_TYPE_UV:
344 return Type_UV;
345 case ISA_TYPE_Q:
346 return Type_Q;
347 case ISA_TYPE_UQ:
348 return Type_UQ;
349 case ISA_TYPE_HF:
350 return Type_HF;
351 case ISA_TYPE_BF:
352 return Type_BF;
353 default:
354 return Type_UNDEF;
355 }
356 }
357
Get_Common_ISA_Type_From_G4_Type(G4_Type type)358 VISA_Type Get_Common_ISA_Type_From_G4_Type(G4_Type type)
359 {
360 switch (type)
361 {
362 case Type_UD:
363 return ISA_TYPE_UD;
364 case Type_D:
365 return ISA_TYPE_D;
366 case Type_UW:
367 return ISA_TYPE_UW;
368 case Type_W:
369 return ISA_TYPE_W;
370 case Type_UB:
371 return ISA_TYPE_UB;
372 case Type_B:
373 return ISA_TYPE_B;
374 case Type_DF:
375 return ISA_TYPE_DF;
376 case Type_F:
377 return ISA_TYPE_F;
378 case Type_VF:
379 return ISA_TYPE_VF;
380 case Type_V:
381 return ISA_TYPE_V;
382 case Type_BOOL:
383 return ISA_TYPE_BOOL;
384 case Type_UV:
385 return ISA_TYPE_UV;
386 case Type_Q:
387 return ISA_TYPE_Q;
388 case Type_UQ:
389 return ISA_TYPE_UQ;
390 case Type_HF:
391 return ISA_TYPE_HF;
392 case Type_BF:
393 return ISA_TYPE_BF;
394 default:
395 return ISA_TYPE_NUM;
396 }
397 }
398
GetGenSrcModFromVISAMod(VISA_Modifier mod)399 G4_SrcModifier GetGenSrcModFromVISAMod(VISA_Modifier mod)
400 {
401 switch (mod)
402 {
403 case MODIFIER_NONE:
404 return Mod_src_undef;
405 case MODIFIER_ABS:
406 return Mod_Abs;
407 case MODIFIER_NEG:
408 return Mod_Minus;
409 case MODIFIER_NEG_ABS:
410 return Mod_Minus_Abs;
411 case MODIFIER_NOT:
412 return Mod_Not;
413 default:
414 MUST_BE_TRUE(0, "Wrong src modifier");
415 return Mod_src_undef;
416 }
417 }
418
Get_G4_CondModifier_From_Common_ISA_CondModifier(VISA_Cond_Mod cmod)419 G4_CondModifier Get_G4_CondModifier_From_Common_ISA_CondModifier(VISA_Cond_Mod cmod)
420 {
421 switch (cmod) {
422 case ISA_CMP_E:
423 return Mod_e;
424 case ISA_CMP_NE:
425 return Mod_ne;
426 case ISA_CMP_G:
427 return Mod_g;
428 case ISA_CMP_GE:
429 return Mod_ge;
430 case ISA_CMP_L:
431 return Mod_l;
432 case ISA_CMP_LE:
433 return Mod_le;
434 case ISA_CMP_UNDEF:
435 return Mod_cond_undef;
436 default:
437 MUST_BE_TRUE(0, "Invalid CISA Conditional Modifier.");
438 return Mod_cond_undef;
439 }
440 }
441
hasPredicate(ISA_Opcode op)442 bool hasPredicate(ISA_Opcode op)
443 {
444 switch (ISA_Inst_Table[op].type)
445 {
446 case ISA_Inst_Mov:
447 return !(op == ISA_SETP || op == ISA_MOVS || op == ISA_FMINMAX || op == ISA_BF_CVT || op == ISA_FCVT);
448 case ISA_Inst_Arith:
449 case ISA_Inst_Logic:
450 {
451 if (op == ISA_SRND)
452 {
453 return false;
454 }
455 return true;
456 }
457 case ISA_Inst_Compare:
458 case ISA_Inst_Address:
459 case ISA_Inst_Data_Port:
460 case ISA_Inst_Sampler:
461 case ISA_Inst_Misc:
462 return (op == ISA_DWORD_ATOMIC || op == ISA_GATHER_SCALED ||
463 op == ISA_GATHER4_SCALED || op == ISA_GATHER4_TYPED ||
464 op == ISA_SCATTER_SCALED || op == ISA_SCATTER4_SCALED ||
465 op == ISA_SCATTER4_TYPED || op == ISA_RAW_SEND ||
466 op == ISA_RAW_SENDS || op == ISA_3D_SAMPLE ||
467 op == ISA_3D_LOAD || op == ISA_3D_GATHER4 ||
468 op == ISA_3D_RT_WRITE || op == ISA_3D_URB_WRITE ||
469 op == ISA_3D_TYPED_ATOMIC || op == ISA_QW_GATHER || op == ISA_QW_SCATTER
470
471 );
472 case ISA_Inst_Flow:
473 return !(op == ISA_SUBROUTINE || op == ISA_LABEL || op == ISA_SWITCHJMP);
474 case ISA_Inst_LSC:
475 return true;
476 case ISA_Inst_SIMD_Flow:
477 return op == ISA_GOTO;
478 default:
479 return false;
480 }
481 }
482
hasExecSize(ISA_Opcode op,uint8_t subOp)483 bool hasExecSize(ISA_Opcode op, uint8_t subOp)
484 {
485 switch (ISA_Inst_Table[op].type)
486 {
487 case ISA_Inst_Mov:
488 case ISA_Inst_Arith:
489 case ISA_Inst_Logic:
490 case ISA_Inst_Compare:
491 case ISA_Inst_Address:
492 return true;
493 case ISA_Inst_Data_Port:
494 if (op == ISA_MEDIA_LD || op == ISA_MEDIA_ST) {
495 return false;
496 } else
497 return true;
498 case ISA_Inst_SVM:
499 if (subOp == SVM_BLOCK_LD || subOp == SVM_BLOCK_ST || subOp == 0) {
500 return false;
501 } else
502 return true;
503 case ISA_Inst_LSC:
504 return true;
505 case ISA_Inst_Sampler:
506 case ISA_Inst_Misc:
507 if (op == ISA_RAW_SEND || op == ISA_RAW_SENDS || op == ISA_3D_SAMPLE ||
508 op == ISA_3D_LOAD || op == ISA_3D_GATHER4 || op == ISA_3D_URB_WRITE ||
509 op == ISA_3D_INFO)
510 {
511 return true;
512 }
513 else if (op == ISA_DPAS || op == ISA_DPASW)
514 {
515 return true;
516 }
517 else
518 return false;
519 case ISA_Inst_Flow:
520 if (op == ISA_SUBROUTINE || op == ISA_LABEL || op == ISA_FADDR)
521 {
522 return false;
523 }
524 else
525 return true;
526 case ISA_Inst_SIMD_Flow:
527 return true;
528 default:
529 return false;
530 }
531 }
532
533
hasLabelSrc(ISA_Opcode op)534 bool hasLabelSrc(ISA_Opcode op)
535 {
536 if (ISA_Inst_Table[op].type == ISA_Inst_Flow)
537 {
538 if (op == ISA_RET || op == ISA_FRET || op == ISA_IFCALL || op == ISA_FADDR)
539 return false;
540 else //(op == ISA_SUBROUTINE || op == ISA_LABEL || op == ISA_JMP || op == ISA_CALL || op == ISA_FCALL)
541 return true;
542 }
543 else if (op == ISA_GOTO)
544 return true;
545 else
546 return false;
547 }
548
Get_Common_ISA_SVM_Block_Num(VISA_SVM_Block_Num num)549 unsigned Get_Common_ISA_SVM_Block_Num(VISA_SVM_Block_Num num)
550 {
551 switch (num)
552 {
553 case SVM_BLOCK_NUM_1: return 1;
554 case SVM_BLOCK_NUM_2: return 2;
555 case SVM_BLOCK_NUM_4: return 4;
556 case SVM_BLOCK_NUM_8: return 8;
557 default: MUST_BE_TRUE(false, "Illegal SVM block number (should be 1, 2, 4, or 8).");
558 }
559 return 0;
560 }
561
valueToVISASVMBlockNum(unsigned int value)562 VISA_SVM_Block_Num valueToVISASVMBlockNum(unsigned int value)
563 {
564 switch (value)
565 {
566 case 1:
567 return SVM_BLOCK_NUM_1;
568 case 2:
569 return SVM_BLOCK_NUM_2;
570 case 4:
571 return SVM_BLOCK_NUM_4;
572 case 8:
573 return SVM_BLOCK_NUM_8;
574 default:
575 MUST_BE_TRUE(false, "invalid SVM block number");
576 return SVM_BLOCK_NUM_1;
577 }
578 }
579
valueToVISASVMBlockType(unsigned int value)580 VISA_SVM_Block_Type valueToVISASVMBlockType(unsigned int value)
581 {
582 switch (value)
583 {
584 case 1:
585 return SVM_BLOCK_TYPE_BYTE;
586 case 4:
587 return SVM_BLOCK_TYPE_DWORD;
588 case 8:
589 return SVM_BLOCK_TYPE_QWORD;
590
591 default:
592 MUST_BE_TRUE(false, "invalid SVM block number");
593 return SVM_BLOCK_TYPE_BYTE;
594 }
595
596 }
597
Get_Common_ISA_SVM_Block_Size(VISA_SVM_Block_Type size)598 unsigned Get_Common_ISA_SVM_Block_Size(VISA_SVM_Block_Type size)
599 {
600 switch (size)
601 {
602 case SVM_BLOCK_TYPE_BYTE: return 1;
603 case SVM_BLOCK_TYPE_DWORD: return 4;
604 case SVM_BLOCK_TYPE_QWORD: return 8;
605 default: MUST_BE_TRUE(false, "Illegal SVM block size (should be 1, 4, or 8).");
606 }
607 return 0;
608 }
609
Get_VISA_Oword_Num(VISA_Oword_Num num)610 unsigned Get_VISA_Oword_Num(VISA_Oword_Num num)
611 {
612 switch (num) {
613 case OWORD_NUM_1:
614 return 1;
615 case OWORD_NUM_2:
616 return 2;
617 case OWORD_NUM_4:
618 return 4;
619 case OWORD_NUM_8:
620 return 8;
621 case OWORD_NUM_16:
622 return 16;
623 default:
624 MUST_BE_TRUE(false, "illegal Oword number (should be 0..3).");
625 return 0;
626 }
627 }
628
Get_VISA_Exec_Size(VISA_Exec_Size size)629 unsigned Get_VISA_Exec_Size(VISA_Exec_Size size)
630 {
631 switch (size) {
632 case EXEC_SIZE_1:
633 return 1;
634 case EXEC_SIZE_2:
635 return 2;
636 case EXEC_SIZE_4:
637 return 4;
638 case EXEC_SIZE_8:
639 return 8;
640 case EXEC_SIZE_16:
641 return 16;
642 case EXEC_SIZE_32:
643 return 32;
644 default:
645 MUST_BE_TRUE(false, "illegal common ISA execsize (should be 0..5).");
646 return 0;
647 }
648 }
649
IsMathInst(ISA_Opcode op)650 bool IsMathInst(ISA_Opcode op)
651 {
652 switch (op) {
653 case ISA_INV:
654 case ISA_DIV:
655 case ISA_MOD:
656 case ISA_LOG:
657 case ISA_EXP:
658 case ISA_SQRT:
659 case ISA_RSQRT:
660 case ISA_SIN:
661 case ISA_COS:
662 case ISA_POW:
663 return true;
664 default:
665 return false;
666 }
667 }
668
IsIntType(VISA_Type type)669 bool IsIntType(VISA_Type type)
670 {
671 switch (type) {
672 case ISA_TYPE_UD:
673 case ISA_TYPE_D:
674 case ISA_TYPE_UW:
675 case ISA_TYPE_W:
676 case ISA_TYPE_UB:
677 case ISA_TYPE_B:
678 case ISA_TYPE_Q:
679 case ISA_TYPE_UQ:
680 return true;
681 default:
682 return false;
683 }
684 }
685
IsIntOrIntVecType(VISA_Type type)686 bool IsIntOrIntVecType(VISA_Type type)
687 {
688 return type == ISA_TYPE_V || type == ISA_TYPE_UV || IsIntType(type);
689 }
690
IsSingedIntType(VISA_Type type)691 bool IsSingedIntType(VISA_Type type)
692 {
693 switch (type) {
694 case ISA_TYPE_D:
695 case ISA_TYPE_W:
696 case ISA_TYPE_B:
697 case ISA_TYPE_Q:
698 return true;
699 default:
700 return false;
701 }
702 }
703
IsUnsignedIntType(VISA_Type type)704 bool IsUnsignedIntType(VISA_Type type)
705 {
706 switch (type) {
707 case ISA_TYPE_UD:
708 case ISA_TYPE_UW:
709 case ISA_TYPE_UB:
710 case ISA_TYPE_UQ:
711 return true;
712 default:
713 return false;
714 }
715 }
716
Get_Common_ISA_Region_Value(Common_ISA_Region_Val val)717 unsigned short Get_Common_ISA_Region_Value(Common_ISA_Region_Val val)
718 {
719 switch (val) {
720 case REGION_0:
721 return 0;
722 case REGION_1:
723 return 1;
724 case REGION_2:
725 return 2;
726 case REGION_4:
727 return 4;
728 case REGION_8:
729 return 8;
730 case REGION_16:
731 return 16;
732 case REGION_32:
733 return 32;
734 default:
735 return UNDEFINED_SHORT; //???
736 }
737 }
738
Get_CISA_Region_Val(short val)739 Common_ISA_Region_Val Get_CISA_Region_Val(short val)
740 {
741 if (val == (short)0x8000) {
742 return REGION_NULL;
743 }
744 else {
745 switch (val) {
746 case 0: return REGION_0;
747 case 1: return REGION_1;
748 case 2: return REGION_2;
749 case 4: return REGION_4;
750 case 8: return REGION_8;
751 case 16: return REGION_16;
752 case 32: return REGION_32;
753 case -1:
754 return REGION_NULL;
755 default:
756 MUST_BE_TRUE(0, "Invalid Region value.");
757 return REGION_NULL;
758 }
759 }
760 }
761
Create_CISA_Region(unsigned short vstride,unsigned short width,unsigned short hstride)762 unsigned short Create_CISA_Region(
763 unsigned short vstride,
764 unsigned short width,
765 unsigned short hstride)
766 {
767 unsigned short region = 0;
768 region |= (unsigned short)Get_CISA_Region_Val(vstride) & 0xF;
769 region |= ((unsigned short)Get_CISA_Region_Val(width) & 0xF) << 4;
770 region |= ((unsigned short)Get_CISA_Region_Val(hstride) & 0xF) << 8;
771 return region;
772 }
773
Round_Down_Pow2(unsigned n)774 unsigned Round_Down_Pow2(unsigned n)
775 {
776 unsigned int i = 1;
777 while (n >= i) i <<= 1;
778 return (i>>1);
779 }
Round_Up_Pow2(unsigned n)780 unsigned Round_Up_Pow2(unsigned n)
781 {
782 unsigned int i = 1;
783 if (n == 0)
784 return 0;
785 while (n > i) i <<= 1;
786 return i;
787 }
788
Get_Pseudo_Opcode(ISA_Opcode op)789 G4_opcode Get_Pseudo_Opcode(ISA_Opcode op)
790 {
791 switch (op) {
792 case ISA_AND:
793 return G4_pseudo_and;
794 case ISA_OR:
795 return G4_pseudo_or;
796 case ISA_XOR:
797 return G4_pseudo_xor;
798 case ISA_NOT:
799 return G4_pseudo_not;
800 default:
801 return G4_illegal;
802 }
803 return G4_illegal;
804 }
805
Get_Next_EMask(VISA_EMask_Ctrl currEMask,G4_ExecSize execSize)806 VISA_EMask_Ctrl Get_Next_EMask(VISA_EMask_Ctrl currEMask, G4_ExecSize execSize)
807 {
808 switch (execSize) {
809 default: // Next eMask is only valid for SIMD4, SIMD8, and SIMD16.
810 break;
811 case 16:
812 switch (currEMask) {
813 case vISA_EMASK_M1: return vISA_EMASK_M5;
814 case vISA_EMASK_M1_NM: return vISA_EMASK_M5_NM;
815 default: break;
816 }
817 break;
818 case 8:
819 switch (currEMask) {
820 case vISA_EMASK_M1: return vISA_EMASK_M3;
821 case vISA_EMASK_M1_NM: return vISA_EMASK_M3_NM;
822 case vISA_EMASK_M3: return vISA_EMASK_M5;
823 case vISA_EMASK_M3_NM: return vISA_EMASK_M5_NM;
824 case vISA_EMASK_M5: return vISA_EMASK_M7;
825 case vISA_EMASK_M5_NM: return vISA_EMASK_M7_NM;
826 default: break;
827 }
828 break;
829 case 4:
830 switch (currEMask) {
831 case vISA_EMASK_M1: return vISA_EMASK_M2;
832 case vISA_EMASK_M1_NM: return vISA_EMASK_M2_NM;
833 case vISA_EMASK_M2: return vISA_EMASK_M3;
834 case vISA_EMASK_M2_NM: return vISA_EMASK_M3_NM;
835 case vISA_EMASK_M3: return vISA_EMASK_M4;
836 case vISA_EMASK_M3_NM: return vISA_EMASK_M4_NM;
837 case vISA_EMASK_M4: return vISA_EMASK_M5;
838 case vISA_EMASK_M4_NM: return vISA_EMASK_M5_NM;
839 case vISA_EMASK_M5: return vISA_EMASK_M6;
840 case vISA_EMASK_M5_NM: return vISA_EMASK_M6_NM;
841 case vISA_EMASK_M6: return vISA_EMASK_M7;
842 case vISA_EMASK_M6_NM: return vISA_EMASK_M7_NM;
843 case vISA_EMASK_M7: return vISA_EMASK_M8;
844 case vISA_EMASK_M7_NM: return vISA_EMASK_M8_NM;
845 default: break;
846 }
847 break;
848 }
849
850 return vISA_NUM_EMASK;
851 }
852
Get_Gen4_Emask(VISA_EMask_Ctrl cisa_emask,G4_ExecSize exec_size)853 G4_InstOpts Get_Gen4_Emask(VISA_EMask_Ctrl cisa_emask, G4_ExecSize exec_size)
854 {
855
856 switch (exec_size.value)
857 {
858 case 32:
859 switch (cisa_emask)
860 {
861 case vISA_EMASK_M1:
862 return InstOpt_NoOpt;
863 case vISA_EMASK_M5:
864 return InstOpt_M16;
865 case vISA_EMASK_M1_NM:
866 return InstOpt_WriteEnable;
867 case vISA_EMASK_M5_NM:
868 return InstOpt_M16 | InstOpt_WriteEnable;
869 default:
870 ASSERT_USER(false, "Invalid emask for SIMD32 inst");
871 return InstOpt_NoOpt;
872 }
873 break;
874 case 16:
875 {
876 switch (cisa_emask)
877 {
878 case vISA_EMASK_M1:
879 return InstOpt_M0;
880 case vISA_EMASK_M5:
881 return InstOpt_M16;
882 case vISA_EMASK_M1_NM:
883 return InstOpt_M0 | InstOpt_WriteEnable;
884 case vISA_EMASK_M5_NM:
885 return InstOpt_M16 | InstOpt_WriteEnable;
886 default:
887 MUST_BE_TRUE(false, "Invalid emask for SIMD16 inst");
888 return InstOpt_NoOpt;
889 }
890 }
891 break;
892 case 8:
893 {
894 switch (cisa_emask)
895 {
896 case vISA_EMASK_M1:
897 return InstOpt_M0;
898 case vISA_EMASK_M3:
899 return InstOpt_M8;
900 case vISA_EMASK_M5:
901 return InstOpt_M16;
902 case vISA_EMASK_M7:
903 return InstOpt_M24;
904 case vISA_EMASK_M1_NM:
905 return InstOpt_M0 | InstOpt_WriteEnable;
906 case vISA_EMASK_M3_NM:
907 return InstOpt_M8 | InstOpt_WriteEnable;
908 case vISA_EMASK_M5_NM:
909 return InstOpt_M16 | InstOpt_WriteEnable;
910 case vISA_EMASK_M7_NM:
911 return InstOpt_M24 | InstOpt_WriteEnable;
912 default:
913 MUST_BE_TRUE(false, "Invalid emask for SIMD8 inst");
914 return InstOpt_NoOpt;
915 }
916 }
917 default:
918 // size 4, 2, 1
919 {
920 switch (cisa_emask)
921 {
922 case vISA_EMASK_M1:
923 return InstOpt_M0;
924 case vISA_EMASK_M2:
925 return InstOpt_M4;
926 case vISA_EMASK_M3:
927 return InstOpt_M8;
928 case vISA_EMASK_M4:
929 return InstOpt_M12;
930 case vISA_EMASK_M5:
931 return InstOpt_M16;
932 case vISA_EMASK_M6:
933 return InstOpt_M20;
934 case vISA_EMASK_M7:
935 return InstOpt_M24;
936 case vISA_EMASK_M8:
937 return InstOpt_M28;
938 case vISA_EMASK_M1_NM:
939 return InstOpt_M0 | InstOpt_WriteEnable;
940 case vISA_EMASK_M2_NM:
941 return InstOpt_M4 | InstOpt_WriteEnable;
942 case vISA_EMASK_M3_NM:
943 return InstOpt_M8 | InstOpt_WriteEnable;
944 case vISA_EMASK_M4_NM:
945 return InstOpt_M12 | InstOpt_WriteEnable;
946 case vISA_EMASK_M5_NM:
947 return InstOpt_M16 | InstOpt_WriteEnable;
948 case vISA_EMASK_M6_NM:
949 return InstOpt_M20 | InstOpt_WriteEnable;
950 case vISA_EMASK_M7_NM:
951 return InstOpt_M24 | InstOpt_WriteEnable;
952 case vISA_EMASK_M8_NM:
953 return InstOpt_M28 | InstOpt_WriteEnable;
954 default:
955 MUST_BE_TRUE(false, "Invalid emask for SIMD4 inst.");
956 return InstOpt_NoOpt;
957 }
958 }
959 }
960 }
961
Get_Atomic_Op(VISAAtomicOps op)962 unsigned Get_Atomic_Op(VISAAtomicOps op) {
963
964 switch (op) {
965 default:
966 ASSERT_USER(false, "CISA error: Invalid vISA atomic op for DWord atomic write.");
967 break;
968 case ATOMIC_ADD: return GEN_ATOMIC_ADD;
969 case ATOMIC_SUB: return GEN_ATOMIC_SUB;
970 case ATOMIC_INC: return GEN_ATOMIC_INC;
971 case ATOMIC_DEC: return GEN_ATOMIC_DEC;
972 case ATOMIC_MIN: return GEN_ATOMIC_UMIN;
973 case ATOMIC_MAX: return GEN_ATOMIC_UMAX;
974 case ATOMIC_XCHG: return GEN_ATOMIC_MOV;
975 case ATOMIC_CMPXCHG: return GEN_ATOMIC_CMPWR;
976 case ATOMIC_AND: return GEN_ATOMIC_AND;
977 case ATOMIC_OR: return GEN_ATOMIC_OR;
978 case ATOMIC_XOR: return GEN_ATOMIC_XOR;
979 case ATOMIC_IMIN: return GEN_ATOMIC_IMIN;
980 case ATOMIC_IMAX: return GEN_ATOMIC_IMAX;
981 case ATOMIC_PREDEC: return GEN_ATOMIC_PREDEC;
982 case ATOMIC_FMIN: return GEN_ATOMIC_FMIN;
983 case ATOMIC_FMAX: return GEN_ATOMIC_FMAX;
984 case ATOMIC_FCMPWR: return GEN_ATOMIC_FCMPWR;
985 case ATOMIC_FADD: return GEN_ATOMIC_FADD;
986 case ATOMIC_FSUB: return GEN_ATOMIC_FSUB;
987 }
988 return ~0U;
989 }
990
Get_VISA_Type_Size(VISA_Type type)991 uint16_t Get_VISA_Type_Size(VISA_Type type)
992 {
993 switch (type)
994 {
995 case ISA_TYPE_UD:
996 case ISA_TYPE_D:
997 case ISA_TYPE_F:
998 case ISA_TYPE_V:
999 case ISA_TYPE_VF:
1000 case ISA_TYPE_UV:
1001 return 4;
1002 case ISA_TYPE_UW:
1003 case ISA_TYPE_W:
1004 case ISA_TYPE_HF:
1005 return 2;
1006 case ISA_TYPE_UB:
1007 case ISA_TYPE_B:
1008 case ISA_TYPE_BOOL:
1009 return 1;
1010 case ISA_TYPE_DF:
1011 case ISA_TYPE_Q:
1012 case ISA_TYPE_UQ:
1013 return 8;
1014 default:
1015 MUST_BE_TRUE(0, "Invalid data type: size unknown.");
1016 return 0;
1017
1018
1019 }
1020 }
1021
getSizeInBinary() const1022 int attribute_info_t::getSizeInBinary() const
1023 {
1024 return sizeof(nameIndex) + sizeof(size) + size;
1025 }
1026
getSizeInBinary() const1027 int label_info_t::getSizeInBinary() const
1028 {
1029 int size = sizeof(name_index) + sizeof(kind) + sizeof(attribute_count);
1030
1031 for (int i = 0; i < attribute_count; i++)
1032 {
1033 size += attributes[i].getSizeInBinary();
1034 }
1035 return size;
1036 }
1037
getSizeInBinary() const1038 int var_info_t::getSizeInBinary() const
1039 {
1040 /*
1041 var_info {
1042 ud name_index;
1043 ub bit_properties;
1044 uw num_elements;
1045 ud alias_index;
1046 uw alias_offset;
1047 ub attribute_count;
1048 attribute_info[attribute_count];
1049 }
1050 */
1051 int size = sizeof(name_index) + sizeof(bit_properties) + sizeof(num_elements) +
1052 sizeof(alias_index) + sizeof(alias_offset) + sizeof(alias_scope_specifier) + sizeof(attribute_count);
1053
1054 for (int i = 0; i < attribute_count; i++)
1055 {
1056 size += attributes[i].getSizeInBinary();
1057 }
1058 return size;
1059 }
1060
getSizeInBinary() const1061 int addr_info_t::getSizeInBinary() const
1062 {
1063 /*
1064 address_info {
1065 ud name_index;
1066 uw num_elements;
1067 ub attribute_count;
1068 attribute_info[attribute_count];
1069 }
1070 */
1071 int size = sizeof(name_index) + sizeof(num_elements) + sizeof(attribute_count);
1072 for (int i = 0; i < attribute_count; i++)
1073 {
1074 size += attributes[i].getSizeInBinary();
1075 }
1076 return size;
1077 }
1078
getSizeInBinary() const1079 int pred_info_t::getSizeInBinary() const
1080 {
1081 /*
1082 predicate_info {
1083 ud name_index;
1084 uw num_elements;
1085 ub attribute_count;
1086 attribute_info[attribute_count];
1087 }
1088 */
1089 int size = sizeof(name_index) + sizeof(num_elements) + sizeof(attribute_count);
1090 for (int i = 0; i < attribute_count; i++)
1091 {
1092 size += attributes[i].getSizeInBinary();
1093 }
1094 return size;
1095 }
1096
getSizeInBinary() const1097 int input_info_t::getSizeInBinary() const
1098 {
1099 /*
1100 input_info {
1101 b kind;
1102 ud id;
1103 w offset;
1104 uw size;
1105 }
1106 */
1107 return sizeof(kind) + sizeof(index) + sizeof(offset) + sizeof(size);
1108 }
1109
getSizeInBinary() const1110 int vector_opnd::getSizeInBinary() const
1111 {
1112 int size = 0;
1113
1114 switch (tag & 0x7)
1115 {
1116 case OPERAND_GENERAL:
1117 {
1118 size = sizeof(opnd_val.gen_opnd.index) + sizeof(opnd_val.gen_opnd.col_offset) +
1119 sizeof(opnd_val.gen_opnd.row_offset) + sizeof(opnd_val.gen_opnd.region);
1120 break;
1121 }
1122 case OPERAND_ADDRESS:
1123 {
1124 size = sizeof(opnd_val.addr_opnd.index) + sizeof(opnd_val.addr_opnd.offset) +
1125 sizeof(opnd_val.addr_opnd.width);
1126 break;
1127 }
1128 case OPERAND_INDIRECT:
1129 {
1130 size = sizeof(opnd_val.indirect_opnd.index) + sizeof(opnd_val.indirect_opnd.addr_offset) +
1131 sizeof(opnd_val.indirect_opnd.indirect_offset) + sizeof(opnd_val.indirect_opnd.bit_property) +
1132 sizeof(opnd_val.indirect_opnd.region);
1133 break;
1134 }
1135 case OPERAND_PREDICATE:
1136 {
1137 size = sizeof(opnd_val.pred_opnd.index);
1138 break;
1139 }
1140 case OPERAND_IMMEDIATE:
1141 {
1142 switch (opnd_val.const_opnd.type) {
1143 default:
1144 size = sizeof(unsigned int);
1145 break;
1146 case ISA_TYPE_Q:
1147 case ISA_TYPE_UQ:
1148 case ISA_TYPE_DF:
1149 size = sizeof(unsigned long long);
1150 break;
1151 }
1152
1153 size += sizeof(opnd_val.const_opnd.type);
1154 break;
1155 }
1156 case OPERAND_STATE:
1157 {
1158 size = sizeof(opnd_val.state_opnd.index) + sizeof(opnd_val.state_opnd.offset) +
1159 sizeof(opnd_val.state_opnd.opnd_class);
1160 break;
1161 }
1162 default:
1163 {
1164 MUST_BE_TRUE(0, "Invalid Vector Operand Class. Size cannot be determined.");
1165 break;
1166 }
1167 }
1168
1169 size += sizeof(tag);
1170
1171 return size;
1172 }
1173
1174 /*
1175 function_info {
1176 ub linkage; // MBZ
1177 uw name_len;
1178 ub name[name_len];
1179 ud offset;
1180 ud size;
1181 uw num_syms_variable; // MBZ
1182 uw num_syms_function; // MBZ
1183 }
1184 */
getSizeInBinary() const1185 uint32_t function_info_t::getSizeInBinary() const
1186 {
1187 uint32_t size = sizeof(linkage) + sizeof(name_len) +
1188 name_len + sizeof(offset) + sizeof(this->size);
1189
1190 size += sizeof(variable_reloc_symtab.num_syms);
1191 size += sizeof(function_reloc_symtab.num_syms);
1192
1193 return size;
1194 }
1195
1196 /*
1197 kernel_info {
1198 uw name_len;
1199 ub name[name_len];
1200 ud offset;
1201 ud size;
1202 ud input_offset;
1203 uw num_syms_variable; // MBZ
1204 uw num_syms_function; // MBZ
1205 ub num_gen_binaries;
1206 gen_binary_info gen_binaries[num_gen_binaries];
1207 }
1208 */
getSizeInBinary() const1209 uint32_t kernel_info_t::getSizeInBinary() const
1210 {
1211 uint32_t size = sizeof(name_len) + name_len
1212 + sizeof(offset) + sizeof(this->size)
1213 + sizeof(input_offset);
1214
1215 size += sizeof(variable_reloc_symtab.num_syms);
1216 size += sizeof(function_reloc_symtab.num_syms);
1217
1218 size += sizeof(num_gen_binaries);
1219
1220 for (int i = 0; i < num_gen_binaries; i++)
1221 {
1222 size += sizeof(gen_binaries->platform);
1223 size += sizeof(gen_binaries->binary_offset);
1224 size += sizeof(gen_binaries->binary_size);
1225 }
1226
1227 return size;
1228 }
1229
getSizeInBinary() const1230 uint32_t common_isa_header::getSizeInBinary() const
1231 {
1232 uint32_t size = sizeof(magic_number) + sizeof(major_version)
1233 + sizeof(minor_version) + sizeof(num_kernels);
1234
1235 for (int i = 0; i < num_kernels; i++)
1236 {
1237 size += kernels[i].getSizeInBinary();
1238 }
1239 /*
1240 common_isa_header {
1241 ud magic_number;
1242 ub major_version;
1243 ub minor_version;
1244 uw num_kernels;
1245 kernel_info kernels[num_kernels];
1246 uw num_variables;
1247 file_scope_var_info variables[num_variables];
1248 uw num_functions;
1249 function_info functions[num_functions];
1250 }
1251
1252 */
1253
1254 // file-scope variables are no longer supported
1255 size += sizeof(uint16_t);
1256
1257 size += sizeof(num_functions);
1258
1259 for (int i = 0; i < num_functions; i++)
1260 {
1261 size += functions[i].getSizeInBinary();
1262 }
1263
1264 return size;
1265 }
1266
Get_Common_ISA_CondModifier_From_G4_CondModifier(G4_CondModifier cmod)1267 VISA_Cond_Mod Get_Common_ISA_CondModifier_From_G4_CondModifier(G4_CondModifier cmod)
1268 {
1269 switch (cmod) {
1270 //case ISA_CMP_NONE:
1271 // return Mod_z;
1272 case Mod_e:
1273 return ISA_CMP_E;
1274 case Mod_ne:
1275 return ISA_CMP_NE;
1276 case Mod_g:
1277 return ISA_CMP_G;
1278 case Mod_ge:
1279 return ISA_CMP_GE;
1280 case Mod_l:
1281 return ISA_CMP_L;
1282 case Mod_le:
1283 return ISA_CMP_LE;
1284 //case ISA_CMP_R:
1285 // return Mod_r;
1286 //case ISA_CMP_O:
1287 // return Mod_o;
1288 //case ISA_CMP_U:
1289 // return Mod_u;
1290 case Mod_cond_undef:
1291 return ISA_CMP_UNDEF;
1292 default:
1293 MUST_BE_TRUE(0, "Invalid G4 Conditional Modifier.");
1294 return ISA_CMP_UNDEF;
1295 }
1296 }
1297
Get_VISA_Exec_Size_From_Raw_Size(unsigned int size)1298 VISA_Exec_Size Get_VISA_Exec_Size_From_Raw_Size(unsigned int size)
1299 {
1300 switch (size) {
1301 case 1:
1302 return EXEC_SIZE_1;
1303 case 2:
1304 return EXEC_SIZE_2;
1305 case 4:
1306 return EXEC_SIZE_4;
1307 case 8:
1308 return EXEC_SIZE_8;
1309 case 16:
1310 return EXEC_SIZE_16;
1311 case 32:
1312 return EXEC_SIZE_32;
1313 default:
1314 MUST_BE_TRUE(false, "illegal common ISA execsize (should be 1, 2, 4, 8, 16, 32).");
1315 return EXEC_SIZE_ILLEGAL;
1316 }
1317 }
1318
getSizeInBinary() const1319 int state_info_t::getSizeInBinary() const
1320 {
1321 int size = sizeof(name_index) + sizeof(num_elements) + sizeof(attribute_count);
1322
1323 for (int i = 0; i < attribute_count; i++)
1324 {
1325 size += attributes[i].getSizeInBinary();
1326 }
1327 return size;
1328 }
1329
Get_VISA_Oword_Num_From_Number(unsigned num)1330 VISA_Oword_Num Get_VISA_Oword_Num_From_Number(unsigned num)
1331 {
1332 switch (num) {
1333 case 1:
1334 return OWORD_NUM_1;
1335 case 2:
1336 return OWORD_NUM_2;
1337 case 4:
1338 return OWORD_NUM_4;
1339 case 8:
1340 return OWORD_NUM_8;
1341 case 16:
1342 return OWORD_NUM_16;
1343 default:
1344 MUST_BE_TRUE(false, "illegal Oword number.");
1345 return OWORD_NUM_ILLEGAL;
1346 }
1347 }
1348
Get_Common_ISA_SrcMod_From_G4_Mod(G4_SrcModifier mod)1349 VISA_Modifier Get_Common_ISA_SrcMod_From_G4_Mod(G4_SrcModifier mod)
1350 {
1351 switch (mod)
1352 {
1353 case Mod_src_undef:
1354 return MODIFIER_NONE ;
1355 case Mod_Abs:
1356 return MODIFIER_ABS ;
1357 case Mod_Minus:
1358 return MODIFIER_NEG ;
1359 case Mod_Minus_Abs:
1360 return MODIFIER_NEG_ABS ;
1361 case Mod_Not:
1362 return MODIFIER_NOT;
1363 default:
1364 MUST_BE_TRUE(0, "Wrong src modifier");
1365 return MODIFIER_NONE;
1366 }
1367 }
1368
getRawOperandType(const print_format_provider_t * header,const raw_opnd & opnd)1369 VISA_Type getRawOperandType(const print_format_provider_t* header, const raw_opnd& opnd)
1370 {
1371 unsigned numPreDefinedVars = Get_CISA_PreDefined_Var_Count();
1372 if (opnd.index < numPreDefinedVars)
1373 {
1374 // One of the pre-defined variables
1375 return getPredefinedVarType(mapExternalToInternalPreDefVar(opnd.index));
1376 }
1377
1378 uint32_t opnd_index = opnd.index - numPreDefinedVars;
1379 const var_info_t* currVar = header->getVar(opnd_index);
1380 return currVar->getType();
1381 }
1382
getVectorOperandType(const print_format_provider_t * header,const vector_opnd & opnd)1383 VISA_Type getVectorOperandType(const print_format_provider_t* header, const vector_opnd& opnd)
1384 {
1385 unsigned numPreDefinedVars = Get_CISA_PreDefined_Var_Count();
1386 switch (opnd.getOperandClass())
1387 {
1388 case OPERAND_GENERAL:
1389 if (opnd.opnd_val.gen_opnd.index < numPreDefinedVars)
1390 {
1391 // One of the pre-defined variables
1392 return getPredefinedVarType(mapExternalToInternalPreDefVar(opnd.getOperandIndex()));
1393 }
1394 else
1395 {
1396 const var_info_t& var = *header->getVar(opnd.getOperandIndex()-numPreDefinedVars);
1397 return var.getType();
1398 }
1399 case OPERAND_ADDRESS:
1400 return ISA_TYPE_UW;
1401 case OPERAND_PREDICATE:
1402 return ISA_TYPE_BOOL;
1403 case OPERAND_INDIRECT:
1404 return (VISA_Type)(opnd.opnd_val.indirect_opnd.bit_property & 0xF);
1405 case OPERAND_ADDRESSOF:
1406 return ISA_TYPE_UW;
1407 case OPERAND_IMMEDIATE:
1408 return (VISA_Type)(opnd.opnd_val.const_opnd.type & 0xF);
1409 case OPERAND_STATE:
1410 return ISA_TYPE_UD;
1411 default:
1412 return ISA_TYPE_UD;
1413 }
1414 }
1415
getRawOperand(const CISA_INST * inst,unsigned i)1416 const raw_opnd& getRawOperand(const CISA_INST* inst, unsigned i)
1417 {
1418 MUST_BE_TRUE(inst, "Argument Exception: argument inst is NULL.");
1419 MUST_BE_TRUE(inst->opnd_count > i, "No such operand, i, for instruction inst.");
1420 return inst->opnd_array[i]->_opnd.r_opnd;
1421 }
1422
getVectorOperand(const CISA_INST * inst,unsigned i)1423 const vector_opnd& getVectorOperand(const CISA_INST* inst, unsigned i)
1424 {
1425 MUST_BE_TRUE(inst, "Argument Exception: argument inst is NULL.");
1426 MUST_BE_TRUE(inst->opnd_count > i, "No such operand, i, for instruction inst.");
1427 return inst->opnd_array[i]->_opnd.v_opnd;
1428 }
1429
getOperandType(const CISA_INST * inst,unsigned i)1430 CISA_opnd_type getOperandType(const CISA_INST* inst, unsigned i)
1431 {
1432 MUST_BE_TRUE(inst, "Argument Exception: argument inst is NULL.");
1433 MUST_BE_TRUE(inst->opnd_count > i, "No such operand, i, for instruction inst.");
1434 return inst->opnd_array[i]->opnd_type;
1435 }
1436
typecastVals(const void * value,VISA_Type isaType)1437 int64_t typecastVals(const void* value, VISA_Type isaType)
1438 {
1439 int64_t retVal = 0;
1440 switch (isaType)
1441 {
1442 case ISA_TYPE_UD:
1443 case ISA_TYPE_UV:
1444 case ISA_TYPE_VF:
1445 {
1446 retVal = (int64_t)(*((unsigned int*)value));
1447 break;
1448 }
1449 case ISA_TYPE_D:
1450 case ISA_TYPE_V:
1451 {
1452 retVal = (int64_t)(*((int*)value));
1453 break;
1454 }
1455 case ISA_TYPE_UW:
1456 {
1457 retVal = (int64_t)(*((uint16_t*)value));
1458 break;
1459 }
1460 case ISA_TYPE_W:
1461 {
1462 retVal = (int64_t)(*((int16_t*)value));
1463 break;
1464 }
1465 case ISA_TYPE_UB:
1466 {
1467 retVal = (int64_t)(*((uint8_t*)value));
1468 break;
1469 }
1470 case ISA_TYPE_B:
1471 {
1472 retVal = (int64_t)(*((int8_t*)value));
1473 break;
1474 }
1475 case ISA_TYPE_HF:
1476 {
1477 // clear higher bits
1478 retVal = (int64_t)(*((uint16_t*)value));
1479 break;
1480 }
1481
1482 default:
1483 {
1484 assert(0);
1485 return -1;
1486 }
1487 }
1488 return retVal;
1489 }
1490
1491 // convert binary vISA surface id to GEN surface index
Get_PreDefined_Surf_Index(int index)1492 int Get_PreDefined_Surf_Index(int index)
1493 {
1494 if (getGenxPlatform() < GENX_SKL)
1495 {
1496 switch (index)
1497 {
1498 case 1:
1499 return PREDEF_SURF_1_OLD;
1500 case 2:
1501 return PREDEF_SURF_2_OLD;
1502 case 3:
1503 return PREDEF_SURF_3_OLD;
1504 default:
1505 ;
1506 // fallthrough
1507 }
1508 }
1509
1510 return vISAPreDefSurf[index].genId;
1511
1512 }
1513
createStringCopy(const char * name,vISA::Mem_Manager & m_mem)1514 const char* createStringCopy(const char* name, vISA::Mem_Manager &m_mem)
1515 {
1516 if (*name == '\0') {
1517 return "";
1518 }
1519
1520 // TODO: look into relaxing this
1521 static const size_t MAX_VISA_BINARY_STRING_LENGTH = 256;
1522
1523 size_t copyLen = strlen(name);
1524 if (copyLen >= MAX_VISA_BINARY_STRING_LENGTH)
1525 {
1526 copyLen = MAX_VISA_BINARY_STRING_LENGTH - 1;
1527 }
1528 char* copy = (char*)m_mem.alloc(copyLen + 1);
1529 strncpy_s(copy, copyLen + 1, name, copyLen);
1530 return copy;
1531 }
1532
sanitizeLabelString(std::string str)1533 std::string sanitizeLabelString(std::string str)
1534 {
1535 auto isReservedChar = [](char c)
1536 {
1537 return !isalnum(c) && c != '_' && c != '$';
1538 };
1539 std::replace_if(str.begin(), str.end(), isReservedChar, '_');
1540 return str;
1541 }
1542
1543 // This function scrubs out illegal file path characters
1544 //
1545 // NOTE: we must permit directory separators though since the string is a path
sanitizePathString(std::string str)1546 std::string sanitizePathString(std::string str)
1547 {
1548 #ifdef _WIN32
1549 // better cross platform behavior ./foo/bar.asm => to backslashes
1550 auto isFwdSlash = [](char c) {return c == '/';};
1551 std::replace_if(str.begin(), str.end(), isFwdSlash, '\\');
1552 #endif
1553
1554 auto isReservedChar = [](char c)
1555 {
1556 #ifdef _WIN32
1557 // c.f. https://docs.microsoft.com/en-us/windows/desktop/fileio/naming-a-file
1558 switch (c)
1559 {
1560 // we need these because we have a full path
1561 // case '\\': path separator
1562 case ':': // can be a drive suffix, but we handle this manually
1563 case '"':
1564 case '*':
1565 case '|':
1566 case '?':
1567 case '<':
1568 case '>':
1569 return true;
1570 default: return !isprint(c) && !isspace(c);
1571 }
1572 return false;
1573 #else
1574 return c == ':' || (!isprint(c) && !isspace(c));
1575 #endif
1576 };
1577
1578 #ifdef _WIN32
1579 if (str.length() > 2 && isalnum(str[0]) && str[1] == ':') {
1580 // drive prefix: D:... or D:
1581 std::replace_if(str.begin()+2, str.end(), isReservedChar, '_');
1582 } else {
1583 std::replace_if(str.begin(), str.end(), isReservedChar, '_');
1584 }
1585 #else
1586 std::replace_if(str.begin(), str.end(), isReservedChar, '_');
1587 #endif
1588 return str;
1589 }
1590
toString(GenPrecision P)1591 const char* toString(GenPrecision P)
1592 {
1593 int ix = (int)P;
1594 if (ix > (int)GenPrecision::INVALID && ix < (int)GenPrecision::TOTAL_NUM)
1595 {
1596 return GenPrecisionTable[ix].Name;
1597 }
1598 return "?";
1599 }
1600
1601