1 /*========================== begin_copyright_notice ============================
2 
3 Copyright (C) 2017-2021 Intel Corporation
4 
5 SPDX-License-Identifier: MIT
6 
7 ============================= end_copyright_notice ===========================*/
8 
9 #include "FlowGraph.h"
10 
11 using namespace vISA;
12 
computePReg()13 void G4_SrcRegRegion::computePReg()
14 {
15     int thisOpSize = TypeSize(type);
16     unsigned int regNum = 0, subRegNum = 0;
17     if (base->isRegVar() && base->asRegVar()->isPhyRegAssigned())
18     {
19         G4_RegVar* baseVar = base->asRegVar();
20         if (baseVar->getPhyReg()->isGreg())
21         {
22             G4_Declare* dcl = baseVar->getDeclare();
23 
24             regNum = (static_cast<G4_Greg*>(baseVar->getPhyReg()))->getRegNum();
25 
26             subRegNum = baseVar->getPhyRegOff();
27 
28             int declOpSize = dcl->getElemSize();
29 
30             if (thisOpSize != declOpSize)
31             {
32                 subRegNum = (subRegNum * declOpSize) / thisOpSize;
33             }
34 
35             unsigned int linearizedStart = (regNum * numEltPerGRF<Type_UB>()) + (subRegNum * thisOpSize);
36 
37             dcl->setGRFBaseOffset(linearizedStart);
38         }
39     }
40 }
41 
computePReg()42 void G4_DstRegRegion::computePReg()
43 {
44     unsigned int regNum = 0, subRegNum = 0;
45     if (base->isRegVar() && base->asRegVar()->isPhyRegAssigned())
46     {
47         G4_RegVar* baseVar = base->asRegVar();
48         if (baseVar->getPhyReg()->isGreg())
49         {
50             G4_Declare* dcl = baseVar->getDeclare();
51 
52             regNum = (static_cast<G4_Greg*>(baseVar->getPhyReg()))->getRegNum();
53 
54             subRegNum = baseVar->getPhyRegOff();
55 
56             int declOpSize = dcl->getElemSize();
57             int thisOpSize = TypeSize(type);
58 
59             if (thisOpSize != declOpSize)
60             {
61                 subRegNum = (subRegNum * declOpSize) / thisOpSize;
62             }
63 
64             unsigned int linearizedStart = (regNum * numEltPerGRF<Type_UB>()) + (subRegNum *  thisOpSize);
65 
66             dcl->setGRFBaseOffset(linearizedStart);
67         }
68     }
69 }
70