1 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \
2 // RUN: -S -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg -dce \
3 // RUN: | FileCheck %s
4
5 #include <arm_neon.h>
6
7 // Check float conversion is accepted for int argument
test_vsqaddb_u8()8 uint8_t test_vsqaddb_u8(){
9 return vsqaddb_u8(1, -1.0f);
10 }
11
test_vsqaddh_u16()12 uint16_t test_vsqaddh_u16() {
13 return vsqaddh_u16(1, -1.0f);
14 }
15
test_vsqadds_u32()16 uint32_t test_vsqadds_u32() {
17 return vsqadds_u32(1, -1.0f);
18 }
19
test_vsqaddd_u64()20 uint64_t test_vsqaddd_u64() {
21 return vsqaddd_u64(1, -1.0f);
22 }
23
24 // CHECK-LABEL: @test_vsqaddb_u8()
25 // CHECK: entry:
26 // CHECK-NEXT: [[T0:%.*]] = insertelement <8 x i8> undef, i8 1, i64 0
27 // CHECK-NEXT: [[T1:%.*]] = insertelement <8 x i8> undef, i8 -1, i64 0
28 // CHECK-NEXT: [[V:%.*]] = call <8 x i8> @llvm.aarch64.neon.usqadd.v8i8(<8 x i8> [[T0]], <8 x i8> [[T1]])
29 // CHECK-NEXT: [[R:%.*]] = extractelement <8 x i8> [[V]], i64 0
30 // CHECK-NEXT: ret i8 [[R]]
31
32 // CHECK-LABEL: @test_vsqaddh_u16()
33 // CHECK: entry:
34 // CHECK-NEXT: [[T0:%.*]] = insertelement <4 x i16> undef, i16 1, i64 0
35 // CHECK-NEXT: [[T1:%.*]] = insertelement <4 x i16> undef, i16 -1, i64 0
36 // CHECK-NEXT: [[V:%.*]] = call <4 x i16> @llvm.aarch64.neon.usqadd.v4i16(<4 x i16> [[T0]], <4 x i16> [[T1]])
37 // CHECK-NEXT: [[R:%.*]] = extractelement <4 x i16> [[V]], i64 0
38 // CHECK-NEXT: ret i16 [[R]]
39
40 // CHECK-LABEL: @test_vsqadds_u32()
41 // CHECK: entry:
42 // CHECK-NEXT: [[V:%.*]] = call i32 @llvm.aarch64.neon.usqadd.i32(i32 1, i32 -1)
43 // CHECK-NEXT: ret i32 [[V]]
44
45 // CHECK-LABEL: @test_vsqaddd_u64()
46 // CHECK: entry:
47 // CHECK-NEXT: [[V:%.*]] = call i64 @llvm.aarch64.neon.usqadd.i64(i64 1, i64 -1)
48 // CHECK-NEXT: ret i64 [[V]]
49
50