1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // REQUIRES: native, powerpc-registered-target
3 // UNSUPPORTED: !powerpc64-
4 // The stdlib.h included in mm_malloc.h references native system header
5 // like: bits/libc-header-start.h or features.h, cross-compile it may
6 // require installing target headers in build env, otherwise expecting
7 // failures. So this test will focus on native build only.
8
9 // RUN: %clang -target powerpc64-unknown-linux-gnu -S -emit-llvm %s -fno-discard-value-names -mllvm -disable-llvm-optzns -o - | llvm-cxxfilt | FileCheck %s
10
11 #include <mm_malloc.h>
12
13
14 void __attribute__((noinline))
test_mm_malloc()15 test_mm_malloc() {
16 char *buf = _mm_malloc(100, 16);
17 _mm_free(buf);
18 }
19
20 // CHECK-LABEL: @test_mm_malloc
21
22 // CHECK: define internal i8* @_mm_malloc(i64 [[REG1:[0-9a-zA-Z_%.]+]], i64 [[REG2:[0-9a-zA-Z_%.]+]])
23 // CHECK: [[REG3:[0-9a-zA-Z_%.]+]] = alloca i8*, align 8
24 // CHECK: store i64 [[REG1]], i64* [[REG4:[0-9a-zA-Z_%.]+]], align 8
25 // CHECK-NEXT: store i64 [[REG2]], i64* [[REG5:[0-9a-zA-Z_%.]+]], align 8
26 // CHECK-NEXT: store i64 16, i64* [[REG6:[0-9a-zA-Z_%.]+]], align 8
27 // CHECK-NEXT: [[REG8:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG5]], align 8
28 // CHECK-NEXT: [[REG9:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG6]], align 8
29 // CHECK-NEXT: [[REG10:[0-9a-zA-Z_%.]+]] = icmp ult i64 [[REG8]], [[REG9]]
30 // CHECK-NEXT: br i1 [[REG10]], label %[[REG23:[0-9a-zA-Z_%.]+]], label %[[REG24:[0-9a-zA-Z_%.]+]]
31 // CHECK: [[REG23]]:
32 // CHECK-NEXT: [[REG25:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG6]], align 8
33 // CHECK-NEXT: store i64 [[REG25]], i64* [[REG5]], align 8
34 // CHECK-NEXT: br label %[[REG24:[0-9a-zA-Z_%.]+]]
35 // CHECK: [[REG24]]:
36 // CHECK-NEXT: [[REG26:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG5]], align 8
37 // CHECK-NEXT: [[REG27:[0-9a-zA-Z_%.]+]] = load i64, i64* [[REG4]], align 8
38 // CHECK-NEXT: [[REG28:[0-9a-zA-Z_%.]+]] = call signext i32 @posix_memalign(i8** [[REG29:[0-9a-zA-Z_%.]+]], i64 [[REG26]], i64 [[REG27]])
39 // CHECK-NEXT: [[REG30:[0-9a-zA-Z_%.]+]] = icmp eq i32 [[REG28]], 0
40 // CHECK-NEXT: br i1 [[REG30]], label %[[REG31:[0-9a-zA-Z_%.]+]], label %[[REG32:[0-9a-zA-Z_%.]+]]
41 // CHECK: [[REG31]]:
42 // CHECK-NEXT: [[REG33:[0-9a-zA-Z_%.]+]] = load i8*, i8** [[REG29]], align 8
43 // CHECK-NEXT: store i8* [[REG33]], i8** [[REG3]], align 8
44 // CHECK-NEXT: br label %[[REG19:[0-9a-zA-Z_%.]+]]
45 // CHECK: [[REG32]]:
46 // CHECK-NEXT: store i8* null, i8** [[REG3]], align 8
47 // CHECK-NEXT: br label %[[REG19:[0-9a-zA-Z_%.]+]]
48 // CHECK: [[REG19]]:
49 // CHECK-NEXT: [[REG34:[0-9a-zA-Z_%.]+]] = load i8*, i8** [[REG3]], align 8
50 // CHECK-NEXT: ret i8* [[REG34]]
51
52 // CHECK: define internal void @_mm_free(i8* [[REG35:[0-9a-zA-Z_%.]+]])
53 // CHECK: store i8* [[REG35]], i8** [[REG36:[0-9a-zA-Z_%.]+]], align 8
54 // CHECK-NEXT: [[REG37:[0-9a-zA-Z_%.]+]] = load i8*, i8** [[REG36]], align 8
55 // CHECK-NEXT: call void @free(i8* [[REG37]])
56 // CHECK-NEXT: ret void
57