1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
3
4---
5name: uitofp_char_to_f32
6tracksRegLiveness: true
7body:             |
8  bb.0:
9    liveins: $vgpr0
10
11    ; CHECK-LABEL: name: uitofp_char_to_f32
12    ; CHECK: liveins: $vgpr0
13    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
14    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
15    ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
16    ; CHECK: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[AND]]
17    ; CHECK: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32)
18    %0:_(s32) = COPY $vgpr0
19    %1:_(s32) = G_CONSTANT i32 255
20    %2:_(s32) = G_AND %0, %1
21    %3:_(s32) = G_UITOFP %2
22    $vgpr0 = COPY %3
23...
24
25---
26name: uitofp_too_many_bits_to_f32
27tracksRegLiveness: true
28body:             |
29  bb.0:
30    liveins: $vgpr0
31
32    ; CHECK-LABEL: name: uitofp_too_many_bits_to_f32
33    ; CHECK: liveins: $vgpr0
34    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
35    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 256
36    ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
37    ; CHECK: [[UITOFP:%[0-9]+]]:_(s32) = G_UITOFP [[AND]](s32)
38    ; CHECK: $vgpr0 = COPY [[UITOFP]](s32)
39    %0:_(s32) = COPY $vgpr0
40    %1:_(s32) = G_CONSTANT i32 256
41    %2:_(s32) = G_AND %0, %1
42    %3:_(s32) = G_UITOFP %2
43    $vgpr0 = COPY %3
44...
45
46---
47name: sitofp_char_to_f32
48tracksRegLiveness: true
49body:             |
50  bb.0:
51    liveins: $vgpr0
52
53    ; CHECK-LABEL: name: sitofp_char_to_f32
54    ; CHECK: liveins: $vgpr0
55    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
56    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
57    ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
58    ; CHECK: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[AND]]
59    ; CHECK: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32)
60    %0:_(s32) = COPY $vgpr0
61    %1:_(s32) = G_CONSTANT i32 255
62    %2:_(s32) = G_AND %0, %1
63    %3:_(s32) = G_SITOFP %2
64    $vgpr0 = COPY %3
65...
66
67---
68name: sitofp_bits127_to_f32
69tracksRegLiveness: true
70body:             |
71  bb.0:
72    liveins: $vgpr0
73
74    ; CHECK-LABEL: name: sitofp_bits127_to_f32
75    ; CHECK: liveins: $vgpr0
76    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
77    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 127
78    ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
79    ; CHECK: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[AND]]
80    ; CHECK: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32)
81    %0:_(s32) = COPY $vgpr0
82    %1:_(s32) = G_CONSTANT i32 127
83    %2:_(s32) = G_AND %0, %1
84    %3:_(s32) = G_SITOFP %2
85    $vgpr0 = COPY %3
86...
87
88---
89name: sitofp_bits128_to_f32
90tracksRegLiveness: true
91body:             |
92  bb.0:
93    liveins: $vgpr0
94
95    ; CHECK-LABEL: name: sitofp_bits128_to_f32
96    ; CHECK: liveins: $vgpr0
97    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
98    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 128
99    ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
100    ; CHECK: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[AND]]
101    ; CHECK: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32)
102    %0:_(s32) = COPY $vgpr0
103    %1:_(s32) = G_CONSTANT i32 128
104    %2:_(s32) = G_AND %0, %1
105    %3:_(s32) = G_SITOFP %2
106    $vgpr0 = COPY %3
107...
108---
109name: sitofp_too_many_bits_to_f32
110tracksRegLiveness: true
111body:             |
112  bb.0:
113    liveins: $vgpr0
114
115    ; CHECK-LABEL: name: sitofp_too_many_bits_to_f32
116    ; CHECK: liveins: $vgpr0
117    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
118    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 256
119    ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
120    ; CHECK: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[AND]](s32)
121    ; CHECK: $vgpr0 = COPY [[SITOFP]](s32)
122    %0:_(s32) = COPY $vgpr0
123    %1:_(s32) = G_CONSTANT i32 256
124    %2:_(s32) = G_AND %0, %1
125    %3:_(s32) = G_SITOFP %2
126    $vgpr0 = COPY %3
127...
128
129---
130name: uitofp_char_to_f16
131tracksRegLiveness: true
132body:             |
133  bb.0:
134    liveins: $vgpr0
135
136    ; CHECK-LABEL: name: uitofp_char_to_f16
137    ; CHECK: liveins: $vgpr0
138    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
139    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
140    ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
141    ; CHECK: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[AND]]
142    ; CHECK: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[AMDGPU_CVT_F32_UBYTE0_]](s32)
143    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16)
144    ; CHECK: $vgpr0 = COPY [[ANYEXT]](s32)
145    %0:_(s32) = COPY $vgpr0
146    %1:_(s32) = G_CONSTANT i32 255
147    %2:_(s32) = G_AND %0, %1
148    %3:_(s16) = G_UITOFP %2
149    %4:_(s32) = G_ANYEXT %3
150    $vgpr0 = COPY %4
151...
152
153---
154name: sitofp_char_to_f16
155tracksRegLiveness: true
156body:             |
157  bb.0:
158    liveins: $vgpr0
159
160    ; CHECK-LABEL: name: sitofp_char_to_f16
161    ; CHECK: liveins: $vgpr0
162    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
163    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
164    ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
165    ; CHECK: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[AND]]
166    ; CHECK: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[AMDGPU_CVT_F32_UBYTE0_]](s32)
167    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16)
168    ; CHECK: $vgpr0 = COPY [[ANYEXT]](s32)
169    %0:_(s32) = COPY $vgpr0
170    %1:_(s32) = G_CONSTANT i32 255
171    %2:_(s32) = G_AND %0, %1
172    %3:_(s16) = G_SITOFP %2
173    %4:_(s32) = G_ANYEXT %3
174    $vgpr0 = COPY %4
175...
176
177---
178name: uitofp_s64_char_to_f32
179tracksRegLiveness: true
180body:             |
181  bb.0:
182    liveins: $vgpr0_vgpr1
183
184    ; CHECK-LABEL: name: uitofp_s64_char_to_f32
185    ; CHECK: liveins: $vgpr0_vgpr1
186    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
187    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
188    ; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
189    ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
190    ; CHECK: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[TRUNC]]
191    ; CHECK: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32)
192    %0:_(s64) = COPY $vgpr0_vgpr1
193    %1:_(s64) = G_CONSTANT i64 255
194    %2:_(s64) = G_AND %0, %1
195    %3:_(s32) = G_UITOFP %2
196    $vgpr0 = COPY %3
197...
198
199---
200name: sitofp_s64_char_to_f32
201tracksRegLiveness: true
202body:             |
203  bb.0:
204    liveins: $vgpr0_vgpr1
205
206    ; CHECK-LABEL: name: sitofp_s64_char_to_f32
207    ; CHECK: liveins: $vgpr0_vgpr1
208    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
209    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
210    ; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
211    ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
212    ; CHECK: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[TRUNC]]
213    ; CHECK: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32)
214    %0:_(s64) = COPY $vgpr0_vgpr1
215    %1:_(s64) = G_CONSTANT i64 255
216    %2:_(s64) = G_AND %0, %1
217    %3:_(s32) = G_SITOFP %2
218    $vgpr0 = COPY %3
219...
220
221---
222name: uitofp_s16_char_to_f32
223tracksRegLiveness: true
224body:             |
225  bb.0:
226    liveins: $vgpr0
227
228    ; CHECK-LABEL: name: uitofp_s16_char_to_f32
229    ; CHECK: liveins: $vgpr0
230    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
231    ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
232    ; CHECK: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 255
233    ; CHECK: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C]]
234    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[AND]](s16)
235    ; CHECK: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[ANYEXT]]
236    ; CHECK: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32)
237    %0:_(s32) = COPY $vgpr0
238    %1:_(s16) = G_TRUNC %0
239    %2:_(s16) = G_CONSTANT i16 255
240    %3:_(s16) = G_AND %1, %2
241    %4:_(s32) = G_UITOFP %3
242    $vgpr0 = COPY %4
243...
244
245---
246name: sitofp_s16_char_to_f32
247tracksRegLiveness: true
248body:             |
249  bb.0:
250    liveins: $vgpr0
251
252    ; CHECK-LABEL: name: sitofp_s16_char_to_f32
253    ; CHECK: liveins: $vgpr0
254    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
255    ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
256    ; CHECK: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 255
257    ; CHECK: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C]]
258    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[AND]](s16)
259    ; CHECK: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[ANYEXT]]
260    ; CHECK: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32)
261    %0:_(s32) = COPY $vgpr0
262    %1:_(s16) = G_TRUNC %0
263    %2:_(s16) = G_CONSTANT i16 255
264    %3:_(s16) = G_AND %1, %2
265    %4:_(s32) = G_SITOFP %3
266    $vgpr0 = COPY %4
267...
268