1 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \
2 // RUN: -fallow-half-arguments-and-returns -S -disable-O0-optnone \
3 // RUN: -flax-vector-conversions=none -emit-llvm -o - %s | opt -S -mem2reg \
4 // RUN: | FileCheck --check-prefix=COMMON --check-prefix=COMMONIR --check-prefix=UNCONSTRAINED %s
5 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \
6 // RUN: -fallow-half-arguments-and-returns -S -disable-O0-optnone \
7 // RUN: -ffp-exception-behavior=strict \
8 // RUN: -flax-vector-conversions=none -emit-llvm -o - %s | opt -S -mem2reg \
9 // RUN: | FileCheck --check-prefix=COMMON --check-prefix=COMMONIR --check-prefix=CONSTRAINED %s
10 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \
11 // RUN: -fallow-half-arguments-and-returns -S -disable-O0-optnone \
12 // RUN: -flax-vector-conversions=none -o - %s \
13 // RUN: | FileCheck --check-prefix=COMMON --check-prefix=CHECK-ASM %s
14 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \
15 // RUN: -fallow-half-arguments-and-returns -S -disable-O0-optnone \
16 // RUN: -ffp-exception-behavior=strict \
17 // RUN: -flax-vector-conversions=none -o - %s \
18 // RUN: | FileCheck --check-prefix=COMMON --check-prefix=CHECK-ASM %s
19
20 // REQUIRES: aarch64-registered-target
21
22 // Fails during instruction selection:
23 // XFAIL: *
24
25 // Test new aarch64 intrinsics and types but constrained
26
27 #include <arm_neon.h>
28
29 // COMMON-LABEL: test_vadd_f32
30 // UNCONSTRAINED: [[ADD_I:%.*]] = fadd <2 x float> %v1, %v2
31 // CONSTRAINED: [[ADD_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fadd.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
32 // CHECK-ASM: fadd v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
33 // COMMONIR: ret <2 x float> [[ADD_I]]
test_vadd_f32(float32x2_t v1,float32x2_t v2)34 float32x2_t test_vadd_f32(float32x2_t v1, float32x2_t v2) {
35 return vadd_f32(v1, v2);
36 }
37
38 // COMMON-LABEL: test_vaddq_f32
39 // UNCONSTRAINED: [[ADD_I:%.*]] = fadd <4 x float> %v1, %v2
40 // CONSTRAINED: [[ADD_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fadd.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
41 // CHECK-ASM: fadd v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
42 // COMMONIR: ret <4 x float> [[ADD_I]]
test_vaddq_f32(float32x4_t v1,float32x4_t v2)43 float32x4_t test_vaddq_f32(float32x4_t v1, float32x4_t v2) {
44 return vaddq_f32(v1, v2);
45 }
46
47 // COMMON-LABEL: test_vsub_f32
48 // UNCONSTRAINED: [[SUB_I:%.*]] = fsub <2 x float> %v1, %v2
49 // CONSTRAINED: [[SUB_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fsub.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
50 // CHECK-ASM: fsub v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
51 // COMMONIR: ret <2 x float> [[SUB_I]]
test_vsub_f32(float32x2_t v1,float32x2_t v2)52 float32x2_t test_vsub_f32(float32x2_t v1, float32x2_t v2) {
53 return vsub_f32(v1, v2);
54 }
55
56 // COMMON-LABEL: test_vsubq_f32
57 // UNCONSTRAINED: [[SUB_I:%.*]] = fsub <4 x float> %v1, %v2
58 // CONSTRAINED: [[SUB_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fsub.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
59 // CHECK-ASM: fsub v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
60 // COMMONIR: ret <4 x float> [[SUB_I]]
test_vsubq_f32(float32x4_t v1,float32x4_t v2)61 float32x4_t test_vsubq_f32(float32x4_t v1, float32x4_t v2) {
62 return vsubq_f32(v1, v2);
63 }
64
65 // COMMON-LABEL: test_vsubq_f64
66 // UNCONSTRAINED: [[SUB_I:%.*]] = fsub <2 x double> %v1, %v2
67 // CONSTRAINED: [[SUB_I:%.*]] = call <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
68 // CHECK-ASM: fsub v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
69 // COMMONIR: ret <2 x double> [[SUB_I]]
test_vsubq_f64(float64x2_t v1,float64x2_t v2)70 float64x2_t test_vsubq_f64(float64x2_t v1, float64x2_t v2) {
71 return vsubq_f64(v1, v2);
72 }
73
74 // COMMON-LABEL: test_vmul_f32
75 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <2 x float> %v1, %v2
76 // CONSTRAINED: [[MUL_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fmul.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
77 // CHECK-ASM: fmul v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
78 // COMMONIR: ret <2 x float> [[MUL_I]]
test_vmul_f32(float32x2_t v1,float32x2_t v2)79 float32x2_t test_vmul_f32(float32x2_t v1, float32x2_t v2) {
80 return vmul_f32(v1, v2);
81 }
82
83 // COMMON-LABEL: test_vmulq_f32
84 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <4 x float> %v1, %v2
85 // CONSTRAINED: [[MUL_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fmul.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
86 // CHECK-ASM: fmul v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
87 // COMMONIR: ret <4 x float> [[MUL_I]]
test_vmulq_f32(float32x4_t v1,float32x4_t v2)88 float32x4_t test_vmulq_f32(float32x4_t v1, float32x4_t v2) {
89 return vmulq_f32(v1, v2);
90 }
91
92 // COMMON-LABEL: test_vmulq_f64
93 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <2 x double> %v1, %v2
94 // CONSTRAINED: [[MUL_I:%.*]] = call <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
95 // CHECK-ASM: fmul v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
96 // COMMONIR: ret <2 x double> [[MUL_I]]
test_vmulq_f64(float64x2_t v1,float64x2_t v2)97 float64x2_t test_vmulq_f64(float64x2_t v1, float64x2_t v2) {
98 return vmulq_f64(v1, v2);
99 }
100
101 // COMMON-LABEL: test_vmla_f32
102 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <2 x float> %v2, %v3
103 // CONSTRAINED: [[MUL_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fmul.v2f32(<2 x float> %v2, <2 x float> %v3, metadata !"round.tonearest", metadata !"fpexcept.strict")
104 // CHECK-ASM: fmul [[MUL_R:v[0-9]+.2s]], v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
105 // UNCONSTRAINED: [[ADD_I:%.*]] = fadd <2 x float> %v1, [[MUL_I]]
106 // CONSTRAINED: [[ADD_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fadd.v2f32(<2 x float> %v1, <2 x float> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
107 // CHECK-ASM-NEXT:fadd v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, [[MUL_R]]
108 // COMMONIR: ret <2 x float> [[ADD_I]]
test_vmla_f32(float32x2_t v1,float32x2_t v2,float32x2_t v3)109 float32x2_t test_vmla_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) {
110 return vmla_f32(v1, v2, v3);
111 }
112
113 // COMMON-LABEL: test_vmlaq_f32
114 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <4 x float> %v2, %v3
115 // CONSTRAINED: [[MUL_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fmul.v4f32(<4 x float> %v2, <4 x float> %v3, metadata !"round.tonearest", metadata !"fpexcept.strict")
116 // CHECK-ASM: fmul [[MUL_R:v[0-9]+.4s]], v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
117 // UNCONSTRAINED: [[ADD_I:%.*]] = fadd <4 x float> %v1, [[MUL_I]]
118 // CONSTRAINED: [[ADD_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fadd.v4f32(<4 x float> %v1, <4 x float> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
119 // CHECK-ASM-NEXT:fadd v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, [[MUL_R]]
120 // COMMONIR: ret <4 x float> [[ADD_I]]
test_vmlaq_f32(float32x4_t v1,float32x4_t v2,float32x4_t v3)121 float32x4_t test_vmlaq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) {
122 return vmlaq_f32(v1, v2, v3);
123 }
124
125 // COMMON-LABEL: test_vmlaq_f64
126 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <2 x double> %v2, %v3
127 // CONSTRAINED: [[MUL_I:%.*]] = call <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double> %v2, <2 x double> %v3, metadata !"round.tonearest", metadata !"fpexcept.strict")
128 // CHECK-ASM: fmul [[MUL_R:v[0-9]+.2d]], v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
129 // UNCONSTRAINED: [[ADD_I:%.*]] = fadd <2 x double> %v1, [[MUL_I]]
130 // CONSTRAINED: [[ADD_I:%.*]] = call <2 x double> @llvm.experimental.constrained.fadd.v2f64(<2 x double> %v1, <2 x double> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
131 // CHECK-ASM-NEXT:fadd v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, [[MUL_R]]
132 // COMMONIR: ret <2 x double> [[ADD_I]]
test_vmlaq_f64(float64x2_t v1,float64x2_t v2,float64x2_t v3)133 float64x2_t test_vmlaq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) {
134 return vmlaq_f64(v1, v2, v3);
135 }
136
137 // COMMON-LABEL: test_vmls_f32
138 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <2 x float> %v2, %v3
139 // CONSTRAINED: [[MUL_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fmul.v2f32(<2 x float> %v2, <2 x float> %v3, metadata !"round.tonearest", metadata !"fpexcept.strict")
140 // CHECK-ASM: fmul [[MUL_R:v[0-9]+.2s]], v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
141 // UNCONSTRAINED: [[SUB_I:%.*]] = fsub <2 x float> %v1, [[MUL_I]]
142 // CONSTRAINED: [[SUB_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fsub.v2f32(<2 x float> %v1, <2 x float> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
143 // CHECK-ASM-NEXT:fsub v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, [[MUL_R]]
144 // COMMONIR: ret <2 x float> [[SUB_I]]
test_vmls_f32(float32x2_t v1,float32x2_t v2,float32x2_t v3)145 float32x2_t test_vmls_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) {
146 return vmls_f32(v1, v2, v3);
147 }
148
149 // COMMON-LABEL: test_vmlsq_f32
150 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <4 x float> %v2, %v3
151 // CONSTRAINED: [[MUL_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fmul.v4f32(<4 x float> %v2, <4 x float> %v3, metadata !"round.tonearest", metadata !"fpexcept.strict")
152 // CHECK-ASM: fmul [[MUL_R:v[0-9]+.4s]], v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
153 // UNCONSTRAINED: [[SUB_I:%.*]] = fsub <4 x float> %v1, [[MUL_I]]
154 // CONSTRAINED: [[SUB_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fsub.v4f32(<4 x float> %v1, <4 x float> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
155 // CHECK-ASM-NEXT:fsub v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, [[MUL_R]]
156 // COMMONIR: ret <4 x float> [[SUB_I]]
test_vmlsq_f32(float32x4_t v1,float32x4_t v2,float32x4_t v3)157 float32x4_t test_vmlsq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) {
158 return vmlsq_f32(v1, v2, v3);
159 }
160
161 // COMMON-LABEL: test_vmlsq_f64
162 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <2 x double> %v2, %v3
163 // CONSTRAINED: [[MUL_I:%.*]] = call <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double> %v2, <2 x double> %v3, metadata !"round.tonearest", metadata !"fpexcept.strict")
164 // CHECK-ASM: fmul [[MUL_R:v[0-9]+.2d]], v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
165 // UNCONSTRAINED: [[SUB_I:%.*]] = fsub <2 x double> %v1, [[MUL_I]]
166 // CONSTRAINED: [[SUB_I:%.*]] = call <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double> %v1, <2 x double> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
167 // CHECK-ASM-NEXT:fsub v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, [[MUL_R]]
168 // COMMONIR: ret <2 x double> [[SUB_I]]
test_vmlsq_f64(float64x2_t v1,float64x2_t v2,float64x2_t v3)169 float64x2_t test_vmlsq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) {
170 return vmlsq_f64(v1, v2, v3);
171 }
172
173 // COMMON-LABEL: test_vfma_f32
174 // COMMONIR: [[TMP0:%.*]] = bitcast <2 x float> %v1 to <8 x i8>
175 // COMMONIR: [[TMP1:%.*]] = bitcast <2 x float> %v2 to <8 x i8>
176 // COMMONIR: [[TMP2:%.*]] = bitcast <2 x float> %v3 to <8 x i8>
177 // UNCONSTRAINED: [[TMP3:%.*]] = call <2 x float> @llvm.fma.v2f32(<2 x float> %v2, <2 x float> %v3, <2 x float> %v1)
178 // CONSTRAINED: [[TMP3:%.*]] = call <2 x float> @llvm.experimental.constrained.fma.v2f32(<2 x float> %v2, <2 x float> %v3, <2 x float> %v1, metadata !"round.tonearest", metadata !"fpexcept.strict")
179 // CHECK-ASM: fmla v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
180 // COMMONIR: ret <2 x float> [[TMP3]]
test_vfma_f32(float32x2_t v1,float32x2_t v2,float32x2_t v3)181 float32x2_t test_vfma_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) {
182 return vfma_f32(v1, v2, v3);
183 }
184
185 // COMMON-LABEL: test_vfmaq_f32
186 // COMMONIR: [[TMP0:%.*]] = bitcast <4 x float> %v1 to <16 x i8>
187 // COMMONIR: [[TMP1:%.*]] = bitcast <4 x float> %v2 to <16 x i8>
188 // COMMONIR: [[TMP2:%.*]] = bitcast <4 x float> %v3 to <16 x i8>
189 // UNCONSTRAINED: [[TMP3:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %v2, <4 x float> %v3, <4 x float> %v1)
190 // CONSTRAINED: [[TMP3:%.*]] = call <4 x float> @llvm.experimental.constrained.fma.v4f32(<4 x float> %v2, <4 x float> %v3, <4 x float> %v1, metadata !"round.tonearest", metadata !"fpexcept.strict")
191 // CHECK-ASM: fmla v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
192 // COMMONIR: ret <4 x float> [[TMP3]]
test_vfmaq_f32(float32x4_t v1,float32x4_t v2,float32x4_t v3)193 float32x4_t test_vfmaq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) {
194 return vfmaq_f32(v1, v2, v3);
195 }
196
197 // COMMON-LABEL: test_vfmaq_f64
198 // COMMONIR: [[TMP0:%.*]] = bitcast <2 x double> %v1 to <16 x i8>
199 // COMMONIR: [[TMP1:%.*]] = bitcast <2 x double> %v2 to <16 x i8>
200 // COMMONIR: [[TMP2:%.*]] = bitcast <2 x double> %v3 to <16 x i8>
201 // UNCONSTRAINED: [[TMP3:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %v2, <2 x double> %v3, <2 x double> %v1)
202 // CONSTRAINED: [[TMP3:%.*]] = call <2 x double> @llvm.experimental.constrained.fma.v2f64(<2 x double> %v2, <2 x double> %v3, <2 x double> %v1, metadata !"round.tonearest", metadata !"fpexcept.strict")
203 // CHECK-ASM: fmla v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
204 // COMMONIR: ret <2 x double> [[TMP3]]
test_vfmaq_f64(float64x2_t v1,float64x2_t v2,float64x2_t v3)205 float64x2_t test_vfmaq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) {
206 return vfmaq_f64(v1, v2, v3);
207 }
208
209 // COMMON-LABEL: test_vfms_f32
210 // COMMONIR: [[SUB_I:%.*]] = fneg <2 x float> %v2
211 // CHECK-ASM: fneg v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
212 // COMMONIR: [[TMP0:%.*]] = bitcast <2 x float> %v1 to <8 x i8>
213 // COMMONIR: [[TMP1:%.*]] = bitcast <2 x float> [[SUB_I]] to <8 x i8>
214 // COMMONIR: [[TMP2:%.*]] = bitcast <2 x float> %v3 to <8 x i8>
215 // UNCONSTRAINED: [[TMP3:%.*]] = call <2 x float> @llvm.fma.v2f32(<2 x float> [[SUB_I]], <2 x float> %v3, <2 x float> %v1)
216 // CONSTRAINED: [[TMP3:%.*]] = call <2 x float> @llvm.experimental.constrained.fma.v2f32(<2 x float> [[SUB_I]], <2 x float> %v3, <2 x float> %v1, metadata !"round.tonearest", metadata !"fpexcept.strict")
217 // CHECK-ASM: fmla v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
218 // COMMONIR: ret <2 x float> [[TMP3]]
test_vfms_f32(float32x2_t v1,float32x2_t v2,float32x2_t v3)219 float32x2_t test_vfms_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) {
220 return vfms_f32(v1, v2, v3);
221 }
222
223 // COMMON-LABEL: test_vfmsq_f32
224 // COMMONIR: [[SUB_I:%.*]] = fneg <4 x float> %v2
225 // CHECK-ASM: fneg v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
226 // COMMONIR: [[TMP0:%.*]] = bitcast <4 x float> %v1 to <16 x i8>
227 // COMMONIR: [[TMP1:%.*]] = bitcast <4 x float> [[SUB_I]] to <16 x i8>
228 // COMMONIR: [[TMP2:%.*]] = bitcast <4 x float> %v3 to <16 x i8>
229 // UNCONSTRAINED: [[TMP3:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> [[SUB_I]], <4 x float> %v3, <4 x float> %v1)
230 // CONSTRAINED: [[TMP3:%.*]] = call <4 x float> @llvm.experimental.constrained.fma.v4f32(<4 x float> [[SUB_I]], <4 x float> %v3, <4 x float> %v1, metadata !"round.tonearest", metadata !"fpexcept.strict")
231 // CHECK-ASM: fmla v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
232 // COMMONIR: ret <4 x float> [[TMP3]]
test_vfmsq_f32(float32x4_t v1,float32x4_t v2,float32x4_t v3)233 float32x4_t test_vfmsq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) {
234 return vfmsq_f32(v1, v2, v3);
235 }
236
237 // COMMON-LABEL: test_vfmsq_f64
238 // COMMONIR: [[SUB_I:%.*]] = fneg <2 x double> %v2
239 // CHECK-ASM: fneg v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
240 // COMMONIR: [[TMP0:%.*]] = bitcast <2 x double> %v1 to <16 x i8>
241 // COMMONIR: [[TMP1:%.*]] = bitcast <2 x double> [[SUB_I]] to <16 x i8>
242 // COMMONIR: [[TMP2:%.*]] = bitcast <2 x double> %v3 to <16 x i8>
243 // UNCONSTRAINED: [[TMP3:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> [[SUB_I]], <2 x double> %v3, <2 x double> %v1)
244 // CONSTRAINED: [[TMP3:%.*]] = call <2 x double> @llvm.experimental.constrained.fma.v2f64(<2 x double> [[SUB_I]], <2 x double> %v3, <2 x double> %v1, metadata !"round.tonearest", metadata !"fpexcept.strict")
245 // CHECK-ASM: fmla v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
246 // COMMONIR: ret <2 x double> [[TMP3]]
test_vfmsq_f64(float64x2_t v1,float64x2_t v2,float64x2_t v3)247 float64x2_t test_vfmsq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) {
248 return vfmsq_f64(v1, v2, v3);
249 }
250
251 // COMMON-LABEL: test_vdivq_f64
252 // UNCONSTRAINED: [[DIV_I:%.*]] = fdiv <2 x double> %v1, %v2
253 // CONSTRAINED: [[DIV_I:%.*]] = call <2 x double> @llvm.experimental.constrained.fdiv.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
254 // CHECK-ASM: fdiv v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
255 // COMMONIR: ret <2 x double> [[DIV_I]]
test_vdivq_f64(float64x2_t v1,float64x2_t v2)256 float64x2_t test_vdivq_f64(float64x2_t v1, float64x2_t v2) {
257 return vdivq_f64(v1, v2);
258 }
259
260 // COMMON-LABEL: test_vdivq_f32
261 // UNCONSTRAINED: [[DIV_I:%.*]] = fdiv <4 x float> %v1, %v2
262 // CONSTRAINED: [[DIV_I:%.*]] = call <4 x float> @llvm.experimental.constrained.fdiv.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
263 // CHECK-ASM: fdiv v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
264 // COMMONIR: ret <4 x float> [[DIV_I]]
test_vdivq_f32(float32x4_t v1,float32x4_t v2)265 float32x4_t test_vdivq_f32(float32x4_t v1, float32x4_t v2) {
266 return vdivq_f32(v1, v2);
267 }
268
269 // COMMON-LABEL: test_vdiv_f32
270 // UNCONSTRAINED: [[DIV_I:%.*]] = fdiv <2 x float> %v1, %v2
271 // CONSTRAINED: [[DIV_I:%.*]] = call <2 x float> @llvm.experimental.constrained.fdiv.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"round.tonearest", metadata !"fpexcept.strict")
272 // CHECK-ASM: fdiv v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
273 // COMMONIR: ret <2 x float> [[DIV_I]]
test_vdiv_f32(float32x2_t v1,float32x2_t v2)274 float32x2_t test_vdiv_f32(float32x2_t v1, float32x2_t v2) {
275 return vdiv_f32(v1, v2);
276 }
277
278 // COMMON-LABEL: test_vceq_f32
279 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oeq <2 x float> %v1, %v2
280 // CONSTRAINED: [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"oeq", metadata !"fpexcept.strict")
281 // CHECK-ASM: fcmeq v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
282 // COMMONIR: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>
283 // COMMONIR: ret <2 x i32> [[SEXT_I]]
test_vceq_f32(float32x2_t v1,float32x2_t v2)284 uint32x2_t test_vceq_f32(float32x2_t v1, float32x2_t v2) {
285 return vceq_f32(v1, v2);
286 }
287
288 // COMMON-LABEL: test_vceq_f64
289 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oeq <1 x double> %a, %b
290 // CONSTRAINED: [[CMP_I:%.*]] = call <1 x i1> @llvm.experimental.constrained.fcmp.v1f64(<1 x double> %a, <1 x double> %b, metadata !"oeq", metadata !"fpexcept.strict")
291 // CHECK-ASM: fcmp d{{[0-9]+}}, d{{[0-9]+}}
292 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, eq
293 // COMMONIR: [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>
294 // COMMONIR: ret <1 x i64> [[SEXT_I]]
test_vceq_f64(float64x1_t a,float64x1_t b)295 uint64x1_t test_vceq_f64(float64x1_t a, float64x1_t b) {
296 return vceq_f64(a, b);
297 }
298
299 // COMMON-LABEL: test_vceqq_f32
300 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oeq <4 x float> %v1, %v2
301 // CONSTRAINED: [[CMP_I:%.*]] = call <4 x i1> @llvm.experimental.constrained.fcmp.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"oeq", metadata !"fpexcept.strict")
302 // CHECK-ASM: fcmeq v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
303 // COMMONIR: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
304 // COMMONIR: ret <4 x i32> [[SEXT_I]]
test_vceqq_f32(float32x4_t v1,float32x4_t v2)305 uint32x4_t test_vceqq_f32(float32x4_t v1, float32x4_t v2) {
306 return vceqq_f32(v1, v2);
307 }
308
309 // COMMON-LABEL: test_vceqq_f64
310 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oeq <2 x double> %v1, %v2
311 // CONSTRAINED: [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"oeq", metadata !"fpexcept.strict")
312 // CHECK-ASM: fcmeq v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
313 // COMMONIR: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
314 // COMMONIR: ret <2 x i64> [[SEXT_I]]
test_vceqq_f64(float64x2_t v1,float64x2_t v2)315 uint64x2_t test_vceqq_f64(float64x2_t v1, float64x2_t v2) {
316 return vceqq_f64(v1, v2);
317 }
318
319 // COMMON-LABEL: test_vcge_f32
320 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oge <2 x float> %v1, %v2
321 // CONSTRAINED: [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"oge", metadata !"fpexcept.strict")
322 // CHECK-ASM: fcmge v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
323 // COMMONIR: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>
324 // COMMONIR: ret <2 x i32> [[SEXT_I]]
test_vcge_f32(float32x2_t v1,float32x2_t v2)325 uint32x2_t test_vcge_f32(float32x2_t v1, float32x2_t v2) {
326 return vcge_f32(v1, v2);
327 }
328
329 // COMMON-LABEL: test_vcge_f64
330 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oge <1 x double> %a, %b
331 // CONSTRAINED: [[CMP_I:%.*]] = call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"oge", metadata !"fpexcept.strict")
332 // CHECK-ASM: fcmp d{{[0-9]+}}, d{{[0-9]+}}
333 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, ge
334 // COMMONIR: [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>
335 // COMMONIR: ret <1 x i64> [[SEXT_I]]
test_vcge_f64(float64x1_t a,float64x1_t b)336 uint64x1_t test_vcge_f64(float64x1_t a, float64x1_t b) {
337 return vcge_f64(a, b);
338 }
339
340 // COMMON-LABEL: test_vcgeq_f32
341 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oge <4 x float> %v1, %v2
342 // CONSTRAINED: [[CMP_I:%.*]] = call <4 x i1> @llvm.experimental.constrained.fcmps.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"oge", metadata !"fpexcept.strict")
343 // CHECK-ASM: fcmge v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
344 // COMMONIR: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
345 // COMMONIR: ret <4 x i32> [[SEXT_I]]
test_vcgeq_f32(float32x4_t v1,float32x4_t v2)346 uint32x4_t test_vcgeq_f32(float32x4_t v1, float32x4_t v2) {
347 return vcgeq_f32(v1, v2);
348 }
349
350 // COMMON-LABEL: test_vcgeq_f64
351 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp oge <2 x double> %v1, %v2
352 // CONSTRAINED: [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"oge", metadata !"fpexcept.strict")
353 // CHECK-ASM: fcmge v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
354 // COMMONIR: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
355 // COMMONIR: ret <2 x i64> [[SEXT_I]]
test_vcgeq_f64(float64x2_t v1,float64x2_t v2)356 uint64x2_t test_vcgeq_f64(float64x2_t v1, float64x2_t v2) {
357 return vcgeq_f64(v1, v2);
358 }
359
360 // COMMON-LABEL: test_vcle_f32
361 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ole <2 x float> %v1, %v2
362 // CONSTRAINED: [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"ole", metadata !"fpexcept.strict")
363 // CHECK-ASM: fcmge v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
364 // COMMONIR: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>
365 // COMMONIR: ret <2 x i32> [[SEXT_I]]
test_vcle_f32(float32x2_t v1,float32x2_t v2)366 uint32x2_t test_vcle_f32(float32x2_t v1, float32x2_t v2) {
367 return vcle_f32(v1, v2);
368 }
369
370 // COMMON-LABEL: test_vcle_f64
371 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ole <1 x double> %a, %b
372 // CONSTRAINED: [[CMP_I:%.*]] = call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"ole", metadata !"fpexcept.strict")
373 // CHECK-ASM: fcmp d{{[0-9]+}}, d{{[0-9]+}}
374 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, ls
375 // COMMONIR: [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>
376 // COMMONIR: ret <1 x i64> [[SEXT_I]]
test_vcle_f64(float64x1_t a,float64x1_t b)377 uint64x1_t test_vcle_f64(float64x1_t a, float64x1_t b) {
378 return vcle_f64(a, b);
379 }
380
381 // COMMON-LABEL: test_vcleq_f32
382 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ole <4 x float> %v1, %v2
383 // CONSTRAINED: [[CMP_I:%.*]] = call <4 x i1> @llvm.experimental.constrained.fcmps.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"ole", metadata !"fpexcept.strict")
384 // CHECK-ASM: fcmge v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
385 // COMMONIR: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
386 // COMMONIR: ret <4 x i32> [[SEXT_I]]
test_vcleq_f32(float32x4_t v1,float32x4_t v2)387 uint32x4_t test_vcleq_f32(float32x4_t v1, float32x4_t v2) {
388 return vcleq_f32(v1, v2);
389 }
390
391 // COMMON-LABEL: test_vcleq_f64
392 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ole <2 x double> %v1, %v2
393 // CONSTRAINED: [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"ole", metadata !"fpexcept.strict")
394 // CHECK-ASM: fcmge v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
395 // COMMONIR: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
396 // COMMONIR: ret <2 x i64> [[SEXT_I]]
test_vcleq_f64(float64x2_t v1,float64x2_t v2)397 uint64x2_t test_vcleq_f64(float64x2_t v1, float64x2_t v2) {
398 return vcleq_f64(v1, v2);
399 }
400
401 // COMMON-LABEL: test_vcgt_f32
402 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ogt <2 x float> %v1, %v2
403 // CONSTRAINED: [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"ogt", metadata !"fpexcept.strict")
404 // CHECK-ASM: fcmgt v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
405 // COMMONIR: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>
406 // COMMONIR: ret <2 x i32> [[SEXT_I]]
test_vcgt_f32(float32x2_t v1,float32x2_t v2)407 uint32x2_t test_vcgt_f32(float32x2_t v1, float32x2_t v2) {
408 return vcgt_f32(v1, v2);
409 }
410
411 // COMMON-LABEL: test_vcgt_f64
412 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ogt <1 x double> %a, %b
413 // CONSTRAINED: [[CMP_I:%.*]] = call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"ogt", metadata !"fpexcept.strict")
414 // CHECK-ASM: fcmp d{{[0-9]+}}, d{{[0-9]+}}
415 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, gt
416 // COMMONIR: [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>
417 // COMMONIR: ret <1 x i64> [[SEXT_I]]
test_vcgt_f64(float64x1_t a,float64x1_t b)418 uint64x1_t test_vcgt_f64(float64x1_t a, float64x1_t b) {
419 return vcgt_f64(a, b);
420 }
421
422 // COMMON-LABEL: test_vcgtq_f32
423 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ogt <4 x float> %v1, %v2
424 // CONSTRAINED: [[CMP_I:%.*]] = call <4 x i1> @llvm.experimental.constrained.fcmps.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"ogt", metadata !"fpexcept.strict")
425 // CHECK-ASM: fcmgt v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
426 // COMMONIR: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
427 // COMMONIR: ret <4 x i32> [[SEXT_I]]
test_vcgtq_f32(float32x4_t v1,float32x4_t v2)428 uint32x4_t test_vcgtq_f32(float32x4_t v1, float32x4_t v2) {
429 return vcgtq_f32(v1, v2);
430 }
431
432 // COMMON-LABEL: test_vcgtq_f64
433 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp ogt <2 x double> %v1, %v2
434 // CONSTRAINED: [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"ogt", metadata !"fpexcept.strict")
435 // CHECK-ASM: fcmgt v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
436 // COMMONIR: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
437 // COMMONIR: ret <2 x i64> [[SEXT_I]]
test_vcgtq_f64(float64x2_t v1,float64x2_t v2)438 uint64x2_t test_vcgtq_f64(float64x2_t v1, float64x2_t v2) {
439 return vcgtq_f64(v1, v2);
440 }
441
442 // COMMON-LABEL: test_vclt_f32
443 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp olt <2 x float> %v1, %v2
444 // CONSTRAINED: [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f32(<2 x float> %v1, <2 x float> %v2, metadata !"olt", metadata !"fpexcept.strict")
445 // CHECK-ASM: fcmgt v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
446 // COMMONIR: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i32>
447 // COMMONIR: ret <2 x i32> [[SEXT_I]]
test_vclt_f32(float32x2_t v1,float32x2_t v2)448 uint32x2_t test_vclt_f32(float32x2_t v1, float32x2_t v2) {
449 return vclt_f32(v1, v2);
450 }
451
452 // COMMON-LABEL: test_vclt_f64
453 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp olt <1 x double> %a, %b
454 // CONSTRAINED: [[CMP_I:%.*]] = call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"olt", metadata !"fpexcept.strict")
455 // CHECK-ASM: fcmp d{{[0-9]+}}, d{{[0-9]+}}
456 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, mi
457 // COMMONIR: [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>
458 // COMMONIR: ret <1 x i64> [[SEXT_I]]
test_vclt_f64(float64x1_t a,float64x1_t b)459 uint64x1_t test_vclt_f64(float64x1_t a, float64x1_t b) {
460 return vclt_f64(a, b);
461 }
462
463 // COMMON-LABEL: test_vcltq_f32
464 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp olt <4 x float> %v1, %v2
465 // CONSTRAINED: [[CMP_I:%.*]] = call <4 x i1> @llvm.experimental.constrained.fcmps.v4f32(<4 x float> %v1, <4 x float> %v2, metadata !"olt", metadata !"fpexcept.strict")
466 // CHECK-ASM: fcmgt v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
467 // COMMONIR: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
468 // COMMONIR: ret <4 x i32> [[SEXT_I]]
test_vcltq_f32(float32x4_t v1,float32x4_t v2)469 uint32x4_t test_vcltq_f32(float32x4_t v1, float32x4_t v2) {
470 return vcltq_f32(v1, v2);
471 }
472
473 // COMMON-LABEL: test_vcltq_f64
474 // UNCONSTRAINED: [[CMP_I:%.*]] = fcmp olt <2 x double> %v1, %v2
475 // CONSTRAINED: [[CMP_I:%.*]] = call <2 x i1> @llvm.experimental.constrained.fcmps.v2f64(<2 x double> %v1, <2 x double> %v2, metadata !"olt", metadata !"fpexcept.strict")
476 // CHECK-ASM: fcmgt v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
477 // COMMONIR: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
478 // COMMONIR: ret <2 x i64> [[SEXT_I]]
test_vcltq_f64(float64x2_t v1,float64x2_t v2)479 uint64x2_t test_vcltq_f64(float64x2_t v1, float64x2_t v2) {
480 return vcltq_f64(v1, v2);
481 }
482
483 // COMMON-LABEL: test_vpadds_f32
484 // COMMONIR: [[LANE0_I:%.*]] = extractelement <2 x float> %a, i64 0
485 // COMMONIR: [[LANE1_I:%.*]] = extractelement <2 x float> %a, i64 1
486 // UNCONSTRAINED: [[VPADDD_I:%.*]] = fadd float [[LANE0_I]], [[LANE1_I]]
487 // CONSTRAINED: [[VPADDD_I:%.*]] = call float @llvm.experimental.constrained.fadd.f32(float [[LANE0_I]], float [[LANE1_I]], metadata !"round.tonearest", metadata !"fpexcept.strict"
488 // CHECK-ASM: fadd s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}
489 // COMMONIR: ret float [[VPADDD_I]]
test_vpadds_f32(float32x2_t a)490 float32_t test_vpadds_f32(float32x2_t a) {
491 return vpadds_f32(a);
492 }
493
494 // COMMON-LABEL: test_vpaddd_f64
495 // COMMONIR: [[LANE0_I:%.*]] = extractelement <2 x double> %a, i64 0
496 // COMMONIR: [[LANE1_I:%.*]] = extractelement <2 x double> %a, i64 1
497 // UNCONSTRAINED: [[VPADDD_I:%.*]] = fadd double [[LANE0_I]], [[LANE1_I]]
498 // CONSTRAINED: [[VPADDD_I:%.*]] = call double @llvm.experimental.constrained.fadd.f64(double [[LANE0_I]], double [[LANE1_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
499 // CHECK-ASM: faddp d{{[0-9]+}}, v{{[0-9]+}}.2d
500 // COMMONIR: ret double [[VPADDD_I]]
test_vpaddd_f64(float64x2_t a)501 float64_t test_vpaddd_f64(float64x2_t a) {
502 return vpaddd_f64(a);
503 }
504
505 // COMMON-LABEL: test_vcvts_f32_s32
506 // UNCONSTRAINED: [[TMP0:%.*]] = sitofp i32 %a to float
507 // CONSTRAINED: [[TMP0:%.*]] = call float @llvm.experimental.constrained.sitofp.f32.i32(i32 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
508 // CHECK-ASM: scvtf s{{[0-9]+}}, w{{[0-9]+}}
509 // COMMONIR: ret float [[TMP0]]
test_vcvts_f32_s32(int32_t a)510 float32_t test_vcvts_f32_s32(int32_t a) {
511 return vcvts_f32_s32(a);
512 }
513
514 // COMMON-LABEL: test_vcvtd_f64_s64
515 // UNCONSTRAINED: [[TMP0:%.*]] = sitofp i64 %a to double
516 // CONSTRAINED: [[TMP0:%.*]] = call double @llvm.experimental.constrained.sitofp.f64.i64(i64 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
517 // CHECK-ASM: scvtf d{{[0-9]}}, x{{[0-9]+}}
518 // COMMONIR: ret double [[TMP0]]
test_vcvtd_f64_s64(int64_t a)519 float64_t test_vcvtd_f64_s64(int64_t a) {
520 return vcvtd_f64_s64(a);
521 }
522
523 // COMMON-LABEL: test_vcvts_f32_u32
524 // UNCONSTRAINED: [[TMP0:%.*]] = uitofp i32 %a to float
525 // CONSTRAINED: [[TMP0:%.*]] = call float @llvm.experimental.constrained.uitofp.f32.i32(i32 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
526 // CHECK-ASM: ucvtf s{{[0-9]+}}, w{{[0-9]+}}
527 // COMMONIR: ret float [[TMP0]]
test_vcvts_f32_u32(uint32_t a)528 float32_t test_vcvts_f32_u32(uint32_t a) {
529 return vcvts_f32_u32(a);
530 }
531
532 // XXX should verify the type of registers
533 // COMMON-LABEL: test_vcvtd_f64_u64
534 // UNCONSTRAINED: [[TMP0:%.*]] = uitofp i64 %a to double
535 // CONSTRAINED: [[TMP0:%.*]] = call double @llvm.experimental.constrained.uitofp.f64.i64(i64 %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
536 // CHECK-ASM: ucvtf d{{[0-9]}}, x{{[0-9]+}}
537 // COMMONIR: ret double [[TMP0]]
test_vcvtd_f64_u64(uint64_t a)538 float64_t test_vcvtd_f64_u64(uint64_t a) {
539 return vcvtd_f64_u64(a);
540 }
541
542 // COMMON-LABEL: test_vceqs_f32
543 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp oeq float %a, %b
544 // CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"oeq", metadata !"fpexcept.strict")
545 // CHECK-ASM: fcmp s{{[0-9]+}}, s{{[0-9]+}}
546 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, eq
547 // COMMONIR: [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i32
548 // COMMONIR: ret i32 [[VCMPD_I]]
test_vceqs_f32(float32_t a,float32_t b)549 uint32_t test_vceqs_f32(float32_t a, float32_t b) {
550 return (uint32_t)vceqs_f32(a, b);
551 }
552
553 // COMMON-LABEL: test_vceqd_f64
554 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp oeq double %a, %b
555 // CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double %b, metadata !"oeq", metadata !"fpexcept.strict")
556 // CHECK-ASM: fcmp d{{[0-9]+}}, d{{[0-9]+}}
557 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, eq
558 // COMMONIR: [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i64
559 // COMMONIR: ret i64 [[VCMPD_I]]
test_vceqd_f64(float64_t a,float64_t b)560 uint64_t test_vceqd_f64(float64_t a, float64_t b) {
561 return (uint64_t)vceqd_f64(a, b);
562 }
563
564 // COMMON-LABEL: test_vceqzs_f32
565 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp oeq float %a, 0.000000e+00
566 // CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float 0.000000e+00, metadata !"oeq", metadata !"fpexcept.strict")
567 // CHECK-ASM: fcmp s{{[0-9]+}}, #0.0
568 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, eq
569 // COMMONIR: [[VCEQZ_I:%.*]] = sext i1 [[TMP0]] to i32
570 // COMMONIR: ret i32 [[VCEQZ_I]]
test_vceqzs_f32(float32_t a)571 uint32_t test_vceqzs_f32(float32_t a) {
572 return (uint32_t)vceqzs_f32(a);
573 }
574
575 // COMMON-LABEL: test_vceqzd_f64
576 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp oeq double %a, 0.000000e+00
577 // CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double 0.000000e+00, metadata !"oeq", metadata !"fpexcept.strict")
578 // CHECK-ASM: fcmp d{{[0-9]+}}, #0.0
579 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, eq
580 // COMMONIR: [[VCEQZ_I:%.*]] = sext i1 [[TMP0]] to i64
581 // COMMONIR: ret i64 [[VCEQZ_I]]
test_vceqzd_f64(float64_t a)582 uint64_t test_vceqzd_f64(float64_t a) {
583 return (uint64_t)vceqzd_f64(a);
584 }
585
586 // COMMON-LABEL: test_vcges_f32
587 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp oge float %a, %b
588 // CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"oge", metadata !"fpexcept.strict")
589 // CHECK-ASM: fcmp s{{[0-9]+}}, s{{[0-9]+}}
590 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, ge
591 // COMMONIR: [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i32
592 // COMMONIR: ret i32 [[VCMPD_I]]
test_vcges_f32(float32_t a,float32_t b)593 uint32_t test_vcges_f32(float32_t a, float32_t b) {
594 return (uint32_t)vcges_f32(a, b);
595 }
596
597 // COMMON-LABEL: test_vcged_f64
598 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp oge double %a, %b
599 // CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double %b, metadata !"oge", metadata !"fpexcept.strict")
600 // CHECK-ASM: fcmp d{{[0-9]+}}, d{{[0-9]+}}
601 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, ge
602 // COMMONIR: [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i64
603 // COMMONIR: ret i64 [[VCMPD_I]]
test_vcged_f64(float64_t a,float64_t b)604 uint64_t test_vcged_f64(float64_t a, float64_t b) {
605 return (uint64_t)vcged_f64(a, b);
606 }
607
608 // COMMON-LABEL: test_vcgezs_f32
609 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp oge float %a, 0.000000e+00
610 // CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float 0.000000e+00, metadata !"oge", metadata !"fpexcept.strict")
611 // CHECK-ASM: fcmp s{{[0-9]+}}, #0.0
612 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, ge
613 // COMMONIR: [[VCGEZ_I:%.*]] = sext i1 [[TMP0]] to i32
614 // COMMONIR: ret i32 [[VCGEZ_I]]
test_vcgezs_f32(float32_t a)615 uint32_t test_vcgezs_f32(float32_t a) {
616 return (uint32_t)vcgezs_f32(a);
617 }
618
619 // COMMON-LABEL: test_vcgezd_f64
620 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp oge double %a, 0.000000e+00
621 // CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double 0.000000e+00, metadata !"oge", metadata !"fpexcept.strict")
622 // CHECK-ASM: fcmp d{{[0-9]+}}, #0.0
623 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, ge
624 // COMMONIR: [[VCGEZ_I:%.*]] = sext i1 [[TMP0]] to i64
625 // COMMONIR: ret i64 [[VCGEZ_I]]
test_vcgezd_f64(float64_t a)626 uint64_t test_vcgezd_f64(float64_t a) {
627 return (uint64_t)vcgezd_f64(a);
628 }
629
630 // COMMON-LABEL: test_vcgts_f32
631 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp ogt float %a, %b
632 // CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"ogt", metadata !"fpexcept.strict")
633 // CHECK-ASM: fcmp s{{[0-9]+}}, s{{[0-9]+}}
634 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, gt
635 // COMMONIR: [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i32
636 // COMMONIR: ret i32 [[VCMPD_I]]
test_vcgts_f32(float32_t a,float32_t b)637 uint32_t test_vcgts_f32(float32_t a, float32_t b) {
638 return (uint32_t)vcgts_f32(a, b);
639 }
640
641 // COMMON-LABEL: test_vcgtd_f64
642 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp ogt double %a, %b
643 // CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double %b, metadata !"ogt", metadata !"fpexcept.strict")
644 // CHECK-ASM: fcmp d{{[0-9]+}}, d{{[0-9]+}}
645 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, gt
646 // COMMONIR: [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i64
647 // COMMONIR: ret i64 [[VCMPD_I]]
test_vcgtd_f64(float64_t a,float64_t b)648 uint64_t test_vcgtd_f64(float64_t a, float64_t b) {
649 return (uint64_t)vcgtd_f64(a, b);
650 }
651
652 // COMMON-LABEL: test_vcgtzs_f32
653 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp ogt float %a, 0.000000e+00
654 // CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float 0.000000e+00, metadata !"ogt", metadata !"fpexcept.strict")
655 // CHECK-ASM: fcmp s{{[0-9]+}}, #0.0
656 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, gt
657 // COMMONIR: [[VCGTZ_I:%.*]] = sext i1 [[TMP0]] to i32
658 // COMMONIR: ret i32 [[VCGTZ_I]]
test_vcgtzs_f32(float32_t a)659 uint32_t test_vcgtzs_f32(float32_t a) {
660 return (uint32_t)vcgtzs_f32(a);
661 }
662
663 // COMMON-LABEL: test_vcgtzd_f64
664 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp ogt double %a, 0.000000e+00
665 // CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double 0.000000e+00, metadata !"ogt", metadata !"fpexcept.strict")
666 // CHECK-ASM: fcmp d{{[0-9]+}}, #0.0
667 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, gt
668 // COMMONIR: [[VCGTZ_I:%.*]] = sext i1 [[TMP0]] to i64
669 // COMMONIR: ret i64 [[VCGTZ_I]]
test_vcgtzd_f64(float64_t a)670 uint64_t test_vcgtzd_f64(float64_t a) {
671 return (uint64_t)vcgtzd_f64(a);
672 }
673
674 // COMMON-LABEL: test_vcles_f32
675 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp ole float %a, %b
676 // CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"ole", metadata !"fpexcept.strict")
677 // CHECK-ASM: fcmp s{{[0-9]+}}, s{{[0-9]+}}
678 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, ls
679 // COMMONIR: [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i32
680 // COMMONIR: ret i32 [[VCMPD_I]]
test_vcles_f32(float32_t a,float32_t b)681 uint32_t test_vcles_f32(float32_t a, float32_t b) {
682 return (uint32_t)vcles_f32(a, b);
683 }
684
685 // COMMON-LABEL: test_vcled_f64
686 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp ole double %a, %b
687 // CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double %b, metadata !"ole", metadata !"fpexcept.strict")
688 // CHECK-ASM: fcmp d{{[0-9]+}}, d{{[0-9]+}}
689 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, ls
690 // COMMONIR: [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i64
691 // COMMONIR: ret i64 [[VCMPD_I]]
test_vcled_f64(float64_t a,float64_t b)692 uint64_t test_vcled_f64(float64_t a, float64_t b) {
693 return (uint64_t)vcled_f64(a, b);
694 }
695
696 // COMMON-LABEL: test_vclezs_f32
697 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp ole float %a, 0.000000e+00
698 // CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float 0.000000e+00, metadata !"ole", metadata !"fpexcept.strict")
699 // CHECK-ASM: fcmp s{{[0-9]+}}, #0.0
700 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, ls
701 // COMMONIR: [[VCLEZ_I:%.*]] = sext i1 [[TMP0]] to i32
702 // COMMONIR: ret i32 [[VCLEZ_I]]
test_vclezs_f32(float32_t a)703 uint32_t test_vclezs_f32(float32_t a) {
704 return (uint32_t)vclezs_f32(a);
705 }
706
707 // COMMON-LABEL: test_vclezd_f64
708 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp ole double %a, 0.000000e+00
709 // CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double 0.000000e+00, metadata !"ole", metadata !"fpexcept.strict")
710 // CHECK-ASM: fcmp d{{[0-9]+}}, #0.0
711 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, ls
712 // COMMONIR: [[VCLEZ_I:%.*]] = sext i1 [[TMP0]] to i64
713 // COMMONIR: ret i64 [[VCLEZ_I]]
test_vclezd_f64(float64_t a)714 uint64_t test_vclezd_f64(float64_t a) {
715 return (uint64_t)vclezd_f64(a);
716 }
717
718 // COMMON-LABEL: test_vclts_f32
719 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp olt float %a, %b
720 // CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"olt", metadata !"fpexcept.strict")
721 // CHECK-ASM: fcmp s{{[0-9]+}}, s{{[0-9]+}}
722 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, mi
723 // COMMONIR: [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i32
724 // COMMONIR: ret i32 [[VCMPD_I]]
test_vclts_f32(float32_t a,float32_t b)725 uint32_t test_vclts_f32(float32_t a, float32_t b) {
726 return (uint32_t)vclts_f32(a, b);
727 }
728
729 // COMMON-LABEL: test_vcltd_f64
730 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp olt double %a, %b
731 // CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double %b, metadata !"olt", metadata !"fpexcept.strict")
732 // CHECK-ASM: fcmp d{{[0-9]+}}, d{{[0-9]+}}
733 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, mi
734 // COMMONIR: [[VCMPD_I:%.*]] = sext i1 [[TMP0]] to i64
735 // COMMONIR: ret i64 [[VCMPD_I]]
test_vcltd_f64(float64_t a,float64_t b)736 uint64_t test_vcltd_f64(float64_t a, float64_t b) {
737 return (uint64_t)vcltd_f64(a, b);
738 }
739
740 // COMMON-LABEL: test_vcltzs_f32
741 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp olt float %a, 0.000000e+00
742 // CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float 0.000000e+00, metadata !"olt", metadata !"fpexcept.strict")
743 // CHECK-ASM: fcmp s{{[0-9]+}}, #0.0
744 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, mi
745 // COMMONIR: [[VCLTZ_I:%.*]] = sext i1 [[TMP0]] to i32
746 // COMMONIR: ret i32 [[VCLTZ_I]]
test_vcltzs_f32(float32_t a)747 uint32_t test_vcltzs_f32(float32_t a) {
748 return (uint32_t)vcltzs_f32(a);
749 }
750
751 // COMMON-LABEL: test_vcltzd_f64
752 // UNCONSTRAINED: [[TMP0:%.*]] = fcmp olt double %a, 0.000000e+00
753 // CONSTRAINED: [[TMP0:%.*]] = call i1 @llvm.experimental.constrained.fcmp.f64(double %a, double 0.000000e+00, metadata !"olt", metadata !"fpexcept.strict")
754 // CHECK-ASM: fcmp d{{[0-9]+}}, #0.0
755 // CHECK-ASM-NEXT:cset {{w[0-9]+}}, mi
756 // COMMONIR: [[VCLTZ_I:%.*]] = sext i1 [[TMP0]] to i64
757 // COMMONIR: ret i64 [[VCLTZ_I]]
test_vcltzd_f64(float64_t a)758 uint64_t test_vcltzd_f64(float64_t a) {
759 return (uint64_t)vcltzd_f64(a);
760 }
761
762 // COMMON-LABEL: test_vadd_f64
763 // UNCONSTRAINED: [[ADD_I:%.*]] = fadd <1 x double> %a, %b
764 // CONSTRAINED: [[ADD_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fadd.v1f64(<1 x double> %a, <1 x double> %b, metadata !"round.tonearest", metadata !"fpexcept.strict")
765 // CHECK-ASM: fadd d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
766 // COMMONIR: ret <1 x double> [[ADD_I]]
test_vadd_f64(float64x1_t a,float64x1_t b)767 float64x1_t test_vadd_f64(float64x1_t a, float64x1_t b) {
768 return vadd_f64(a, b);
769 }
770
771 // COMMON-LABEL: test_vmul_f64
772 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <1 x double> %a, %b
773 // CONSTRAINED: [[MUL_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fmul.v1f64(<1 x double> %a, <1 x double> %b, metadata !"round.tonearest", metadata !"fpexcept.strict")
774 // CHECK-ASM: fmul d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
775 // COMMONIR: ret <1 x double> [[MUL_I]]
test_vmul_f64(float64x1_t a,float64x1_t b)776 float64x1_t test_vmul_f64(float64x1_t a, float64x1_t b) {
777 return vmul_f64(a, b);
778 }
779
780 // COMMON-LABEL: test_vdiv_f64
781 // UNCONSTRAINED: [[DIV_I:%.*]] = fdiv <1 x double> %a, %b
782 // CONSTRAINED: [[DIV_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fdiv.v1f64(<1 x double> %a, <1 x double> %b, metadata !"round.tonearest", metadata !"fpexcept.strict")
783 // CHECK-ASM: fdiv d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
784 // COMMONIR: ret <1 x double> [[DIV_I]]
test_vdiv_f64(float64x1_t a,float64x1_t b)785 float64x1_t test_vdiv_f64(float64x1_t a, float64x1_t b) {
786 return vdiv_f64(a, b);
787 }
788
789 // COMMON-LABEL: test_vmla_f64
790 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <1 x double> %b, %c
791 // CONSTRAINED: [[MUL_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fmul.v1f64(<1 x double> %b, <1 x double> %c, metadata !"round.tonearest", metadata !"fpexcept.strict")
792 // CHECK-ASM: fmul d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
793 // UNCONSTRAINED: [[ADD_I:%.*]] = fadd <1 x double> %a, [[MUL_I]]
794 // CONSTRAINED: [[ADD_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fadd.v1f64(<1 x double> %a, <1 x double> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
795 // CHECK-ASM: fadd d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
796 // COMMONIR: ret <1 x double> [[ADD_I]]
test_vmla_f64(float64x1_t a,float64x1_t b,float64x1_t c)797 float64x1_t test_vmla_f64(float64x1_t a, float64x1_t b, float64x1_t c) {
798 return vmla_f64(a, b, c);
799 }
800
801 // COMMON-LABEL: test_vmls_f64
802 // UNCONSTRAINED: [[MUL_I:%.*]] = fmul <1 x double> %b, %c
803 // CONSTRAINED: [[MUL_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fmul.v1f64(<1 x double> %b, <1 x double> %c, metadata !"round.tonearest", metadata !"fpexcept.strict")
804 // CHECK-ASM: fmul d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
805 // UNCONSTRAINED: [[SUB_I:%.*]] = fsub <1 x double> %a, [[MUL_I]]
806 // CONSTRAINED: [[SUB_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fsub.v1f64(<1 x double> %a, <1 x double> [[MUL_I]], metadata !"round.tonearest", metadata !"fpexcept.strict")
807 // CHECK-ASM: fsub d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
808 // COMMONIR: ret <1 x double> [[SUB_I]]
test_vmls_f64(float64x1_t a,float64x1_t b,float64x1_t c)809 float64x1_t test_vmls_f64(float64x1_t a, float64x1_t b, float64x1_t c) {
810 return vmls_f64(a, b, c);
811 }
812
813 // COMMON-LABEL: test_vfma_f64
814 // COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
815 // COMMONIR: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8>
816 // COMMONIR: [[TMP2:%.*]] = bitcast <1 x double> %c to <8 x i8>
817 // UNCONSTRAINED: [[TMP3:%.*]] = call <1 x double> @llvm.fma.v1f64(<1 x double> %b, <1 x double> %c, <1 x double> %a)
818 // CONSTRAINED: [[TMP3:%.*]] = call <1 x double> @llvm.experimental.constrained.fma.v1f64(<1 x double> %b, <1 x double> %c, <1 x double> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
819 // CHECK-ASM: fmadd d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
820 // COMMONIR: ret <1 x double> [[TMP3]]
test_vfma_f64(float64x1_t a,float64x1_t b,float64x1_t c)821 float64x1_t test_vfma_f64(float64x1_t a, float64x1_t b, float64x1_t c) {
822 return vfma_f64(a, b, c);
823 }
824
825 // COMMON-LABEL: test_vfms_f64
826 // COMMONIR: [[SUB_I:%.*]] = fneg <1 x double> %b
827 // CHECK-ASM: fneg d{{[0-9]+}}, d{{[0-9]+}}
828 // COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
829 // COMMONIR: [[TMP1:%.*]] = bitcast <1 x double> [[SUB_I]] to <8 x i8>
830 // COMMONIR: [[TMP2:%.*]] = bitcast <1 x double> %c to <8 x i8>
831 // UNCONSTRAINED: [[TMP3:%.*]] = call <1 x double> @llvm.fma.v1f64(<1 x double> [[SUB_I]], <1 x double> %c, <1 x double> %a)
832 // CONSTRAINED: [[TMP3:%.*]] = call <1 x double> @llvm.experimental.constrained.fma.v1f64(<1 x double> [[SUB_I]], <1 x double> %c, <1 x double> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
833 // CHECK-ASM: fmadd d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
834 // COMMONIR: ret <1 x double> [[TMP3]]
test_vfms_f64(float64x1_t a,float64x1_t b,float64x1_t c)835 float64x1_t test_vfms_f64(float64x1_t a, float64x1_t b, float64x1_t c) {
836 return vfms_f64(a, b, c);
837 }
838
839 // COMMON-LABEL: test_vsub_f64
840 // UNCONSTRAINED: [[SUB_I:%.*]] = fsub <1 x double> %a, %b
841 // CONSTRAINED: [[SUB_I:%.*]] = call <1 x double> @llvm.experimental.constrained.fsub.v1f64(<1 x double> %a, <1 x double> %b, metadata !"round.tonearest", metadata !"fpexcept.strict")
842 // CHECK-ASM: fsub d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
843 // COMMONIR: ret <1 x double> [[SUB_I]]
test_vsub_f64(float64x1_t a,float64x1_t b)844 float64x1_t test_vsub_f64(float64x1_t a, float64x1_t b) {
845 return vsub_f64(a, b);
846 }
847
848 // COMMON-LABEL: test_vcvt_s64_f64
849 // COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
850 // UNCONSTRAINED: [[TMP1:%.*]] = fptosi <1 x double> %a to <1 x i64>
851 // CONSTRAINED: [[TMP1:%.*]] = call <1 x i64> @llvm.experimental.constrained.fptosi.v1i64.v1f64(<1 x double> %a, metadata !"fpexcept.strict")
852 // CHECK-ASM: fcvtzs x{{[0-9]+}}, d{{[0-9]+}}
853 // COMMONIR: ret <1 x i64> [[TMP1]]
test_vcvt_s64_f64(float64x1_t a)854 int64x1_t test_vcvt_s64_f64(float64x1_t a) {
855 return vcvt_s64_f64(a);
856 }
857
858 // COMMON-LABEL: test_vcvt_u64_f64
859 // COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
860 // UNCONSTRAINED: [[TMP1:%.*]] = fptoui <1 x double> %a to <1 x i64>
861 // CONSTRAINED: [[TMP1:%.*]] = call <1 x i64> @llvm.experimental.constrained.fptoui.v1i64.v1f64(<1 x double> %a, metadata !"fpexcept.strict")
862 // CHECK-ASM: fcvtzu x{{[0-9]+}}, d{{[0-9]+}}
863 // COMMONIR: ret <1 x i64> [[TMP1]]
test_vcvt_u64_f64(float64x1_t a)864 uint64x1_t test_vcvt_u64_f64(float64x1_t a) {
865 return vcvt_u64_f64(a);
866 }
867
868 // COMMON-LABEL: test_vcvt_f64_s64
869 // COMMONIR: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
870 // UNCONSTRAINED: [[VCVT_I:%.*]] = sitofp <1 x i64> %a to <1 x double>
871 // CONSTRAINED: [[VCVT_I:%.*]] = call <1 x double> @llvm.experimental.constrained.sitofp.v1f64.v1i64(<1 x i64> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
872 // CHECK-ASM: scvtf d{{[0-9]+}}, x{{[0-9]+}}
873 // COMMONIR: ret <1 x double> [[VCVT_I]]
test_vcvt_f64_s64(int64x1_t a)874 float64x1_t test_vcvt_f64_s64(int64x1_t a) {
875 return vcvt_f64_s64(a);
876 }
877
878 // COMMON-LABEL: test_vcvt_f64_u64
879 // COMMONIR: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
880 // UNCONSTRAINED: [[VCVT_I:%.*]] = uitofp <1 x i64> %a to <1 x double>
881 // CONSTRAINED: [[VCVT_I:%.*]] = call <1 x double> @llvm.experimental.constrained.uitofp.v1f64.v1i64(<1 x i64> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
882 // CHECK-ASM: ucvtf d{{[0-9]+}}, x{{[0-9]+}}
883 // COMMONIR: ret <1 x double> [[VCVT_I]]
test_vcvt_f64_u64(uint64x1_t a)884 float64x1_t test_vcvt_f64_u64(uint64x1_t a) {
885 return vcvt_f64_u64(a);
886 }
887
888 // COMMON-LABEL: test_vrnda_f64
889 // COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
890 // UNCONSTRAINED: [[VRNDA1_I:%.*]] = call <1 x double> @llvm.round.v1f64(<1 x double> %a)
891 // CONSTRAINED: [[VRNDA1_I:%.*]] = call <1 x double> @llvm.experimental.constrained.round.v1f64(<1 x double> %a, metadata !"fpexcept.strict")
892 // CHECK-ASM: frinta d{{[0-9]+}}, d{{[0-9]+}}
893 // COMMONIR: ret <1 x double> [[VRNDA1_I]]
test_vrnda_f64(float64x1_t a)894 float64x1_t test_vrnda_f64(float64x1_t a) {
895 return vrnda_f64(a);
896 }
897
898 // COMMON-LABEL: test_vrndp_f64
899 // COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
900 // UNCONSTRAINED: [[VRNDP1_I:%.*]] = call <1 x double> @llvm.ceil.v1f64(<1 x double> %a)
901 // CONSTRAINED: [[VRNDP1_I:%.*]] = call <1 x double> @llvm.experimental.constrained.ceil.v1f64(<1 x double> %a, metadata !"fpexcept.strict")
902 // CHECK-ASM: frintp d{{[0-9]+}}, d{{[0-9]+}}
903 // COMMONIR: ret <1 x double> [[VRNDP1_I]]
test_vrndp_f64(float64x1_t a)904 float64x1_t test_vrndp_f64(float64x1_t a) {
905 return vrndp_f64(a);
906 }
907
908 // COMMON-LABEL: test_vrndm_f64
909 // COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
910 // UNCONSTRAINED: [[VRNDM1_I:%.*]] = call <1 x double> @llvm.floor.v1f64(<1 x double> %a)
911 // CONSTRAINED: [[VRNDM1_I:%.*]] = call <1 x double> @llvm.experimental.constrained.floor.v1f64(<1 x double> %a, metadata !"fpexcept.strict")
912 // CHECK-ASM: frintm d{{[0-9]+}}, d{{[0-9]+}}
913 // COMMONIR: ret <1 x double> [[VRNDM1_I]]
test_vrndm_f64(float64x1_t a)914 float64x1_t test_vrndm_f64(float64x1_t a) {
915 return vrndm_f64(a);
916 }
917
918 // COMMON-LABEL: test_vrndx_f64
919 // COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
920 // UNCONSTRAINED: [[VRNDX1_I:%.*]] = call <1 x double> @llvm.rint.v1f64(<1 x double> %a)
921 // CONSTRAINED: [[VRNDX1_I:%.*]] = call <1 x double> @llvm.experimental.constrained.rint.v1f64(<1 x double> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
922 // CHECK-ASM: frintx d{{[0-9]+}}, d{{[0-9]+}}
923 // COMMONIR: ret <1 x double> [[VRNDX1_I]]
test_vrndx_f64(float64x1_t a)924 float64x1_t test_vrndx_f64(float64x1_t a) {
925 return vrndx_f64(a);
926 }
927
928 // COMMON-LABEL: test_vrnd_f64
929 // COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
930 // UNCONSTRAINED: [[VRNDZ1_I:%.*]] = call <1 x double> @llvm.trunc.v1f64(<1 x double> %a)
931 // CONSTRAINED: [[VRNDZ1_I:%.*]] = call <1 x double> @llvm.experimental.constrained.trunc.v1f64(<1 x double> %a, metadata !"fpexcept.strict")
932 // CHECK-ASM: frintz d{{[0-9]+}}, d{{[0-9]+}}
933 // COMMONIR: ret <1 x double> [[VRNDZ1_I]]
test_vrnd_f64(float64x1_t a)934 float64x1_t test_vrnd_f64(float64x1_t a) {
935 return vrnd_f64(a);
936 }
937
938 // COMMON-LABEL: test_vrndi_f64
939 // COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
940 // UNCONSTRAINED: [[VRNDI1_I:%.*]] = call <1 x double> @llvm.nearbyint.v1f64(<1 x double> %a)
941 // CONSTRAINED: [[VRNDI1_I:%.*]] = call <1 x double> @llvm.experimental.constrained.nearbyint.v1f64(<1 x double> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
942 // CHECK-ASM: frinti d{{[0-9]+}}, d{{[0-9]+}}
943 // COMMONIR: ret <1 x double> [[VRNDI1_I]]
test_vrndi_f64(float64x1_t a)944 float64x1_t test_vrndi_f64(float64x1_t a) {
945 return vrndi_f64(a);
946 }
947
948 // COMMON-LABEL: test_vsqrt_f64
949 // COMMONIR: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
950 // UNCONSTRAINED: [[VSQRT_I:%.*]] = call <1 x double> @llvm.sqrt.v1f64(<1 x double> %a)
951 // CONSTRAINED: [[VSQRT_I:%.*]] = call <1 x double> @llvm.experimental.constrained.sqrt.v1f64(<1 x double> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
952 // CHECK-ASM: fsqrt d{{[0-9]+}}, d{{[0-9]+}}
953 // COMMONIR: ret <1 x double> [[VSQRT_I]]
test_vsqrt_f64(float64x1_t a)954 float64x1_t test_vsqrt_f64(float64x1_t a) {
955 return vsqrt_f64(a);
956 }
957