1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
3
4---
5name: ctpop_s32_ss
6legalized: true
7regBankSelected: true
8tracksRegLiveness: true
9
10body: |
11  bb.0:
12    liveins: $sgpr0
13
14    ; CHECK-LABEL: name: ctpop_s32_ss
15    ; CHECK: liveins: $sgpr0
16    ; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
17    ; CHECK: [[S_BCNT1_I32_B32_:%[0-9]+]]:sreg_32 = S_BCNT1_I32_B32 [[COPY]], implicit-def $scc
18    ; CHECK: S_ENDPGM 0, implicit [[S_BCNT1_I32_B32_]]
19    %0:sgpr(s32) = COPY $sgpr0
20    %1:sgpr(s32) = G_CTPOP %0
21    S_ENDPGM 0, implicit %1
22...
23
24---
25name: ctpop_s32_vs
26legalized: true
27regBankSelected: true
28tracksRegLiveness: true
29
30body: |
31  bb.0:
32    liveins: $sgpr0
33
34    ; CHECK-LABEL: name: ctpop_s32_vs
35    ; CHECK: liveins: $sgpr0
36    ; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
37    ; CHECK: [[V_BCNT_U32_B32_e64_:%[0-9]+]]:vgpr_32 = V_BCNT_U32_B32_e64 [[COPY]], 0, implicit $exec
38    ; CHECK: S_ENDPGM 0, implicit [[V_BCNT_U32_B32_e64_]]
39    %0:sgpr(s32) = COPY $sgpr0
40    %1:vgpr(s32) = G_CTPOP %0
41    S_ENDPGM 0, implicit %1
42...
43
44---
45name: ctpop_s32_vv
46legalized: true
47regBankSelected: true
48tracksRegLiveness: true
49
50body: |
51  bb.0:
52    liveins: $vgpr0
53
54    ; CHECK-LABEL: name: ctpop_s32_vv
55    ; CHECK: liveins: $vgpr0
56    ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
57    ; CHECK: [[V_BCNT_U32_B32_e64_:%[0-9]+]]:vgpr_32 = V_BCNT_U32_B32_e64 [[COPY]], 0, implicit $exec
58    ; CHECK: S_ENDPGM 0, implicit [[V_BCNT_U32_B32_e64_]]
59    %0:vgpr(s32) = COPY $vgpr0
60    %1:vgpr(s32) = G_CTPOP %0
61    S_ENDPGM 0, implicit %1
62...
63
64---
65name: add_ctpop_s32_v_vv_commute0
66legalized: true
67regBankSelected: true
68tracksRegLiveness: true
69
70body: |
71  bb.0:
72    liveins: $vgpr0, $vgpr1
73
74    ; CHECK-LABEL: name: add_ctpop_s32_v_vv_commute0
75    ; CHECK: liveins: $vgpr0, $vgpr1
76    ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
77    ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
78    ; CHECK: [[V_BCNT_U32_B32_e64_:%[0-9]+]]:vgpr_32 = V_BCNT_U32_B32_e64 [[COPY]], [[COPY1]], implicit $exec
79    ; CHECK: S_ENDPGM 0, implicit [[V_BCNT_U32_B32_e64_]]
80    %0:vgpr(s32) = COPY $vgpr0
81    %1:vgpr(s32) = COPY $vgpr1
82    %2:vgpr(s32) = G_CTPOP %0
83    %3:vgpr(s32) = G_ADD %2, %1
84    S_ENDPGM 0, implicit %3
85...
86
87---
88name: add_ctpop_s32_v_vv_commute1
89legalized: true
90regBankSelected: true
91tracksRegLiveness: true
92
93body: |
94  bb.0:
95    liveins: $vgpr0, $vgpr1
96
97    ; CHECK-LABEL: name: add_ctpop_s32_v_vv_commute1
98    ; CHECK: liveins: $vgpr0, $vgpr1
99    ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
100    ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
101    ; CHECK: [[V_BCNT_U32_B32_e64_:%[0-9]+]]:vgpr_32 = V_BCNT_U32_B32_e64 [[COPY]], [[COPY1]], implicit $exec
102    ; CHECK: S_ENDPGM 0, implicit [[V_BCNT_U32_B32_e64_]]
103    %0:vgpr(s32) = COPY $vgpr0
104    %1:vgpr(s32) = COPY $vgpr1
105    %2:vgpr(s32) = G_CTPOP %0
106    %3:vgpr(s32) = G_ADD %1, %2
107    S_ENDPGM 0, implicit %3
108...
109
110# Test add+ctpop pattern with all scalars. This should stay scalar.
111---
112name: add_ctpop_s32_s_ss_commute0
113legalized: true
114regBankSelected: true
115tracksRegLiveness: true
116
117body: |
118  bb.0:
119    liveins: $sgpr0, $sgpr1
120
121    ; CHECK-LABEL: name: add_ctpop_s32_s_ss_commute0
122    ; CHECK: liveins: $sgpr0, $sgpr1
123    ; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
124    ; CHECK: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
125    ; CHECK: [[S_BCNT1_I32_B32_:%[0-9]+]]:sreg_32 = S_BCNT1_I32_B32 [[COPY]], implicit-def $scc
126    ; CHECK: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_BCNT1_I32_B32_]], [[COPY1]], implicit-def $scc
127    ; CHECK: S_ENDPGM 0, implicit [[S_ADD_I32_]]
128    %0:sgpr(s32) = COPY $sgpr0
129    %1:sgpr(s32) = COPY $sgpr1
130    %2:sgpr(s32) = G_CTPOP %0
131    %3:sgpr(s32) = G_ADD %2, %1
132    S_ENDPGM 0, implicit %3
133...
134
135---
136name: add_ctpop_s32_v_vs_commute0
137legalized: true
138regBankSelected: true
139tracksRegLiveness: true
140
141body: |
142  bb.0:
143    liveins: $vgpr0, $sgpr0
144
145    ; CHECK-LABEL: name: add_ctpop_s32_v_vs_commute0
146    ; CHECK: liveins: $vgpr0, $sgpr0
147    ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
148    ; CHECK: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
149    ; CHECK: [[V_BCNT_U32_B32_e64_:%[0-9]+]]:vgpr_32 = V_BCNT_U32_B32_e64 [[COPY]], [[COPY1]], implicit $exec
150    ; CHECK: S_ENDPGM 0, implicit [[V_BCNT_U32_B32_e64_]]
151    %0:vgpr(s32) = COPY $vgpr0
152    %1:sgpr(s32) = COPY $sgpr0
153    %2:vgpr(s32) = G_CTPOP %0
154    %3:vgpr(s32) = G_ADD %2, %1
155    S_ENDPGM 0, implicit %3
156...
157
158# SGPR->VGPR ctpop with VALU add
159---
160name: add_ctpop_s32_v_sv_commute0
161legalized: true
162regBankSelected: true
163tracksRegLiveness: true
164
165body: |
166  bb.0:
167    liveins: $vgpr0, $sgpr0
168
169    ; CHECK-LABEL: name: add_ctpop_s32_v_sv_commute0
170    ; CHECK: liveins: $vgpr0, $sgpr0
171    ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
172    ; CHECK: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
173    ; CHECK: [[V_BCNT_U32_B32_e64_:%[0-9]+]]:vgpr_32 = V_BCNT_U32_B32_e64 [[COPY1]], [[COPY]], implicit $exec
174    ; CHECK: S_ENDPGM 0, implicit [[V_BCNT_U32_B32_e64_]]
175    %0:vgpr(s32) = COPY $vgpr0
176    %1:sgpr(s32) = COPY $sgpr0
177    %2:vgpr(s32) = G_CTPOP %1
178    %3:vgpr(s32) = G_ADD %2, %0
179    S_ENDPGM 0, implicit %3
180...
181
182# Scalar ctpop with VALU add
183---
184name: add_ctpop_s32_s_sv_commute0
185legalized: true
186regBankSelected: true
187tracksRegLiveness: true
188
189body: |
190  bb.0:
191    liveins: $sgpr0, $vgpr0
192
193    ; CHECK-LABEL: name: add_ctpop_s32_s_sv_commute0
194    ; CHECK: liveins: $sgpr0, $vgpr0
195    ; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
196    ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
197    ; CHECK: [[V_BCNT_U32_B32_e64_:%[0-9]+]]:vgpr_32 = V_BCNT_U32_B32_e64 [[COPY]], [[COPY1]], implicit $exec
198    ; CHECK: S_ENDPGM 0, implicit [[V_BCNT_U32_B32_e64_]]
199    %0:sgpr(s32) = COPY $sgpr0
200    %1:vgpr(s32) = COPY $vgpr0
201    %2:sgpr(s32) = G_CTPOP %0
202    %3:vgpr(s32) = G_ADD %2, %1
203    S_ENDPGM 0, implicit %3
204...
205
206---
207name: ctpop_s64_ss
208legalized: true
209regBankSelected: true
210tracksRegLiveness: true
211
212body: |
213  bb.0:
214    liveins: $sgpr0_sgpr1
215
216    ; CHECK-LABEL: name: ctpop_s64_ss
217    ; CHECK: liveins: $sgpr0_sgpr1
218    ; CHECK: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
219    ; CHECK: [[S_BCNT1_I32_B64_:%[0-9]+]]:sreg_32 = S_BCNT1_I32_B64 [[COPY]], implicit-def $scc
220    ; CHECK: S_ENDPGM 0, implicit [[S_BCNT1_I32_B64_]]
221    %0:sgpr(s64) = COPY $sgpr0_sgpr1
222    %1:sgpr(s32) = G_CTPOP %0
223    S_ENDPGM 0, implicit %1
224...
225