1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX6 %s
3# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX8 %s
4# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX9 %s
5# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX10 %s
6
7---
8name: uaddo_s32_s1_sss
9legalized: true
10regBankSelected: true
11
12body: |
13  bb.0:
14    liveins: $sgpr0, $sgpr1
15
16    ; GFX6-LABEL: name: uaddo_s32_s1_sss
17    ; GFX6: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
18    ; GFX6: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
19    ; GFX6: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY1]], implicit-def $scc
20    ; GFX6: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
21    ; GFX6: $scc = COPY [[COPY2]]
22    ; GFX6: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 [[COPY]], [[COPY1]], implicit $scc
23    ; GFX6: S_ENDPGM 0, implicit [[S_ADD_U32_]], implicit [[S_CSELECT_B32_]]
24    ; GFX8-LABEL: name: uaddo_s32_s1_sss
25    ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
26    ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
27    ; GFX8: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY1]], implicit-def $scc
28    ; GFX8: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
29    ; GFX8: $scc = COPY [[COPY2]]
30    ; GFX8: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 [[COPY]], [[COPY1]], implicit $scc
31    ; GFX8: S_ENDPGM 0, implicit [[S_ADD_U32_]], implicit [[S_CSELECT_B32_]]
32    ; GFX9-LABEL: name: uaddo_s32_s1_sss
33    ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
34    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
35    ; GFX9: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY1]], implicit-def $scc
36    ; GFX9: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
37    ; GFX9: $scc = COPY [[COPY2]]
38    ; GFX9: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 [[COPY]], [[COPY1]], implicit $scc
39    ; GFX9: S_ENDPGM 0, implicit [[S_ADD_U32_]], implicit [[S_CSELECT_B32_]]
40    ; GFX10-LABEL: name: uaddo_s32_s1_sss
41    ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
42    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
43    ; GFX10: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY1]], implicit-def $scc
44    ; GFX10: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
45    ; GFX10: $scc = COPY [[COPY2]]
46    ; GFX10: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 [[COPY]], [[COPY1]], implicit $scc
47    ; GFX10: S_ENDPGM 0, implicit [[S_ADD_U32_]], implicit [[S_CSELECT_B32_]]
48    %0:sgpr(s32) = COPY $sgpr0
49    %1:sgpr(s32) = COPY $sgpr1
50    %2:sgpr(s32), %3:sgpr(s32) = G_UADDO %0, %1
51    %4:sgpr(s32) = G_SELECT %3, %0, %1
52    S_ENDPGM 0, implicit %2, implicit %4
53...
54
55---
56name: uaddo_s32_s1_vvv
57legalized: true
58regBankSelected: true
59
60body: |
61  bb.0:
62    liveins: $vgpr0, $vgpr1
63
64    ; GFX6-LABEL: name: uaddo_s32_s1_vvv
65    ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
66    ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
67    ; GFX6: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
68    ; GFX6: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY1]], 0, [[COPY]], [[V_ADD_CO_U32_e64_1]], implicit $exec
69    ; GFX6: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]]
70    ; GFX8-LABEL: name: uaddo_s32_s1_vvv
71    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
72    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
73    ; GFX8: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
74    ; GFX8: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY1]], 0, [[COPY]], [[V_ADD_CO_U32_e64_1]], implicit $exec
75    ; GFX8: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]]
76    ; GFX9-LABEL: name: uaddo_s32_s1_vvv
77    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
78    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
79    ; GFX9: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
80    ; GFX9: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY1]], 0, [[COPY]], [[V_ADD_CO_U32_e64_1]], implicit $exec
81    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]]
82    ; GFX10-LABEL: name: uaddo_s32_s1_vvv
83    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
84    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
85    ; GFX10: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
86    ; GFX10: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY1]], 0, [[COPY]], [[V_ADD_CO_U32_e64_1]], implicit $exec
87    ; GFX10: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]]
88    %0:vgpr(s32) = COPY $vgpr0
89    %1:vgpr(s32) = COPY $vgpr1
90    %2:vgpr(s32), %3:vcc(s1) = G_UADDO %0, %1
91    %4:vgpr(s32) = G_SELECT %3, %0, %1
92    S_ENDPGM 0, implicit %2, implicit %4
93...
94
95---
96name: uaddo_s32_s1_vsv
97legalized: true
98regBankSelected: true
99
100body: |
101  bb.0:
102    liveins: $sgpr0, $vgpr0
103
104    ; GFX6-LABEL: name: uaddo_s32_s1_vsv
105    ; GFX6: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
106    ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
107    ; GFX6: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
108    ; GFX6: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
109    ; GFX6: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
110    ; GFX6: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[V_MOV_B32_e32_1]], 0, [[V_MOV_B32_e32_]], [[V_ADD_CO_U32_e64_1]], implicit $exec
111    ; GFX6: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]]
112    ; GFX8-LABEL: name: uaddo_s32_s1_vsv
113    ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
114    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
115    ; GFX8: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
116    ; GFX8: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
117    ; GFX8: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
118    ; GFX8: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[V_MOV_B32_e32_1]], 0, [[V_MOV_B32_e32_]], [[V_ADD_CO_U32_e64_1]], implicit $exec
119    ; GFX8: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]]
120    ; GFX9-LABEL: name: uaddo_s32_s1_vsv
121    ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
122    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
123    ; GFX9: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
124    ; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
125    ; GFX9: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
126    ; GFX9: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[V_MOV_B32_e32_1]], 0, [[V_MOV_B32_e32_]], [[V_ADD_CO_U32_e64_1]], implicit $exec
127    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]]
128    ; GFX10-LABEL: name: uaddo_s32_s1_vsv
129    ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
130    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
131    ; GFX10: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
132    ; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
133    ; GFX10: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
134    ; GFX10: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[V_MOV_B32_e32_1]], 0, [[V_MOV_B32_e32_]], [[V_ADD_CO_U32_e64_1]], implicit $exec
135    ; GFX10: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]]
136    %0:sgpr(s32) = COPY $sgpr0
137    %1:vgpr(s32) = COPY $vgpr0
138    %2:vgpr(s32), %3:vcc(s1) = G_UADDO %0, %1
139    %4:vgpr(s32) = G_CONSTANT i32 0
140    %5:vgpr(s32) = G_CONSTANT i32 1
141    %6:vgpr(s32) = G_SELECT %3, %4, %5
142    S_ENDPGM 0, implicit %2, implicit %6
143...
144
145---
146name: uaddo_s32_s1_vvs
147legalized: true
148regBankSelected: true
149
150body: |
151  bb.0:
152    liveins: $sgpr0, $vgpr0
153
154    ; GFX6-LABEL: name: uaddo_s32_s1_vvs
155    ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
156    ; GFX6: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
157    ; GFX6: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
158    ; GFX6: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
159    ; GFX6: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
160    ; GFX6: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[V_MOV_B32_e32_1]], 0, [[V_MOV_B32_e32_]], [[V_ADD_CO_U32_e64_1]], implicit $exec
161    ; GFX6: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]]
162    ; GFX8-LABEL: name: uaddo_s32_s1_vvs
163    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
164    ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
165    ; GFX8: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
166    ; GFX8: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
167    ; GFX8: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
168    ; GFX8: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[V_MOV_B32_e32_1]], 0, [[V_MOV_B32_e32_]], [[V_ADD_CO_U32_e64_1]], implicit $exec
169    ; GFX8: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]]
170    ; GFX9-LABEL: name: uaddo_s32_s1_vvs
171    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
172    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
173    ; GFX9: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
174    ; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
175    ; GFX9: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
176    ; GFX9: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[V_MOV_B32_e32_1]], 0, [[V_MOV_B32_e32_]], [[V_ADD_CO_U32_e64_1]], implicit $exec
177    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]]
178    ; GFX10-LABEL: name: uaddo_s32_s1_vvs
179    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
180    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
181    ; GFX10: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
182    ; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
183    ; GFX10: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
184    ; GFX10: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[V_MOV_B32_e32_1]], 0, [[V_MOV_B32_e32_]], [[V_ADD_CO_U32_e64_1]], implicit $exec
185    ; GFX10: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]]
186    %0:vgpr(s32) = COPY $vgpr0
187    %1:sgpr(s32) = COPY $sgpr0
188    %2:vgpr(s32), %3:vcc(s1) = G_UADDO %0, %1
189    %4:vgpr(s32) = G_CONSTANT i32 0
190    %5:vgpr(s32) = G_CONSTANT i32 1
191    %6:vgpr(s32) = G_SELECT %3, %4, %5
192    S_ENDPGM 0, implicit %2, implicit %6
193...
194