1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=SI %s 3# RUN: FileCheck -check-prefix=ERR %s < %t 4# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX9 %s 5# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX9 %s 6 7# ERR-NOT: remark: 8# ERR: remark: <unknown>:0:0: cannot select: %2:sgpr(s32) = G_UMULH %0:sgpr, %1:sgpr (in function: umulh_s32_ss) 9# ERR-NOT: remark: 10 11--- 12name: umulh_s32_ss 13legalized: true 14regBankSelected: true 15 16body: | 17 bb.0: 18 liveins: $sgpr0, $sgpr1 19 20 ; SI-LABEL: name: umulh_s32_ss 21 ; SI: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 22 ; SI: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1 23 ; SI: [[UMULH:%[0-9]+]]:sgpr(s32) = G_UMULH [[COPY]], [[COPY1]] 24 ; SI: S_ENDPGM 0, implicit [[UMULH]](s32) 25 ; GFX9-LABEL: name: umulh_s32_ss 26 ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 27 ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 28 ; GFX9: [[S_MUL_HI_U32_:%[0-9]+]]:sreg_32 = S_MUL_HI_U32 [[COPY]], [[COPY1]] 29 ; GFX9: S_ENDPGM 0, implicit [[S_MUL_HI_U32_]] 30 %0:sgpr(s32) = COPY $sgpr0 31 %1:sgpr(s32) = COPY $sgpr1 32 %2:sgpr(s32) = G_UMULH %0, %1 33 S_ENDPGM 0, implicit %2 34... 35 36--- 37name: umulh_s32_sv 38legalized: true 39regBankSelected: true 40 41body: | 42 bb.0: 43 liveins: $sgpr0, $vgpr0 44 45 ; SI-LABEL: name: umulh_s32_sv 46 ; SI: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 47 ; SI: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0 48 ; SI: [[V_MUL_HI_U32_e64_:%[0-9]+]]:vgpr_32 = V_MUL_HI_U32_e64 [[COPY]], [[COPY1]], implicit $exec 49 ; SI: S_ENDPGM 0, implicit [[V_MUL_HI_U32_e64_]] 50 ; GFX9-LABEL: name: umulh_s32_sv 51 ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 52 ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0 53 ; GFX9: [[V_MUL_HI_U32_e64_:%[0-9]+]]:vgpr_32 = V_MUL_HI_U32_e64 [[COPY]], [[COPY1]], implicit $exec 54 ; GFX9: S_ENDPGM 0, implicit [[V_MUL_HI_U32_e64_]] 55 %0:sgpr(s32) = COPY $sgpr0 56 %1:vgpr(s32) = COPY $vgpr0 57 %2:vgpr(s32) = G_UMULH %0, %1 58 S_ENDPGM 0, implicit %2 59... 60 61--- 62name: umulh_s32_vs 63legalized: true 64regBankSelected: true 65 66body: | 67 bb.0: 68 liveins: $sgpr0, $vgpr0 69 70 ; SI-LABEL: name: umulh_s32_vs 71 ; SI: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 72 ; SI: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0 73 ; SI: [[V_MUL_HI_U32_e64_:%[0-9]+]]:vgpr_32 = V_MUL_HI_U32_e64 [[COPY]], [[COPY1]], implicit $exec 74 ; SI: S_ENDPGM 0, implicit [[V_MUL_HI_U32_e64_]] 75 ; GFX9-LABEL: name: umulh_s32_vs 76 ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 77 ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0 78 ; GFX9: [[V_MUL_HI_U32_e64_:%[0-9]+]]:vgpr_32 = V_MUL_HI_U32_e64 [[COPY]], [[COPY1]], implicit $exec 79 ; GFX9: S_ENDPGM 0, implicit [[V_MUL_HI_U32_e64_]] 80 %0:vgpr(s32) = COPY $vgpr0 81 %1:sgpr(s32) = COPY $sgpr0 82 %2:vgpr(s32) = G_UMULH %0, %1 83 S_ENDPGM 0, implicit %2 84... 85 86--- 87name: umulh_s32_vv 88legalized: true 89regBankSelected: true 90 91body: | 92 bb.0: 93 liveins: $vgpr0, $vgpr1 94 95 ; SI-LABEL: name: umulh_s32_vv 96 ; SI: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 97 ; SI: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 98 ; SI: [[V_MUL_HI_U32_e64_:%[0-9]+]]:vgpr_32 = V_MUL_HI_U32_e64 [[COPY]], [[COPY1]], implicit $exec 99 ; SI: S_ENDPGM 0, implicit [[V_MUL_HI_U32_e64_]] 100 ; GFX9-LABEL: name: umulh_s32_vv 101 ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 102 ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 103 ; GFX9: [[V_MUL_HI_U32_e64_:%[0-9]+]]:vgpr_32 = V_MUL_HI_U32_e64 [[COPY]], [[COPY1]], implicit $exec 104 ; GFX9: S_ENDPGM 0, implicit [[V_MUL_HI_U32_e64_]] 105 %0:vgpr(s32) = COPY $vgpr0 106 %1:vgpr(s32) = COPY $vgpr1 107 %2:vgpr(s32) = G_UMULH %0, %1 108 S_ENDPGM 0, implicit %2 109... 110