1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2; RUN: llc -global-isel -march=amdgcn -O0 -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s
3
4; Size operand should be the minimum of the two pointer sizes.
5
6define void @test_memcpy_p1_p3_i64(i8 addrspace(1)* %dst, i8 addrspace(3)* %src) {
7  ; CHECK-LABEL: name: test_memcpy_p1_p3_i64
8  ; CHECK: bb.1 (%ir-block.0):
9  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
10  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
11  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
12  ; CHECK:   [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
13  ; CHECK:   [[COPY2:%[0-9]+]]:_(p3) = COPY $vgpr2
14  ; CHECK:   [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
15  ; CHECK:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 256
16  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)
17  ; CHECK:   G_MEMCPY [[MV]](p1), [[COPY2]](p3), [[TRUNC]](s32), 0 :: (store (s8) into %ir.dst, addrspace 1), (load (s8) from %ir.src, addrspace 3)
18  ; CHECK:   [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
19  ; CHECK:   S_SETPC_B64_return [[COPY4]]
20  call void @llvm.memcpy.p1i8.p3i8.i64(i8 addrspace(1)* %dst, i8 addrspace(3)* %src, i64 256, i1 false)
21  ret void
22}
23
24define void @test_memcpy_p1_p3_i32(i8 addrspace(1)* %dst, i8 addrspace(3)* %src) {
25  ; CHECK-LABEL: name: test_memcpy_p1_p3_i32
26  ; CHECK: bb.1 (%ir-block.0):
27  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
28  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
29  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
30  ; CHECK:   [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
31  ; CHECK:   [[COPY2:%[0-9]+]]:_(p3) = COPY $vgpr2
32  ; CHECK:   [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
33  ; CHECK:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 256
34  ; CHECK:   G_MEMCPY [[MV]](p1), [[COPY2]](p3), [[C]](s32), 0 :: (store (s8) into %ir.dst, addrspace 1), (load (s8) from %ir.src, addrspace 3)
35  ; CHECK:   [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
36  ; CHECK:   S_SETPC_B64_return [[COPY4]]
37  call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %dst, i8 addrspace(3)* %src, i32 256, i1 false)
38  ret void
39}
40
41define void @test_memcpy_p1_p3_i16(i8 addrspace(1)* %dst, i8 addrspace(3)* %src) {
42  ; CHECK-LABEL: name: test_memcpy_p1_p3_i16
43  ; CHECK: bb.1 (%ir-block.0):
44  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
45  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
46  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
47  ; CHECK:   [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
48  ; CHECK:   [[COPY2:%[0-9]+]]:_(p3) = COPY $vgpr2
49  ; CHECK:   [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
50  ; CHECK:   [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 256
51  ; CHECK:   [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[C]](s16)
52  ; CHECK:   G_MEMCPY [[MV]](p1), [[COPY2]](p3), [[ZEXT]](s32), 0 :: (store (s8) into %ir.dst, addrspace 1), (load (s8) from %ir.src, addrspace 3)
53  ; CHECK:   [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
54  ; CHECK:   S_SETPC_B64_return [[COPY4]]
55  call void @llvm.memcpy.p1i8.p3i8.i16(i8 addrspace(1)* %dst, i8 addrspace(3)* %src, i16 256, i1 false)
56  ret void
57}
58
59define void @test_memcpy_p3_p1_i64(i8 addrspace(3)* %dst, i8 addrspace(1)* %src) {
60  ; CHECK-LABEL: name: test_memcpy_p3_p1_i64
61  ; CHECK: bb.1 (%ir-block.0):
62  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
63  ; CHECK:   [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
64  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
65  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
66  ; CHECK:   [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32)
67  ; CHECK:   [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
68  ; CHECK:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 256
69  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)
70  ; CHECK:   G_MEMCPY [[COPY]](p3), [[MV]](p1), [[TRUNC]](s32), 0 :: (store (s8) into %ir.dst, addrspace 3), (load (s8) from %ir.src, addrspace 1)
71  ; CHECK:   [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
72  ; CHECK:   S_SETPC_B64_return [[COPY4]]
73  call void @llvm.memcpy.p3i8.p1i8.i64(i8 addrspace(3)* %dst, i8 addrspace(1)* %src, i64 256, i1 false)
74  ret void
75}
76
77define void @test_memcpy_p3_p1_i32(i8 addrspace(3)* %dst, i8 addrspace(1)* %src) {
78  ; CHECK-LABEL: name: test_memcpy_p3_p1_i32
79  ; CHECK: bb.1 (%ir-block.0):
80  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
81  ; CHECK:   [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
82  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
83  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
84  ; CHECK:   [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32)
85  ; CHECK:   [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
86  ; CHECK:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 256
87  ; CHECK:   G_MEMCPY [[COPY]](p3), [[MV]](p1), [[C]](s32), 0 :: (store (s8) into %ir.dst, addrspace 3), (load (s8) from %ir.src, addrspace 1)
88  ; CHECK:   [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
89  ; CHECK:   S_SETPC_B64_return [[COPY4]]
90  call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %dst, i8 addrspace(1)* %src, i32 256, i1 false)
91  ret void
92}
93
94define void @test_memcpy_p3_p1_i16(i8 addrspace(3)* %dst, i8 addrspace(1)* %src) {
95  ; CHECK-LABEL: name: test_memcpy_p3_p1_i16
96  ; CHECK: bb.1 (%ir-block.0):
97  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
98  ; CHECK:   [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
99  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
100  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
101  ; CHECK:   [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32)
102  ; CHECK:   [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
103  ; CHECK:   [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 256
104  ; CHECK:   [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[C]](s16)
105  ; CHECK:   G_MEMCPY [[COPY]](p3), [[MV]](p1), [[ZEXT]](s32), 0 :: (store (s8) into %ir.dst, addrspace 3), (load (s8) from %ir.src, addrspace 1)
106  ; CHECK:   [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
107  ; CHECK:   S_SETPC_B64_return [[COPY4]]
108  call void @llvm.memcpy.p3i8.p1i8.i16(i8 addrspace(3)* %dst, i8 addrspace(1)* %src, i16 256, i1 false)
109  ret void
110}
111
112define void @test_memmove_p1_p3_i64(i8 addrspace(1)* %dst, i8 addrspace(3)* %src) {
113  ; CHECK-LABEL: name: test_memmove_p1_p3_i64
114  ; CHECK: bb.1 (%ir-block.0):
115  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
116  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
117  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
118  ; CHECK:   [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
119  ; CHECK:   [[COPY2:%[0-9]+]]:_(p3) = COPY $vgpr2
120  ; CHECK:   [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
121  ; CHECK:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 256
122  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)
123  ; CHECK:   G_MEMMOVE [[MV]](p1), [[COPY2]](p3), [[TRUNC]](s32), 0 :: (store (s8) into %ir.dst, addrspace 1), (load (s8) from %ir.src, addrspace 3)
124  ; CHECK:   [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
125  ; CHECK:   S_SETPC_B64_return [[COPY4]]
126  call void @llvm.memmove.p1i8.p3i8.i64(i8 addrspace(1)* %dst, i8 addrspace(3)* %src, i64 256, i1 false)
127  ret void
128}
129
130define void @test_memmove_p1_p3_i32(i8 addrspace(1)* %dst, i8 addrspace(3)* %src) {
131  ; CHECK-LABEL: name: test_memmove_p1_p3_i32
132  ; CHECK: bb.1 (%ir-block.0):
133  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
134  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
135  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
136  ; CHECK:   [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
137  ; CHECK:   [[COPY2:%[0-9]+]]:_(p3) = COPY $vgpr2
138  ; CHECK:   [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
139  ; CHECK:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 256
140  ; CHECK:   G_MEMMOVE [[MV]](p1), [[COPY2]](p3), [[C]](s32), 0 :: (store (s8) into %ir.dst, addrspace 1), (load (s8) from %ir.src, addrspace 3)
141  ; CHECK:   [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
142  ; CHECK:   S_SETPC_B64_return [[COPY4]]
143  call void @llvm.memmove.p1i8.p3i8.i32(i8 addrspace(1)* %dst, i8 addrspace(3)* %src, i32 256, i1 false)
144  ret void
145}
146
147define void @test_memmove_p1_p3_i16(i8 addrspace(1)* %dst, i8 addrspace(3)* %src) {
148  ; CHECK-LABEL: name: test_memmove_p1_p3_i16
149  ; CHECK: bb.1 (%ir-block.0):
150  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
151  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
152  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
153  ; CHECK:   [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
154  ; CHECK:   [[COPY2:%[0-9]+]]:_(p3) = COPY $vgpr2
155  ; CHECK:   [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
156  ; CHECK:   [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 256
157  ; CHECK:   [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[C]](s16)
158  ; CHECK:   G_MEMMOVE [[MV]](p1), [[COPY2]](p3), [[ZEXT]](s32), 0 :: (store (s8) into %ir.dst, addrspace 1), (load (s8) from %ir.src, addrspace 3)
159  ; CHECK:   [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
160  ; CHECK:   S_SETPC_B64_return [[COPY4]]
161  call void @llvm.memmove.p1i8.p3i8.i16(i8 addrspace(1)* %dst, i8 addrspace(3)* %src, i16 256, i1 false)
162  ret void
163}
164
165define void @test_memset_p1_i64(i8 addrspace(1)* %dst, i8 %val) {
166  ; CHECK-LABEL: name: test_memset_p1_i64
167  ; CHECK: bb.1 (%ir-block.0):
168  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
169  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
170  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
171  ; CHECK:   [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
172  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
173  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY2]](s32)
174  ; CHECK:   [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
175  ; CHECK:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 256
176  ; CHECK:   G_MEMSET [[MV]](p1), [[TRUNC]](s8), [[C]](s64), 0 :: (store (s8) into %ir.dst, addrspace 1)
177  ; CHECK:   [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
178  ; CHECK:   S_SETPC_B64_return [[COPY4]]
179  call void @llvm.memset.p1i8.i64(i8 addrspace(1)* %dst, i8 %val, i64 256, i1 false)
180  ret void
181}
182
183define void @test_memset_p1_i32(i8 addrspace(1)* %dst, i8 %val) {
184  ; CHECK-LABEL: name: test_memset_p1_i32
185  ; CHECK: bb.1 (%ir-block.0):
186  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
187  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
188  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
189  ; CHECK:   [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
190  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
191  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY2]](s32)
192  ; CHECK:   [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
193  ; CHECK:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 256
194  ; CHECK:   [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[C]](s32)
195  ; CHECK:   G_MEMSET [[MV]](p1), [[TRUNC]](s8), [[ZEXT]](s64), 0 :: (store (s8) into %ir.dst, addrspace 1)
196  ; CHECK:   [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
197  ; CHECK:   S_SETPC_B64_return [[COPY4]]
198  call void @llvm.memset.p1i8.i32(i8 addrspace(1)* %dst, i8 %val, i32 256, i1 false)
199  ret void
200}
201
202define void @test_memset_p1_i16(i8 addrspace(1)* %dst, i8 %val) {
203  ; CHECK-LABEL: name: test_memset_p1_i16
204  ; CHECK: bb.1 (%ir-block.0):
205  ; CHECK:   liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
206  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
207  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
208  ; CHECK:   [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
209  ; CHECK:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
210  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY2]](s32)
211  ; CHECK:   [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
212  ; CHECK:   [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 256
213  ; CHECK:   [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[C]](s16)
214  ; CHECK:   G_MEMSET [[MV]](p1), [[TRUNC]](s8), [[ZEXT]](s64), 0 :: (store (s8) into %ir.dst, addrspace 1)
215  ; CHECK:   [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
216  ; CHECK:   S_SETPC_B64_return [[COPY4]]
217  call void @llvm.memset.p1i8.i16(i8 addrspace(1)* %dst, i8 %val, i16 256, i1 false)
218  ret void
219}
220
221define void @test_memset_p3_i64(i8 addrspace(3)* %dst, i8 %val) {
222  ; CHECK-LABEL: name: test_memset_p3_i64
223  ; CHECK: bb.1 (%ir-block.0):
224  ; CHECK:   liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
225  ; CHECK:   [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
226  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
227  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
228  ; CHECK:   [[COPY2:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
229  ; CHECK:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 256
230  ; CHECK:   [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)
231  ; CHECK:   G_MEMSET [[COPY]](p3), [[TRUNC]](s8), [[TRUNC1]](s32), 0 :: (store (s8) into %ir.dst, addrspace 3)
232  ; CHECK:   [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY2]]
233  ; CHECK:   S_SETPC_B64_return [[COPY3]]
234  call void @llvm.memset.p3i8.i64(i8 addrspace(3)* %dst, i8 %val, i64 256, i1 false)
235  ret void
236}
237
238define void @test_memset_p3_i32(i8 addrspace(3)* %dst, i8 %val) {
239  ; CHECK-LABEL: name: test_memset_p3_i32
240  ; CHECK: bb.1 (%ir-block.0):
241  ; CHECK:   liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
242  ; CHECK:   [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
243  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
244  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
245  ; CHECK:   [[COPY2:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
246  ; CHECK:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 256
247  ; CHECK:   G_MEMSET [[COPY]](p3), [[TRUNC]](s8), [[C]](s32), 0 :: (store (s8) into %ir.dst, addrspace 3)
248  ; CHECK:   [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY2]]
249  ; CHECK:   S_SETPC_B64_return [[COPY3]]
250  call void @llvm.memset.p3i8.i32(i8 addrspace(3)* %dst, i8 %val, i32 256, i1 false)
251  ret void
252}
253
254define void @test_memset_p3_i16(i8 addrspace(3)* %dst, i8 %val) {
255  ; CHECK-LABEL: name: test_memset_p3_i16
256  ; CHECK: bb.1 (%ir-block.0):
257  ; CHECK:   liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
258  ; CHECK:   [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
259  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
260  ; CHECK:   [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
261  ; CHECK:   [[COPY2:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
262  ; CHECK:   [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 256
263  ; CHECK:   [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[C]](s16)
264  ; CHECK:   G_MEMSET [[COPY]](p3), [[TRUNC]](s8), [[ZEXT]](s32), 0 :: (store (s8) into %ir.dst, addrspace 3)
265  ; CHECK:   [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY2]]
266  ; CHECK:   S_SETPC_B64_return [[COPY3]]
267  call void @llvm.memset.p3i8.i16(i8 addrspace(3)* %dst, i8 %val, i16 256, i1 false)
268  ret void
269}
270
271declare void @llvm.memcpy.p1i8.p3i8.i64(i8 addrspace(1)* noalias nocapture writeonly, i8 addrspace(3)* noalias nocapture readonly, i64, i1 immarg) #0
272declare void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* noalias nocapture writeonly, i8 addrspace(3)* noalias nocapture readonly, i32, i1 immarg) #0
273declare void @llvm.memcpy.p1i8.p3i8.i16(i8 addrspace(1)* noalias nocapture writeonly, i8 addrspace(3)* noalias nocapture readonly, i16, i1 immarg) #0
274declare void @llvm.memcpy.p3i8.p1i8.i64(i8 addrspace(3)* noalias nocapture writeonly, i8 addrspace(1)* noalias nocapture readonly, i64, i1 immarg) #0
275declare void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* noalias nocapture writeonly, i8 addrspace(1)* noalias nocapture readonly, i32, i1 immarg) #0
276declare void @llvm.memcpy.p3i8.p1i8.i16(i8 addrspace(3)* noalias nocapture writeonly, i8 addrspace(1)* noalias nocapture readonly, i16, i1 immarg) #0
277declare void @llvm.memmove.p1i8.p3i8.i64(i8 addrspace(1)* nocapture, i8 addrspace(3)* nocapture readonly, i64, i1 immarg) #0
278declare void @llvm.memmove.p1i8.p3i8.i32(i8 addrspace(1)* nocapture, i8 addrspace(3)* nocapture readonly, i32, i1 immarg) #0
279declare void @llvm.memmove.p1i8.p3i8.i16(i8 addrspace(1)* nocapture, i8 addrspace(3)* nocapture readonly, i16, i1 immarg) #0
280declare void @llvm.memset.p1i8.i64(i8 addrspace(1)* nocapture writeonly, i8, i64, i1 immarg) #1
281declare void @llvm.memset.p1i8.i32(i8 addrspace(1)* nocapture writeonly, i8, i32, i1 immarg) #1
282declare void @llvm.memset.p1i8.i16(i8 addrspace(1)* nocapture writeonly, i8, i16, i1 immarg) #1
283declare void @llvm.memset.p3i8.i64(i8 addrspace(3)* nocapture writeonly, i8, i64, i1 immarg) #1
284declare void @llvm.memset.p3i8.i32(i8 addrspace(3)* nocapture writeonly, i8, i32, i1 immarg) #1
285declare void @llvm.memset.p3i8.i16(i8 addrspace(3)* nocapture writeonly, i8, i16, i1 immarg) #1
286
287attributes #0 = { argmemonly nounwind willreturn }
288attributes #1 = { argmemonly nounwind willreturn writeonly }
289