1; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -amdgpu-enable-lower-module-lds=0 -verify-machineinstrs -show-mc-encoding < %s | FileCheck -check-prefixes=GCN %s
2; FIXME: Merge with DAG test
3
4@lds.external = external unnamed_addr addrspace(3) global [0 x i32]
5@lds.defined = unnamed_addr addrspace(3) global [8 x i32] undef, align 8
6
7; GCN-LABEL: {{^}}test_basic:
8; GCN: s_add_u32 s0, lds.defined@abs32@lo, s0 ; encoding: [0xff,0x00,0x00,0x80,A,A,A,A]
9; GCN: v_mov_b32_e32 v2, s0 ; encoding: [0x00,0x02,0x04,0x7e]
10
11; GCN: .globl lds.external
12; GCN: .amdgpu_lds lds.external, 0, 4
13; GCN: .globl lds.defined
14; GCN: .amdgpu_lds lds.defined, 32, 8
15define amdgpu_gs float @test_basic(i32 inreg %wave, i32 %arg1) #0 {
16main_body:
17  %gep0 = getelementptr [0 x i32], [0 x i32] addrspace(3)* @lds.external, i32 0, i32 %arg1
18  %tmp = load i32, i32 addrspace(3)* %gep0
19
20  %gep1 = getelementptr [8 x i32], [8 x i32] addrspace(3)* @lds.defined, i32 0, i32 %wave
21  store i32 123, i32 addrspace(3)* %gep1
22
23  %r = bitcast i32 %tmp to float
24  ret float %r
25}
26
27attributes #0 = { "no-signed-zeros-fp-math"="true" }
28attributes #4 = { convergent nounwind readnone }
29