1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer %s -o - | FileCheck %s 3 4--- 5name: test_anyext_s32_to_s64 6body: | 7 bb.0: 8 liveins: $vgpr0 9 10 ; CHECK-LABEL: name: test_anyext_s32_to_s64 11 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 12 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[COPY]](s32) 13 ; CHECK: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 14 %0:_(s32) = COPY $vgpr0 15 %1:_(s64) = G_ANYEXT %0 16 $vgpr0_vgpr1 = COPY %1 17... 18 19--- 20name: test_anyext_s16_to_s64 21body: | 22 bb.0: 23 liveins: $vgpr0 24 25 ; CHECK-LABEL: name: test_anyext_s16_to_s64 26 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 27 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[COPY]](s32) 28 ; CHECK: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 29 %0:_(s32) = COPY $vgpr0 30 %1:_(s16) = G_TRUNC %0 31 %2:_(s64) = G_ANYEXT %1 32 $vgpr0_vgpr1 = COPY %2 33... 34 35--- 36name: test_anyext_s16_to_s32 37body: | 38 bb.0: 39 liveins: $vgpr0 40 41 ; CHECK-LABEL: name: test_anyext_s16_to_s32 42 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 43 ; CHECK: $vgpr0 = COPY [[COPY]](s32) 44 %0:_(s32) = COPY $vgpr0 45 %1:_(s16) = G_TRUNC %0 46 %2:_(s32) = G_ANYEXT %1 47 $vgpr0 = COPY %2 48... 49 50--- 51name: test_anyext_s24_to_s32 52body: | 53 bb.0: 54 liveins: $vgpr0 55 56 ; CHECK-LABEL: name: test_anyext_s24_to_s32 57 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 58 ; CHECK: $vgpr0 = COPY [[COPY]](s32) 59 %0:_(s32) = COPY $vgpr0 60 %1:_(s24) = G_TRUNC %0 61 %2:_(s32) = G_ANYEXT %1 62 $vgpr0 = COPY %2 63... 64 65--- 66name: test_anyext_s1_to_s32 67body: | 68 bb.0: 69 70 ; CHECK-LABEL: name: test_anyext_s1_to_s32 71 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 72 ; CHECK: $vgpr0 = COPY [[C]](s32) 73 %0:_(s1) = G_CONSTANT i1 0 74 %1:_(s32) = G_ANYEXT %0 75 $vgpr0 = COPY %1 76... 77 78--- 79name: test_anyext_s1_to_s64 80body: | 81 bb.0: 82 83 ; CHECK-LABEL: name: test_anyext_s1_to_s64 84 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 85 ; CHECK: $vgpr0_vgpr1 = COPY [[C]](s64) 86 %0:_(s1) = G_CONSTANT i1 0 87 %1:_(s64) = G_ANYEXT %0 88 $vgpr0_vgpr1 = COPY %1 89... 90 91--- 92name: test_anyext_v2s16_to_v2s32 93body: | 94 bb.0: 95 liveins: $vgpr0 96 97 ; CHECK-LABEL: name: test_anyext_v2s16_to_v2s32 98 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 99 ; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) 100 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 101 ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 102 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[BITCAST]](s32), [[LSHR]](s32) 103 ; CHECK: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 104 %0:_(<2 x s16>) = COPY $vgpr0 105 %1:_(<2 x s32>) = G_ANYEXT %0 106 $vgpr0_vgpr1 = COPY %1 107... 108 109--- 110name: test_anyext_v3s16_to_v3s32 111body: | 112 bb.0: 113 liveins: $vgpr0_vgpr1 114 115 ; CHECK-LABEL: name: test_anyext_v3s16_to_v3s32 116 ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 117 ; CHECK: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[COPY]](<4 x s16>), 0 118 ; CHECK: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 119 ; CHECK: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 120 ; CHECK: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[INSERT]](<4 x s16>) 121 ; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>) 122 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 123 ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 124 ; CHECK: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) 125 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[BITCAST]](s32), [[LSHR]](s32), [[BITCAST1]](s32) 126 ; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) 127 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 128 %1:_(<3 x s16>) = G_EXTRACT %0, 0 129 %2:_(<3 x s32>) = G_ANYEXT %1 130 $vgpr0_vgpr1_vgpr2 = COPY %2 131... 132 133--- 134name: test_anyext_v4s16_to_v4s32 135body: | 136 bb.0: 137 liveins: $vgpr0 138 139 ; CHECK-LABEL: name: test_anyext_v4s16_to_v4s32 140 ; CHECK: [[DEF:%[0-9]+]]:_(<4 x s32>) = G_IMPLICIT_DEF 141 ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[DEF]](<4 x s32>) 142 %0:_(<4 x s16>) = G_IMPLICIT_DEF 143 %1:_(<4 x s32>) = G_ANYEXT %0 144 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 145... 146 147--- 148name: test_anyext_v2s32_to_v2s64 149body: | 150 bb.0: 151 liveins: $vgpr0_vgpr1 152 153 ; CHECK-LABEL: name: test_anyext_v2s32_to_v2s64 154 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 155 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) 156 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UV]](s32) 157 ; CHECK: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[UV1]](s32) 158 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[ANYEXT]](s64), [[ANYEXT1]](s64) 159 ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) 160 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 161 %1:_(<2 x s64>) = G_ANYEXT %0 162 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 163... 164 165--- 166name: test_anyext_v3s32_to_v3s64 167body: | 168 bb.0: 169 liveins: $vgpr0_vgpr1_vgpr2 170 171 ; CHECK-LABEL: name: test_anyext_v3s32_to_v3s64 172 ; CHECK: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 173 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) 174 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UV]](s32) 175 ; CHECK: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[UV1]](s32) 176 ; CHECK: [[ANYEXT2:%[0-9]+]]:_(s64) = G_ANYEXT [[UV2]](s32) 177 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[ANYEXT]](s64), [[ANYEXT1]](s64), [[ANYEXT2]](s64) 178 ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<3 x s64>) 179 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 180 %1:_(<3 x s64>) = G_ANYEXT %0 181 S_NOP 0, implicit %1 182 183... 184 185--- 186name: test_anyext_v4s32_to_v4s64 187body: | 188 bb.0: 189 liveins: $vgpr0_vgpr1_vgpr2_vgpr3 190 191 ; CHECK-LABEL: name: test_anyext_v4s32_to_v4s64 192 ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 193 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) 194 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UV]](s32) 195 ; CHECK: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[UV1]](s32) 196 ; CHECK: [[ANYEXT2:%[0-9]+]]:_(s64) = G_ANYEXT [[UV2]](s32) 197 ; CHECK: [[ANYEXT3:%[0-9]+]]:_(s64) = G_ANYEXT [[UV3]](s32) 198 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s64>) = G_BUILD_VECTOR [[ANYEXT]](s64), [[ANYEXT1]](s64), [[ANYEXT2]](s64), [[ANYEXT3]](s64) 199 ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR]](<4 x s64>) 200 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 201 %1:_(<4 x s64>) = G_ANYEXT %0 202 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %1 203... 204 205--- 206name: test_anyext_s8_to_s16 207body: | 208 bb.0: 209 liveins: $vgpr0 210 211 ; CHECK-LABEL: name: test_anyext_s8_to_s16 212 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 213 ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 214 ; CHECK: S_ENDPGM 0, implicit [[TRUNC]](s16) 215 %0:_(s32) = COPY $vgpr0 216 %1:_(s8) = G_TRUNC %0 217 %2:_(s16) = G_ANYEXT %1 218 S_ENDPGM 0, implicit %2 219... 220 221--- 222name: test_anyext_s8_to_s24 223body: | 224 bb.0: 225 liveins: $vgpr0 226 227 ; CHECK-LABEL: name: test_anyext_s8_to_s24 228 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 229 ; CHECK: [[TRUNC:%[0-9]+]]:_(s24) = G_TRUNC [[COPY]](s32) 230 ; CHECK: S_ENDPGM 0, implicit [[TRUNC]](s24) 231 %0:_(s32) = COPY $vgpr0 232 %1:_(s8) = G_TRUNC %0 233 %2:_(s24) = G_ANYEXT %1 234 S_ENDPGM 0, implicit %2 235... 236 237--- 238name: test_anyext_s7_to_s32 239body: | 240 bb.0: 241 liveins: $vgpr0 242 243 ; CHECK-LABEL: name: test_anyext_s7_to_s32 244 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 245 ; CHECK: S_ENDPGM 0, implicit [[COPY]](s32) 246 %0:_(s32) = COPY $vgpr0 247 %1:_(s7) = G_TRUNC %0 248 %2:_(s32) = G_ANYEXT %1 249 S_ENDPGM 0, implicit %2 250... 251 252--- 253name: test_anyext_s8_to_s32 254body: | 255 bb.0: 256 liveins: $vgpr0 257 258 ; CHECK-LABEL: name: test_anyext_s8_to_s32 259 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 260 ; CHECK: S_ENDPGM 0, implicit [[COPY]](s32) 261 %0:_(s32) = COPY $vgpr0 262 %1:_(s8) = G_TRUNC %0 263 %2:_(s32) = G_ANYEXT %1 264 S_ENDPGM 0, implicit %2 265... 266 267--- 268name: test_anyext_s32_to_s96 269body: | 270 bb.0: 271 liveins: $vgpr0 272 273 ; CHECK-LABEL: name: test_anyext_s32_to_s96 274 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 275 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 276 ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32) 277 ; CHECK: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 278 ; CHECK: [[MV1:%[0-9]+]]:_(s192) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64), [[DEF1]](s64) 279 ; CHECK: [[TRUNC:%[0-9]+]]:_(s96) = G_TRUNC [[MV1]](s192) 280 ; CHECK: S_ENDPGM 0, implicit [[TRUNC]](s96) 281 %0:_(s32) = COPY $vgpr0 282 %1:_(s96) = G_ANYEXT %0 283 S_ENDPGM 0, implicit %1 284... 285 286--- 287name: test_anyext_s32_to_s128 288body: | 289 bb.0: 290 liveins: $vgpr0 291 292 ; CHECK-LABEL: name: test_anyext_s32_to_s128 293 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 294 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 295 ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32) 296 ; CHECK: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 297 ; CHECK: [[MV1:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64) 298 ; CHECK: S_ENDPGM 0, implicit [[MV1]](s128) 299 %0:_(s32) = COPY $vgpr0 300 %1:_(s128) = G_ANYEXT %0 301 S_ENDPGM 0, implicit %1 302... 303 304--- 305name: test_anyext_s32_to_s160 306body: | 307 bb.0: 308 liveins: $vgpr0 309 310 ; CHECK-LABEL: name: test_anyext_s32_to_s160 311 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 312 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 313 ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32) 314 ; CHECK: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 315 ; CHECK: [[MV1:%[0-9]+]]:_(s320) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64) 316 ; CHECK: [[TRUNC:%[0-9]+]]:_(s160) = G_TRUNC [[MV1]](s320) 317 ; CHECK: S_ENDPGM 0, implicit [[TRUNC]](s160) 318 %0:_(s32) = COPY $vgpr0 319 %1:_(s160) = G_ANYEXT %0 320 S_ENDPGM 0, implicit %1 321... 322 323--- 324name: test_anyext_s32_to_s192 325body: | 326 bb.0: 327 liveins: $vgpr0 328 329 ; CHECK-LABEL: name: test_anyext_s32_to_s192 330 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 331 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 332 ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32) 333 ; CHECK: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 334 ; CHECK: [[MV1:%[0-9]+]]:_(s192) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64), [[DEF1]](s64) 335 ; CHECK: S_ENDPGM 0, implicit [[MV1]](s192) 336 %0:_(s32) = COPY $vgpr0 337 %1:_(s192) = G_ANYEXT %0 338 S_ENDPGM 0, implicit %1 339... 340 341--- 342name: test_anyext_s32_to_s224 343body: | 344 bb.0: 345 liveins: $vgpr0 346 347 ; CHECK-LABEL: name: test_anyext_s32_to_s224 348 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 349 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 350 ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32) 351 ; CHECK: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 352 ; CHECK: [[MV1:%[0-9]+]]:_(s448) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64) 353 ; CHECK: [[TRUNC:%[0-9]+]]:_(s224) = G_TRUNC [[MV1]](s448) 354 ; CHECK: S_ENDPGM 0, implicit [[TRUNC]](s224) 355 %0:_(s32) = COPY $vgpr0 356 %1:_(s224) = G_ANYEXT %0 357 S_ENDPGM 0, implicit %1 358... 359 360--- 361name: test_anyext_s32_to_s256 362body: | 363 bb.0: 364 liveins: $vgpr0 365 366 ; CHECK-LABEL: name: test_anyext_s32_to_s256 367 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 368 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 369 ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32) 370 ; CHECK: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 371 ; CHECK: [[MV1:%[0-9]+]]:_(s256) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64) 372 ; CHECK: S_ENDPGM 0, implicit [[MV1]](s256) 373 %0:_(s32) = COPY $vgpr0 374 %1:_(s256) = G_ANYEXT %0 375 S_ENDPGM 0, implicit %1 376... 377 378--- 379name: test_anyext_s32_to_s512 380body: | 381 bb.0: 382 liveins: $vgpr0 383 384 ; CHECK-LABEL: name: test_anyext_s32_to_s512 385 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 386 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 387 ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32) 388 ; CHECK: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 389 ; CHECK: [[MV1:%[0-9]+]]:_(s512) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64) 390 ; CHECK: S_ENDPGM 0, implicit [[MV1]](s512) 391 %0:_(s32) = COPY $vgpr0 392 %1:_(s512) = G_ANYEXT %0 393 S_ENDPGM 0, implicit %1 394... 395 396--- 397name: test_anyext_s32_to_s992 398body: | 399 bb.0: 400 liveins: $vgpr0 401 402 ; CHECK-LABEL: name: test_anyext_s32_to_s992 403 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 404 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 405 ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32) 406 ; CHECK: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 407 ; CHECK: [[MV1:%[0-9]+]]:_(s448) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64) 408 ; CHECK: [[TRUNC:%[0-9]+]]:_(s224) = G_TRUNC [[MV1]](s448) 409 ; CHECK: S_ENDPGM 0, implicit [[TRUNC]](s224) 410 %0:_(s32) = COPY $vgpr0 411 %1:_(s224) = G_ANYEXT %0 412 S_ENDPGM 0, implicit %1 413... 414 415--- 416name: test_anyext_s32_to_s1024 417body: | 418 bb.0: 419 liveins: $vgpr0 420 421 ; CHECK-LABEL: name: test_anyext_s32_to_s1024 422 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 423 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 424 ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32) 425 ; CHECK: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 426 ; CHECK: [[MV1:%[0-9]+]]:_(s1024) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64) 427 ; CHECK: S_ENDPGM 0, implicit [[MV1]](s1024) 428 %0:_(s32) = COPY $vgpr0 429 %1:_(s1024) = G_ANYEXT %0 430 S_ENDPGM 0, implicit %1 431... 432 433--- 434name: test_anyext_s64_to_s128 435body: | 436 bb.0: 437 liveins: $vgpr0_vgpr1 438 439 ; CHECK-LABEL: name: test_anyext_s64_to_s128 440 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 441 ; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 442 ; CHECK: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY]](s64), [[DEF]](s64) 443 ; CHECK: S_ENDPGM 0, implicit [[MV]](s128) 444 %0:_(s64) = COPY $vgpr0_vgpr1 445 %1:_(s128) = G_ANYEXT %0 446 S_ENDPGM 0, implicit %1 447... 448 449--- 450name: test_anyext_s64_to_s192 451body: | 452 bb.0: 453 liveins: $vgpr0_vgpr1 454 455 ; CHECK-LABEL: name: test_anyext_s64_to_s192 456 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 457 ; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 458 ; CHECK: [[MV:%[0-9]+]]:_(s192) = G_MERGE_VALUES [[COPY]](s64), [[DEF]](s64), [[DEF]](s64) 459 ; CHECK: S_ENDPGM 0, implicit [[MV]](s192) 460 %0:_(s64) = COPY $vgpr0_vgpr1 461 %1:_(s192) = G_ANYEXT %0 462 S_ENDPGM 0, implicit %1 463... 464 465--- 466name: test_anyext_s64_to_s256 467body: | 468 bb.0: 469 liveins: $vgpr0_vgpr1 470 471 ; CHECK-LABEL: name: test_anyext_s64_to_s256 472 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 473 ; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 474 ; CHECK: [[MV:%[0-9]+]]:_(s256) = G_MERGE_VALUES [[COPY]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64) 475 ; CHECK: S_ENDPGM 0, implicit [[MV]](s256) 476 %0:_(s64) = COPY $vgpr0_vgpr1 477 %1:_(s256) = G_ANYEXT %0 478 S_ENDPGM 0, implicit %1 479... 480 481--- 482name: test_anyext_s64_to_s512 483body: | 484 bb.0: 485 liveins: $vgpr0_vgpr1 486 487 ; CHECK-LABEL: name: test_anyext_s64_to_s512 488 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 489 ; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 490 ; CHECK: [[MV:%[0-9]+]]:_(s512) = G_MERGE_VALUES [[COPY]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64) 491 ; CHECK: S_ENDPGM 0, implicit [[MV]](s512) 492 %0:_(s64) = COPY $vgpr0_vgpr1 493 %1:_(s512) = G_ANYEXT %0 494 S_ENDPGM 0, implicit %1 495... 496 497--- 498name: test_anyext_s64_to_s1024 499body: | 500 bb.0: 501 liveins: $vgpr0_vgpr1 502 503 ; CHECK-LABEL: name: test_anyext_s64_to_s1024 504 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 505 ; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 506 ; CHECK: [[MV:%[0-9]+]]:_(s1024) = G_MERGE_VALUES [[COPY]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64) 507 ; CHECK: S_ENDPGM 0, implicit [[MV]](s1024) 508 %0:_(s64) = COPY $vgpr0_vgpr1 509 %1:_(s1024) = G_ANYEXT %0 510 S_ENDPGM 0, implicit %1 511... 512 513--- 514name: test_anyext_s96_to_s128 515body: | 516 bb.0: 517 liveins: $vgpr0_vgpr1_vgpr2 518 519 ; CHECK-LABEL: name: test_anyext_s96_to_s128 520 ; CHECK: [[COPY:%[0-9]+]]:_(s96) = COPY $vgpr0_vgpr1_vgpr2 521 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s96) 522 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 523 ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV]](s32), [[UV1]](s32) 524 ; CHECK: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV2]](s32), [[DEF]](s32) 525 ; CHECK: [[MV2:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[MV]](s64), [[MV1]](s64) 526 ; CHECK: S_ENDPGM 0, implicit [[MV2]](s128) 527 %0:_(s96) = COPY $vgpr0_vgpr1_vgpr2 528 %1:_(s128) = G_ANYEXT %0 529 S_ENDPGM 0, implicit %1 530... 531 532--- 533name: test_anyext_s128_to_s256 534body: | 535 bb.0: 536 liveins: $vgpr0_vgpr1_vgpr2_vgpr3 537 538 ; CHECK-LABEL: name: test_anyext_s128_to_s256 539 ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 540 ; CHECK: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](s128) 541 ; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 542 ; CHECK: [[MV:%[0-9]+]]:_(s256) = G_MERGE_VALUES [[UV]](s64), [[UV1]](s64), [[DEF]](s64), [[DEF]](s64) 543 ; CHECK: S_ENDPGM 0, implicit [[MV]](s256) 544 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 545 %1:_(s256) = G_ANYEXT %0 546 S_ENDPGM 0, implicit %1 547... 548 549--- 550name: test_anyext_s32_to_s88 551body: | 552 bb.0: 553 liveins: $vgpr0 554 555 ; CHECK-LABEL: name: test_anyext_s32_to_s88 556 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 557 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 558 ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32) 559 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 560 ; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C1]](s32) 561 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 562 ; CHECK: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C2]](s32) 563 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 564 ; CHECK: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 565 ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 566 ; CHECK: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C3]] 567 ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32) 568 ; CHECK: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C3]] 569 ; CHECK: [[C4:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 570 ; CHECK: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C4]](s16) 571 ; CHECK: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 572 ; CHECK: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR1]](s32) 573 ; CHECK: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C3]] 574 ; CHECK: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR2]](s32) 575 ; CHECK: [[AND3:%[0-9]+]]:_(s16) = G_AND [[TRUNC3]], [[C3]] 576 ; CHECK: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND3]], [[C4]](s16) 577 ; CHECK: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]] 578 ; CHECK: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[DEF]](s32) 579 ; CHECK: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C3]] 580 ; CHECK: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[AND4]], [[C4]](s16) 581 ; CHECK: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[SHL2]] 582 ; CHECK: [[COPY1:%[0-9]+]]:_(s16) = COPY [[OR2]](s16) 583 ; CHECK: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 584 ; CHECK: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 585 ; CHECK: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C1]](s32) 586 ; CHECK: [[OR3:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL3]] 587 ; CHECK: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) 588 ; CHECK: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[COPY1]](s16) 589 ; CHECK: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C1]](s32) 590 ; CHECK: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL4]] 591 ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR3]](s32), [[OR4]](s32) 592 ; CHECK: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 593 ; CHECK: [[MV1:%[0-9]+]]:_(s704) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64) 594 ; CHECK: [[TRUNC5:%[0-9]+]]:_(s88) = G_TRUNC [[MV1]](s704) 595 ; CHECK: S_ENDPGM 0, implicit [[TRUNC5]](s88) 596 %0:_(s32) = COPY $vgpr0 597 %1:_(s88) = G_ANYEXT %0 598 S_ENDPGM 0, implicit %1 599... 600 601# The instruction count blows up for this and takes too long to 602# generate checks. This fails on a G_MERGE_VALUES to s4160 603# 604# --- 605# name: test_anyext_s32_to_s65 606# body: | 607# bb.0: 608# liveins: $vgpr0 609 610# %0:_(s32) = COPY $vgpr0 611# %1:_(s65) = G_ANYEXT %0 612# S_ENDPGM 0, implicit %1 613# ... 614 615--- 616name: test_anyext_s2_to_s112 617body: | 618 bb.0: 619 liveins: $vgpr0 620 621 ; CHECK-LABEL: name: test_anyext_s2_to_s112 622 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 623 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 624 ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32) 625 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 626 ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]] 627 ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[LSHR]], [[C1]] 628 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C]](s32) 629 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 630 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 631 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[C2]], [[C]](s32) 632 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[C2]], [[SHL1]] 633 ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32) 634 ; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 635 ; CHECK: [[MV1:%[0-9]+]]:_(s448) = G_MERGE_VALUES [[MV]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64) 636 ; CHECK: [[TRUNC:%[0-9]+]]:_(s112) = G_TRUNC [[MV1]](s448) 637 ; CHECK: S_ENDPGM 0, implicit [[TRUNC]](s112) 638 %0:_(s32) = COPY $vgpr0 639 %1:_(s2) = G_TRUNC %0 640 %2:_(s112) = G_ANYEXT %1 641 S_ENDPGM 0, implicit %2 642... 643 644--- 645name: test_anyext_s112_to_s128 646body: | 647 bb.0: 648 liveins: $vgpr0_vgpr1_vgpr2_vgpr3 649 ; CHECK-LABEL: name: test_anyext_s112_to_s128 650 ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 651 ; CHECK: S_ENDPGM 0, implicit [[COPY]](s128) 652 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 653 %1:_(s112) = G_TRUNC %0 654 %2:_(s128) = G_ANYEXT %1 655 S_ENDPGM 0, implicit %2 656... 657