1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer %s -o - | FileCheck %s
3
4---
5name: test_flog10_s32
6body: |
7  bb.0:
8    liveins: $vgpr0
9
10    ; CHECK-LABEL: name: test_flog10_s32
11    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
12    ; CHECK: [[FLOG2_:%[0-9]+]]:_(s32) = G_FLOG2 [[COPY]]
13    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x3FD3441340000000
14    ; CHECK: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[FLOG2_]], [[C]]
15    ; CHECK: $vgpr0 = COPY [[FMUL]](s32)
16    %0:_(s32) = COPY $vgpr0
17    %1:_(s32) = G_FLOG10 %0
18    $vgpr0 = COPY %1
19...
20
21---
22name: test_flog10_s32_flags
23body: |
24  bb.0:
25    liveins: $vgpr0
26
27    ; CHECK-LABEL: name: test_flog10_s32_flags
28    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
29    ; CHECK: [[FLOG2_:%[0-9]+]]:_(s32) = nnan G_FLOG2 [[COPY]]
30    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x3FD3441340000000
31    ; CHECK: [[FMUL:%[0-9]+]]:_(s32) = nnan G_FMUL [[FLOG2_]], [[C]]
32    ; CHECK: $vgpr0 = COPY [[FMUL]](s32)
33    %0:_(s32) = COPY $vgpr0
34    %1:_(s32) = nnan G_FLOG10 %0
35    $vgpr0 = COPY %1
36...
37
38---
39name: test_flog10_v2s32
40body: |
41  bb.0:
42    liveins: $vgpr0_vgpr1
43
44    ; CHECK-LABEL: name: test_flog10_v2s32
45    ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
46    ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
47    ; CHECK: [[FLOG2_:%[0-9]+]]:_(s32) = G_FLOG2 [[UV]]
48    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x3FD3441340000000
49    ; CHECK: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[FLOG2_]], [[C]]
50    ; CHECK: [[FLOG2_1:%[0-9]+]]:_(s32) = G_FLOG2 [[UV1]]
51    ; CHECK: [[FMUL1:%[0-9]+]]:_(s32) = G_FMUL [[FLOG2_1]], [[C]]
52    ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FMUL]](s32), [[FMUL1]](s32)
53    ; CHECK: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
54    %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
55    %1:_(<2 x s32>) = G_FLOG10 %0
56    $vgpr0_vgpr1 = COPY %1
57...
58
59---
60name: test_flog10_v3s32
61body: |
62  bb.0:
63    liveins: $vgpr0_vgpr1_vgpr2
64
65    ; CHECK-LABEL: name: test_flog10_v3s32
66    ; CHECK: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
67    ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)
68    ; CHECK: [[FLOG2_:%[0-9]+]]:_(s32) = G_FLOG2 [[UV]]
69    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x3FD3441340000000
70    ; CHECK: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[FLOG2_]], [[C]]
71    ; CHECK: [[FLOG2_1:%[0-9]+]]:_(s32) = G_FLOG2 [[UV1]]
72    ; CHECK: [[FMUL1:%[0-9]+]]:_(s32) = G_FMUL [[FLOG2_1]], [[C]]
73    ; CHECK: [[FLOG2_2:%[0-9]+]]:_(s32) = G_FLOG2 [[UV2]]
74    ; CHECK: [[FMUL2:%[0-9]+]]:_(s32) = G_FMUL [[FLOG2_2]], [[C]]
75    ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[FMUL]](s32), [[FMUL1]](s32), [[FMUL2]](s32)
76    ; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)
77    %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
78    %1:_(<3 x  s32>) = G_FLOG10 %0
79    $vgpr0_vgpr1_vgpr2 = COPY %1
80...
81
82---
83name: test_flog10_s16
84body: |
85  bb.0:
86    liveins: $vgpr0
87
88    ; CHECK-LABEL: name: test_flog10_s16
89    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
90    ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
91    ; CHECK: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)
92    ; CHECK: [[FLOG2_:%[0-9]+]]:_(s32) = G_FLOG2 [[FPEXT]]
93    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x3FD3441340000000
94    ; CHECK: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[FLOG2_]], [[C]]
95    ; CHECK: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FMUL]](s32)
96    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16)
97    ; CHECK: $vgpr0 = COPY [[ANYEXT]](s32)
98    %0:_(s32) = COPY $vgpr0
99    %1:_(s16) = G_TRUNC %0
100    %2:_(s16) = G_FLOG10 %1
101    %3:_(s32) = G_ANYEXT %2
102    $vgpr0 = COPY %3
103
104...
105
106---
107name: test_flog10_v2s16
108body: |
109  bb.0:
110    liveins: $vgpr0
111
112    ; CHECK-LABEL: name: test_flog10_v2s16
113    ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
114    ; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)
115    ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32)
116    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
117    ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
118    ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32)
119    ; CHECK: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)
120    ; CHECK: [[FLOG2_:%[0-9]+]]:_(s32) = G_FLOG2 [[FPEXT]]
121    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x3FD3441340000000
122    ; CHECK: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[FLOG2_]], [[C1]]
123    ; CHECK: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FMUL]](s32)
124    ; CHECK: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC1]](s16)
125    ; CHECK: [[FLOG2_1:%[0-9]+]]:_(s32) = G_FLOG2 [[FPEXT1]]
126    ; CHECK: [[FMUL1:%[0-9]+]]:_(s32) = G_FMUL [[FLOG2_1]], [[C1]]
127    ; CHECK: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[FMUL1]](s32)
128    ; CHECK: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[FPTRUNC]](s16)
129    ; CHECK: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[FPTRUNC1]](s16)
130    ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C]](s32)
131    ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL]]
132    ; CHECK: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
133    ; CHECK: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
134    %0:_(<2 x s16>) = COPY $vgpr0
135    %1:_(<2 x s16>) = G_FLOG10 %0
136    $vgpr0 = COPY %1
137
138...
139