1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer %s -o - | FileCheck %s 3 4--- 5name: shufflevector_scalar_src 6tracksRegLiveness: true 7 8body: | 9 bb.0: 10 liveins: $vgpr0, $vgpr1 11 12 ; CHECK-LABEL: name: shufflevector_scalar_src 13 ; CHECK: liveins: $vgpr0, $vgpr1 14 ; CHECK-NEXT: {{ $}} 15 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 16 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 17 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32) 18 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 19 %0:_(s32) = COPY $vgpr0 20 %1:_(s32) = COPY $vgpr1 21 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(0, 1) 22 $vgpr0_vgpr1 = COPY %2 23 24... 25--- 26name: shufflevector_v2s32_0_1 27tracksRegLiveness: true 28 29body: | 30 bb.0: 31 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 32 33 ; CHECK-LABEL: name: shufflevector_v2s32_0_1 34 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 35 ; CHECK-NEXT: {{ $}} 36 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 37 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 38 ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<2 x s32>), 0 39 ; CHECK-NEXT: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<2 x s32>), 32 40 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[EXTRACT]](s32), [[EXTRACT1]](s32) 41 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 42 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 43 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3 44 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(0, 1) 45 $vgpr0_vgpr1 = COPY %2 46 47... 48 49--- 50name: shufflevector_v2s32_1_0 51tracksRegLiveness: true 52 53body: | 54 bb.0: 55 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 56 57 ; CHECK-LABEL: name: shufflevector_v2s32_1_0 58 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 59 ; CHECK-NEXT: {{ $}} 60 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 61 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 62 ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<2 x s32>), 32 63 ; CHECK-NEXT: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<2 x s32>), 0 64 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[EXTRACT]](s32), [[EXTRACT1]](s32) 65 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 66 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 67 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3 68 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(1, 0) 69 $vgpr0_vgpr1 = COPY %2 70 71... 72 73--- 74name: shufflevector_v2s32_0_0 75tracksRegLiveness: true 76 77body: | 78 bb.0: 79 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 80 81 ; CHECK-LABEL: name: shufflevector_v2s32_0_0 82 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 83 ; CHECK-NEXT: {{ $}} 84 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 85 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 86 ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<2 x s32>), 0 87 ; CHECK-NEXT: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<2 x s32>), 0 88 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[EXTRACT]](s32), [[EXTRACT1]](s32) 89 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 90 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 91 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3 92 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(0, 0) 93 $vgpr0_vgpr1 = COPY %2 94 95... 96 97--- 98name: shufflevector_v2s32_undef_undef 99tracksRegLiveness: true 100 101body: | 102 bb.0: 103 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 104 105 ; CHECK-LABEL: name: shufflevector_v2s32_undef_undef 106 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 107 ; CHECK-NEXT: {{ $}} 108 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 109 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 110 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 111 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[DEF]](s32), [[DEF]](s32) 112 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 113 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 114 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3 115 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(undef, undef) 116 $vgpr0_vgpr1 = COPY %2 117 118... 119 120--- 121name: shufflevector_v2s32_undef_0 122tracksRegLiveness: true 123 124body: | 125 bb.0: 126 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 127 128 ; CHECK-LABEL: name: shufflevector_v2s32_undef_0 129 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 130 ; CHECK-NEXT: {{ $}} 131 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 132 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 133 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 134 ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<2 x s32>), 0 135 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[DEF]](s32), [[EXTRACT]](s32) 136 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 137 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 138 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3 139 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(undef, 0) 140 $vgpr0_vgpr1 = COPY %2 141 142... 143 144--- 145name: shufflevector_v2s32_0_undef 146tracksRegLiveness: true 147 148body: | 149 bb.0: 150 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 151 152 ; CHECK-LABEL: name: shufflevector_v2s32_0_undef 153 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 154 ; CHECK-NEXT: {{ $}} 155 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 156 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3 157 ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<2 x s32>), 0 158 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 159 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[EXTRACT]](s32), [[DEF]](s32) 160 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 161 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 162 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3 163 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(0, undef) 164 $vgpr0_vgpr1 = COPY %2 165 166... 167 168--- 169name: shufflevector_v3s32_3_2_1 170tracksRegLiveness: true 171 172body: | 173 bb.0: 174 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5 175 176 ; CHECK-LABEL: name: shufflevector_v3s32_3_2_1 177 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5 178 ; CHECK-NEXT: {{ $}} 179 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 180 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 181 ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY1]](<3 x s32>), 0 182 ; CHECK-NEXT: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<3 x s32>), 64 183 ; CHECK-NEXT: [[EXTRACT2:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<3 x s32>), 32 184 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[EXTRACT]](s32), [[EXTRACT1]](s32), [[EXTRACT2]](s32) 185 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) 186 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 187 %1:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 188 %2:_(<3 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(3, 2, 1) 189 $vgpr0_vgpr1_vgpr2 = COPY %2 190 191... 192 193--- 194name: shufflevector_v3s32_3_2_1_smaller 195tracksRegLiveness: true 196 197body: | 198 bb.0: 199 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5 200 201 ; CHECK-LABEL: name: shufflevector_v3s32_3_2_1_smaller 202 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5 203 ; CHECK-NEXT: {{ $}} 204 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 205 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 206 ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<3 x s32>), 64 207 ; CHECK-NEXT: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](<3 x s32>), 32 208 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[EXTRACT]](s32), [[EXTRACT1]](s32) 209 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 210 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 211 %1:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5 212 %2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(2, 1) 213 $vgpr0_vgpr1 = COPY %2 214 215... 216 217--- 218name: shufflevector_v2s16_0_1 219tracksRegLiveness: true 220 221body: | 222 bb.0: 223 liveins: $vgpr0, $vgpr1 224 225 ; CHECK-LABEL: name: shufflevector_v2s16_0_1 226 ; CHECK: liveins: $vgpr0, $vgpr1 227 ; CHECK-NEXT: {{ $}} 228 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 229 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1 230 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 231 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) 232 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 233 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) 234 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 235 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C1]](s32) 236 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 237 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[LSHR]], [[C2]] 238 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[LSHR1]], [[C2]] 239 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C1]](s32) 240 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 241 ; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 242 ; CHECK-NEXT: $vgpr0 = COPY [[BITCAST2]](<2 x s16>) 243 %0:_(<2 x s16>) = COPY $vgpr0 244 %1:_(<2 x s16>) = COPY $vgpr1 245 %2:_(<2 x s16>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(0, 1) 246 $vgpr0 = COPY %2 247 248... 249 250--- 251name: shufflevector_v2s16_1_0 252tracksRegLiveness: true 253 254body: | 255 bb.0: 256 liveins: $vgpr0, $vgpr1 257 258 ; CHECK-LABEL: name: shufflevector_v2s16_1_0 259 ; CHECK: liveins: $vgpr0, $vgpr1 260 ; CHECK-NEXT: {{ $}} 261 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 262 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1 263 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) 264 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 265 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 266 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C1]](s32) 267 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) 268 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) 269 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 270 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[LSHR]], [[C2]] 271 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[LSHR1]], [[C2]] 272 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C1]](s32) 273 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 274 ; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 275 ; CHECK-NEXT: $vgpr0 = COPY [[BITCAST2]](<2 x s16>) 276 %0:_(<2 x s16>) = COPY $vgpr0 277 %1:_(<2 x s16>) = COPY $vgpr1 278 %2:_(<2 x s16>) = G_SHUFFLE_VECTOR %0, %1, shufflemask(1, 0) 279 $vgpr0 = COPY %2 280 281... 282 283--- 284name: shufflevector_v3s16_2_0 285tracksRegLiveness: true 286 287body: | 288 bb.0: 289 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 290 291 ; CHECK-LABEL: name: shufflevector_v3s16_2_0 292 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 293 ; CHECK-NEXT: {{ $}} 294 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 295 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3 296 ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[COPY]](<4 x s16>), 0 297 ; CHECK-NEXT: [[EXTRACT1:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[COPY1]](<4 x s16>), 0 298 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 299 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT1]](<3 x s16>), 0 300 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[INSERT]](<4 x s16>) 301 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>) 302 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 303 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 304 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) 305 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[BITCAST]](s32), [[LSHR]](s32), [[BITCAST1]](s32) 306 ; CHECK-NEXT: [[EXTRACT2:%[0-9]+]]:_(s32) = G_EXTRACT [[BUILD_VECTOR]](<3 x s32>), 64 307 ; CHECK-NEXT: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 308 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[INSERT1]](<4 x s16>) 309 ; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV2]](<2 x s16>) 310 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C]](s32) 311 ; CHECK-NEXT: [[BITCAST3:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>) 312 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[BITCAST2]](s32), [[LSHR1]](s32), [[BITCAST3]](s32) 313 ; CHECK-NEXT: [[EXTRACT3:%[0-9]+]]:_(s32) = G_EXTRACT [[BUILD_VECTOR1]](<3 x s32>), 32 314 ; CHECK-NEXT: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT1]](<3 x s16>), 0 315 ; CHECK-NEXT: [[UV4:%[0-9]+]]:_(<2 x s16>), [[UV5:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[INSERT2]](<4 x s16>) 316 ; CHECK-NEXT: [[BITCAST4:%[0-9]+]]:_(s32) = G_BITCAST [[UV4]](<2 x s16>) 317 ; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST4]], [[C]](s32) 318 ; CHECK-NEXT: [[BITCAST5:%[0-9]+]]:_(s32) = G_BITCAST [[UV5]](<2 x s16>) 319 ; CHECK-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[BITCAST4]](s32), [[LSHR2]](s32), [[BITCAST5]](s32) 320 ; CHECK-NEXT: [[EXTRACT4:%[0-9]+]]:_(s32) = G_EXTRACT [[BUILD_VECTOR2]](<3 x s32>), 0 321 ; CHECK-NEXT: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 322 ; CHECK-NEXT: [[UV6:%[0-9]+]]:_(<2 x s16>), [[UV7:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[INSERT3]](<4 x s16>) 323 ; CHECK-NEXT: [[BITCAST6:%[0-9]+]]:_(s32) = G_BITCAST [[UV6]](<2 x s16>) 324 ; CHECK-NEXT: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST6]], [[C]](s32) 325 ; CHECK-NEXT: [[BITCAST7:%[0-9]+]]:_(s32) = G_BITCAST [[UV7]](<2 x s16>) 326 ; CHECK-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[BITCAST6]](s32), [[LSHR3]](s32), [[BITCAST7]](s32) 327 ; CHECK-NEXT: [[EXTRACT5:%[0-9]+]]:_(s32) = G_EXTRACT [[BUILD_VECTOR3]](<3 x s32>), 0 328 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 329 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[EXTRACT2]], [[C1]] 330 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[EXTRACT3]], [[C1]] 331 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C]](s32) 332 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 333 ; CHECK-NEXT: [[BITCAST8:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 334 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[EXTRACT4]], [[C1]] 335 ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND [[EXTRACT5]], [[C1]] 336 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C]](s32) 337 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 338 ; CHECK-NEXT: [[BITCAST9:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) 339 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST8]](<2 x s16>), [[BITCAST9]](<2 x s16>) 340 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 341 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 342 %1:_(<4 x s16>) = COPY $vgpr2_vgpr3 343 %2:_(<3 x s16>) = G_EXTRACT %0, 0 344 %3:_(<3 x s16>) = G_EXTRACT %1, 0 345 %4:_(<4 x s16>) = G_SHUFFLE_VECTOR %2, %3, shufflemask(5, 1, 3, 0) 346 $vgpr0_vgpr1 = COPY %4 347 348... 349