1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs -run-pass=machine-sink -o - %s | FileCheck %s
3
4---
5name: func0
6tracksRegLiveness: true
7machineFunctionInfo:
8  isEntryFunction: true
9  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
10  frameOffsetReg:  '$sgpr7'
11body: |
12  ; CHECK-LABEL: name: func0
13  ; CHECK: bb.0:
14  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
15  ; CHECK-NEXT:   liveins: $vgpr4, $vgpr6
16  ; CHECK-NEXT: {{  $}}
17  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr6
18  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr4
19  ; CHECK-NEXT:   [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY1]], [[COPY]], 0, implicit $exec
20  ; CHECK-NEXT:   [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 31
21  ; CHECK-NEXT:   [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 killed [[S_MOV_B32_]], [[V_ADD_U32_e64_]], implicit $exec
22  ; CHECK-NEXT:   [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_ADD_U32_e64_]], killed [[V_LSHRREV_B32_e64_]], 0, implicit $exec
23  ; CHECK-NEXT:   [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 1
24  ; CHECK-NEXT:   [[V_ASHRREV_I32_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I32_e64 [[S_MOV_B32_1]], killed [[V_ADD_U32_e64_1]], implicit $exec
25  ; CHECK-NEXT:   [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 30
26  ; CHECK-NEXT:   [[V_LSHRREV_B32_e64_1:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 killed [[S_MOV_B32_2]], [[V_ASHRREV_I32_e64_]], implicit $exec
27  ; CHECK-NEXT:   [[V_ADD_U32_e64_2:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_ASHRREV_I32_e64_]], killed [[V_LSHRREV_B32_e64_1]], 0, implicit $exec
28  ; CHECK-NEXT:   [[S_MOV_B32_3:%[0-9]+]]:sreg_32 = S_MOV_B32 -4
29  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_3]]
30  ; CHECK-NEXT:   [[V_AND_B32_e32_:%[0-9]+]]:vgpr_32 = V_AND_B32_e32 killed [[V_ADD_U32_e64_2]], killed [[COPY2]], implicit $exec
31  ; CHECK-NEXT:   [[V_SUB_U32_e64_:%[0-9]+]]:vgpr_32 = V_SUB_U32_e64 [[V_ASHRREV_I32_e64_]], killed [[V_AND_B32_e32_]], 0, implicit $exec
32  ; CHECK-NEXT:   [[S_MOV_B32_4:%[0-9]+]]:sreg_32 = S_MOV_B32 4
33  ; CHECK-NEXT:   [[V_ADD_U32_e64_3:%[0-9]+]]:vgpr_32 = nsw V_ADD_U32_e64 killed [[V_SUB_U32_e64_]], killed [[S_MOV_B32_4]], 0, implicit $exec
34  ; CHECK-NEXT:   S_BRANCH %bb.1
35  ; CHECK-NEXT: {{  $}}
36  ; CHECK-NEXT: bb.1:
37  ; CHECK-NEXT:   successors: %bb.5(0x30000000), %bb.2(0x50000000)
38  ; CHECK-NEXT: {{  $}}
39  ; CHECK-NEXT:   [[V_CMP_LT_I32_e64_:%[0-9]+]]:sreg_32 = V_CMP_LT_I32_e64 [[V_ADD_U32_e64_3]], [[S_MOV_B32_1]], implicit $exec
40  ; CHECK-NEXT:   [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 $exec_lo, [[V_CMP_LT_I32_e64_]], implicit-def $scc
41  ; CHECK-NEXT:   $exec_lo = S_MOV_B32_term [[S_XOR_B32_]]
42  ; CHECK-NEXT:   S_CBRANCH_EXECNZ %bb.2, implicit $exec
43  ; CHECK-NEXT: {{  $}}
44  ; CHECK-NEXT: bb.5:
45  ; CHECK-NEXT:   successors: %bb.4(0x80000000)
46  ; CHECK-NEXT: {{  $}}
47  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY [[V_CMP_LT_I32_e64_]]
48  ; CHECK-NEXT:   S_BRANCH %bb.4
49  ; CHECK-NEXT: {{  $}}
50  ; CHECK-NEXT: bb.2:
51  ; CHECK-NEXT:   successors: %bb.4(0x40000000), %bb.3(0x40000000)
52  ; CHECK-NEXT: {{  $}}
53  ; CHECK-NEXT:   [[S_MOV_B32_5:%[0-9]+]]:sreg_32 = S_MOV_B32 1
54  ; CHECK-NEXT:   [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_32 = V_CMP_EQ_U32_e64 [[V_ADD_U32_e64_3]], killed [[S_MOV_B32_5]], implicit $exec
55  ; CHECK-NEXT:   [[S_XOR_B32_1:%[0-9]+]]:sreg_32 = S_XOR_B32 $exec_lo, [[V_CMP_EQ_U32_e64_]], implicit-def $scc
56  ; CHECK-NEXT:   [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[V_CMP_LT_I32_e64_]], [[V_CMP_EQ_U32_e64_]], implicit-def $scc
57  ; CHECK-NEXT:   $exec_lo = S_MOV_B32_term [[S_XOR_B32_1]]
58  ; CHECK-NEXT:   S_CBRANCH_EXECZ %bb.4, implicit $exec
59  ; CHECK-NEXT:   S_BRANCH %bb.3
60  ; CHECK-NEXT: {{  $}}
61  ; CHECK-NEXT: bb.3:
62  ; CHECK-NEXT:   successors: %bb.4(0x80000000)
63  ; CHECK-NEXT: {{  $}}
64  ; CHECK-NEXT:   S_BRANCH %bb.4
65  ; CHECK-NEXT: {{  $}}
66  ; CHECK-NEXT: bb.4:
67  ; CHECK-NEXT:   [[PHI:%[0-9]+]]:sreg_32 = PHI [[COPY3]], %bb.5, [[S_OR_B32_]], %bb.2, [[S_OR_B32_]], %bb.3
68  ; CHECK-NEXT:   $exec_lo = S_OR_B32 $exec_lo, [[PHI]], implicit-def $scc
69  ; CHECK-NEXT:   S_ENDPGM 0
70  bb.0:
71    successors: %bb.1(0x80000000); %bb.1(100.00%)
72    liveins: $vgpr4, $vgpr6
73    %7:vgpr_32 = COPY $vgpr6
74    %5:vgpr_32 = COPY $vgpr4
75    %9:vgpr_32 = V_ADD_U32_e64 %5:vgpr_32, %7:vgpr_32, 0, implicit $exec
76    %11:sreg_32 = S_MOV_B32 31
77    %12:vgpr_32 = V_LSHRREV_B32_e64 killed %11:sreg_32, %9:vgpr_32, implicit $exec
78    %13:vgpr_32 = V_ADD_U32_e64 %9:vgpr_32, killed %12:vgpr_32, 0, implicit $exec
79    %14:sreg_32 = S_MOV_B32 1
80    %15:vgpr_32 = V_ASHRREV_I32_e64 %14:sreg_32, killed %13:vgpr_32, implicit $exec
81    %16:sreg_32 = S_MOV_B32 30
82    %17:vgpr_32 = V_LSHRREV_B32_e64 killed %16:sreg_32, %15:vgpr_32, implicit $exec
83    %18:vgpr_32 = V_ADD_U32_e64 %15:vgpr_32, killed %17:vgpr_32, 0, implicit $exec
84    %19:sreg_32 = S_MOV_B32 -4
85    %21:vgpr_32 = COPY %19:sreg_32
86    %20:vgpr_32 = V_AND_B32_e32 killed %18:vgpr_32, killed %21:vgpr_32, implicit $exec
87    %22:vgpr_32 = V_SUB_U32_e64 %15:vgpr_32, killed %20:vgpr_32, 0, implicit $exec
88    %23:sreg_32 = S_MOV_B32 4
89    %0:vgpr_32 = nsw V_ADD_U32_e64 killed %22:vgpr_32, killed %23:sreg_32, 0, implicit $exec
90    S_BRANCH %bb.1
91
92  bb.1:
93  ; predecessors: %bb.0
94    successors: %bb.4(0x30000000), %bb.2(0x50000000); %bb.4(37.50%), %bb.2(62.50%)
95
96    %25:sreg_32 = V_CMP_LT_I32_e64 %0:vgpr_32, %14:sreg_32, implicit $exec
97    %28:sreg_32 = S_XOR_B32 $exec_lo, %25:sreg_32, implicit-def $scc
98    %33:sreg_32 = COPY %25:sreg_32
99    $exec_lo = S_MOV_B32_term %28:sreg_32
100    S_CBRANCH_EXECZ %bb.4, implicit $exec
101    S_BRANCH %bb.2
102
103  bb.2:
104  ; predecessors: %bb.1
105    successors: %bb.4(0x40000000), %bb.3(0x40000000); %bb.4(50.00%), %bb.3(50.00%)
106
107    %26:sreg_32 = S_MOV_B32 1
108    %27:sreg_32 = V_CMP_EQ_U32_e64 %0:vgpr_32, killed %26:sreg_32, implicit $exec
109    %31:sreg_32 = S_XOR_B32 $exec_lo, %27:sreg_32, implicit-def $scc
110    %34:sreg_32 = S_OR_B32 %25:sreg_32, %27:sreg_32, implicit-def $scc
111    $exec_lo = S_MOV_B32_term %31:sreg_32
112    S_CBRANCH_EXECZ %bb.4, implicit $exec
113    S_BRANCH %bb.3
114
115  bb.3:
116  ; predecessors: %bb.2
117    successors: %bb.4(0x80000000); %bb.4(100.00%)
118
119    S_BRANCH %bb.4
120
121  bb.4:
122  ; predecessors: %bb.1, %bb.2, %bb.3
123
124    %35:sreg_32 = PHI %33:sreg_32, %bb.1, %34:sreg_32, %bb.2, %34:sreg_32, %bb.3
125    $exec_lo = S_OR_B32 $exec_lo, %35:sreg_32, implicit-def $scc
126    S_ENDPGM 0
127...
128