1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=powerpc64le-linux-gnu < %s | FileCheck %s -check-prefix=PPC64LE 3 4define i8 @test0(i8* %ptr) { 5; PPC64LE-LABEL: test0: 6; PPC64LE: # %bb.0: 7; PPC64LE-NEXT: lbz 3, 0(3) 8; PPC64LE-NEXT: blr 9 %val = load atomic i8, i8* %ptr unordered, align 1 10 ret i8 %val 11} 12 13define i8 @test1(i8* %ptr) { 14; PPC64LE-LABEL: test1: 15; PPC64LE: # %bb.0: 16; PPC64LE-NEXT: lbz 3, 0(3) 17; PPC64LE-NEXT: blr 18 %val = load atomic i8, i8* %ptr monotonic, align 1 19 ret i8 %val 20} 21 22define i8 @test2(i8* %ptr) { 23; PPC64LE-LABEL: test2: 24; PPC64LE: # %bb.0: 25; PPC64LE-NEXT: lbz 3, 0(3) 26; PPC64LE-NEXT: cmpd 7, 3, 3 27; PPC64LE-NEXT: bne- 7, .+4 28; PPC64LE-NEXT: isync 29; PPC64LE-NEXT: blr 30 %val = load atomic i8, i8* %ptr acquire, align 1 31 ret i8 %val 32} 33 34define i8 @test3(i8* %ptr) { 35; PPC64LE-LABEL: test3: 36; PPC64LE: # %bb.0: 37; PPC64LE-NEXT: sync 38; PPC64LE-NEXT: lbz 3, 0(3) 39; PPC64LE-NEXT: cmpd 7, 3, 3 40; PPC64LE-NEXT: bne- 7, .+4 41; PPC64LE-NEXT: isync 42; PPC64LE-NEXT: blr 43 %val = load atomic i8, i8* %ptr seq_cst, align 1 44 ret i8 %val 45} 46 47define i16 @test4(i16* %ptr) { 48; PPC64LE-LABEL: test4: 49; PPC64LE: # %bb.0: 50; PPC64LE-NEXT: lhz 3, 0(3) 51; PPC64LE-NEXT: blr 52 %val = load atomic i16, i16* %ptr unordered, align 2 53 ret i16 %val 54} 55 56define i16 @test5(i16* %ptr) { 57; PPC64LE-LABEL: test5: 58; PPC64LE: # %bb.0: 59; PPC64LE-NEXT: lhz 3, 0(3) 60; PPC64LE-NEXT: blr 61 %val = load atomic i16, i16* %ptr monotonic, align 2 62 ret i16 %val 63} 64 65define i16 @test6(i16* %ptr) { 66; PPC64LE-LABEL: test6: 67; PPC64LE: # %bb.0: 68; PPC64LE-NEXT: lhz 3, 0(3) 69; PPC64LE-NEXT: cmpd 7, 3, 3 70; PPC64LE-NEXT: bne- 7, .+4 71; PPC64LE-NEXT: isync 72; PPC64LE-NEXT: blr 73 %val = load atomic i16, i16* %ptr acquire, align 2 74 ret i16 %val 75} 76 77define i16 @test7(i16* %ptr) { 78; PPC64LE-LABEL: test7: 79; PPC64LE: # %bb.0: 80; PPC64LE-NEXT: sync 81; PPC64LE-NEXT: lhz 3, 0(3) 82; PPC64LE-NEXT: cmpd 7, 3, 3 83; PPC64LE-NEXT: bne- 7, .+4 84; PPC64LE-NEXT: isync 85; PPC64LE-NEXT: blr 86 %val = load atomic i16, i16* %ptr seq_cst, align 2 87 ret i16 %val 88} 89 90define i32 @test8(i32* %ptr) { 91; PPC64LE-LABEL: test8: 92; PPC64LE: # %bb.0: 93; PPC64LE-NEXT: lwz 3, 0(3) 94; PPC64LE-NEXT: blr 95 %val = load atomic i32, i32* %ptr unordered, align 4 96 ret i32 %val 97} 98 99define i32 @test9(i32* %ptr) { 100; PPC64LE-LABEL: test9: 101; PPC64LE: # %bb.0: 102; PPC64LE-NEXT: lwz 3, 0(3) 103; PPC64LE-NEXT: blr 104 %val = load atomic i32, i32* %ptr monotonic, align 4 105 ret i32 %val 106} 107 108define i32 @test10(i32* %ptr) { 109; PPC64LE-LABEL: test10: 110; PPC64LE: # %bb.0: 111; PPC64LE-NEXT: lwz 3, 0(3) 112; PPC64LE-NEXT: cmpd 7, 3, 3 113; PPC64LE-NEXT: bne- 7, .+4 114; PPC64LE-NEXT: isync 115; PPC64LE-NEXT: blr 116 %val = load atomic i32, i32* %ptr acquire, align 4 117 ret i32 %val 118} 119 120define i32 @test11(i32* %ptr) { 121; PPC64LE-LABEL: test11: 122; PPC64LE: # %bb.0: 123; PPC64LE-NEXT: sync 124; PPC64LE-NEXT: lwz 3, 0(3) 125; PPC64LE-NEXT: cmpd 7, 3, 3 126; PPC64LE-NEXT: bne- 7, .+4 127; PPC64LE-NEXT: isync 128; PPC64LE-NEXT: blr 129 %val = load atomic i32, i32* %ptr seq_cst, align 4 130 ret i32 %val 131} 132 133define i64 @test12(i64* %ptr) { 134; PPC64LE-LABEL: test12: 135; PPC64LE: # %bb.0: 136; PPC64LE-NEXT: ld 3, 0(3) 137; PPC64LE-NEXT: blr 138 %val = load atomic i64, i64* %ptr unordered, align 8 139 ret i64 %val 140} 141 142define i64 @test13(i64* %ptr) { 143; PPC64LE-LABEL: test13: 144; PPC64LE: # %bb.0: 145; PPC64LE-NEXT: ld 3, 0(3) 146; PPC64LE-NEXT: blr 147 %val = load atomic i64, i64* %ptr monotonic, align 8 148 ret i64 %val 149} 150 151define i64 @test14(i64* %ptr) { 152; PPC64LE-LABEL: test14: 153; PPC64LE: # %bb.0: 154; PPC64LE-NEXT: ld 3, 0(3) 155; PPC64LE-NEXT: cmpd 7, 3, 3 156; PPC64LE-NEXT: bne- 7, .+4 157; PPC64LE-NEXT: isync 158; PPC64LE-NEXT: blr 159 %val = load atomic i64, i64* %ptr acquire, align 8 160 ret i64 %val 161} 162 163define i64 @test15(i64* %ptr) { 164; PPC64LE-LABEL: test15: 165; PPC64LE: # %bb.0: 166; PPC64LE-NEXT: sync 167; PPC64LE-NEXT: ld 3, 0(3) 168; PPC64LE-NEXT: cmpd 7, 3, 3 169; PPC64LE-NEXT: bne- 7, .+4 170; PPC64LE-NEXT: isync 171; PPC64LE-NEXT: blr 172 %val = load atomic i64, i64* %ptr seq_cst, align 8 173 ret i64 %val 174} 175 176define void @test16(i8* %ptr, i8 %val) { 177; PPC64LE-LABEL: test16: 178; PPC64LE: # %bb.0: 179; PPC64LE-NEXT: stb 4, 0(3) 180; PPC64LE-NEXT: blr 181 store atomic i8 %val, i8* %ptr unordered, align 1 182 ret void 183} 184 185define void @test17(i8* %ptr, i8 %val) { 186; PPC64LE-LABEL: test17: 187; PPC64LE: # %bb.0: 188; PPC64LE-NEXT: stb 4, 0(3) 189; PPC64LE-NEXT: blr 190 store atomic i8 %val, i8* %ptr monotonic, align 1 191 ret void 192} 193 194define void @test18(i8* %ptr, i8 %val) { 195; PPC64LE-LABEL: test18: 196; PPC64LE: # %bb.0: 197; PPC64LE-NEXT: lwsync 198; PPC64LE-NEXT: stb 4, 0(3) 199; PPC64LE-NEXT: blr 200 store atomic i8 %val, i8* %ptr release, align 1 201 ret void 202} 203 204define void @test19(i8* %ptr, i8 %val) { 205; PPC64LE-LABEL: test19: 206; PPC64LE: # %bb.0: 207; PPC64LE-NEXT: sync 208; PPC64LE-NEXT: stb 4, 0(3) 209; PPC64LE-NEXT: blr 210 store atomic i8 %val, i8* %ptr seq_cst, align 1 211 ret void 212} 213 214define void @test20(i16* %ptr, i16 %val) { 215; PPC64LE-LABEL: test20: 216; PPC64LE: # %bb.0: 217; PPC64LE-NEXT: sth 4, 0(3) 218; PPC64LE-NEXT: blr 219 store atomic i16 %val, i16* %ptr unordered, align 2 220 ret void 221} 222 223define void @test21(i16* %ptr, i16 %val) { 224; PPC64LE-LABEL: test21: 225; PPC64LE: # %bb.0: 226; PPC64LE-NEXT: sth 4, 0(3) 227; PPC64LE-NEXT: blr 228 store atomic i16 %val, i16* %ptr monotonic, align 2 229 ret void 230} 231 232define void @test22(i16* %ptr, i16 %val) { 233; PPC64LE-LABEL: test22: 234; PPC64LE: # %bb.0: 235; PPC64LE-NEXT: lwsync 236; PPC64LE-NEXT: sth 4, 0(3) 237; PPC64LE-NEXT: blr 238 store atomic i16 %val, i16* %ptr release, align 2 239 ret void 240} 241 242define void @test23(i16* %ptr, i16 %val) { 243; PPC64LE-LABEL: test23: 244; PPC64LE: # %bb.0: 245; PPC64LE-NEXT: sync 246; PPC64LE-NEXT: sth 4, 0(3) 247; PPC64LE-NEXT: blr 248 store atomic i16 %val, i16* %ptr seq_cst, align 2 249 ret void 250} 251 252define void @test24(i32* %ptr, i32 %val) { 253; PPC64LE-LABEL: test24: 254; PPC64LE: # %bb.0: 255; PPC64LE-NEXT: stw 4, 0(3) 256; PPC64LE-NEXT: blr 257 store atomic i32 %val, i32* %ptr unordered, align 4 258 ret void 259} 260 261define void @test25(i32* %ptr, i32 %val) { 262; PPC64LE-LABEL: test25: 263; PPC64LE: # %bb.0: 264; PPC64LE-NEXT: stw 4, 0(3) 265; PPC64LE-NEXT: blr 266 store atomic i32 %val, i32* %ptr monotonic, align 4 267 ret void 268} 269 270define void @test26(i32* %ptr, i32 %val) { 271; PPC64LE-LABEL: test26: 272; PPC64LE: # %bb.0: 273; PPC64LE-NEXT: lwsync 274; PPC64LE-NEXT: stw 4, 0(3) 275; PPC64LE-NEXT: blr 276 store atomic i32 %val, i32* %ptr release, align 4 277 ret void 278} 279 280define void @test27(i32* %ptr, i32 %val) { 281; PPC64LE-LABEL: test27: 282; PPC64LE: # %bb.0: 283; PPC64LE-NEXT: sync 284; PPC64LE-NEXT: stw 4, 0(3) 285; PPC64LE-NEXT: blr 286 store atomic i32 %val, i32* %ptr seq_cst, align 4 287 ret void 288} 289 290define void @test28(i64* %ptr, i64 %val) { 291; PPC64LE-LABEL: test28: 292; PPC64LE: # %bb.0: 293; PPC64LE-NEXT: std 4, 0(3) 294; PPC64LE-NEXT: blr 295 store atomic i64 %val, i64* %ptr unordered, align 8 296 ret void 297} 298 299define void @test29(i64* %ptr, i64 %val) { 300; PPC64LE-LABEL: test29: 301; PPC64LE: # %bb.0: 302; PPC64LE-NEXT: std 4, 0(3) 303; PPC64LE-NEXT: blr 304 store atomic i64 %val, i64* %ptr monotonic, align 8 305 ret void 306} 307 308define void @test30(i64* %ptr, i64 %val) { 309; PPC64LE-LABEL: test30: 310; PPC64LE: # %bb.0: 311; PPC64LE-NEXT: lwsync 312; PPC64LE-NEXT: std 4, 0(3) 313; PPC64LE-NEXT: blr 314 store atomic i64 %val, i64* %ptr release, align 8 315 ret void 316} 317 318define void @test31(i64* %ptr, i64 %val) { 319; PPC64LE-LABEL: test31: 320; PPC64LE: # %bb.0: 321; PPC64LE-NEXT: sync 322; PPC64LE-NEXT: std 4, 0(3) 323; PPC64LE-NEXT: blr 324 store atomic i64 %val, i64* %ptr seq_cst, align 8 325 ret void 326} 327 328define void @test32() { 329; PPC64LE-LABEL: test32: 330; PPC64LE: # %bb.0: 331; PPC64LE-NEXT: lwsync 332; PPC64LE-NEXT: blr 333 fence acquire 334 ret void 335} 336 337define void @test33() { 338; PPC64LE-LABEL: test33: 339; PPC64LE: # %bb.0: 340; PPC64LE-NEXT: lwsync 341; PPC64LE-NEXT: blr 342 fence release 343 ret void 344} 345 346define void @test34() { 347; PPC64LE-LABEL: test34: 348; PPC64LE: # %bb.0: 349; PPC64LE-NEXT: lwsync 350; PPC64LE-NEXT: blr 351 fence acq_rel 352 ret void 353} 354 355define void @test35() { 356; PPC64LE-LABEL: test35: 357; PPC64LE: # %bb.0: 358; PPC64LE-NEXT: sync 359; PPC64LE-NEXT: blr 360 fence seq_cst 361 ret void 362} 363 364define void @test36() { 365; PPC64LE-LABEL: test36: 366; PPC64LE: # %bb.0: 367; PPC64LE-NEXT: lwsync 368; PPC64LE-NEXT: blr 369 fence syncscope("singlethread") acquire 370 ret void 371} 372 373define void @test37() { 374; PPC64LE-LABEL: test37: 375; PPC64LE: # %bb.0: 376; PPC64LE-NEXT: lwsync 377; PPC64LE-NEXT: blr 378 fence syncscope("singlethread") release 379 ret void 380} 381 382define void @test38() { 383; PPC64LE-LABEL: test38: 384; PPC64LE: # %bb.0: 385; PPC64LE-NEXT: lwsync 386; PPC64LE-NEXT: blr 387 fence syncscope("singlethread") acq_rel 388 ret void 389} 390 391define void @test39() { 392; PPC64LE-LABEL: test39: 393; PPC64LE: # %bb.0: 394; PPC64LE-NEXT: sync 395; PPC64LE-NEXT: blr 396 fence syncscope("singlethread") seq_cst 397 ret void 398} 399 400define void @test40(i8* %ptr, i8 %cmp, i8 %val) { 401; PPC64LE-LABEL: test40: 402; PPC64LE: # %bb.0: 403; PPC64LE-NEXT: clrlwi 4, 4, 24 404; PPC64LE-NEXT: .LBB40_1: 405; PPC64LE-NEXT: lbarx 6, 0, 3 406; PPC64LE-NEXT: cmpw 4, 6 407; PPC64LE-NEXT: bne 0, .LBB40_3 408; PPC64LE-NEXT: # %bb.2: 409; PPC64LE-NEXT: stbcx. 5, 0, 3 410; PPC64LE-NEXT: beqlr 0 411; PPC64LE-NEXT: b .LBB40_1 412; PPC64LE-NEXT: .LBB40_3: 413; PPC64LE-NEXT: stbcx. 6, 0, 3 414; PPC64LE-NEXT: blr 415 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val monotonic monotonic 416 ret void 417} 418 419define void @test41(i8* %ptr, i8 %cmp, i8 %val) { 420; PPC64LE-LABEL: test41: 421; PPC64LE: # %bb.0: 422; PPC64LE-NEXT: clrlwi 4, 4, 24 423; PPC64LE-NEXT: .LBB41_1: 424; PPC64LE-NEXT: lbarx 6, 0, 3 425; PPC64LE-NEXT: cmpw 4, 6 426; PPC64LE-NEXT: bne 0, .LBB41_4 427; PPC64LE-NEXT: # %bb.2: 428; PPC64LE-NEXT: stbcx. 5, 0, 3 429; PPC64LE-NEXT: bne 0, .LBB41_1 430; PPC64LE-NEXT: # %bb.3: 431; PPC64LE-NEXT: lwsync 432; PPC64LE-NEXT: blr 433; PPC64LE-NEXT: .LBB41_4: 434; PPC64LE-NEXT: stbcx. 6, 0, 3 435; PPC64LE-NEXT: lwsync 436; PPC64LE-NEXT: blr 437 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val acquire monotonic 438 ret void 439} 440 441define void @test42(i8* %ptr, i8 %cmp, i8 %val) { 442; PPC64LE-LABEL: test42: 443; PPC64LE: # %bb.0: 444; PPC64LE-NEXT: clrlwi 4, 4, 24 445; PPC64LE-NEXT: .LBB42_1: 446; PPC64LE-NEXT: lbarx 6, 0, 3 447; PPC64LE-NEXT: cmpw 4, 6 448; PPC64LE-NEXT: bne 0, .LBB42_4 449; PPC64LE-NEXT: # %bb.2: 450; PPC64LE-NEXT: stbcx. 5, 0, 3 451; PPC64LE-NEXT: bne 0, .LBB42_1 452; PPC64LE-NEXT: # %bb.3: 453; PPC64LE-NEXT: lwsync 454; PPC64LE-NEXT: blr 455; PPC64LE-NEXT: .LBB42_4: 456; PPC64LE-NEXT: stbcx. 6, 0, 3 457; PPC64LE-NEXT: lwsync 458; PPC64LE-NEXT: blr 459 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val acquire acquire 460 ret void 461} 462 463define void @test43(i8* %ptr, i8 %cmp, i8 %val) { 464; PPC64LE-LABEL: test43: 465; PPC64LE: # %bb.0: 466; PPC64LE-NEXT: clrlwi 4, 4, 24 467; PPC64LE-NEXT: lwsync 468; PPC64LE-NEXT: .LBB43_1: 469; PPC64LE-NEXT: lbarx 6, 0, 3 470; PPC64LE-NEXT: cmpw 4, 6 471; PPC64LE-NEXT: bne 0, .LBB43_3 472; PPC64LE-NEXT: # %bb.2: 473; PPC64LE-NEXT: stbcx. 5, 0, 3 474; PPC64LE-NEXT: beqlr 0 475; PPC64LE-NEXT: b .LBB43_1 476; PPC64LE-NEXT: .LBB43_3: 477; PPC64LE-NEXT: stbcx. 6, 0, 3 478; PPC64LE-NEXT: blr 479 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val release monotonic 480 ret void 481} 482 483define void @test44(i8* %ptr, i8 %cmp, i8 %val) { 484; PPC64LE-LABEL: test44: 485; PPC64LE: # %bb.0: 486; PPC64LE-NEXT: clrlwi 4, 4, 24 487; PPC64LE-NEXT: lwsync 488; PPC64LE-NEXT: .LBB44_1: 489; PPC64LE-NEXT: lbarx 6, 0, 3 490; PPC64LE-NEXT: cmpw 4, 6 491; PPC64LE-NEXT: bne 0, .LBB44_4 492; PPC64LE-NEXT: # %bb.2: 493; PPC64LE-NEXT: stbcx. 5, 0, 3 494; PPC64LE-NEXT: bne 0, .LBB44_1 495; PPC64LE-NEXT: # %bb.3: 496; PPC64LE-NEXT: lwsync 497; PPC64LE-NEXT: blr 498; PPC64LE-NEXT: .LBB44_4: 499; PPC64LE-NEXT: stbcx. 6, 0, 3 500; PPC64LE-NEXT: lwsync 501; PPC64LE-NEXT: blr 502 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val release acquire 503 ret void 504} 505 506define void @test45(i8* %ptr, i8 %cmp, i8 %val) { 507; PPC64LE-LABEL: test45: 508; PPC64LE: # %bb.0: 509; PPC64LE-NEXT: clrlwi 4, 4, 24 510; PPC64LE-NEXT: lwsync 511; PPC64LE-NEXT: .LBB45_1: 512; PPC64LE-NEXT: lbarx 6, 0, 3 513; PPC64LE-NEXT: cmpw 4, 6 514; PPC64LE-NEXT: bne 0, .LBB45_4 515; PPC64LE-NEXT: # %bb.2: 516; PPC64LE-NEXT: stbcx. 5, 0, 3 517; PPC64LE-NEXT: bne 0, .LBB45_1 518; PPC64LE-NEXT: # %bb.3: 519; PPC64LE-NEXT: lwsync 520; PPC64LE-NEXT: blr 521; PPC64LE-NEXT: .LBB45_4: 522; PPC64LE-NEXT: stbcx. 6, 0, 3 523; PPC64LE-NEXT: lwsync 524; PPC64LE-NEXT: blr 525 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val acq_rel monotonic 526 ret void 527} 528 529define void @test46(i8* %ptr, i8 %cmp, i8 %val) { 530; PPC64LE-LABEL: test46: 531; PPC64LE: # %bb.0: 532; PPC64LE-NEXT: clrlwi 4, 4, 24 533; PPC64LE-NEXT: lwsync 534; PPC64LE-NEXT: .LBB46_1: 535; PPC64LE-NEXT: lbarx 6, 0, 3 536; PPC64LE-NEXT: cmpw 4, 6 537; PPC64LE-NEXT: bne 0, .LBB46_4 538; PPC64LE-NEXT: # %bb.2: 539; PPC64LE-NEXT: stbcx. 5, 0, 3 540; PPC64LE-NEXT: bne 0, .LBB46_1 541; PPC64LE-NEXT: # %bb.3: 542; PPC64LE-NEXT: lwsync 543; PPC64LE-NEXT: blr 544; PPC64LE-NEXT: .LBB46_4: 545; PPC64LE-NEXT: stbcx. 6, 0, 3 546; PPC64LE-NEXT: lwsync 547; PPC64LE-NEXT: blr 548 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val acq_rel acquire 549 ret void 550} 551 552define void @test47(i8* %ptr, i8 %cmp, i8 %val) { 553; PPC64LE-LABEL: test47: 554; PPC64LE: # %bb.0: 555; PPC64LE-NEXT: clrlwi 4, 4, 24 556; PPC64LE-NEXT: sync 557; PPC64LE-NEXT: .LBB47_1: 558; PPC64LE-NEXT: lbarx 6, 0, 3 559; PPC64LE-NEXT: cmpw 4, 6 560; PPC64LE-NEXT: bne 0, .LBB47_4 561; PPC64LE-NEXT: # %bb.2: 562; PPC64LE-NEXT: stbcx. 5, 0, 3 563; PPC64LE-NEXT: bne 0, .LBB47_1 564; PPC64LE-NEXT: # %bb.3: 565; PPC64LE-NEXT: lwsync 566; PPC64LE-NEXT: blr 567; PPC64LE-NEXT: .LBB47_4: 568; PPC64LE-NEXT: stbcx. 6, 0, 3 569; PPC64LE-NEXT: lwsync 570; PPC64LE-NEXT: blr 571 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val seq_cst monotonic 572 ret void 573} 574 575define void @test48(i8* %ptr, i8 %cmp, i8 %val) { 576; PPC64LE-LABEL: test48: 577; PPC64LE: # %bb.0: 578; PPC64LE-NEXT: clrlwi 4, 4, 24 579; PPC64LE-NEXT: sync 580; PPC64LE-NEXT: .LBB48_1: 581; PPC64LE-NEXT: lbarx 6, 0, 3 582; PPC64LE-NEXT: cmpw 4, 6 583; PPC64LE-NEXT: bne 0, .LBB48_4 584; PPC64LE-NEXT: # %bb.2: 585; PPC64LE-NEXT: stbcx. 5, 0, 3 586; PPC64LE-NEXT: bne 0, .LBB48_1 587; PPC64LE-NEXT: # %bb.3: 588; PPC64LE-NEXT: lwsync 589; PPC64LE-NEXT: blr 590; PPC64LE-NEXT: .LBB48_4: 591; PPC64LE-NEXT: stbcx. 6, 0, 3 592; PPC64LE-NEXT: lwsync 593; PPC64LE-NEXT: blr 594 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val seq_cst acquire 595 ret void 596} 597 598define void @test49(i8* %ptr, i8 %cmp, i8 %val) { 599; PPC64LE-LABEL: test49: 600; PPC64LE: # %bb.0: 601; PPC64LE-NEXT: clrlwi 4, 4, 24 602; PPC64LE-NEXT: sync 603; PPC64LE-NEXT: .LBB49_1: 604; PPC64LE-NEXT: lbarx 6, 0, 3 605; PPC64LE-NEXT: cmpw 4, 6 606; PPC64LE-NEXT: bne 0, .LBB49_4 607; PPC64LE-NEXT: # %bb.2: 608; PPC64LE-NEXT: stbcx. 5, 0, 3 609; PPC64LE-NEXT: bne 0, .LBB49_1 610; PPC64LE-NEXT: # %bb.3: 611; PPC64LE-NEXT: lwsync 612; PPC64LE-NEXT: blr 613; PPC64LE-NEXT: .LBB49_4: 614; PPC64LE-NEXT: stbcx. 6, 0, 3 615; PPC64LE-NEXT: lwsync 616; PPC64LE-NEXT: blr 617 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val seq_cst seq_cst 618 ret void 619} 620 621define void @test50(i16* %ptr, i16 %cmp, i16 %val) { 622; PPC64LE-LABEL: test50: 623; PPC64LE: # %bb.0: 624; PPC64LE-NEXT: clrlwi 4, 4, 16 625; PPC64LE-NEXT: .LBB50_1: 626; PPC64LE-NEXT: lharx 6, 0, 3 627; PPC64LE-NEXT: cmpw 4, 6 628; PPC64LE-NEXT: bne 0, .LBB50_3 629; PPC64LE-NEXT: # %bb.2: 630; PPC64LE-NEXT: sthcx. 5, 0, 3 631; PPC64LE-NEXT: beqlr 0 632; PPC64LE-NEXT: b .LBB50_1 633; PPC64LE-NEXT: .LBB50_3: 634; PPC64LE-NEXT: sthcx. 6, 0, 3 635; PPC64LE-NEXT: blr 636 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val monotonic monotonic 637 ret void 638} 639 640define void @test51(i16* %ptr, i16 %cmp, i16 %val) { 641; PPC64LE-LABEL: test51: 642; PPC64LE: # %bb.0: 643; PPC64LE-NEXT: clrlwi 4, 4, 16 644; PPC64LE-NEXT: .LBB51_1: 645; PPC64LE-NEXT: lharx 6, 0, 3 646; PPC64LE-NEXT: cmpw 4, 6 647; PPC64LE-NEXT: bne 0, .LBB51_4 648; PPC64LE-NEXT: # %bb.2: 649; PPC64LE-NEXT: sthcx. 5, 0, 3 650; PPC64LE-NEXT: bne 0, .LBB51_1 651; PPC64LE-NEXT: # %bb.3: 652; PPC64LE-NEXT: lwsync 653; PPC64LE-NEXT: blr 654; PPC64LE-NEXT: .LBB51_4: 655; PPC64LE-NEXT: sthcx. 6, 0, 3 656; PPC64LE-NEXT: lwsync 657; PPC64LE-NEXT: blr 658 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val acquire monotonic 659 ret void 660} 661 662define void @test52(i16* %ptr, i16 %cmp, i16 %val) { 663; PPC64LE-LABEL: test52: 664; PPC64LE: # %bb.0: 665; PPC64LE-NEXT: clrlwi 4, 4, 16 666; PPC64LE-NEXT: .LBB52_1: 667; PPC64LE-NEXT: lharx 6, 0, 3 668; PPC64LE-NEXT: cmpw 4, 6 669; PPC64LE-NEXT: bne 0, .LBB52_4 670; PPC64LE-NEXT: # %bb.2: 671; PPC64LE-NEXT: sthcx. 5, 0, 3 672; PPC64LE-NEXT: bne 0, .LBB52_1 673; PPC64LE-NEXT: # %bb.3: 674; PPC64LE-NEXT: lwsync 675; PPC64LE-NEXT: blr 676; PPC64LE-NEXT: .LBB52_4: 677; PPC64LE-NEXT: sthcx. 6, 0, 3 678; PPC64LE-NEXT: lwsync 679; PPC64LE-NEXT: blr 680 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val acquire acquire 681 ret void 682} 683 684define void @test53(i16* %ptr, i16 %cmp, i16 %val) { 685; PPC64LE-LABEL: test53: 686; PPC64LE: # %bb.0: 687; PPC64LE-NEXT: clrlwi 4, 4, 16 688; PPC64LE-NEXT: lwsync 689; PPC64LE-NEXT: .LBB53_1: 690; PPC64LE-NEXT: lharx 6, 0, 3 691; PPC64LE-NEXT: cmpw 4, 6 692; PPC64LE-NEXT: bne 0, .LBB53_3 693; PPC64LE-NEXT: # %bb.2: 694; PPC64LE-NEXT: sthcx. 5, 0, 3 695; PPC64LE-NEXT: beqlr 0 696; PPC64LE-NEXT: b .LBB53_1 697; PPC64LE-NEXT: .LBB53_3: 698; PPC64LE-NEXT: sthcx. 6, 0, 3 699; PPC64LE-NEXT: blr 700 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val release monotonic 701 ret void 702} 703 704define void @test54(i16* %ptr, i16 %cmp, i16 %val) { 705; PPC64LE-LABEL: test54: 706; PPC64LE: # %bb.0: 707; PPC64LE-NEXT: clrlwi 4, 4, 16 708; PPC64LE-NEXT: lwsync 709; PPC64LE-NEXT: .LBB54_1: 710; PPC64LE-NEXT: lharx 6, 0, 3 711; PPC64LE-NEXT: cmpw 4, 6 712; PPC64LE-NEXT: bne 0, .LBB54_4 713; PPC64LE-NEXT: # %bb.2: 714; PPC64LE-NEXT: sthcx. 5, 0, 3 715; PPC64LE-NEXT: bne 0, .LBB54_1 716; PPC64LE-NEXT: # %bb.3: 717; PPC64LE-NEXT: lwsync 718; PPC64LE-NEXT: blr 719; PPC64LE-NEXT: .LBB54_4: 720; PPC64LE-NEXT: sthcx. 6, 0, 3 721; PPC64LE-NEXT: lwsync 722; PPC64LE-NEXT: blr 723 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val release acquire 724 ret void 725} 726 727define void @test55(i16* %ptr, i16 %cmp, i16 %val) { 728; PPC64LE-LABEL: test55: 729; PPC64LE: # %bb.0: 730; PPC64LE-NEXT: clrlwi 4, 4, 16 731; PPC64LE-NEXT: lwsync 732; PPC64LE-NEXT: .LBB55_1: 733; PPC64LE-NEXT: lharx 6, 0, 3 734; PPC64LE-NEXT: cmpw 4, 6 735; PPC64LE-NEXT: bne 0, .LBB55_4 736; PPC64LE-NEXT: # %bb.2: 737; PPC64LE-NEXT: sthcx. 5, 0, 3 738; PPC64LE-NEXT: bne 0, .LBB55_1 739; PPC64LE-NEXT: # %bb.3: 740; PPC64LE-NEXT: lwsync 741; PPC64LE-NEXT: blr 742; PPC64LE-NEXT: .LBB55_4: 743; PPC64LE-NEXT: sthcx. 6, 0, 3 744; PPC64LE-NEXT: lwsync 745; PPC64LE-NEXT: blr 746 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val acq_rel monotonic 747 ret void 748} 749 750define void @test56(i16* %ptr, i16 %cmp, i16 %val) { 751; PPC64LE-LABEL: test56: 752; PPC64LE: # %bb.0: 753; PPC64LE-NEXT: clrlwi 4, 4, 16 754; PPC64LE-NEXT: lwsync 755; PPC64LE-NEXT: .LBB56_1: 756; PPC64LE-NEXT: lharx 6, 0, 3 757; PPC64LE-NEXT: cmpw 4, 6 758; PPC64LE-NEXT: bne 0, .LBB56_4 759; PPC64LE-NEXT: # %bb.2: 760; PPC64LE-NEXT: sthcx. 5, 0, 3 761; PPC64LE-NEXT: bne 0, .LBB56_1 762; PPC64LE-NEXT: # %bb.3: 763; PPC64LE-NEXT: lwsync 764; PPC64LE-NEXT: blr 765; PPC64LE-NEXT: .LBB56_4: 766; PPC64LE-NEXT: sthcx. 6, 0, 3 767; PPC64LE-NEXT: lwsync 768; PPC64LE-NEXT: blr 769 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val acq_rel acquire 770 ret void 771} 772 773define void @test57(i16* %ptr, i16 %cmp, i16 %val) { 774; PPC64LE-LABEL: test57: 775; PPC64LE: # %bb.0: 776; PPC64LE-NEXT: clrlwi 4, 4, 16 777; PPC64LE-NEXT: sync 778; PPC64LE-NEXT: .LBB57_1: 779; PPC64LE-NEXT: lharx 6, 0, 3 780; PPC64LE-NEXT: cmpw 4, 6 781; PPC64LE-NEXT: bne 0, .LBB57_4 782; PPC64LE-NEXT: # %bb.2: 783; PPC64LE-NEXT: sthcx. 5, 0, 3 784; PPC64LE-NEXT: bne 0, .LBB57_1 785; PPC64LE-NEXT: # %bb.3: 786; PPC64LE-NEXT: lwsync 787; PPC64LE-NEXT: blr 788; PPC64LE-NEXT: .LBB57_4: 789; PPC64LE-NEXT: sthcx. 6, 0, 3 790; PPC64LE-NEXT: lwsync 791; PPC64LE-NEXT: blr 792 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val seq_cst monotonic 793 ret void 794} 795 796define void @test58(i16* %ptr, i16 %cmp, i16 %val) { 797; PPC64LE-LABEL: test58: 798; PPC64LE: # %bb.0: 799; PPC64LE-NEXT: clrlwi 4, 4, 16 800; PPC64LE-NEXT: sync 801; PPC64LE-NEXT: .LBB58_1: 802; PPC64LE-NEXT: lharx 6, 0, 3 803; PPC64LE-NEXT: cmpw 4, 6 804; PPC64LE-NEXT: bne 0, .LBB58_4 805; PPC64LE-NEXT: # %bb.2: 806; PPC64LE-NEXT: sthcx. 5, 0, 3 807; PPC64LE-NEXT: bne 0, .LBB58_1 808; PPC64LE-NEXT: # %bb.3: 809; PPC64LE-NEXT: lwsync 810; PPC64LE-NEXT: blr 811; PPC64LE-NEXT: .LBB58_4: 812; PPC64LE-NEXT: sthcx. 6, 0, 3 813; PPC64LE-NEXT: lwsync 814; PPC64LE-NEXT: blr 815 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val seq_cst acquire 816 ret void 817} 818 819define void @test59(i16* %ptr, i16 %cmp, i16 %val) { 820; PPC64LE-LABEL: test59: 821; PPC64LE: # %bb.0: 822; PPC64LE-NEXT: clrlwi 4, 4, 16 823; PPC64LE-NEXT: sync 824; PPC64LE-NEXT: .LBB59_1: 825; PPC64LE-NEXT: lharx 6, 0, 3 826; PPC64LE-NEXT: cmpw 4, 6 827; PPC64LE-NEXT: bne 0, .LBB59_4 828; PPC64LE-NEXT: # %bb.2: 829; PPC64LE-NEXT: sthcx. 5, 0, 3 830; PPC64LE-NEXT: bne 0, .LBB59_1 831; PPC64LE-NEXT: # %bb.3: 832; PPC64LE-NEXT: lwsync 833; PPC64LE-NEXT: blr 834; PPC64LE-NEXT: .LBB59_4: 835; PPC64LE-NEXT: sthcx. 6, 0, 3 836; PPC64LE-NEXT: lwsync 837; PPC64LE-NEXT: blr 838 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val seq_cst seq_cst 839 ret void 840} 841 842define void @test60(i32* %ptr, i32 %cmp, i32 %val) { 843; PPC64LE-LABEL: test60: 844; PPC64LE: # %bb.0: 845; PPC64LE-NEXT: .LBB60_1: 846; PPC64LE-NEXT: lwarx 6, 0, 3 847; PPC64LE-NEXT: cmpw 4, 6 848; PPC64LE-NEXT: bne 0, .LBB60_3 849; PPC64LE-NEXT: # %bb.2: 850; PPC64LE-NEXT: stwcx. 5, 0, 3 851; PPC64LE-NEXT: beqlr 0 852; PPC64LE-NEXT: b .LBB60_1 853; PPC64LE-NEXT: .LBB60_3: 854; PPC64LE-NEXT: stwcx. 6, 0, 3 855; PPC64LE-NEXT: blr 856 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val monotonic monotonic 857 ret void 858} 859 860define void @test61(i32* %ptr, i32 %cmp, i32 %val) { 861; PPC64LE-LABEL: test61: 862; PPC64LE: # %bb.0: 863; PPC64LE-NEXT: .LBB61_1: 864; PPC64LE-NEXT: lwarx 6, 0, 3 865; PPC64LE-NEXT: cmpw 4, 6 866; PPC64LE-NEXT: bne 0, .LBB61_4 867; PPC64LE-NEXT: # %bb.2: 868; PPC64LE-NEXT: stwcx. 5, 0, 3 869; PPC64LE-NEXT: bne 0, .LBB61_1 870; PPC64LE-NEXT: # %bb.3: 871; PPC64LE-NEXT: lwsync 872; PPC64LE-NEXT: blr 873; PPC64LE-NEXT: .LBB61_4: 874; PPC64LE-NEXT: stwcx. 6, 0, 3 875; PPC64LE-NEXT: lwsync 876; PPC64LE-NEXT: blr 877 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val acquire monotonic 878 ret void 879} 880 881define void @test62(i32* %ptr, i32 %cmp, i32 %val) { 882; PPC64LE-LABEL: test62: 883; PPC64LE: # %bb.0: 884; PPC64LE-NEXT: .LBB62_1: 885; PPC64LE-NEXT: lwarx 6, 0, 3 886; PPC64LE-NEXT: cmpw 4, 6 887; PPC64LE-NEXT: bne 0, .LBB62_4 888; PPC64LE-NEXT: # %bb.2: 889; PPC64LE-NEXT: stwcx. 5, 0, 3 890; PPC64LE-NEXT: bne 0, .LBB62_1 891; PPC64LE-NEXT: # %bb.3: 892; PPC64LE-NEXT: lwsync 893; PPC64LE-NEXT: blr 894; PPC64LE-NEXT: .LBB62_4: 895; PPC64LE-NEXT: stwcx. 6, 0, 3 896; PPC64LE-NEXT: lwsync 897; PPC64LE-NEXT: blr 898 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val acquire acquire 899 ret void 900} 901 902define void @test63(i32* %ptr, i32 %cmp, i32 %val) { 903; PPC64LE-LABEL: test63: 904; PPC64LE: # %bb.0: 905; PPC64LE-NEXT: lwsync 906; PPC64LE-NEXT: .LBB63_1: 907; PPC64LE-NEXT: lwarx 6, 0, 3 908; PPC64LE-NEXT: cmpw 4, 6 909; PPC64LE-NEXT: bne 0, .LBB63_3 910; PPC64LE-NEXT: # %bb.2: 911; PPC64LE-NEXT: stwcx. 5, 0, 3 912; PPC64LE-NEXT: beqlr 0 913; PPC64LE-NEXT: b .LBB63_1 914; PPC64LE-NEXT: .LBB63_3: 915; PPC64LE-NEXT: stwcx. 6, 0, 3 916; PPC64LE-NEXT: blr 917 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val release monotonic 918 ret void 919} 920 921define void @test64(i32* %ptr, i32 %cmp, i32 %val) { 922; PPC64LE-LABEL: test64: 923; PPC64LE: # %bb.0: 924; PPC64LE-NEXT: lwsync 925; PPC64LE-NEXT: .LBB64_1: 926; PPC64LE-NEXT: lwarx 6, 0, 3 927; PPC64LE-NEXT: cmpw 4, 6 928; PPC64LE-NEXT: bne 0, .LBB64_4 929; PPC64LE-NEXT: # %bb.2: 930; PPC64LE-NEXT: stwcx. 5, 0, 3 931; PPC64LE-NEXT: bne 0, .LBB64_1 932; PPC64LE-NEXT: # %bb.3: 933; PPC64LE-NEXT: lwsync 934; PPC64LE-NEXT: blr 935; PPC64LE-NEXT: .LBB64_4: 936; PPC64LE-NEXT: stwcx. 6, 0, 3 937; PPC64LE-NEXT: lwsync 938; PPC64LE-NEXT: blr 939 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val release acquire 940 ret void 941} 942 943define void @test65(i32* %ptr, i32 %cmp, i32 %val) { 944; PPC64LE-LABEL: test65: 945; PPC64LE: # %bb.0: 946; PPC64LE-NEXT: lwsync 947; PPC64LE-NEXT: .LBB65_1: 948; PPC64LE-NEXT: lwarx 6, 0, 3 949; PPC64LE-NEXT: cmpw 4, 6 950; PPC64LE-NEXT: bne 0, .LBB65_4 951; PPC64LE-NEXT: # %bb.2: 952; PPC64LE-NEXT: stwcx. 5, 0, 3 953; PPC64LE-NEXT: bne 0, .LBB65_1 954; PPC64LE-NEXT: # %bb.3: 955; PPC64LE-NEXT: lwsync 956; PPC64LE-NEXT: blr 957; PPC64LE-NEXT: .LBB65_4: 958; PPC64LE-NEXT: stwcx. 6, 0, 3 959; PPC64LE-NEXT: lwsync 960; PPC64LE-NEXT: blr 961 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val acq_rel monotonic 962 ret void 963} 964 965define void @test66(i32* %ptr, i32 %cmp, i32 %val) { 966; PPC64LE-LABEL: test66: 967; PPC64LE: # %bb.0: 968; PPC64LE-NEXT: lwsync 969; PPC64LE-NEXT: .LBB66_1: 970; PPC64LE-NEXT: lwarx 6, 0, 3 971; PPC64LE-NEXT: cmpw 4, 6 972; PPC64LE-NEXT: bne 0, .LBB66_4 973; PPC64LE-NEXT: # %bb.2: 974; PPC64LE-NEXT: stwcx. 5, 0, 3 975; PPC64LE-NEXT: bne 0, .LBB66_1 976; PPC64LE-NEXT: # %bb.3: 977; PPC64LE-NEXT: lwsync 978; PPC64LE-NEXT: blr 979; PPC64LE-NEXT: .LBB66_4: 980; PPC64LE-NEXT: stwcx. 6, 0, 3 981; PPC64LE-NEXT: lwsync 982; PPC64LE-NEXT: blr 983 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val acq_rel acquire 984 ret void 985} 986 987define void @test67(i32* %ptr, i32 %cmp, i32 %val) { 988; PPC64LE-LABEL: test67: 989; PPC64LE: # %bb.0: 990; PPC64LE-NEXT: sync 991; PPC64LE-NEXT: .LBB67_1: 992; PPC64LE-NEXT: lwarx 6, 0, 3 993; PPC64LE-NEXT: cmpw 4, 6 994; PPC64LE-NEXT: bne 0, .LBB67_4 995; PPC64LE-NEXT: # %bb.2: 996; PPC64LE-NEXT: stwcx. 5, 0, 3 997; PPC64LE-NEXT: bne 0, .LBB67_1 998; PPC64LE-NEXT: # %bb.3: 999; PPC64LE-NEXT: lwsync 1000; PPC64LE-NEXT: blr 1001; PPC64LE-NEXT: .LBB67_4: 1002; PPC64LE-NEXT: stwcx. 6, 0, 3 1003; PPC64LE-NEXT: lwsync 1004; PPC64LE-NEXT: blr 1005 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val seq_cst monotonic 1006 ret void 1007} 1008 1009define void @test68(i32* %ptr, i32 %cmp, i32 %val) { 1010; PPC64LE-LABEL: test68: 1011; PPC64LE: # %bb.0: 1012; PPC64LE-NEXT: sync 1013; PPC64LE-NEXT: .LBB68_1: 1014; PPC64LE-NEXT: lwarx 6, 0, 3 1015; PPC64LE-NEXT: cmpw 4, 6 1016; PPC64LE-NEXT: bne 0, .LBB68_4 1017; PPC64LE-NEXT: # %bb.2: 1018; PPC64LE-NEXT: stwcx. 5, 0, 3 1019; PPC64LE-NEXT: bne 0, .LBB68_1 1020; PPC64LE-NEXT: # %bb.3: 1021; PPC64LE-NEXT: lwsync 1022; PPC64LE-NEXT: blr 1023; PPC64LE-NEXT: .LBB68_4: 1024; PPC64LE-NEXT: stwcx. 6, 0, 3 1025; PPC64LE-NEXT: lwsync 1026; PPC64LE-NEXT: blr 1027 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val seq_cst acquire 1028 ret void 1029} 1030 1031define void @test69(i32* %ptr, i32 %cmp, i32 %val) { 1032; PPC64LE-LABEL: test69: 1033; PPC64LE: # %bb.0: 1034; PPC64LE-NEXT: sync 1035; PPC64LE-NEXT: .LBB69_1: 1036; PPC64LE-NEXT: lwarx 6, 0, 3 1037; PPC64LE-NEXT: cmpw 4, 6 1038; PPC64LE-NEXT: bne 0, .LBB69_4 1039; PPC64LE-NEXT: # %bb.2: 1040; PPC64LE-NEXT: stwcx. 5, 0, 3 1041; PPC64LE-NEXT: bne 0, .LBB69_1 1042; PPC64LE-NEXT: # %bb.3: 1043; PPC64LE-NEXT: lwsync 1044; PPC64LE-NEXT: blr 1045; PPC64LE-NEXT: .LBB69_4: 1046; PPC64LE-NEXT: stwcx. 6, 0, 3 1047; PPC64LE-NEXT: lwsync 1048; PPC64LE-NEXT: blr 1049 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val seq_cst seq_cst 1050 ret void 1051} 1052 1053define void @test70(i64* %ptr, i64 %cmp, i64 %val) { 1054; PPC64LE-LABEL: test70: 1055; PPC64LE: # %bb.0: 1056; PPC64LE-NEXT: .LBB70_1: 1057; PPC64LE-NEXT: ldarx 6, 0, 3 1058; PPC64LE-NEXT: cmpd 4, 6 1059; PPC64LE-NEXT: bne 0, .LBB70_3 1060; PPC64LE-NEXT: # %bb.2: 1061; PPC64LE-NEXT: stdcx. 5, 0, 3 1062; PPC64LE-NEXT: beqlr 0 1063; PPC64LE-NEXT: b .LBB70_1 1064; PPC64LE-NEXT: .LBB70_3: 1065; PPC64LE-NEXT: stdcx. 6, 0, 3 1066; PPC64LE-NEXT: blr 1067 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val monotonic monotonic 1068 ret void 1069} 1070 1071define void @test71(i64* %ptr, i64 %cmp, i64 %val) { 1072; PPC64LE-LABEL: test71: 1073; PPC64LE: # %bb.0: 1074; PPC64LE-NEXT: .LBB71_1: 1075; PPC64LE-NEXT: ldarx 6, 0, 3 1076; PPC64LE-NEXT: cmpd 4, 6 1077; PPC64LE-NEXT: bne 0, .LBB71_4 1078; PPC64LE-NEXT: # %bb.2: 1079; PPC64LE-NEXT: stdcx. 5, 0, 3 1080; PPC64LE-NEXT: bne 0, .LBB71_1 1081; PPC64LE-NEXT: # %bb.3: 1082; PPC64LE-NEXT: lwsync 1083; PPC64LE-NEXT: blr 1084; PPC64LE-NEXT: .LBB71_4: 1085; PPC64LE-NEXT: stdcx. 6, 0, 3 1086; PPC64LE-NEXT: lwsync 1087; PPC64LE-NEXT: blr 1088 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val acquire monotonic 1089 ret void 1090} 1091 1092define void @test72(i64* %ptr, i64 %cmp, i64 %val) { 1093; PPC64LE-LABEL: test72: 1094; PPC64LE: # %bb.0: 1095; PPC64LE-NEXT: .LBB72_1: 1096; PPC64LE-NEXT: ldarx 6, 0, 3 1097; PPC64LE-NEXT: cmpd 4, 6 1098; PPC64LE-NEXT: bne 0, .LBB72_4 1099; PPC64LE-NEXT: # %bb.2: 1100; PPC64LE-NEXT: stdcx. 5, 0, 3 1101; PPC64LE-NEXT: bne 0, .LBB72_1 1102; PPC64LE-NEXT: # %bb.3: 1103; PPC64LE-NEXT: lwsync 1104; PPC64LE-NEXT: blr 1105; PPC64LE-NEXT: .LBB72_4: 1106; PPC64LE-NEXT: stdcx. 6, 0, 3 1107; PPC64LE-NEXT: lwsync 1108; PPC64LE-NEXT: blr 1109 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val acquire acquire 1110 ret void 1111} 1112 1113define void @test73(i64* %ptr, i64 %cmp, i64 %val) { 1114; PPC64LE-LABEL: test73: 1115; PPC64LE: # %bb.0: 1116; PPC64LE-NEXT: lwsync 1117; PPC64LE-NEXT: .LBB73_1: 1118; PPC64LE-NEXT: ldarx 6, 0, 3 1119; PPC64LE-NEXT: cmpd 4, 6 1120; PPC64LE-NEXT: bne 0, .LBB73_3 1121; PPC64LE-NEXT: # %bb.2: 1122; PPC64LE-NEXT: stdcx. 5, 0, 3 1123; PPC64LE-NEXT: beqlr 0 1124; PPC64LE-NEXT: b .LBB73_1 1125; PPC64LE-NEXT: .LBB73_3: 1126; PPC64LE-NEXT: stdcx. 6, 0, 3 1127; PPC64LE-NEXT: blr 1128 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val release monotonic 1129 ret void 1130} 1131 1132define void @test74(i64* %ptr, i64 %cmp, i64 %val) { 1133; PPC64LE-LABEL: test74: 1134; PPC64LE: # %bb.0: 1135; PPC64LE-NEXT: lwsync 1136; PPC64LE-NEXT: .LBB74_1: 1137; PPC64LE-NEXT: ldarx 6, 0, 3 1138; PPC64LE-NEXT: cmpd 4, 6 1139; PPC64LE-NEXT: bne 0, .LBB74_4 1140; PPC64LE-NEXT: # %bb.2: 1141; PPC64LE-NEXT: stdcx. 5, 0, 3 1142; PPC64LE-NEXT: bne 0, .LBB74_1 1143; PPC64LE-NEXT: # %bb.3: 1144; PPC64LE-NEXT: lwsync 1145; PPC64LE-NEXT: blr 1146; PPC64LE-NEXT: .LBB74_4: 1147; PPC64LE-NEXT: stdcx. 6, 0, 3 1148; PPC64LE-NEXT: lwsync 1149; PPC64LE-NEXT: blr 1150 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val release acquire 1151 ret void 1152} 1153 1154define void @test75(i64* %ptr, i64 %cmp, i64 %val) { 1155; PPC64LE-LABEL: test75: 1156; PPC64LE: # %bb.0: 1157; PPC64LE-NEXT: lwsync 1158; PPC64LE-NEXT: .LBB75_1: 1159; PPC64LE-NEXT: ldarx 6, 0, 3 1160; PPC64LE-NEXT: cmpd 4, 6 1161; PPC64LE-NEXT: bne 0, .LBB75_4 1162; PPC64LE-NEXT: # %bb.2: 1163; PPC64LE-NEXT: stdcx. 5, 0, 3 1164; PPC64LE-NEXT: bne 0, .LBB75_1 1165; PPC64LE-NEXT: # %bb.3: 1166; PPC64LE-NEXT: lwsync 1167; PPC64LE-NEXT: blr 1168; PPC64LE-NEXT: .LBB75_4: 1169; PPC64LE-NEXT: stdcx. 6, 0, 3 1170; PPC64LE-NEXT: lwsync 1171; PPC64LE-NEXT: blr 1172 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val acq_rel monotonic 1173 ret void 1174} 1175 1176define void @test76(i64* %ptr, i64 %cmp, i64 %val) { 1177; PPC64LE-LABEL: test76: 1178; PPC64LE: # %bb.0: 1179; PPC64LE-NEXT: lwsync 1180; PPC64LE-NEXT: .LBB76_1: 1181; PPC64LE-NEXT: ldarx 6, 0, 3 1182; PPC64LE-NEXT: cmpd 4, 6 1183; PPC64LE-NEXT: bne 0, .LBB76_4 1184; PPC64LE-NEXT: # %bb.2: 1185; PPC64LE-NEXT: stdcx. 5, 0, 3 1186; PPC64LE-NEXT: bne 0, .LBB76_1 1187; PPC64LE-NEXT: # %bb.3: 1188; PPC64LE-NEXT: lwsync 1189; PPC64LE-NEXT: blr 1190; PPC64LE-NEXT: .LBB76_4: 1191; PPC64LE-NEXT: stdcx. 6, 0, 3 1192; PPC64LE-NEXT: lwsync 1193; PPC64LE-NEXT: blr 1194 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val acq_rel acquire 1195 ret void 1196} 1197 1198define void @test77(i64* %ptr, i64 %cmp, i64 %val) { 1199; PPC64LE-LABEL: test77: 1200; PPC64LE: # %bb.0: 1201; PPC64LE-NEXT: sync 1202; PPC64LE-NEXT: .LBB77_1: 1203; PPC64LE-NEXT: ldarx 6, 0, 3 1204; PPC64LE-NEXT: cmpd 4, 6 1205; PPC64LE-NEXT: bne 0, .LBB77_4 1206; PPC64LE-NEXT: # %bb.2: 1207; PPC64LE-NEXT: stdcx. 5, 0, 3 1208; PPC64LE-NEXT: bne 0, .LBB77_1 1209; PPC64LE-NEXT: # %bb.3: 1210; PPC64LE-NEXT: lwsync 1211; PPC64LE-NEXT: blr 1212; PPC64LE-NEXT: .LBB77_4: 1213; PPC64LE-NEXT: stdcx. 6, 0, 3 1214; PPC64LE-NEXT: lwsync 1215; PPC64LE-NEXT: blr 1216 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val seq_cst monotonic 1217 ret void 1218} 1219 1220define void @test78(i64* %ptr, i64 %cmp, i64 %val) { 1221; PPC64LE-LABEL: test78: 1222; PPC64LE: # %bb.0: 1223; PPC64LE-NEXT: sync 1224; PPC64LE-NEXT: .LBB78_1: 1225; PPC64LE-NEXT: ldarx 6, 0, 3 1226; PPC64LE-NEXT: cmpd 4, 6 1227; PPC64LE-NEXT: bne 0, .LBB78_4 1228; PPC64LE-NEXT: # %bb.2: 1229; PPC64LE-NEXT: stdcx. 5, 0, 3 1230; PPC64LE-NEXT: bne 0, .LBB78_1 1231; PPC64LE-NEXT: # %bb.3: 1232; PPC64LE-NEXT: lwsync 1233; PPC64LE-NEXT: blr 1234; PPC64LE-NEXT: .LBB78_4: 1235; PPC64LE-NEXT: stdcx. 6, 0, 3 1236; PPC64LE-NEXT: lwsync 1237; PPC64LE-NEXT: blr 1238 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val seq_cst acquire 1239 ret void 1240} 1241 1242define void @test79(i64* %ptr, i64 %cmp, i64 %val) { 1243; PPC64LE-LABEL: test79: 1244; PPC64LE: # %bb.0: 1245; PPC64LE-NEXT: sync 1246; PPC64LE-NEXT: .LBB79_1: 1247; PPC64LE-NEXT: ldarx 6, 0, 3 1248; PPC64LE-NEXT: cmpd 4, 6 1249; PPC64LE-NEXT: bne 0, .LBB79_4 1250; PPC64LE-NEXT: # %bb.2: 1251; PPC64LE-NEXT: stdcx. 5, 0, 3 1252; PPC64LE-NEXT: bne 0, .LBB79_1 1253; PPC64LE-NEXT: # %bb.3: 1254; PPC64LE-NEXT: lwsync 1255; PPC64LE-NEXT: blr 1256; PPC64LE-NEXT: .LBB79_4: 1257; PPC64LE-NEXT: stdcx. 6, 0, 3 1258; PPC64LE-NEXT: lwsync 1259; PPC64LE-NEXT: blr 1260 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val seq_cst seq_cst 1261 ret void 1262} 1263 1264define void @test80(i8* %ptr, i8 %cmp, i8 %val) { 1265; PPC64LE-LABEL: test80: 1266; PPC64LE: # %bb.0: 1267; PPC64LE-NEXT: clrlwi 4, 4, 24 1268; PPC64LE-NEXT: .LBB80_1: 1269; PPC64LE-NEXT: lbarx 6, 0, 3 1270; PPC64LE-NEXT: cmpw 4, 6 1271; PPC64LE-NEXT: bne 0, .LBB80_3 1272; PPC64LE-NEXT: # %bb.2: 1273; PPC64LE-NEXT: stbcx. 5, 0, 3 1274; PPC64LE-NEXT: beqlr 0 1275; PPC64LE-NEXT: b .LBB80_1 1276; PPC64LE-NEXT: .LBB80_3: 1277; PPC64LE-NEXT: stbcx. 6, 0, 3 1278; PPC64LE-NEXT: blr 1279 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") monotonic monotonic 1280 ret void 1281} 1282 1283define void @test81(i8* %ptr, i8 %cmp, i8 %val) { 1284; PPC64LE-LABEL: test81: 1285; PPC64LE: # %bb.0: 1286; PPC64LE-NEXT: clrlwi 4, 4, 24 1287; PPC64LE-NEXT: .LBB81_1: 1288; PPC64LE-NEXT: lbarx 6, 0, 3 1289; PPC64LE-NEXT: cmpw 4, 6 1290; PPC64LE-NEXT: bne 0, .LBB81_4 1291; PPC64LE-NEXT: # %bb.2: 1292; PPC64LE-NEXT: stbcx. 5, 0, 3 1293; PPC64LE-NEXT: bne 0, .LBB81_1 1294; PPC64LE-NEXT: # %bb.3: 1295; PPC64LE-NEXT: lwsync 1296; PPC64LE-NEXT: blr 1297; PPC64LE-NEXT: .LBB81_4: 1298; PPC64LE-NEXT: stbcx. 6, 0, 3 1299; PPC64LE-NEXT: lwsync 1300; PPC64LE-NEXT: blr 1301 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") acquire monotonic 1302 ret void 1303} 1304 1305define void @test82(i8* %ptr, i8 %cmp, i8 %val) { 1306; PPC64LE-LABEL: test82: 1307; PPC64LE: # %bb.0: 1308; PPC64LE-NEXT: clrlwi 4, 4, 24 1309; PPC64LE-NEXT: .LBB82_1: 1310; PPC64LE-NEXT: lbarx 6, 0, 3 1311; PPC64LE-NEXT: cmpw 4, 6 1312; PPC64LE-NEXT: bne 0, .LBB82_4 1313; PPC64LE-NEXT: # %bb.2: 1314; PPC64LE-NEXT: stbcx. 5, 0, 3 1315; PPC64LE-NEXT: bne 0, .LBB82_1 1316; PPC64LE-NEXT: # %bb.3: 1317; PPC64LE-NEXT: lwsync 1318; PPC64LE-NEXT: blr 1319; PPC64LE-NEXT: .LBB82_4: 1320; PPC64LE-NEXT: stbcx. 6, 0, 3 1321; PPC64LE-NEXT: lwsync 1322; PPC64LE-NEXT: blr 1323 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") acquire acquire 1324 ret void 1325} 1326 1327define void @test83(i8* %ptr, i8 %cmp, i8 %val) { 1328; PPC64LE-LABEL: test83: 1329; PPC64LE: # %bb.0: 1330; PPC64LE-NEXT: clrlwi 4, 4, 24 1331; PPC64LE-NEXT: lwsync 1332; PPC64LE-NEXT: .LBB83_1: 1333; PPC64LE-NEXT: lbarx 6, 0, 3 1334; PPC64LE-NEXT: cmpw 4, 6 1335; PPC64LE-NEXT: bne 0, .LBB83_3 1336; PPC64LE-NEXT: # %bb.2: 1337; PPC64LE-NEXT: stbcx. 5, 0, 3 1338; PPC64LE-NEXT: beqlr 0 1339; PPC64LE-NEXT: b .LBB83_1 1340; PPC64LE-NEXT: .LBB83_3: 1341; PPC64LE-NEXT: stbcx. 6, 0, 3 1342; PPC64LE-NEXT: blr 1343 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") release monotonic 1344 ret void 1345} 1346 1347define void @test84(i8* %ptr, i8 %cmp, i8 %val) { 1348; PPC64LE-LABEL: test84: 1349; PPC64LE: # %bb.0: 1350; PPC64LE-NEXT: clrlwi 4, 4, 24 1351; PPC64LE-NEXT: lwsync 1352; PPC64LE-NEXT: .LBB84_1: 1353; PPC64LE-NEXT: lbarx 6, 0, 3 1354; PPC64LE-NEXT: cmpw 4, 6 1355; PPC64LE-NEXT: bne 0, .LBB84_4 1356; PPC64LE-NEXT: # %bb.2: 1357; PPC64LE-NEXT: stbcx. 5, 0, 3 1358; PPC64LE-NEXT: bne 0, .LBB84_1 1359; PPC64LE-NEXT: # %bb.3: 1360; PPC64LE-NEXT: lwsync 1361; PPC64LE-NEXT: blr 1362; PPC64LE-NEXT: .LBB84_4: 1363; PPC64LE-NEXT: stbcx. 6, 0, 3 1364; PPC64LE-NEXT: lwsync 1365; PPC64LE-NEXT: blr 1366 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") release acquire 1367 ret void 1368} 1369 1370define void @test85(i8* %ptr, i8 %cmp, i8 %val) { 1371; PPC64LE-LABEL: test85: 1372; PPC64LE: # %bb.0: 1373; PPC64LE-NEXT: clrlwi 4, 4, 24 1374; PPC64LE-NEXT: lwsync 1375; PPC64LE-NEXT: .LBB85_1: 1376; PPC64LE-NEXT: lbarx 6, 0, 3 1377; PPC64LE-NEXT: cmpw 4, 6 1378; PPC64LE-NEXT: bne 0, .LBB85_4 1379; PPC64LE-NEXT: # %bb.2: 1380; PPC64LE-NEXT: stbcx. 5, 0, 3 1381; PPC64LE-NEXT: bne 0, .LBB85_1 1382; PPC64LE-NEXT: # %bb.3: 1383; PPC64LE-NEXT: lwsync 1384; PPC64LE-NEXT: blr 1385; PPC64LE-NEXT: .LBB85_4: 1386; PPC64LE-NEXT: stbcx. 6, 0, 3 1387; PPC64LE-NEXT: lwsync 1388; PPC64LE-NEXT: blr 1389 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") acq_rel monotonic 1390 ret void 1391} 1392 1393define void @test86(i8* %ptr, i8 %cmp, i8 %val) { 1394; PPC64LE-LABEL: test86: 1395; PPC64LE: # %bb.0: 1396; PPC64LE-NEXT: clrlwi 4, 4, 24 1397; PPC64LE-NEXT: lwsync 1398; PPC64LE-NEXT: .LBB86_1: 1399; PPC64LE-NEXT: lbarx 6, 0, 3 1400; PPC64LE-NEXT: cmpw 4, 6 1401; PPC64LE-NEXT: bne 0, .LBB86_4 1402; PPC64LE-NEXT: # %bb.2: 1403; PPC64LE-NEXT: stbcx. 5, 0, 3 1404; PPC64LE-NEXT: bne 0, .LBB86_1 1405; PPC64LE-NEXT: # %bb.3: 1406; PPC64LE-NEXT: lwsync 1407; PPC64LE-NEXT: blr 1408; PPC64LE-NEXT: .LBB86_4: 1409; PPC64LE-NEXT: stbcx. 6, 0, 3 1410; PPC64LE-NEXT: lwsync 1411; PPC64LE-NEXT: blr 1412 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") acq_rel acquire 1413 ret void 1414} 1415 1416define void @test87(i8* %ptr, i8 %cmp, i8 %val) { 1417; PPC64LE-LABEL: test87: 1418; PPC64LE: # %bb.0: 1419; PPC64LE-NEXT: clrlwi 4, 4, 24 1420; PPC64LE-NEXT: sync 1421; PPC64LE-NEXT: .LBB87_1: 1422; PPC64LE-NEXT: lbarx 6, 0, 3 1423; PPC64LE-NEXT: cmpw 4, 6 1424; PPC64LE-NEXT: bne 0, .LBB87_4 1425; PPC64LE-NEXT: # %bb.2: 1426; PPC64LE-NEXT: stbcx. 5, 0, 3 1427; PPC64LE-NEXT: bne 0, .LBB87_1 1428; PPC64LE-NEXT: # %bb.3: 1429; PPC64LE-NEXT: lwsync 1430; PPC64LE-NEXT: blr 1431; PPC64LE-NEXT: .LBB87_4: 1432; PPC64LE-NEXT: stbcx. 6, 0, 3 1433; PPC64LE-NEXT: lwsync 1434; PPC64LE-NEXT: blr 1435 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") seq_cst monotonic 1436 ret void 1437} 1438 1439define void @test88(i8* %ptr, i8 %cmp, i8 %val) { 1440; PPC64LE-LABEL: test88: 1441; PPC64LE: # %bb.0: 1442; PPC64LE-NEXT: clrlwi 4, 4, 24 1443; PPC64LE-NEXT: sync 1444; PPC64LE-NEXT: .LBB88_1: 1445; PPC64LE-NEXT: lbarx 6, 0, 3 1446; PPC64LE-NEXT: cmpw 4, 6 1447; PPC64LE-NEXT: bne 0, .LBB88_4 1448; PPC64LE-NEXT: # %bb.2: 1449; PPC64LE-NEXT: stbcx. 5, 0, 3 1450; PPC64LE-NEXT: bne 0, .LBB88_1 1451; PPC64LE-NEXT: # %bb.3: 1452; PPC64LE-NEXT: lwsync 1453; PPC64LE-NEXT: blr 1454; PPC64LE-NEXT: .LBB88_4: 1455; PPC64LE-NEXT: stbcx. 6, 0, 3 1456; PPC64LE-NEXT: lwsync 1457; PPC64LE-NEXT: blr 1458 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") seq_cst acquire 1459 ret void 1460} 1461 1462define void @test89(i8* %ptr, i8 %cmp, i8 %val) { 1463; PPC64LE-LABEL: test89: 1464; PPC64LE: # %bb.0: 1465; PPC64LE-NEXT: clrlwi 4, 4, 24 1466; PPC64LE-NEXT: sync 1467; PPC64LE-NEXT: .LBB89_1: 1468; PPC64LE-NEXT: lbarx 6, 0, 3 1469; PPC64LE-NEXT: cmpw 4, 6 1470; PPC64LE-NEXT: bne 0, .LBB89_4 1471; PPC64LE-NEXT: # %bb.2: 1472; PPC64LE-NEXT: stbcx. 5, 0, 3 1473; PPC64LE-NEXT: bne 0, .LBB89_1 1474; PPC64LE-NEXT: # %bb.3: 1475; PPC64LE-NEXT: lwsync 1476; PPC64LE-NEXT: blr 1477; PPC64LE-NEXT: .LBB89_4: 1478; PPC64LE-NEXT: stbcx. 6, 0, 3 1479; PPC64LE-NEXT: lwsync 1480; PPC64LE-NEXT: blr 1481 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") seq_cst seq_cst 1482 ret void 1483} 1484 1485define void @test90(i16* %ptr, i16 %cmp, i16 %val) { 1486; PPC64LE-LABEL: test90: 1487; PPC64LE: # %bb.0: 1488; PPC64LE-NEXT: clrlwi 4, 4, 16 1489; PPC64LE-NEXT: .LBB90_1: 1490; PPC64LE-NEXT: lharx 6, 0, 3 1491; PPC64LE-NEXT: cmpw 4, 6 1492; PPC64LE-NEXT: bne 0, .LBB90_3 1493; PPC64LE-NEXT: # %bb.2: 1494; PPC64LE-NEXT: sthcx. 5, 0, 3 1495; PPC64LE-NEXT: beqlr 0 1496; PPC64LE-NEXT: b .LBB90_1 1497; PPC64LE-NEXT: .LBB90_3: 1498; PPC64LE-NEXT: sthcx. 6, 0, 3 1499; PPC64LE-NEXT: blr 1500 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") monotonic monotonic 1501 ret void 1502} 1503 1504define void @test91(i16* %ptr, i16 %cmp, i16 %val) { 1505; PPC64LE-LABEL: test91: 1506; PPC64LE: # %bb.0: 1507; PPC64LE-NEXT: clrlwi 4, 4, 16 1508; PPC64LE-NEXT: .LBB91_1: 1509; PPC64LE-NEXT: lharx 6, 0, 3 1510; PPC64LE-NEXT: cmpw 4, 6 1511; PPC64LE-NEXT: bne 0, .LBB91_4 1512; PPC64LE-NEXT: # %bb.2: 1513; PPC64LE-NEXT: sthcx. 5, 0, 3 1514; PPC64LE-NEXT: bne 0, .LBB91_1 1515; PPC64LE-NEXT: # %bb.3: 1516; PPC64LE-NEXT: lwsync 1517; PPC64LE-NEXT: blr 1518; PPC64LE-NEXT: .LBB91_4: 1519; PPC64LE-NEXT: sthcx. 6, 0, 3 1520; PPC64LE-NEXT: lwsync 1521; PPC64LE-NEXT: blr 1522 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") acquire monotonic 1523 ret void 1524} 1525 1526define void @test92(i16* %ptr, i16 %cmp, i16 %val) { 1527; PPC64LE-LABEL: test92: 1528; PPC64LE: # %bb.0: 1529; PPC64LE-NEXT: clrlwi 4, 4, 16 1530; PPC64LE-NEXT: .LBB92_1: 1531; PPC64LE-NEXT: lharx 6, 0, 3 1532; PPC64LE-NEXT: cmpw 4, 6 1533; PPC64LE-NEXT: bne 0, .LBB92_4 1534; PPC64LE-NEXT: # %bb.2: 1535; PPC64LE-NEXT: sthcx. 5, 0, 3 1536; PPC64LE-NEXT: bne 0, .LBB92_1 1537; PPC64LE-NEXT: # %bb.3: 1538; PPC64LE-NEXT: lwsync 1539; PPC64LE-NEXT: blr 1540; PPC64LE-NEXT: .LBB92_4: 1541; PPC64LE-NEXT: sthcx. 6, 0, 3 1542; PPC64LE-NEXT: lwsync 1543; PPC64LE-NEXT: blr 1544 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") acquire acquire 1545 ret void 1546} 1547 1548define void @test93(i16* %ptr, i16 %cmp, i16 %val) { 1549; PPC64LE-LABEL: test93: 1550; PPC64LE: # %bb.0: 1551; PPC64LE-NEXT: clrlwi 4, 4, 16 1552; PPC64LE-NEXT: lwsync 1553; PPC64LE-NEXT: .LBB93_1: 1554; PPC64LE-NEXT: lharx 6, 0, 3 1555; PPC64LE-NEXT: cmpw 4, 6 1556; PPC64LE-NEXT: bne 0, .LBB93_3 1557; PPC64LE-NEXT: # %bb.2: 1558; PPC64LE-NEXT: sthcx. 5, 0, 3 1559; PPC64LE-NEXT: beqlr 0 1560; PPC64LE-NEXT: b .LBB93_1 1561; PPC64LE-NEXT: .LBB93_3: 1562; PPC64LE-NEXT: sthcx. 6, 0, 3 1563; PPC64LE-NEXT: blr 1564 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") release monotonic 1565 ret void 1566} 1567 1568define void @test94(i16* %ptr, i16 %cmp, i16 %val) { 1569; PPC64LE-LABEL: test94: 1570; PPC64LE: # %bb.0: 1571; PPC64LE-NEXT: clrlwi 4, 4, 16 1572; PPC64LE-NEXT: lwsync 1573; PPC64LE-NEXT: .LBB94_1: 1574; PPC64LE-NEXT: lharx 6, 0, 3 1575; PPC64LE-NEXT: cmpw 4, 6 1576; PPC64LE-NEXT: bne 0, .LBB94_4 1577; PPC64LE-NEXT: # %bb.2: 1578; PPC64LE-NEXT: sthcx. 5, 0, 3 1579; PPC64LE-NEXT: bne 0, .LBB94_1 1580; PPC64LE-NEXT: # %bb.3: 1581; PPC64LE-NEXT: lwsync 1582; PPC64LE-NEXT: blr 1583; PPC64LE-NEXT: .LBB94_4: 1584; PPC64LE-NEXT: sthcx. 6, 0, 3 1585; PPC64LE-NEXT: lwsync 1586; PPC64LE-NEXT: blr 1587 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") release acquire 1588 ret void 1589} 1590 1591define void @test95(i16* %ptr, i16 %cmp, i16 %val) { 1592; PPC64LE-LABEL: test95: 1593; PPC64LE: # %bb.0: 1594; PPC64LE-NEXT: clrlwi 4, 4, 16 1595; PPC64LE-NEXT: lwsync 1596; PPC64LE-NEXT: .LBB95_1: 1597; PPC64LE-NEXT: lharx 6, 0, 3 1598; PPC64LE-NEXT: cmpw 4, 6 1599; PPC64LE-NEXT: bne 0, .LBB95_4 1600; PPC64LE-NEXT: # %bb.2: 1601; PPC64LE-NEXT: sthcx. 5, 0, 3 1602; PPC64LE-NEXT: bne 0, .LBB95_1 1603; PPC64LE-NEXT: # %bb.3: 1604; PPC64LE-NEXT: lwsync 1605; PPC64LE-NEXT: blr 1606; PPC64LE-NEXT: .LBB95_4: 1607; PPC64LE-NEXT: sthcx. 6, 0, 3 1608; PPC64LE-NEXT: lwsync 1609; PPC64LE-NEXT: blr 1610 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") acq_rel monotonic 1611 ret void 1612} 1613 1614define void @test96(i16* %ptr, i16 %cmp, i16 %val) { 1615; PPC64LE-LABEL: test96: 1616; PPC64LE: # %bb.0: 1617; PPC64LE-NEXT: clrlwi 4, 4, 16 1618; PPC64LE-NEXT: lwsync 1619; PPC64LE-NEXT: .LBB96_1: 1620; PPC64LE-NEXT: lharx 6, 0, 3 1621; PPC64LE-NEXT: cmpw 4, 6 1622; PPC64LE-NEXT: bne 0, .LBB96_4 1623; PPC64LE-NEXT: # %bb.2: 1624; PPC64LE-NEXT: sthcx. 5, 0, 3 1625; PPC64LE-NEXT: bne 0, .LBB96_1 1626; PPC64LE-NEXT: # %bb.3: 1627; PPC64LE-NEXT: lwsync 1628; PPC64LE-NEXT: blr 1629; PPC64LE-NEXT: .LBB96_4: 1630; PPC64LE-NEXT: sthcx. 6, 0, 3 1631; PPC64LE-NEXT: lwsync 1632; PPC64LE-NEXT: blr 1633 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") acq_rel acquire 1634 ret void 1635} 1636 1637define void @test97(i16* %ptr, i16 %cmp, i16 %val) { 1638; PPC64LE-LABEL: test97: 1639; PPC64LE: # %bb.0: 1640; PPC64LE-NEXT: clrlwi 4, 4, 16 1641; PPC64LE-NEXT: sync 1642; PPC64LE-NEXT: .LBB97_1: 1643; PPC64LE-NEXT: lharx 6, 0, 3 1644; PPC64LE-NEXT: cmpw 4, 6 1645; PPC64LE-NEXT: bne 0, .LBB97_4 1646; PPC64LE-NEXT: # %bb.2: 1647; PPC64LE-NEXT: sthcx. 5, 0, 3 1648; PPC64LE-NEXT: bne 0, .LBB97_1 1649; PPC64LE-NEXT: # %bb.3: 1650; PPC64LE-NEXT: lwsync 1651; PPC64LE-NEXT: blr 1652; PPC64LE-NEXT: .LBB97_4: 1653; PPC64LE-NEXT: sthcx. 6, 0, 3 1654; PPC64LE-NEXT: lwsync 1655; PPC64LE-NEXT: blr 1656 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") seq_cst monotonic 1657 ret void 1658} 1659 1660define void @test98(i16* %ptr, i16 %cmp, i16 %val) { 1661; PPC64LE-LABEL: test98: 1662; PPC64LE: # %bb.0: 1663; PPC64LE-NEXT: clrlwi 4, 4, 16 1664; PPC64LE-NEXT: sync 1665; PPC64LE-NEXT: .LBB98_1: 1666; PPC64LE-NEXT: lharx 6, 0, 3 1667; PPC64LE-NEXT: cmpw 4, 6 1668; PPC64LE-NEXT: bne 0, .LBB98_4 1669; PPC64LE-NEXT: # %bb.2: 1670; PPC64LE-NEXT: sthcx. 5, 0, 3 1671; PPC64LE-NEXT: bne 0, .LBB98_1 1672; PPC64LE-NEXT: # %bb.3: 1673; PPC64LE-NEXT: lwsync 1674; PPC64LE-NEXT: blr 1675; PPC64LE-NEXT: .LBB98_4: 1676; PPC64LE-NEXT: sthcx. 6, 0, 3 1677; PPC64LE-NEXT: lwsync 1678; PPC64LE-NEXT: blr 1679 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") seq_cst acquire 1680 ret void 1681} 1682 1683define void @test99(i16* %ptr, i16 %cmp, i16 %val) { 1684; PPC64LE-LABEL: test99: 1685; PPC64LE: # %bb.0: 1686; PPC64LE-NEXT: clrlwi 4, 4, 16 1687; PPC64LE-NEXT: sync 1688; PPC64LE-NEXT: .LBB99_1: 1689; PPC64LE-NEXT: lharx 6, 0, 3 1690; PPC64LE-NEXT: cmpw 4, 6 1691; PPC64LE-NEXT: bne 0, .LBB99_4 1692; PPC64LE-NEXT: # %bb.2: 1693; PPC64LE-NEXT: sthcx. 5, 0, 3 1694; PPC64LE-NEXT: bne 0, .LBB99_1 1695; PPC64LE-NEXT: # %bb.3: 1696; PPC64LE-NEXT: lwsync 1697; PPC64LE-NEXT: blr 1698; PPC64LE-NEXT: .LBB99_4: 1699; PPC64LE-NEXT: sthcx. 6, 0, 3 1700; PPC64LE-NEXT: lwsync 1701; PPC64LE-NEXT: blr 1702 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") seq_cst seq_cst 1703 ret void 1704} 1705 1706define void @test100(i32* %ptr, i32 %cmp, i32 %val) { 1707; PPC64LE-LABEL: test100: 1708; PPC64LE: # %bb.0: 1709; PPC64LE-NEXT: .LBB100_1: 1710; PPC64LE-NEXT: lwarx 6, 0, 3 1711; PPC64LE-NEXT: cmpw 4, 6 1712; PPC64LE-NEXT: bne 0, .LBB100_3 1713; PPC64LE-NEXT: # %bb.2: 1714; PPC64LE-NEXT: stwcx. 5, 0, 3 1715; PPC64LE-NEXT: beqlr 0 1716; PPC64LE-NEXT: b .LBB100_1 1717; PPC64LE-NEXT: .LBB100_3: 1718; PPC64LE-NEXT: stwcx. 6, 0, 3 1719; PPC64LE-NEXT: blr 1720 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") monotonic monotonic 1721 ret void 1722} 1723 1724define void @test101(i32* %ptr, i32 %cmp, i32 %val) { 1725; PPC64LE-LABEL: test101: 1726; PPC64LE: # %bb.0: 1727; PPC64LE-NEXT: .LBB101_1: 1728; PPC64LE-NEXT: lwarx 6, 0, 3 1729; PPC64LE-NEXT: cmpw 4, 6 1730; PPC64LE-NEXT: bne 0, .LBB101_4 1731; PPC64LE-NEXT: # %bb.2: 1732; PPC64LE-NEXT: stwcx. 5, 0, 3 1733; PPC64LE-NEXT: bne 0, .LBB101_1 1734; PPC64LE-NEXT: # %bb.3: 1735; PPC64LE-NEXT: lwsync 1736; PPC64LE-NEXT: blr 1737; PPC64LE-NEXT: .LBB101_4: 1738; PPC64LE-NEXT: stwcx. 6, 0, 3 1739; PPC64LE-NEXT: lwsync 1740; PPC64LE-NEXT: blr 1741 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") acquire monotonic 1742 ret void 1743} 1744 1745define void @test102(i32* %ptr, i32 %cmp, i32 %val) { 1746; PPC64LE-LABEL: test102: 1747; PPC64LE: # %bb.0: 1748; PPC64LE-NEXT: .LBB102_1: 1749; PPC64LE-NEXT: lwarx 6, 0, 3 1750; PPC64LE-NEXT: cmpw 4, 6 1751; PPC64LE-NEXT: bne 0, .LBB102_4 1752; PPC64LE-NEXT: # %bb.2: 1753; PPC64LE-NEXT: stwcx. 5, 0, 3 1754; PPC64LE-NEXT: bne 0, .LBB102_1 1755; PPC64LE-NEXT: # %bb.3: 1756; PPC64LE-NEXT: lwsync 1757; PPC64LE-NEXT: blr 1758; PPC64LE-NEXT: .LBB102_4: 1759; PPC64LE-NEXT: stwcx. 6, 0, 3 1760; PPC64LE-NEXT: lwsync 1761; PPC64LE-NEXT: blr 1762 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") acquire acquire 1763 ret void 1764} 1765 1766define void @test103(i32* %ptr, i32 %cmp, i32 %val) { 1767; PPC64LE-LABEL: test103: 1768; PPC64LE: # %bb.0: 1769; PPC64LE-NEXT: lwsync 1770; PPC64LE-NEXT: .LBB103_1: 1771; PPC64LE-NEXT: lwarx 6, 0, 3 1772; PPC64LE-NEXT: cmpw 4, 6 1773; PPC64LE-NEXT: bne 0, .LBB103_3 1774; PPC64LE-NEXT: # %bb.2: 1775; PPC64LE-NEXT: stwcx. 5, 0, 3 1776; PPC64LE-NEXT: beqlr 0 1777; PPC64LE-NEXT: b .LBB103_1 1778; PPC64LE-NEXT: .LBB103_3: 1779; PPC64LE-NEXT: stwcx. 6, 0, 3 1780; PPC64LE-NEXT: blr 1781 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") release monotonic 1782 ret void 1783} 1784 1785define void @test104(i32* %ptr, i32 %cmp, i32 %val) { 1786; PPC64LE-LABEL: test104: 1787; PPC64LE: # %bb.0: 1788; PPC64LE-NEXT: lwsync 1789; PPC64LE-NEXT: .LBB104_1: 1790; PPC64LE-NEXT: lwarx 6, 0, 3 1791; PPC64LE-NEXT: cmpw 4, 6 1792; PPC64LE-NEXT: bne 0, .LBB104_4 1793; PPC64LE-NEXT: # %bb.2: 1794; PPC64LE-NEXT: stwcx. 5, 0, 3 1795; PPC64LE-NEXT: bne 0, .LBB104_1 1796; PPC64LE-NEXT: # %bb.3: 1797; PPC64LE-NEXT: lwsync 1798; PPC64LE-NEXT: blr 1799; PPC64LE-NEXT: .LBB104_4: 1800; PPC64LE-NEXT: stwcx. 6, 0, 3 1801; PPC64LE-NEXT: lwsync 1802; PPC64LE-NEXT: blr 1803 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") release acquire 1804 ret void 1805} 1806 1807define void @test105(i32* %ptr, i32 %cmp, i32 %val) { 1808; PPC64LE-LABEL: test105: 1809; PPC64LE: # %bb.0: 1810; PPC64LE-NEXT: lwsync 1811; PPC64LE-NEXT: .LBB105_1: 1812; PPC64LE-NEXT: lwarx 6, 0, 3 1813; PPC64LE-NEXT: cmpw 4, 6 1814; PPC64LE-NEXT: bne 0, .LBB105_4 1815; PPC64LE-NEXT: # %bb.2: 1816; PPC64LE-NEXT: stwcx. 5, 0, 3 1817; PPC64LE-NEXT: bne 0, .LBB105_1 1818; PPC64LE-NEXT: # %bb.3: 1819; PPC64LE-NEXT: lwsync 1820; PPC64LE-NEXT: blr 1821; PPC64LE-NEXT: .LBB105_4: 1822; PPC64LE-NEXT: stwcx. 6, 0, 3 1823; PPC64LE-NEXT: lwsync 1824; PPC64LE-NEXT: blr 1825 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") acq_rel monotonic 1826 ret void 1827} 1828 1829define void @test106(i32* %ptr, i32 %cmp, i32 %val) { 1830; PPC64LE-LABEL: test106: 1831; PPC64LE: # %bb.0: 1832; PPC64LE-NEXT: lwsync 1833; PPC64LE-NEXT: .LBB106_1: 1834; PPC64LE-NEXT: lwarx 6, 0, 3 1835; PPC64LE-NEXT: cmpw 4, 6 1836; PPC64LE-NEXT: bne 0, .LBB106_4 1837; PPC64LE-NEXT: # %bb.2: 1838; PPC64LE-NEXT: stwcx. 5, 0, 3 1839; PPC64LE-NEXT: bne 0, .LBB106_1 1840; PPC64LE-NEXT: # %bb.3: 1841; PPC64LE-NEXT: lwsync 1842; PPC64LE-NEXT: blr 1843; PPC64LE-NEXT: .LBB106_4: 1844; PPC64LE-NEXT: stwcx. 6, 0, 3 1845; PPC64LE-NEXT: lwsync 1846; PPC64LE-NEXT: blr 1847 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") acq_rel acquire 1848 ret void 1849} 1850 1851define void @test107(i32* %ptr, i32 %cmp, i32 %val) { 1852; PPC64LE-LABEL: test107: 1853; PPC64LE: # %bb.0: 1854; PPC64LE-NEXT: sync 1855; PPC64LE-NEXT: .LBB107_1: 1856; PPC64LE-NEXT: lwarx 6, 0, 3 1857; PPC64LE-NEXT: cmpw 4, 6 1858; PPC64LE-NEXT: bne 0, .LBB107_4 1859; PPC64LE-NEXT: # %bb.2: 1860; PPC64LE-NEXT: stwcx. 5, 0, 3 1861; PPC64LE-NEXT: bne 0, .LBB107_1 1862; PPC64LE-NEXT: # %bb.3: 1863; PPC64LE-NEXT: lwsync 1864; PPC64LE-NEXT: blr 1865; PPC64LE-NEXT: .LBB107_4: 1866; PPC64LE-NEXT: stwcx. 6, 0, 3 1867; PPC64LE-NEXT: lwsync 1868; PPC64LE-NEXT: blr 1869 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") seq_cst monotonic 1870 ret void 1871} 1872 1873define void @test108(i32* %ptr, i32 %cmp, i32 %val) { 1874; PPC64LE-LABEL: test108: 1875; PPC64LE: # %bb.0: 1876; PPC64LE-NEXT: sync 1877; PPC64LE-NEXT: .LBB108_1: 1878; PPC64LE-NEXT: lwarx 6, 0, 3 1879; PPC64LE-NEXT: cmpw 4, 6 1880; PPC64LE-NEXT: bne 0, .LBB108_4 1881; PPC64LE-NEXT: # %bb.2: 1882; PPC64LE-NEXT: stwcx. 5, 0, 3 1883; PPC64LE-NEXT: bne 0, .LBB108_1 1884; PPC64LE-NEXT: # %bb.3: 1885; PPC64LE-NEXT: lwsync 1886; PPC64LE-NEXT: blr 1887; PPC64LE-NEXT: .LBB108_4: 1888; PPC64LE-NEXT: stwcx. 6, 0, 3 1889; PPC64LE-NEXT: lwsync 1890; PPC64LE-NEXT: blr 1891 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") seq_cst acquire 1892 ret void 1893} 1894 1895define void @test109(i32* %ptr, i32 %cmp, i32 %val) { 1896; PPC64LE-LABEL: test109: 1897; PPC64LE: # %bb.0: 1898; PPC64LE-NEXT: sync 1899; PPC64LE-NEXT: .LBB109_1: 1900; PPC64LE-NEXT: lwarx 6, 0, 3 1901; PPC64LE-NEXT: cmpw 4, 6 1902; PPC64LE-NEXT: bne 0, .LBB109_4 1903; PPC64LE-NEXT: # %bb.2: 1904; PPC64LE-NEXT: stwcx. 5, 0, 3 1905; PPC64LE-NEXT: bne 0, .LBB109_1 1906; PPC64LE-NEXT: # %bb.3: 1907; PPC64LE-NEXT: lwsync 1908; PPC64LE-NEXT: blr 1909; PPC64LE-NEXT: .LBB109_4: 1910; PPC64LE-NEXT: stwcx. 6, 0, 3 1911; PPC64LE-NEXT: lwsync 1912; PPC64LE-NEXT: blr 1913 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") seq_cst seq_cst 1914 ret void 1915} 1916 1917define void @test110(i64* %ptr, i64 %cmp, i64 %val) { 1918; PPC64LE-LABEL: test110: 1919; PPC64LE: # %bb.0: 1920; PPC64LE-NEXT: .LBB110_1: 1921; PPC64LE-NEXT: ldarx 6, 0, 3 1922; PPC64LE-NEXT: cmpd 4, 6 1923; PPC64LE-NEXT: bne 0, .LBB110_3 1924; PPC64LE-NEXT: # %bb.2: 1925; PPC64LE-NEXT: stdcx. 5, 0, 3 1926; PPC64LE-NEXT: beqlr 0 1927; PPC64LE-NEXT: b .LBB110_1 1928; PPC64LE-NEXT: .LBB110_3: 1929; PPC64LE-NEXT: stdcx. 6, 0, 3 1930; PPC64LE-NEXT: blr 1931 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") monotonic monotonic 1932 ret void 1933} 1934 1935define void @test111(i64* %ptr, i64 %cmp, i64 %val) { 1936; PPC64LE-LABEL: test111: 1937; PPC64LE: # %bb.0: 1938; PPC64LE-NEXT: .LBB111_1: 1939; PPC64LE-NEXT: ldarx 6, 0, 3 1940; PPC64LE-NEXT: cmpd 4, 6 1941; PPC64LE-NEXT: bne 0, .LBB111_4 1942; PPC64LE-NEXT: # %bb.2: 1943; PPC64LE-NEXT: stdcx. 5, 0, 3 1944; PPC64LE-NEXT: bne 0, .LBB111_1 1945; PPC64LE-NEXT: # %bb.3: 1946; PPC64LE-NEXT: lwsync 1947; PPC64LE-NEXT: blr 1948; PPC64LE-NEXT: .LBB111_4: 1949; PPC64LE-NEXT: stdcx. 6, 0, 3 1950; PPC64LE-NEXT: lwsync 1951; PPC64LE-NEXT: blr 1952 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") acquire monotonic 1953 ret void 1954} 1955 1956define void @test112(i64* %ptr, i64 %cmp, i64 %val) { 1957; PPC64LE-LABEL: test112: 1958; PPC64LE: # %bb.0: 1959; PPC64LE-NEXT: .LBB112_1: 1960; PPC64LE-NEXT: ldarx 6, 0, 3 1961; PPC64LE-NEXT: cmpd 4, 6 1962; PPC64LE-NEXT: bne 0, .LBB112_4 1963; PPC64LE-NEXT: # %bb.2: 1964; PPC64LE-NEXT: stdcx. 5, 0, 3 1965; PPC64LE-NEXT: bne 0, .LBB112_1 1966; PPC64LE-NEXT: # %bb.3: 1967; PPC64LE-NEXT: lwsync 1968; PPC64LE-NEXT: blr 1969; PPC64LE-NEXT: .LBB112_4: 1970; PPC64LE-NEXT: stdcx. 6, 0, 3 1971; PPC64LE-NEXT: lwsync 1972; PPC64LE-NEXT: blr 1973 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") acquire acquire 1974 ret void 1975} 1976 1977define void @test113(i64* %ptr, i64 %cmp, i64 %val) { 1978; PPC64LE-LABEL: test113: 1979; PPC64LE: # %bb.0: 1980; PPC64LE-NEXT: lwsync 1981; PPC64LE-NEXT: .LBB113_1: 1982; PPC64LE-NEXT: ldarx 6, 0, 3 1983; PPC64LE-NEXT: cmpd 4, 6 1984; PPC64LE-NEXT: bne 0, .LBB113_3 1985; PPC64LE-NEXT: # %bb.2: 1986; PPC64LE-NEXT: stdcx. 5, 0, 3 1987; PPC64LE-NEXT: beqlr 0 1988; PPC64LE-NEXT: b .LBB113_1 1989; PPC64LE-NEXT: .LBB113_3: 1990; PPC64LE-NEXT: stdcx. 6, 0, 3 1991; PPC64LE-NEXT: blr 1992 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") release monotonic 1993 ret void 1994} 1995 1996define void @test114(i64* %ptr, i64 %cmp, i64 %val) { 1997; PPC64LE-LABEL: test114: 1998; PPC64LE: # %bb.0: 1999; PPC64LE-NEXT: lwsync 2000; PPC64LE-NEXT: .LBB114_1: 2001; PPC64LE-NEXT: ldarx 6, 0, 3 2002; PPC64LE-NEXT: cmpd 4, 6 2003; PPC64LE-NEXT: bne 0, .LBB114_4 2004; PPC64LE-NEXT: # %bb.2: 2005; PPC64LE-NEXT: stdcx. 5, 0, 3 2006; PPC64LE-NEXT: bne 0, .LBB114_1 2007; PPC64LE-NEXT: # %bb.3: 2008; PPC64LE-NEXT: lwsync 2009; PPC64LE-NEXT: blr 2010; PPC64LE-NEXT: .LBB114_4: 2011; PPC64LE-NEXT: stdcx. 6, 0, 3 2012; PPC64LE-NEXT: lwsync 2013; PPC64LE-NEXT: blr 2014 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") release acquire 2015 ret void 2016} 2017 2018define void @test115(i64* %ptr, i64 %cmp, i64 %val) { 2019; PPC64LE-LABEL: test115: 2020; PPC64LE: # %bb.0: 2021; PPC64LE-NEXT: lwsync 2022; PPC64LE-NEXT: .LBB115_1: 2023; PPC64LE-NEXT: ldarx 6, 0, 3 2024; PPC64LE-NEXT: cmpd 4, 6 2025; PPC64LE-NEXT: bne 0, .LBB115_4 2026; PPC64LE-NEXT: # %bb.2: 2027; PPC64LE-NEXT: stdcx. 5, 0, 3 2028; PPC64LE-NEXT: bne 0, .LBB115_1 2029; PPC64LE-NEXT: # %bb.3: 2030; PPC64LE-NEXT: lwsync 2031; PPC64LE-NEXT: blr 2032; PPC64LE-NEXT: .LBB115_4: 2033; PPC64LE-NEXT: stdcx. 6, 0, 3 2034; PPC64LE-NEXT: lwsync 2035; PPC64LE-NEXT: blr 2036 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") acq_rel monotonic 2037 ret void 2038} 2039 2040define void @test116(i64* %ptr, i64 %cmp, i64 %val) { 2041; PPC64LE-LABEL: test116: 2042; PPC64LE: # %bb.0: 2043; PPC64LE-NEXT: lwsync 2044; PPC64LE-NEXT: .LBB116_1: 2045; PPC64LE-NEXT: ldarx 6, 0, 3 2046; PPC64LE-NEXT: cmpd 4, 6 2047; PPC64LE-NEXT: bne 0, .LBB116_4 2048; PPC64LE-NEXT: # %bb.2: 2049; PPC64LE-NEXT: stdcx. 5, 0, 3 2050; PPC64LE-NEXT: bne 0, .LBB116_1 2051; PPC64LE-NEXT: # %bb.3: 2052; PPC64LE-NEXT: lwsync 2053; PPC64LE-NEXT: blr 2054; PPC64LE-NEXT: .LBB116_4: 2055; PPC64LE-NEXT: stdcx. 6, 0, 3 2056; PPC64LE-NEXT: lwsync 2057; PPC64LE-NEXT: blr 2058 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") acq_rel acquire 2059 ret void 2060} 2061 2062define void @test117(i64* %ptr, i64 %cmp, i64 %val) { 2063; PPC64LE-LABEL: test117: 2064; PPC64LE: # %bb.0: 2065; PPC64LE-NEXT: sync 2066; PPC64LE-NEXT: .LBB117_1: 2067; PPC64LE-NEXT: ldarx 6, 0, 3 2068; PPC64LE-NEXT: cmpd 4, 6 2069; PPC64LE-NEXT: bne 0, .LBB117_4 2070; PPC64LE-NEXT: # %bb.2: 2071; PPC64LE-NEXT: stdcx. 5, 0, 3 2072; PPC64LE-NEXT: bne 0, .LBB117_1 2073; PPC64LE-NEXT: # %bb.3: 2074; PPC64LE-NEXT: lwsync 2075; PPC64LE-NEXT: blr 2076; PPC64LE-NEXT: .LBB117_4: 2077; PPC64LE-NEXT: stdcx. 6, 0, 3 2078; PPC64LE-NEXT: lwsync 2079; PPC64LE-NEXT: blr 2080 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") seq_cst monotonic 2081 ret void 2082} 2083 2084define void @test118(i64* %ptr, i64 %cmp, i64 %val) { 2085; PPC64LE-LABEL: test118: 2086; PPC64LE: # %bb.0: 2087; PPC64LE-NEXT: sync 2088; PPC64LE-NEXT: .LBB118_1: 2089; PPC64LE-NEXT: ldarx 6, 0, 3 2090; PPC64LE-NEXT: cmpd 4, 6 2091; PPC64LE-NEXT: bne 0, .LBB118_4 2092; PPC64LE-NEXT: # %bb.2: 2093; PPC64LE-NEXT: stdcx. 5, 0, 3 2094; PPC64LE-NEXT: bne 0, .LBB118_1 2095; PPC64LE-NEXT: # %bb.3: 2096; PPC64LE-NEXT: lwsync 2097; PPC64LE-NEXT: blr 2098; PPC64LE-NEXT: .LBB118_4: 2099; PPC64LE-NEXT: stdcx. 6, 0, 3 2100; PPC64LE-NEXT: lwsync 2101; PPC64LE-NEXT: blr 2102 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") seq_cst acquire 2103 ret void 2104} 2105 2106define void @test119(i64* %ptr, i64 %cmp, i64 %val) { 2107; PPC64LE-LABEL: test119: 2108; PPC64LE: # %bb.0: 2109; PPC64LE-NEXT: sync 2110; PPC64LE-NEXT: .LBB119_1: 2111; PPC64LE-NEXT: ldarx 6, 0, 3 2112; PPC64LE-NEXT: cmpd 4, 6 2113; PPC64LE-NEXT: bne 0, .LBB119_4 2114; PPC64LE-NEXT: # %bb.2: 2115; PPC64LE-NEXT: stdcx. 5, 0, 3 2116; PPC64LE-NEXT: bne 0, .LBB119_1 2117; PPC64LE-NEXT: # %bb.3: 2118; PPC64LE-NEXT: lwsync 2119; PPC64LE-NEXT: blr 2120; PPC64LE-NEXT: .LBB119_4: 2121; PPC64LE-NEXT: stdcx. 6, 0, 3 2122; PPC64LE-NEXT: lwsync 2123; PPC64LE-NEXT: blr 2124 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") seq_cst seq_cst 2125 ret void 2126} 2127 2128define i8 @test120(i8* %ptr, i8 %val) { 2129; PPC64LE-LABEL: test120: 2130; PPC64LE: # %bb.0: 2131; PPC64LE-NEXT: .LBB120_1: 2132; PPC64LE-NEXT: lbarx 5, 0, 3 2133; PPC64LE-NEXT: stbcx. 4, 0, 3 2134; PPC64LE-NEXT: bne 0, .LBB120_1 2135; PPC64LE-NEXT: # %bb.2: 2136; PPC64LE-NEXT: mr 3, 5 2137; PPC64LE-NEXT: blr 2138 %ret = atomicrmw xchg i8* %ptr, i8 %val monotonic 2139 ret i8 %ret 2140} 2141 2142define i8 @test121(i8* %ptr, i8 %val) { 2143; PPC64LE-LABEL: test121: 2144; PPC64LE: # %bb.0: 2145; PPC64LE-NEXT: mr 5, 3 2146; PPC64LE-NEXT: .LBB121_1: 2147; PPC64LE-NEXT: lbarx 3, 0, 5 2148; PPC64LE-NEXT: stbcx. 4, 0, 5 2149; PPC64LE-NEXT: bne 0, .LBB121_1 2150; PPC64LE-NEXT: # %bb.2: 2151; PPC64LE-NEXT: lwsync 2152; PPC64LE-NEXT: blr 2153 %ret = atomicrmw xchg i8* %ptr, i8 %val acquire 2154 ret i8 %ret 2155} 2156 2157define i8 @test122(i8* %ptr, i8 %val) { 2158; PPC64LE-LABEL: test122: 2159; PPC64LE: # %bb.0: 2160; PPC64LE-NEXT: lwsync 2161; PPC64LE-NEXT: .LBB122_1: 2162; PPC64LE-NEXT: lbarx 5, 0, 3 2163; PPC64LE-NEXT: stbcx. 4, 0, 3 2164; PPC64LE-NEXT: bne 0, .LBB122_1 2165; PPC64LE-NEXT: # %bb.2: 2166; PPC64LE-NEXT: mr 3, 5 2167; PPC64LE-NEXT: blr 2168 %ret = atomicrmw xchg i8* %ptr, i8 %val release 2169 ret i8 %ret 2170} 2171 2172define i8 @test123(i8* %ptr, i8 %val) { 2173; PPC64LE-LABEL: test123: 2174; PPC64LE: # %bb.0: 2175; PPC64LE-NEXT: lwsync 2176; PPC64LE-NEXT: .LBB123_1: 2177; PPC64LE-NEXT: lbarx 5, 0, 3 2178; PPC64LE-NEXT: stbcx. 4, 0, 3 2179; PPC64LE-NEXT: bne 0, .LBB123_1 2180; PPC64LE-NEXT: # %bb.2: 2181; PPC64LE-NEXT: mr 3, 5 2182; PPC64LE-NEXT: lwsync 2183; PPC64LE-NEXT: blr 2184 %ret = atomicrmw xchg i8* %ptr, i8 %val acq_rel 2185 ret i8 %ret 2186} 2187 2188define i8 @test124(i8* %ptr, i8 %val) { 2189; PPC64LE-LABEL: test124: 2190; PPC64LE: # %bb.0: 2191; PPC64LE-NEXT: sync 2192; PPC64LE-NEXT: .LBB124_1: 2193; PPC64LE-NEXT: lbarx 5, 0, 3 2194; PPC64LE-NEXT: stbcx. 4, 0, 3 2195; PPC64LE-NEXT: bne 0, .LBB124_1 2196; PPC64LE-NEXT: # %bb.2: 2197; PPC64LE-NEXT: mr 3, 5 2198; PPC64LE-NEXT: lwsync 2199; PPC64LE-NEXT: blr 2200 %ret = atomicrmw xchg i8* %ptr, i8 %val seq_cst 2201 ret i8 %ret 2202} 2203 2204define i16 @test125(i16* %ptr, i16 %val) { 2205; PPC64LE-LABEL: test125: 2206; PPC64LE: # %bb.0: 2207; PPC64LE-NEXT: .LBB125_1: 2208; PPC64LE-NEXT: lharx 5, 0, 3 2209; PPC64LE-NEXT: sthcx. 4, 0, 3 2210; PPC64LE-NEXT: bne 0, .LBB125_1 2211; PPC64LE-NEXT: # %bb.2: 2212; PPC64LE-NEXT: mr 3, 5 2213; PPC64LE-NEXT: blr 2214 %ret = atomicrmw xchg i16* %ptr, i16 %val monotonic 2215 ret i16 %ret 2216} 2217 2218define i16 @test126(i16* %ptr, i16 %val) { 2219; PPC64LE-LABEL: test126: 2220; PPC64LE: # %bb.0: 2221; PPC64LE-NEXT: mr 5, 3 2222; PPC64LE-NEXT: .LBB126_1: 2223; PPC64LE-NEXT: lharx 3, 0, 5 2224; PPC64LE-NEXT: sthcx. 4, 0, 5 2225; PPC64LE-NEXT: bne 0, .LBB126_1 2226; PPC64LE-NEXT: # %bb.2: 2227; PPC64LE-NEXT: lwsync 2228; PPC64LE-NEXT: blr 2229 %ret = atomicrmw xchg i16* %ptr, i16 %val acquire 2230 ret i16 %ret 2231} 2232 2233define i16 @test127(i16* %ptr, i16 %val) { 2234; PPC64LE-LABEL: test127: 2235; PPC64LE: # %bb.0: 2236; PPC64LE-NEXT: lwsync 2237; PPC64LE-NEXT: .LBB127_1: 2238; PPC64LE-NEXT: lharx 5, 0, 3 2239; PPC64LE-NEXT: sthcx. 4, 0, 3 2240; PPC64LE-NEXT: bne 0, .LBB127_1 2241; PPC64LE-NEXT: # %bb.2: 2242; PPC64LE-NEXT: mr 3, 5 2243; PPC64LE-NEXT: blr 2244 %ret = atomicrmw xchg i16* %ptr, i16 %val release 2245 ret i16 %ret 2246} 2247 2248define i16 @test128(i16* %ptr, i16 %val) { 2249; PPC64LE-LABEL: test128: 2250; PPC64LE: # %bb.0: 2251; PPC64LE-NEXT: lwsync 2252; PPC64LE-NEXT: .LBB128_1: 2253; PPC64LE-NEXT: lharx 5, 0, 3 2254; PPC64LE-NEXT: sthcx. 4, 0, 3 2255; PPC64LE-NEXT: bne 0, .LBB128_1 2256; PPC64LE-NEXT: # %bb.2: 2257; PPC64LE-NEXT: mr 3, 5 2258; PPC64LE-NEXT: lwsync 2259; PPC64LE-NEXT: blr 2260 %ret = atomicrmw xchg i16* %ptr, i16 %val acq_rel 2261 ret i16 %ret 2262} 2263 2264define i16 @test129(i16* %ptr, i16 %val) { 2265; PPC64LE-LABEL: test129: 2266; PPC64LE: # %bb.0: 2267; PPC64LE-NEXT: sync 2268; PPC64LE-NEXT: .LBB129_1: 2269; PPC64LE-NEXT: lharx 5, 0, 3 2270; PPC64LE-NEXT: sthcx. 4, 0, 3 2271; PPC64LE-NEXT: bne 0, .LBB129_1 2272; PPC64LE-NEXT: # %bb.2: 2273; PPC64LE-NEXT: mr 3, 5 2274; PPC64LE-NEXT: lwsync 2275; PPC64LE-NEXT: blr 2276 %ret = atomicrmw xchg i16* %ptr, i16 %val seq_cst 2277 ret i16 %ret 2278} 2279 2280define i32 @test130(i32* %ptr, i32 %val) { 2281; PPC64LE-LABEL: test130: 2282; PPC64LE: # %bb.0: 2283; PPC64LE-NEXT: .LBB130_1: 2284; PPC64LE-NEXT: lwarx 5, 0, 3 2285; PPC64LE-NEXT: stwcx. 4, 0, 3 2286; PPC64LE-NEXT: bne 0, .LBB130_1 2287; PPC64LE-NEXT: # %bb.2: 2288; PPC64LE-NEXT: mr 3, 5 2289; PPC64LE-NEXT: blr 2290 %ret = atomicrmw xchg i32* %ptr, i32 %val monotonic 2291 ret i32 %ret 2292} 2293 2294define i32 @test131(i32* %ptr, i32 %val) { 2295; PPC64LE-LABEL: test131: 2296; PPC64LE: # %bb.0: 2297; PPC64LE-NEXT: mr 5, 3 2298; PPC64LE-NEXT: .LBB131_1: 2299; PPC64LE-NEXT: lwarx 3, 0, 5 2300; PPC64LE-NEXT: stwcx. 4, 0, 5 2301; PPC64LE-NEXT: bne 0, .LBB131_1 2302; PPC64LE-NEXT: # %bb.2: 2303; PPC64LE-NEXT: lwsync 2304; PPC64LE-NEXT: blr 2305 %ret = atomicrmw xchg i32* %ptr, i32 %val acquire 2306 ret i32 %ret 2307} 2308 2309define i32 @test132(i32* %ptr, i32 %val) { 2310; PPC64LE-LABEL: test132: 2311; PPC64LE: # %bb.0: 2312; PPC64LE-NEXT: lwsync 2313; PPC64LE-NEXT: .LBB132_1: 2314; PPC64LE-NEXT: lwarx 5, 0, 3 2315; PPC64LE-NEXT: stwcx. 4, 0, 3 2316; PPC64LE-NEXT: bne 0, .LBB132_1 2317; PPC64LE-NEXT: # %bb.2: 2318; PPC64LE-NEXT: mr 3, 5 2319; PPC64LE-NEXT: blr 2320 %ret = atomicrmw xchg i32* %ptr, i32 %val release 2321 ret i32 %ret 2322} 2323 2324define i32 @test133(i32* %ptr, i32 %val) { 2325; PPC64LE-LABEL: test133: 2326; PPC64LE: # %bb.0: 2327; PPC64LE-NEXT: lwsync 2328; PPC64LE-NEXT: .LBB133_1: 2329; PPC64LE-NEXT: lwarx 5, 0, 3 2330; PPC64LE-NEXT: stwcx. 4, 0, 3 2331; PPC64LE-NEXT: bne 0, .LBB133_1 2332; PPC64LE-NEXT: # %bb.2: 2333; PPC64LE-NEXT: mr 3, 5 2334; PPC64LE-NEXT: lwsync 2335; PPC64LE-NEXT: blr 2336 %ret = atomicrmw xchg i32* %ptr, i32 %val acq_rel 2337 ret i32 %ret 2338} 2339 2340define i32 @test134(i32* %ptr, i32 %val) { 2341; PPC64LE-LABEL: test134: 2342; PPC64LE: # %bb.0: 2343; PPC64LE-NEXT: sync 2344; PPC64LE-NEXT: .LBB134_1: 2345; PPC64LE-NEXT: lwarx 5, 0, 3 2346; PPC64LE-NEXT: stwcx. 4, 0, 3 2347; PPC64LE-NEXT: bne 0, .LBB134_1 2348; PPC64LE-NEXT: # %bb.2: 2349; PPC64LE-NEXT: mr 3, 5 2350; PPC64LE-NEXT: lwsync 2351; PPC64LE-NEXT: blr 2352 %ret = atomicrmw xchg i32* %ptr, i32 %val seq_cst 2353 ret i32 %ret 2354} 2355 2356define i64 @test135(i64* %ptr, i64 %val) { 2357; PPC64LE-LABEL: test135: 2358; PPC64LE: # %bb.0: 2359; PPC64LE-NEXT: .LBB135_1: 2360; PPC64LE-NEXT: ldarx 5, 0, 3 2361; PPC64LE-NEXT: stdcx. 4, 0, 3 2362; PPC64LE-NEXT: bne 0, .LBB135_1 2363; PPC64LE-NEXT: # %bb.2: 2364; PPC64LE-NEXT: mr 3, 5 2365; PPC64LE-NEXT: blr 2366 %ret = atomicrmw xchg i64* %ptr, i64 %val monotonic 2367 ret i64 %ret 2368} 2369 2370define i64 @test136(i64* %ptr, i64 %val) { 2371; PPC64LE-LABEL: test136: 2372; PPC64LE: # %bb.0: 2373; PPC64LE-NEXT: mr 5, 3 2374; PPC64LE-NEXT: .LBB136_1: 2375; PPC64LE-NEXT: ldarx 3, 0, 5 2376; PPC64LE-NEXT: stdcx. 4, 0, 5 2377; PPC64LE-NEXT: bne 0, .LBB136_1 2378; PPC64LE-NEXT: # %bb.2: 2379; PPC64LE-NEXT: lwsync 2380; PPC64LE-NEXT: blr 2381 %ret = atomicrmw xchg i64* %ptr, i64 %val acquire 2382 ret i64 %ret 2383} 2384 2385define i64 @test137(i64* %ptr, i64 %val) { 2386; PPC64LE-LABEL: test137: 2387; PPC64LE: # %bb.0: 2388; PPC64LE-NEXT: lwsync 2389; PPC64LE-NEXT: .LBB137_1: 2390; PPC64LE-NEXT: ldarx 5, 0, 3 2391; PPC64LE-NEXT: stdcx. 4, 0, 3 2392; PPC64LE-NEXT: bne 0, .LBB137_1 2393; PPC64LE-NEXT: # %bb.2: 2394; PPC64LE-NEXT: mr 3, 5 2395; PPC64LE-NEXT: blr 2396 %ret = atomicrmw xchg i64* %ptr, i64 %val release 2397 ret i64 %ret 2398} 2399 2400define i64 @test138(i64* %ptr, i64 %val) { 2401; PPC64LE-LABEL: test138: 2402; PPC64LE: # %bb.0: 2403; PPC64LE-NEXT: lwsync 2404; PPC64LE-NEXT: .LBB138_1: 2405; PPC64LE-NEXT: ldarx 5, 0, 3 2406; PPC64LE-NEXT: stdcx. 4, 0, 3 2407; PPC64LE-NEXT: bne 0, .LBB138_1 2408; PPC64LE-NEXT: # %bb.2: 2409; PPC64LE-NEXT: mr 3, 5 2410; PPC64LE-NEXT: lwsync 2411; PPC64LE-NEXT: blr 2412 %ret = atomicrmw xchg i64* %ptr, i64 %val acq_rel 2413 ret i64 %ret 2414} 2415 2416define i64 @test139(i64* %ptr, i64 %val) { 2417; PPC64LE-LABEL: test139: 2418; PPC64LE: # %bb.0: 2419; PPC64LE-NEXT: sync 2420; PPC64LE-NEXT: .LBB139_1: 2421; PPC64LE-NEXT: ldarx 5, 0, 3 2422; PPC64LE-NEXT: stdcx. 4, 0, 3 2423; PPC64LE-NEXT: bne 0, .LBB139_1 2424; PPC64LE-NEXT: # %bb.2: 2425; PPC64LE-NEXT: mr 3, 5 2426; PPC64LE-NEXT: lwsync 2427; PPC64LE-NEXT: blr 2428 %ret = atomicrmw xchg i64* %ptr, i64 %val seq_cst 2429 ret i64 %ret 2430} 2431 2432define i8 @test140(i8* %ptr, i8 %val) { 2433; PPC64LE-LABEL: test140: 2434; PPC64LE: # %bb.0: 2435; PPC64LE-NEXT: .LBB140_1: 2436; PPC64LE-NEXT: lbarx 5, 0, 3 2437; PPC64LE-NEXT: add 6, 4, 5 2438; PPC64LE-NEXT: stbcx. 6, 0, 3 2439; PPC64LE-NEXT: bne 0, .LBB140_1 2440; PPC64LE-NEXT: # %bb.2: 2441; PPC64LE-NEXT: mr 3, 5 2442; PPC64LE-NEXT: blr 2443 %ret = atomicrmw add i8* %ptr, i8 %val monotonic 2444 ret i8 %ret 2445} 2446 2447define i8 @test141(i8* %ptr, i8 %val) { 2448; PPC64LE-LABEL: test141: 2449; PPC64LE: # %bb.0: 2450; PPC64LE-NEXT: mr 5, 3 2451; PPC64LE-NEXT: .LBB141_1: 2452; PPC64LE-NEXT: lbarx 3, 0, 5 2453; PPC64LE-NEXT: add 6, 4, 3 2454; PPC64LE-NEXT: stbcx. 6, 0, 5 2455; PPC64LE-NEXT: bne 0, .LBB141_1 2456; PPC64LE-NEXT: # %bb.2: 2457; PPC64LE-NEXT: lwsync 2458; PPC64LE-NEXT: blr 2459 %ret = atomicrmw add i8* %ptr, i8 %val acquire 2460 ret i8 %ret 2461} 2462 2463define i8 @test142(i8* %ptr, i8 %val) { 2464; PPC64LE-LABEL: test142: 2465; PPC64LE: # %bb.0: 2466; PPC64LE-NEXT: lwsync 2467; PPC64LE-NEXT: .LBB142_1: 2468; PPC64LE-NEXT: lbarx 5, 0, 3 2469; PPC64LE-NEXT: add 6, 4, 5 2470; PPC64LE-NEXT: stbcx. 6, 0, 3 2471; PPC64LE-NEXT: bne 0, .LBB142_1 2472; PPC64LE-NEXT: # %bb.2: 2473; PPC64LE-NEXT: mr 3, 5 2474; PPC64LE-NEXT: blr 2475 %ret = atomicrmw add i8* %ptr, i8 %val release 2476 ret i8 %ret 2477} 2478 2479define i8 @test143(i8* %ptr, i8 %val) { 2480; PPC64LE-LABEL: test143: 2481; PPC64LE: # %bb.0: 2482; PPC64LE-NEXT: lwsync 2483; PPC64LE-NEXT: .LBB143_1: 2484; PPC64LE-NEXT: lbarx 5, 0, 3 2485; PPC64LE-NEXT: add 6, 4, 5 2486; PPC64LE-NEXT: stbcx. 6, 0, 3 2487; PPC64LE-NEXT: bne 0, .LBB143_1 2488; PPC64LE-NEXT: # %bb.2: 2489; PPC64LE-NEXT: mr 3, 5 2490; PPC64LE-NEXT: lwsync 2491; PPC64LE-NEXT: blr 2492 %ret = atomicrmw add i8* %ptr, i8 %val acq_rel 2493 ret i8 %ret 2494} 2495 2496define i8 @test144(i8* %ptr, i8 %val) { 2497; PPC64LE-LABEL: test144: 2498; PPC64LE: # %bb.0: 2499; PPC64LE-NEXT: sync 2500; PPC64LE-NEXT: .LBB144_1: 2501; PPC64LE-NEXT: lbarx 5, 0, 3 2502; PPC64LE-NEXT: add 6, 4, 5 2503; PPC64LE-NEXT: stbcx. 6, 0, 3 2504; PPC64LE-NEXT: bne 0, .LBB144_1 2505; PPC64LE-NEXT: # %bb.2: 2506; PPC64LE-NEXT: mr 3, 5 2507; PPC64LE-NEXT: lwsync 2508; PPC64LE-NEXT: blr 2509 %ret = atomicrmw add i8* %ptr, i8 %val seq_cst 2510 ret i8 %ret 2511} 2512 2513define i16 @test145(i16* %ptr, i16 %val) { 2514; PPC64LE-LABEL: test145: 2515; PPC64LE: # %bb.0: 2516; PPC64LE-NEXT: .LBB145_1: 2517; PPC64LE-NEXT: lharx 5, 0, 3 2518; PPC64LE-NEXT: add 6, 4, 5 2519; PPC64LE-NEXT: sthcx. 6, 0, 3 2520; PPC64LE-NEXT: bne 0, .LBB145_1 2521; PPC64LE-NEXT: # %bb.2: 2522; PPC64LE-NEXT: mr 3, 5 2523; PPC64LE-NEXT: blr 2524 %ret = atomicrmw add i16* %ptr, i16 %val monotonic 2525 ret i16 %ret 2526} 2527 2528define i16 @test146(i16* %ptr, i16 %val) { 2529; PPC64LE-LABEL: test146: 2530; PPC64LE: # %bb.0: 2531; PPC64LE-NEXT: mr 5, 3 2532; PPC64LE-NEXT: .LBB146_1: 2533; PPC64LE-NEXT: lharx 3, 0, 5 2534; PPC64LE-NEXT: add 6, 4, 3 2535; PPC64LE-NEXT: sthcx. 6, 0, 5 2536; PPC64LE-NEXT: bne 0, .LBB146_1 2537; PPC64LE-NEXT: # %bb.2: 2538; PPC64LE-NEXT: lwsync 2539; PPC64LE-NEXT: blr 2540 %ret = atomicrmw add i16* %ptr, i16 %val acquire 2541 ret i16 %ret 2542} 2543 2544define i16 @test147(i16* %ptr, i16 %val) { 2545; PPC64LE-LABEL: test147: 2546; PPC64LE: # %bb.0: 2547; PPC64LE-NEXT: lwsync 2548; PPC64LE-NEXT: .LBB147_1: 2549; PPC64LE-NEXT: lharx 5, 0, 3 2550; PPC64LE-NEXT: add 6, 4, 5 2551; PPC64LE-NEXT: sthcx. 6, 0, 3 2552; PPC64LE-NEXT: bne 0, .LBB147_1 2553; PPC64LE-NEXT: # %bb.2: 2554; PPC64LE-NEXT: mr 3, 5 2555; PPC64LE-NEXT: blr 2556 %ret = atomicrmw add i16* %ptr, i16 %val release 2557 ret i16 %ret 2558} 2559 2560define i16 @test148(i16* %ptr, i16 %val) { 2561; PPC64LE-LABEL: test148: 2562; PPC64LE: # %bb.0: 2563; PPC64LE-NEXT: lwsync 2564; PPC64LE-NEXT: .LBB148_1: 2565; PPC64LE-NEXT: lharx 5, 0, 3 2566; PPC64LE-NEXT: add 6, 4, 5 2567; PPC64LE-NEXT: sthcx. 6, 0, 3 2568; PPC64LE-NEXT: bne 0, .LBB148_1 2569; PPC64LE-NEXT: # %bb.2: 2570; PPC64LE-NEXT: mr 3, 5 2571; PPC64LE-NEXT: lwsync 2572; PPC64LE-NEXT: blr 2573 %ret = atomicrmw add i16* %ptr, i16 %val acq_rel 2574 ret i16 %ret 2575} 2576 2577define i16 @test149(i16* %ptr, i16 %val) { 2578; PPC64LE-LABEL: test149: 2579; PPC64LE: # %bb.0: 2580; PPC64LE-NEXT: sync 2581; PPC64LE-NEXT: .LBB149_1: 2582; PPC64LE-NEXT: lharx 5, 0, 3 2583; PPC64LE-NEXT: add 6, 4, 5 2584; PPC64LE-NEXT: sthcx. 6, 0, 3 2585; PPC64LE-NEXT: bne 0, .LBB149_1 2586; PPC64LE-NEXT: # %bb.2: 2587; PPC64LE-NEXT: mr 3, 5 2588; PPC64LE-NEXT: lwsync 2589; PPC64LE-NEXT: blr 2590 %ret = atomicrmw add i16* %ptr, i16 %val seq_cst 2591 ret i16 %ret 2592} 2593 2594define i32 @test150(i32* %ptr, i32 %val) { 2595; PPC64LE-LABEL: test150: 2596; PPC64LE: # %bb.0: 2597; PPC64LE-NEXT: .LBB150_1: 2598; PPC64LE-NEXT: lwarx 5, 0, 3 2599; PPC64LE-NEXT: add 6, 4, 5 2600; PPC64LE-NEXT: stwcx. 6, 0, 3 2601; PPC64LE-NEXT: bne 0, .LBB150_1 2602; PPC64LE-NEXT: # %bb.2: 2603; PPC64LE-NEXT: mr 3, 5 2604; PPC64LE-NEXT: blr 2605 %ret = atomicrmw add i32* %ptr, i32 %val monotonic 2606 ret i32 %ret 2607} 2608 2609define i32 @test151(i32* %ptr, i32 %val) { 2610; PPC64LE-LABEL: test151: 2611; PPC64LE: # %bb.0: 2612; PPC64LE-NEXT: mr 5, 3 2613; PPC64LE-NEXT: .LBB151_1: 2614; PPC64LE-NEXT: lwarx 3, 0, 5 2615; PPC64LE-NEXT: add 6, 4, 3 2616; PPC64LE-NEXT: stwcx. 6, 0, 5 2617; PPC64LE-NEXT: bne 0, .LBB151_1 2618; PPC64LE-NEXT: # %bb.2: 2619; PPC64LE-NEXT: lwsync 2620; PPC64LE-NEXT: blr 2621 %ret = atomicrmw add i32* %ptr, i32 %val acquire 2622 ret i32 %ret 2623} 2624 2625define i32 @test152(i32* %ptr, i32 %val) { 2626; PPC64LE-LABEL: test152: 2627; PPC64LE: # %bb.0: 2628; PPC64LE-NEXT: lwsync 2629; PPC64LE-NEXT: .LBB152_1: 2630; PPC64LE-NEXT: lwarx 5, 0, 3 2631; PPC64LE-NEXT: add 6, 4, 5 2632; PPC64LE-NEXT: stwcx. 6, 0, 3 2633; PPC64LE-NEXT: bne 0, .LBB152_1 2634; PPC64LE-NEXT: # %bb.2: 2635; PPC64LE-NEXT: mr 3, 5 2636; PPC64LE-NEXT: blr 2637 %ret = atomicrmw add i32* %ptr, i32 %val release 2638 ret i32 %ret 2639} 2640 2641define i32 @test153(i32* %ptr, i32 %val) { 2642; PPC64LE-LABEL: test153: 2643; PPC64LE: # %bb.0: 2644; PPC64LE-NEXT: lwsync 2645; PPC64LE-NEXT: .LBB153_1: 2646; PPC64LE-NEXT: lwarx 5, 0, 3 2647; PPC64LE-NEXT: add 6, 4, 5 2648; PPC64LE-NEXT: stwcx. 6, 0, 3 2649; PPC64LE-NEXT: bne 0, .LBB153_1 2650; PPC64LE-NEXT: # %bb.2: 2651; PPC64LE-NEXT: mr 3, 5 2652; PPC64LE-NEXT: lwsync 2653; PPC64LE-NEXT: blr 2654 %ret = atomicrmw add i32* %ptr, i32 %val acq_rel 2655 ret i32 %ret 2656} 2657 2658define i32 @test154(i32* %ptr, i32 %val) { 2659; PPC64LE-LABEL: test154: 2660; PPC64LE: # %bb.0: 2661; PPC64LE-NEXT: sync 2662; PPC64LE-NEXT: .LBB154_1: 2663; PPC64LE-NEXT: lwarx 5, 0, 3 2664; PPC64LE-NEXT: add 6, 4, 5 2665; PPC64LE-NEXT: stwcx. 6, 0, 3 2666; PPC64LE-NEXT: bne 0, .LBB154_1 2667; PPC64LE-NEXT: # %bb.2: 2668; PPC64LE-NEXT: mr 3, 5 2669; PPC64LE-NEXT: lwsync 2670; PPC64LE-NEXT: blr 2671 %ret = atomicrmw add i32* %ptr, i32 %val seq_cst 2672 ret i32 %ret 2673} 2674 2675define i64 @test155(i64* %ptr, i64 %val) { 2676; PPC64LE-LABEL: test155: 2677; PPC64LE: # %bb.0: 2678; PPC64LE-NEXT: .LBB155_1: 2679; PPC64LE-NEXT: ldarx 5, 0, 3 2680; PPC64LE-NEXT: add 6, 4, 5 2681; PPC64LE-NEXT: stdcx. 6, 0, 3 2682; PPC64LE-NEXT: bne 0, .LBB155_1 2683; PPC64LE-NEXT: # %bb.2: 2684; PPC64LE-NEXT: mr 3, 5 2685; PPC64LE-NEXT: blr 2686 %ret = atomicrmw add i64* %ptr, i64 %val monotonic 2687 ret i64 %ret 2688} 2689 2690define i64 @test156(i64* %ptr, i64 %val) { 2691; PPC64LE-LABEL: test156: 2692; PPC64LE: # %bb.0: 2693; PPC64LE-NEXT: mr 5, 3 2694; PPC64LE-NEXT: .LBB156_1: 2695; PPC64LE-NEXT: ldarx 3, 0, 5 2696; PPC64LE-NEXT: add 6, 4, 3 2697; PPC64LE-NEXT: stdcx. 6, 0, 5 2698; PPC64LE-NEXT: bne 0, .LBB156_1 2699; PPC64LE-NEXT: # %bb.2: 2700; PPC64LE-NEXT: lwsync 2701; PPC64LE-NEXT: blr 2702 %ret = atomicrmw add i64* %ptr, i64 %val acquire 2703 ret i64 %ret 2704} 2705 2706define i64 @test157(i64* %ptr, i64 %val) { 2707; PPC64LE-LABEL: test157: 2708; PPC64LE: # %bb.0: 2709; PPC64LE-NEXT: lwsync 2710; PPC64LE-NEXT: .LBB157_1: 2711; PPC64LE-NEXT: ldarx 5, 0, 3 2712; PPC64LE-NEXT: add 6, 4, 5 2713; PPC64LE-NEXT: stdcx. 6, 0, 3 2714; PPC64LE-NEXT: bne 0, .LBB157_1 2715; PPC64LE-NEXT: # %bb.2: 2716; PPC64LE-NEXT: mr 3, 5 2717; PPC64LE-NEXT: blr 2718 %ret = atomicrmw add i64* %ptr, i64 %val release 2719 ret i64 %ret 2720} 2721 2722define i64 @test158(i64* %ptr, i64 %val) { 2723; PPC64LE-LABEL: test158: 2724; PPC64LE: # %bb.0: 2725; PPC64LE-NEXT: lwsync 2726; PPC64LE-NEXT: .LBB158_1: 2727; PPC64LE-NEXT: ldarx 5, 0, 3 2728; PPC64LE-NEXT: add 6, 4, 5 2729; PPC64LE-NEXT: stdcx. 6, 0, 3 2730; PPC64LE-NEXT: bne 0, .LBB158_1 2731; PPC64LE-NEXT: # %bb.2: 2732; PPC64LE-NEXT: mr 3, 5 2733; PPC64LE-NEXT: lwsync 2734; PPC64LE-NEXT: blr 2735 %ret = atomicrmw add i64* %ptr, i64 %val acq_rel 2736 ret i64 %ret 2737} 2738 2739define i64 @test159(i64* %ptr, i64 %val) { 2740; PPC64LE-LABEL: test159: 2741; PPC64LE: # %bb.0: 2742; PPC64LE-NEXT: sync 2743; PPC64LE-NEXT: .LBB159_1: 2744; PPC64LE-NEXT: ldarx 5, 0, 3 2745; PPC64LE-NEXT: add 6, 4, 5 2746; PPC64LE-NEXT: stdcx. 6, 0, 3 2747; PPC64LE-NEXT: bne 0, .LBB159_1 2748; PPC64LE-NEXT: # %bb.2: 2749; PPC64LE-NEXT: mr 3, 5 2750; PPC64LE-NEXT: lwsync 2751; PPC64LE-NEXT: blr 2752 %ret = atomicrmw add i64* %ptr, i64 %val seq_cst 2753 ret i64 %ret 2754} 2755 2756define i8 @test160(i8* %ptr, i8 %val) { 2757; PPC64LE-LABEL: test160: 2758; PPC64LE: # %bb.0: 2759; PPC64LE-NEXT: .LBB160_1: 2760; PPC64LE-NEXT: lbarx 5, 0, 3 2761; PPC64LE-NEXT: sub 6, 5, 4 2762; PPC64LE-NEXT: stbcx. 6, 0, 3 2763; PPC64LE-NEXT: bne 0, .LBB160_1 2764; PPC64LE-NEXT: # %bb.2: 2765; PPC64LE-NEXT: mr 3, 5 2766; PPC64LE-NEXT: blr 2767 %ret = atomicrmw sub i8* %ptr, i8 %val monotonic 2768 ret i8 %ret 2769} 2770 2771define i8 @test161(i8* %ptr, i8 %val) { 2772; PPC64LE-LABEL: test161: 2773; PPC64LE: # %bb.0: 2774; PPC64LE-NEXT: mr 5, 3 2775; PPC64LE-NEXT: .LBB161_1: 2776; PPC64LE-NEXT: lbarx 3, 0, 5 2777; PPC64LE-NEXT: sub 6, 3, 4 2778; PPC64LE-NEXT: stbcx. 6, 0, 5 2779; PPC64LE-NEXT: bne 0, .LBB161_1 2780; PPC64LE-NEXT: # %bb.2: 2781; PPC64LE-NEXT: lwsync 2782; PPC64LE-NEXT: blr 2783 %ret = atomicrmw sub i8* %ptr, i8 %val acquire 2784 ret i8 %ret 2785} 2786 2787define i8 @test162(i8* %ptr, i8 %val) { 2788; PPC64LE-LABEL: test162: 2789; PPC64LE: # %bb.0: 2790; PPC64LE-NEXT: lwsync 2791; PPC64LE-NEXT: .LBB162_1: 2792; PPC64LE-NEXT: lbarx 5, 0, 3 2793; PPC64LE-NEXT: sub 6, 5, 4 2794; PPC64LE-NEXT: stbcx. 6, 0, 3 2795; PPC64LE-NEXT: bne 0, .LBB162_1 2796; PPC64LE-NEXT: # %bb.2: 2797; PPC64LE-NEXT: mr 3, 5 2798; PPC64LE-NEXT: blr 2799 %ret = atomicrmw sub i8* %ptr, i8 %val release 2800 ret i8 %ret 2801} 2802 2803define i8 @test163(i8* %ptr, i8 %val) { 2804; PPC64LE-LABEL: test163: 2805; PPC64LE: # %bb.0: 2806; PPC64LE-NEXT: lwsync 2807; PPC64LE-NEXT: .LBB163_1: 2808; PPC64LE-NEXT: lbarx 5, 0, 3 2809; PPC64LE-NEXT: sub 6, 5, 4 2810; PPC64LE-NEXT: stbcx. 6, 0, 3 2811; PPC64LE-NEXT: bne 0, .LBB163_1 2812; PPC64LE-NEXT: # %bb.2: 2813; PPC64LE-NEXT: mr 3, 5 2814; PPC64LE-NEXT: lwsync 2815; PPC64LE-NEXT: blr 2816 %ret = atomicrmw sub i8* %ptr, i8 %val acq_rel 2817 ret i8 %ret 2818} 2819 2820define i8 @test164(i8* %ptr, i8 %val) { 2821; PPC64LE-LABEL: test164: 2822; PPC64LE: # %bb.0: 2823; PPC64LE-NEXT: sync 2824; PPC64LE-NEXT: .LBB164_1: 2825; PPC64LE-NEXT: lbarx 5, 0, 3 2826; PPC64LE-NEXT: sub 6, 5, 4 2827; PPC64LE-NEXT: stbcx. 6, 0, 3 2828; PPC64LE-NEXT: bne 0, .LBB164_1 2829; PPC64LE-NEXT: # %bb.2: 2830; PPC64LE-NEXT: mr 3, 5 2831; PPC64LE-NEXT: lwsync 2832; PPC64LE-NEXT: blr 2833 %ret = atomicrmw sub i8* %ptr, i8 %val seq_cst 2834 ret i8 %ret 2835} 2836 2837define i16 @test165(i16* %ptr, i16 %val) { 2838; PPC64LE-LABEL: test165: 2839; PPC64LE: # %bb.0: 2840; PPC64LE-NEXT: .LBB165_1: 2841; PPC64LE-NEXT: lharx 5, 0, 3 2842; PPC64LE-NEXT: sub 6, 5, 4 2843; PPC64LE-NEXT: sthcx. 6, 0, 3 2844; PPC64LE-NEXT: bne 0, .LBB165_1 2845; PPC64LE-NEXT: # %bb.2: 2846; PPC64LE-NEXT: mr 3, 5 2847; PPC64LE-NEXT: blr 2848 %ret = atomicrmw sub i16* %ptr, i16 %val monotonic 2849 ret i16 %ret 2850} 2851 2852define i16 @test166(i16* %ptr, i16 %val) { 2853; PPC64LE-LABEL: test166: 2854; PPC64LE: # %bb.0: 2855; PPC64LE-NEXT: mr 5, 3 2856; PPC64LE-NEXT: .LBB166_1: 2857; PPC64LE-NEXT: lharx 3, 0, 5 2858; PPC64LE-NEXT: sub 6, 3, 4 2859; PPC64LE-NEXT: sthcx. 6, 0, 5 2860; PPC64LE-NEXT: bne 0, .LBB166_1 2861; PPC64LE-NEXT: # %bb.2: 2862; PPC64LE-NEXT: lwsync 2863; PPC64LE-NEXT: blr 2864 %ret = atomicrmw sub i16* %ptr, i16 %val acquire 2865 ret i16 %ret 2866} 2867 2868define i16 @test167(i16* %ptr, i16 %val) { 2869; PPC64LE-LABEL: test167: 2870; PPC64LE: # %bb.0: 2871; PPC64LE-NEXT: lwsync 2872; PPC64LE-NEXT: .LBB167_1: 2873; PPC64LE-NEXT: lharx 5, 0, 3 2874; PPC64LE-NEXT: sub 6, 5, 4 2875; PPC64LE-NEXT: sthcx. 6, 0, 3 2876; PPC64LE-NEXT: bne 0, .LBB167_1 2877; PPC64LE-NEXT: # %bb.2: 2878; PPC64LE-NEXT: mr 3, 5 2879; PPC64LE-NEXT: blr 2880 %ret = atomicrmw sub i16* %ptr, i16 %val release 2881 ret i16 %ret 2882} 2883 2884define i16 @test168(i16* %ptr, i16 %val) { 2885; PPC64LE-LABEL: test168: 2886; PPC64LE: # %bb.0: 2887; PPC64LE-NEXT: lwsync 2888; PPC64LE-NEXT: .LBB168_1: 2889; PPC64LE-NEXT: lharx 5, 0, 3 2890; PPC64LE-NEXT: sub 6, 5, 4 2891; PPC64LE-NEXT: sthcx. 6, 0, 3 2892; PPC64LE-NEXT: bne 0, .LBB168_1 2893; PPC64LE-NEXT: # %bb.2: 2894; PPC64LE-NEXT: mr 3, 5 2895; PPC64LE-NEXT: lwsync 2896; PPC64LE-NEXT: blr 2897 %ret = atomicrmw sub i16* %ptr, i16 %val acq_rel 2898 ret i16 %ret 2899} 2900 2901define i16 @test169(i16* %ptr, i16 %val) { 2902; PPC64LE-LABEL: test169: 2903; PPC64LE: # %bb.0: 2904; PPC64LE-NEXT: sync 2905; PPC64LE-NEXT: .LBB169_1: 2906; PPC64LE-NEXT: lharx 5, 0, 3 2907; PPC64LE-NEXT: sub 6, 5, 4 2908; PPC64LE-NEXT: sthcx. 6, 0, 3 2909; PPC64LE-NEXT: bne 0, .LBB169_1 2910; PPC64LE-NEXT: # %bb.2: 2911; PPC64LE-NEXT: mr 3, 5 2912; PPC64LE-NEXT: lwsync 2913; PPC64LE-NEXT: blr 2914 %ret = atomicrmw sub i16* %ptr, i16 %val seq_cst 2915 ret i16 %ret 2916} 2917 2918define i32 @test170(i32* %ptr, i32 %val) { 2919; PPC64LE-LABEL: test170: 2920; PPC64LE: # %bb.0: 2921; PPC64LE-NEXT: .LBB170_1: 2922; PPC64LE-NEXT: lwarx 5, 0, 3 2923; PPC64LE-NEXT: sub 6, 5, 4 2924; PPC64LE-NEXT: stwcx. 6, 0, 3 2925; PPC64LE-NEXT: bne 0, .LBB170_1 2926; PPC64LE-NEXT: # %bb.2: 2927; PPC64LE-NEXT: mr 3, 5 2928; PPC64LE-NEXT: blr 2929 %ret = atomicrmw sub i32* %ptr, i32 %val monotonic 2930 ret i32 %ret 2931} 2932 2933define i32 @test171(i32* %ptr, i32 %val) { 2934; PPC64LE-LABEL: test171: 2935; PPC64LE: # %bb.0: 2936; PPC64LE-NEXT: mr 5, 3 2937; PPC64LE-NEXT: .LBB171_1: 2938; PPC64LE-NEXT: lwarx 3, 0, 5 2939; PPC64LE-NEXT: sub 6, 3, 4 2940; PPC64LE-NEXT: stwcx. 6, 0, 5 2941; PPC64LE-NEXT: bne 0, .LBB171_1 2942; PPC64LE-NEXT: # %bb.2: 2943; PPC64LE-NEXT: lwsync 2944; PPC64LE-NEXT: blr 2945 %ret = atomicrmw sub i32* %ptr, i32 %val acquire 2946 ret i32 %ret 2947} 2948 2949define i32 @test172(i32* %ptr, i32 %val) { 2950; PPC64LE-LABEL: test172: 2951; PPC64LE: # %bb.0: 2952; PPC64LE-NEXT: lwsync 2953; PPC64LE-NEXT: .LBB172_1: 2954; PPC64LE-NEXT: lwarx 5, 0, 3 2955; PPC64LE-NEXT: sub 6, 5, 4 2956; PPC64LE-NEXT: stwcx. 6, 0, 3 2957; PPC64LE-NEXT: bne 0, .LBB172_1 2958; PPC64LE-NEXT: # %bb.2: 2959; PPC64LE-NEXT: mr 3, 5 2960; PPC64LE-NEXT: blr 2961 %ret = atomicrmw sub i32* %ptr, i32 %val release 2962 ret i32 %ret 2963} 2964 2965define i32 @test173(i32* %ptr, i32 %val) { 2966; PPC64LE-LABEL: test173: 2967; PPC64LE: # %bb.0: 2968; PPC64LE-NEXT: lwsync 2969; PPC64LE-NEXT: .LBB173_1: 2970; PPC64LE-NEXT: lwarx 5, 0, 3 2971; PPC64LE-NEXT: sub 6, 5, 4 2972; PPC64LE-NEXT: stwcx. 6, 0, 3 2973; PPC64LE-NEXT: bne 0, .LBB173_1 2974; PPC64LE-NEXT: # %bb.2: 2975; PPC64LE-NEXT: mr 3, 5 2976; PPC64LE-NEXT: lwsync 2977; PPC64LE-NEXT: blr 2978 %ret = atomicrmw sub i32* %ptr, i32 %val acq_rel 2979 ret i32 %ret 2980} 2981 2982define i32 @test174(i32* %ptr, i32 %val) { 2983; PPC64LE-LABEL: test174: 2984; PPC64LE: # %bb.0: 2985; PPC64LE-NEXT: sync 2986; PPC64LE-NEXT: .LBB174_1: 2987; PPC64LE-NEXT: lwarx 5, 0, 3 2988; PPC64LE-NEXT: sub 6, 5, 4 2989; PPC64LE-NEXT: stwcx. 6, 0, 3 2990; PPC64LE-NEXT: bne 0, .LBB174_1 2991; PPC64LE-NEXT: # %bb.2: 2992; PPC64LE-NEXT: mr 3, 5 2993; PPC64LE-NEXT: lwsync 2994; PPC64LE-NEXT: blr 2995 %ret = atomicrmw sub i32* %ptr, i32 %val seq_cst 2996 ret i32 %ret 2997} 2998 2999define i64 @test175(i64* %ptr, i64 %val) { 3000; PPC64LE-LABEL: test175: 3001; PPC64LE: # %bb.0: 3002; PPC64LE-NEXT: .LBB175_1: 3003; PPC64LE-NEXT: ldarx 5, 0, 3 3004; PPC64LE-NEXT: sub 6, 5, 4 3005; PPC64LE-NEXT: stdcx. 6, 0, 3 3006; PPC64LE-NEXT: bne 0, .LBB175_1 3007; PPC64LE-NEXT: # %bb.2: 3008; PPC64LE-NEXT: mr 3, 5 3009; PPC64LE-NEXT: blr 3010 %ret = atomicrmw sub i64* %ptr, i64 %val monotonic 3011 ret i64 %ret 3012} 3013 3014define i64 @test176(i64* %ptr, i64 %val) { 3015; PPC64LE-LABEL: test176: 3016; PPC64LE: # %bb.0: 3017; PPC64LE-NEXT: mr 5, 3 3018; PPC64LE-NEXT: .LBB176_1: 3019; PPC64LE-NEXT: ldarx 3, 0, 5 3020; PPC64LE-NEXT: sub 6, 3, 4 3021; PPC64LE-NEXT: stdcx. 6, 0, 5 3022; PPC64LE-NEXT: bne 0, .LBB176_1 3023; PPC64LE-NEXT: # %bb.2: 3024; PPC64LE-NEXT: lwsync 3025; PPC64LE-NEXT: blr 3026 %ret = atomicrmw sub i64* %ptr, i64 %val acquire 3027 ret i64 %ret 3028} 3029 3030define i64 @test177(i64* %ptr, i64 %val) { 3031; PPC64LE-LABEL: test177: 3032; PPC64LE: # %bb.0: 3033; PPC64LE-NEXT: lwsync 3034; PPC64LE-NEXT: .LBB177_1: 3035; PPC64LE-NEXT: ldarx 5, 0, 3 3036; PPC64LE-NEXT: sub 6, 5, 4 3037; PPC64LE-NEXT: stdcx. 6, 0, 3 3038; PPC64LE-NEXT: bne 0, .LBB177_1 3039; PPC64LE-NEXT: # %bb.2: 3040; PPC64LE-NEXT: mr 3, 5 3041; PPC64LE-NEXT: blr 3042 %ret = atomicrmw sub i64* %ptr, i64 %val release 3043 ret i64 %ret 3044} 3045 3046define i64 @test178(i64* %ptr, i64 %val) { 3047; PPC64LE-LABEL: test178: 3048; PPC64LE: # %bb.0: 3049; PPC64LE-NEXT: lwsync 3050; PPC64LE-NEXT: .LBB178_1: 3051; PPC64LE-NEXT: ldarx 5, 0, 3 3052; PPC64LE-NEXT: sub 6, 5, 4 3053; PPC64LE-NEXT: stdcx. 6, 0, 3 3054; PPC64LE-NEXT: bne 0, .LBB178_1 3055; PPC64LE-NEXT: # %bb.2: 3056; PPC64LE-NEXT: mr 3, 5 3057; PPC64LE-NEXT: lwsync 3058; PPC64LE-NEXT: blr 3059 %ret = atomicrmw sub i64* %ptr, i64 %val acq_rel 3060 ret i64 %ret 3061} 3062 3063define i64 @test179(i64* %ptr, i64 %val) { 3064; PPC64LE-LABEL: test179: 3065; PPC64LE: # %bb.0: 3066; PPC64LE-NEXT: sync 3067; PPC64LE-NEXT: .LBB179_1: 3068; PPC64LE-NEXT: ldarx 5, 0, 3 3069; PPC64LE-NEXT: sub 6, 5, 4 3070; PPC64LE-NEXT: stdcx. 6, 0, 3 3071; PPC64LE-NEXT: bne 0, .LBB179_1 3072; PPC64LE-NEXT: # %bb.2: 3073; PPC64LE-NEXT: mr 3, 5 3074; PPC64LE-NEXT: lwsync 3075; PPC64LE-NEXT: blr 3076 %ret = atomicrmw sub i64* %ptr, i64 %val seq_cst 3077 ret i64 %ret 3078} 3079 3080define i8 @test180(i8* %ptr, i8 %val) { 3081; PPC64LE-LABEL: test180: 3082; PPC64LE: # %bb.0: 3083; PPC64LE-NEXT: .LBB180_1: 3084; PPC64LE-NEXT: lbarx 5, 0, 3 3085; PPC64LE-NEXT: and 6, 4, 5 3086; PPC64LE-NEXT: stbcx. 6, 0, 3 3087; PPC64LE-NEXT: bne 0, .LBB180_1 3088; PPC64LE-NEXT: # %bb.2: 3089; PPC64LE-NEXT: mr 3, 5 3090; PPC64LE-NEXT: blr 3091 %ret = atomicrmw and i8* %ptr, i8 %val monotonic 3092 ret i8 %ret 3093} 3094 3095define i8 @test181(i8* %ptr, i8 %val) { 3096; PPC64LE-LABEL: test181: 3097; PPC64LE: # %bb.0: 3098; PPC64LE-NEXT: mr 5, 3 3099; PPC64LE-NEXT: .LBB181_1: 3100; PPC64LE-NEXT: lbarx 3, 0, 5 3101; PPC64LE-NEXT: and 6, 4, 3 3102; PPC64LE-NEXT: stbcx. 6, 0, 5 3103; PPC64LE-NEXT: bne 0, .LBB181_1 3104; PPC64LE-NEXT: # %bb.2: 3105; PPC64LE-NEXT: lwsync 3106; PPC64LE-NEXT: blr 3107 %ret = atomicrmw and i8* %ptr, i8 %val acquire 3108 ret i8 %ret 3109} 3110 3111define i8 @test182(i8* %ptr, i8 %val) { 3112; PPC64LE-LABEL: test182: 3113; PPC64LE: # %bb.0: 3114; PPC64LE-NEXT: lwsync 3115; PPC64LE-NEXT: .LBB182_1: 3116; PPC64LE-NEXT: lbarx 5, 0, 3 3117; PPC64LE-NEXT: and 6, 4, 5 3118; PPC64LE-NEXT: stbcx. 6, 0, 3 3119; PPC64LE-NEXT: bne 0, .LBB182_1 3120; PPC64LE-NEXT: # %bb.2: 3121; PPC64LE-NEXT: mr 3, 5 3122; PPC64LE-NEXT: blr 3123 %ret = atomicrmw and i8* %ptr, i8 %val release 3124 ret i8 %ret 3125} 3126 3127define i8 @test183(i8* %ptr, i8 %val) { 3128; PPC64LE-LABEL: test183: 3129; PPC64LE: # %bb.0: 3130; PPC64LE-NEXT: lwsync 3131; PPC64LE-NEXT: .LBB183_1: 3132; PPC64LE-NEXT: lbarx 5, 0, 3 3133; PPC64LE-NEXT: and 6, 4, 5 3134; PPC64LE-NEXT: stbcx. 6, 0, 3 3135; PPC64LE-NEXT: bne 0, .LBB183_1 3136; PPC64LE-NEXT: # %bb.2: 3137; PPC64LE-NEXT: mr 3, 5 3138; PPC64LE-NEXT: lwsync 3139; PPC64LE-NEXT: blr 3140 %ret = atomicrmw and i8* %ptr, i8 %val acq_rel 3141 ret i8 %ret 3142} 3143 3144define i8 @test184(i8* %ptr, i8 %val) { 3145; PPC64LE-LABEL: test184: 3146; PPC64LE: # %bb.0: 3147; PPC64LE-NEXT: sync 3148; PPC64LE-NEXT: .LBB184_1: 3149; PPC64LE-NEXT: lbarx 5, 0, 3 3150; PPC64LE-NEXT: and 6, 4, 5 3151; PPC64LE-NEXT: stbcx. 6, 0, 3 3152; PPC64LE-NEXT: bne 0, .LBB184_1 3153; PPC64LE-NEXT: # %bb.2: 3154; PPC64LE-NEXT: mr 3, 5 3155; PPC64LE-NEXT: lwsync 3156; PPC64LE-NEXT: blr 3157 %ret = atomicrmw and i8* %ptr, i8 %val seq_cst 3158 ret i8 %ret 3159} 3160 3161define i16 @test185(i16* %ptr, i16 %val) { 3162; PPC64LE-LABEL: test185: 3163; PPC64LE: # %bb.0: 3164; PPC64LE-NEXT: .LBB185_1: 3165; PPC64LE-NEXT: lharx 5, 0, 3 3166; PPC64LE-NEXT: and 6, 4, 5 3167; PPC64LE-NEXT: sthcx. 6, 0, 3 3168; PPC64LE-NEXT: bne 0, .LBB185_1 3169; PPC64LE-NEXT: # %bb.2: 3170; PPC64LE-NEXT: mr 3, 5 3171; PPC64LE-NEXT: blr 3172 %ret = atomicrmw and i16* %ptr, i16 %val monotonic 3173 ret i16 %ret 3174} 3175 3176define i16 @test186(i16* %ptr, i16 %val) { 3177; PPC64LE-LABEL: test186: 3178; PPC64LE: # %bb.0: 3179; PPC64LE-NEXT: mr 5, 3 3180; PPC64LE-NEXT: .LBB186_1: 3181; PPC64LE-NEXT: lharx 3, 0, 5 3182; PPC64LE-NEXT: and 6, 4, 3 3183; PPC64LE-NEXT: sthcx. 6, 0, 5 3184; PPC64LE-NEXT: bne 0, .LBB186_1 3185; PPC64LE-NEXT: # %bb.2: 3186; PPC64LE-NEXT: lwsync 3187; PPC64LE-NEXT: blr 3188 %ret = atomicrmw and i16* %ptr, i16 %val acquire 3189 ret i16 %ret 3190} 3191 3192define i16 @test187(i16* %ptr, i16 %val) { 3193; PPC64LE-LABEL: test187: 3194; PPC64LE: # %bb.0: 3195; PPC64LE-NEXT: lwsync 3196; PPC64LE-NEXT: .LBB187_1: 3197; PPC64LE-NEXT: lharx 5, 0, 3 3198; PPC64LE-NEXT: and 6, 4, 5 3199; PPC64LE-NEXT: sthcx. 6, 0, 3 3200; PPC64LE-NEXT: bne 0, .LBB187_1 3201; PPC64LE-NEXT: # %bb.2: 3202; PPC64LE-NEXT: mr 3, 5 3203; PPC64LE-NEXT: blr 3204 %ret = atomicrmw and i16* %ptr, i16 %val release 3205 ret i16 %ret 3206} 3207 3208define i16 @test188(i16* %ptr, i16 %val) { 3209; PPC64LE-LABEL: test188: 3210; PPC64LE: # %bb.0: 3211; PPC64LE-NEXT: lwsync 3212; PPC64LE-NEXT: .LBB188_1: 3213; PPC64LE-NEXT: lharx 5, 0, 3 3214; PPC64LE-NEXT: and 6, 4, 5 3215; PPC64LE-NEXT: sthcx. 6, 0, 3 3216; PPC64LE-NEXT: bne 0, .LBB188_1 3217; PPC64LE-NEXT: # %bb.2: 3218; PPC64LE-NEXT: mr 3, 5 3219; PPC64LE-NEXT: lwsync 3220; PPC64LE-NEXT: blr 3221 %ret = atomicrmw and i16* %ptr, i16 %val acq_rel 3222 ret i16 %ret 3223} 3224 3225define i16 @test189(i16* %ptr, i16 %val) { 3226; PPC64LE-LABEL: test189: 3227; PPC64LE: # %bb.0: 3228; PPC64LE-NEXT: sync 3229; PPC64LE-NEXT: .LBB189_1: 3230; PPC64LE-NEXT: lharx 5, 0, 3 3231; PPC64LE-NEXT: and 6, 4, 5 3232; PPC64LE-NEXT: sthcx. 6, 0, 3 3233; PPC64LE-NEXT: bne 0, .LBB189_1 3234; PPC64LE-NEXT: # %bb.2: 3235; PPC64LE-NEXT: mr 3, 5 3236; PPC64LE-NEXT: lwsync 3237; PPC64LE-NEXT: blr 3238 %ret = atomicrmw and i16* %ptr, i16 %val seq_cst 3239 ret i16 %ret 3240} 3241 3242define i32 @test190(i32* %ptr, i32 %val) { 3243; PPC64LE-LABEL: test190: 3244; PPC64LE: # %bb.0: 3245; PPC64LE-NEXT: .LBB190_1: 3246; PPC64LE-NEXT: lwarx 5, 0, 3 3247; PPC64LE-NEXT: and 6, 4, 5 3248; PPC64LE-NEXT: stwcx. 6, 0, 3 3249; PPC64LE-NEXT: bne 0, .LBB190_1 3250; PPC64LE-NEXT: # %bb.2: 3251; PPC64LE-NEXT: mr 3, 5 3252; PPC64LE-NEXT: blr 3253 %ret = atomicrmw and i32* %ptr, i32 %val monotonic 3254 ret i32 %ret 3255} 3256 3257define i32 @test191(i32* %ptr, i32 %val) { 3258; PPC64LE-LABEL: test191: 3259; PPC64LE: # %bb.0: 3260; PPC64LE-NEXT: mr 5, 3 3261; PPC64LE-NEXT: .LBB191_1: 3262; PPC64LE-NEXT: lwarx 3, 0, 5 3263; PPC64LE-NEXT: and 6, 4, 3 3264; PPC64LE-NEXT: stwcx. 6, 0, 5 3265; PPC64LE-NEXT: bne 0, .LBB191_1 3266; PPC64LE-NEXT: # %bb.2: 3267; PPC64LE-NEXT: lwsync 3268; PPC64LE-NEXT: blr 3269 %ret = atomicrmw and i32* %ptr, i32 %val acquire 3270 ret i32 %ret 3271} 3272 3273define i32 @test192(i32* %ptr, i32 %val) { 3274; PPC64LE-LABEL: test192: 3275; PPC64LE: # %bb.0: 3276; PPC64LE-NEXT: lwsync 3277; PPC64LE-NEXT: .LBB192_1: 3278; PPC64LE-NEXT: lwarx 5, 0, 3 3279; PPC64LE-NEXT: and 6, 4, 5 3280; PPC64LE-NEXT: stwcx. 6, 0, 3 3281; PPC64LE-NEXT: bne 0, .LBB192_1 3282; PPC64LE-NEXT: # %bb.2: 3283; PPC64LE-NEXT: mr 3, 5 3284; PPC64LE-NEXT: blr 3285 %ret = atomicrmw and i32* %ptr, i32 %val release 3286 ret i32 %ret 3287} 3288 3289define i32 @test193(i32* %ptr, i32 %val) { 3290; PPC64LE-LABEL: test193: 3291; PPC64LE: # %bb.0: 3292; PPC64LE-NEXT: lwsync 3293; PPC64LE-NEXT: .LBB193_1: 3294; PPC64LE-NEXT: lwarx 5, 0, 3 3295; PPC64LE-NEXT: and 6, 4, 5 3296; PPC64LE-NEXT: stwcx. 6, 0, 3 3297; PPC64LE-NEXT: bne 0, .LBB193_1 3298; PPC64LE-NEXT: # %bb.2: 3299; PPC64LE-NEXT: mr 3, 5 3300; PPC64LE-NEXT: lwsync 3301; PPC64LE-NEXT: blr 3302 %ret = atomicrmw and i32* %ptr, i32 %val acq_rel 3303 ret i32 %ret 3304} 3305 3306define i32 @test194(i32* %ptr, i32 %val) { 3307; PPC64LE-LABEL: test194: 3308; PPC64LE: # %bb.0: 3309; PPC64LE-NEXT: sync 3310; PPC64LE-NEXT: .LBB194_1: 3311; PPC64LE-NEXT: lwarx 5, 0, 3 3312; PPC64LE-NEXT: and 6, 4, 5 3313; PPC64LE-NEXT: stwcx. 6, 0, 3 3314; PPC64LE-NEXT: bne 0, .LBB194_1 3315; PPC64LE-NEXT: # %bb.2: 3316; PPC64LE-NEXT: mr 3, 5 3317; PPC64LE-NEXT: lwsync 3318; PPC64LE-NEXT: blr 3319 %ret = atomicrmw and i32* %ptr, i32 %val seq_cst 3320 ret i32 %ret 3321} 3322 3323define i64 @test195(i64* %ptr, i64 %val) { 3324; PPC64LE-LABEL: test195: 3325; PPC64LE: # %bb.0: 3326; PPC64LE-NEXT: .LBB195_1: 3327; PPC64LE-NEXT: ldarx 5, 0, 3 3328; PPC64LE-NEXT: and 6, 4, 5 3329; PPC64LE-NEXT: stdcx. 6, 0, 3 3330; PPC64LE-NEXT: bne 0, .LBB195_1 3331; PPC64LE-NEXT: # %bb.2: 3332; PPC64LE-NEXT: mr 3, 5 3333; PPC64LE-NEXT: blr 3334 %ret = atomicrmw and i64* %ptr, i64 %val monotonic 3335 ret i64 %ret 3336} 3337 3338define i64 @test196(i64* %ptr, i64 %val) { 3339; PPC64LE-LABEL: test196: 3340; PPC64LE: # %bb.0: 3341; PPC64LE-NEXT: mr 5, 3 3342; PPC64LE-NEXT: .LBB196_1: 3343; PPC64LE-NEXT: ldarx 3, 0, 5 3344; PPC64LE-NEXT: and 6, 4, 3 3345; PPC64LE-NEXT: stdcx. 6, 0, 5 3346; PPC64LE-NEXT: bne 0, .LBB196_1 3347; PPC64LE-NEXT: # %bb.2: 3348; PPC64LE-NEXT: lwsync 3349; PPC64LE-NEXT: blr 3350 %ret = atomicrmw and i64* %ptr, i64 %val acquire 3351 ret i64 %ret 3352} 3353 3354define i64 @test197(i64* %ptr, i64 %val) { 3355; PPC64LE-LABEL: test197: 3356; PPC64LE: # %bb.0: 3357; PPC64LE-NEXT: lwsync 3358; PPC64LE-NEXT: .LBB197_1: 3359; PPC64LE-NEXT: ldarx 5, 0, 3 3360; PPC64LE-NEXT: and 6, 4, 5 3361; PPC64LE-NEXT: stdcx. 6, 0, 3 3362; PPC64LE-NEXT: bne 0, .LBB197_1 3363; PPC64LE-NEXT: # %bb.2: 3364; PPC64LE-NEXT: mr 3, 5 3365; PPC64LE-NEXT: blr 3366 %ret = atomicrmw and i64* %ptr, i64 %val release 3367 ret i64 %ret 3368} 3369 3370define i64 @test198(i64* %ptr, i64 %val) { 3371; PPC64LE-LABEL: test198: 3372; PPC64LE: # %bb.0: 3373; PPC64LE-NEXT: lwsync 3374; PPC64LE-NEXT: .LBB198_1: 3375; PPC64LE-NEXT: ldarx 5, 0, 3 3376; PPC64LE-NEXT: and 6, 4, 5 3377; PPC64LE-NEXT: stdcx. 6, 0, 3 3378; PPC64LE-NEXT: bne 0, .LBB198_1 3379; PPC64LE-NEXT: # %bb.2: 3380; PPC64LE-NEXT: mr 3, 5 3381; PPC64LE-NEXT: lwsync 3382; PPC64LE-NEXT: blr 3383 %ret = atomicrmw and i64* %ptr, i64 %val acq_rel 3384 ret i64 %ret 3385} 3386 3387define i64 @test199(i64* %ptr, i64 %val) { 3388; PPC64LE-LABEL: test199: 3389; PPC64LE: # %bb.0: 3390; PPC64LE-NEXT: sync 3391; PPC64LE-NEXT: .LBB199_1: 3392; PPC64LE-NEXT: ldarx 5, 0, 3 3393; PPC64LE-NEXT: and 6, 4, 5 3394; PPC64LE-NEXT: stdcx. 6, 0, 3 3395; PPC64LE-NEXT: bne 0, .LBB199_1 3396; PPC64LE-NEXT: # %bb.2: 3397; PPC64LE-NEXT: mr 3, 5 3398; PPC64LE-NEXT: lwsync 3399; PPC64LE-NEXT: blr 3400 %ret = atomicrmw and i64* %ptr, i64 %val seq_cst 3401 ret i64 %ret 3402} 3403 3404define i8 @test200(i8* %ptr, i8 %val) { 3405; PPC64LE-LABEL: test200: 3406; PPC64LE: # %bb.0: 3407; PPC64LE-NEXT: .LBB200_1: 3408; PPC64LE-NEXT: lbarx 5, 0, 3 3409; PPC64LE-NEXT: nand 6, 4, 5 3410; PPC64LE-NEXT: stbcx. 6, 0, 3 3411; PPC64LE-NEXT: bne 0, .LBB200_1 3412; PPC64LE-NEXT: # %bb.2: 3413; PPC64LE-NEXT: mr 3, 5 3414; PPC64LE-NEXT: blr 3415 %ret = atomicrmw nand i8* %ptr, i8 %val monotonic 3416 ret i8 %ret 3417} 3418 3419define i8 @test201(i8* %ptr, i8 %val) { 3420; PPC64LE-LABEL: test201: 3421; PPC64LE: # %bb.0: 3422; PPC64LE-NEXT: mr 5, 3 3423; PPC64LE-NEXT: .LBB201_1: 3424; PPC64LE-NEXT: lbarx 3, 0, 5 3425; PPC64LE-NEXT: nand 6, 4, 3 3426; PPC64LE-NEXT: stbcx. 6, 0, 5 3427; PPC64LE-NEXT: bne 0, .LBB201_1 3428; PPC64LE-NEXT: # %bb.2: 3429; PPC64LE-NEXT: lwsync 3430; PPC64LE-NEXT: blr 3431 %ret = atomicrmw nand i8* %ptr, i8 %val acquire 3432 ret i8 %ret 3433} 3434 3435define i8 @test202(i8* %ptr, i8 %val) { 3436; PPC64LE-LABEL: test202: 3437; PPC64LE: # %bb.0: 3438; PPC64LE-NEXT: lwsync 3439; PPC64LE-NEXT: .LBB202_1: 3440; PPC64LE-NEXT: lbarx 5, 0, 3 3441; PPC64LE-NEXT: nand 6, 4, 5 3442; PPC64LE-NEXT: stbcx. 6, 0, 3 3443; PPC64LE-NEXT: bne 0, .LBB202_1 3444; PPC64LE-NEXT: # %bb.2: 3445; PPC64LE-NEXT: mr 3, 5 3446; PPC64LE-NEXT: blr 3447 %ret = atomicrmw nand i8* %ptr, i8 %val release 3448 ret i8 %ret 3449} 3450 3451define i8 @test203(i8* %ptr, i8 %val) { 3452; PPC64LE-LABEL: test203: 3453; PPC64LE: # %bb.0: 3454; PPC64LE-NEXT: lwsync 3455; PPC64LE-NEXT: .LBB203_1: 3456; PPC64LE-NEXT: lbarx 5, 0, 3 3457; PPC64LE-NEXT: nand 6, 4, 5 3458; PPC64LE-NEXT: stbcx. 6, 0, 3 3459; PPC64LE-NEXT: bne 0, .LBB203_1 3460; PPC64LE-NEXT: # %bb.2: 3461; PPC64LE-NEXT: mr 3, 5 3462; PPC64LE-NEXT: lwsync 3463; PPC64LE-NEXT: blr 3464 %ret = atomicrmw nand i8* %ptr, i8 %val acq_rel 3465 ret i8 %ret 3466} 3467 3468define i8 @test204(i8* %ptr, i8 %val) { 3469; PPC64LE-LABEL: test204: 3470; PPC64LE: # %bb.0: 3471; PPC64LE-NEXT: sync 3472; PPC64LE-NEXT: .LBB204_1: 3473; PPC64LE-NEXT: lbarx 5, 0, 3 3474; PPC64LE-NEXT: nand 6, 4, 5 3475; PPC64LE-NEXT: stbcx. 6, 0, 3 3476; PPC64LE-NEXT: bne 0, .LBB204_1 3477; PPC64LE-NEXT: # %bb.2: 3478; PPC64LE-NEXT: mr 3, 5 3479; PPC64LE-NEXT: lwsync 3480; PPC64LE-NEXT: blr 3481 %ret = atomicrmw nand i8* %ptr, i8 %val seq_cst 3482 ret i8 %ret 3483} 3484 3485define i16 @test205(i16* %ptr, i16 %val) { 3486; PPC64LE-LABEL: test205: 3487; PPC64LE: # %bb.0: 3488; PPC64LE-NEXT: .LBB205_1: 3489; PPC64LE-NEXT: lharx 5, 0, 3 3490; PPC64LE-NEXT: nand 6, 4, 5 3491; PPC64LE-NEXT: sthcx. 6, 0, 3 3492; PPC64LE-NEXT: bne 0, .LBB205_1 3493; PPC64LE-NEXT: # %bb.2: 3494; PPC64LE-NEXT: mr 3, 5 3495; PPC64LE-NEXT: blr 3496 %ret = atomicrmw nand i16* %ptr, i16 %val monotonic 3497 ret i16 %ret 3498} 3499 3500define i16 @test206(i16* %ptr, i16 %val) { 3501; PPC64LE-LABEL: test206: 3502; PPC64LE: # %bb.0: 3503; PPC64LE-NEXT: mr 5, 3 3504; PPC64LE-NEXT: .LBB206_1: 3505; PPC64LE-NEXT: lharx 3, 0, 5 3506; PPC64LE-NEXT: nand 6, 4, 3 3507; PPC64LE-NEXT: sthcx. 6, 0, 5 3508; PPC64LE-NEXT: bne 0, .LBB206_1 3509; PPC64LE-NEXT: # %bb.2: 3510; PPC64LE-NEXT: lwsync 3511; PPC64LE-NEXT: blr 3512 %ret = atomicrmw nand i16* %ptr, i16 %val acquire 3513 ret i16 %ret 3514} 3515 3516define i16 @test207(i16* %ptr, i16 %val) { 3517; PPC64LE-LABEL: test207: 3518; PPC64LE: # %bb.0: 3519; PPC64LE-NEXT: lwsync 3520; PPC64LE-NEXT: .LBB207_1: 3521; PPC64LE-NEXT: lharx 5, 0, 3 3522; PPC64LE-NEXT: nand 6, 4, 5 3523; PPC64LE-NEXT: sthcx. 6, 0, 3 3524; PPC64LE-NEXT: bne 0, .LBB207_1 3525; PPC64LE-NEXT: # %bb.2: 3526; PPC64LE-NEXT: mr 3, 5 3527; PPC64LE-NEXT: blr 3528 %ret = atomicrmw nand i16* %ptr, i16 %val release 3529 ret i16 %ret 3530} 3531 3532define i16 @test208(i16* %ptr, i16 %val) { 3533; PPC64LE-LABEL: test208: 3534; PPC64LE: # %bb.0: 3535; PPC64LE-NEXT: lwsync 3536; PPC64LE-NEXT: .LBB208_1: 3537; PPC64LE-NEXT: lharx 5, 0, 3 3538; PPC64LE-NEXT: nand 6, 4, 5 3539; PPC64LE-NEXT: sthcx. 6, 0, 3 3540; PPC64LE-NEXT: bne 0, .LBB208_1 3541; PPC64LE-NEXT: # %bb.2: 3542; PPC64LE-NEXT: mr 3, 5 3543; PPC64LE-NEXT: lwsync 3544; PPC64LE-NEXT: blr 3545 %ret = atomicrmw nand i16* %ptr, i16 %val acq_rel 3546 ret i16 %ret 3547} 3548 3549define i16 @test209(i16* %ptr, i16 %val) { 3550; PPC64LE-LABEL: test209: 3551; PPC64LE: # %bb.0: 3552; PPC64LE-NEXT: sync 3553; PPC64LE-NEXT: .LBB209_1: 3554; PPC64LE-NEXT: lharx 5, 0, 3 3555; PPC64LE-NEXT: nand 6, 4, 5 3556; PPC64LE-NEXT: sthcx. 6, 0, 3 3557; PPC64LE-NEXT: bne 0, .LBB209_1 3558; PPC64LE-NEXT: # %bb.2: 3559; PPC64LE-NEXT: mr 3, 5 3560; PPC64LE-NEXT: lwsync 3561; PPC64LE-NEXT: blr 3562 %ret = atomicrmw nand i16* %ptr, i16 %val seq_cst 3563 ret i16 %ret 3564} 3565 3566define i32 @test210(i32* %ptr, i32 %val) { 3567; PPC64LE-LABEL: test210: 3568; PPC64LE: # %bb.0: 3569; PPC64LE-NEXT: .LBB210_1: 3570; PPC64LE-NEXT: lwarx 5, 0, 3 3571; PPC64LE-NEXT: nand 6, 4, 5 3572; PPC64LE-NEXT: stwcx. 6, 0, 3 3573; PPC64LE-NEXT: bne 0, .LBB210_1 3574; PPC64LE-NEXT: # %bb.2: 3575; PPC64LE-NEXT: mr 3, 5 3576; PPC64LE-NEXT: blr 3577 %ret = atomicrmw nand i32* %ptr, i32 %val monotonic 3578 ret i32 %ret 3579} 3580 3581define i32 @test211(i32* %ptr, i32 %val) { 3582; PPC64LE-LABEL: test211: 3583; PPC64LE: # %bb.0: 3584; PPC64LE-NEXT: mr 5, 3 3585; PPC64LE-NEXT: .LBB211_1: 3586; PPC64LE-NEXT: lwarx 3, 0, 5 3587; PPC64LE-NEXT: nand 6, 4, 3 3588; PPC64LE-NEXT: stwcx. 6, 0, 5 3589; PPC64LE-NEXT: bne 0, .LBB211_1 3590; PPC64LE-NEXT: # %bb.2: 3591; PPC64LE-NEXT: lwsync 3592; PPC64LE-NEXT: blr 3593 %ret = atomicrmw nand i32* %ptr, i32 %val acquire 3594 ret i32 %ret 3595} 3596 3597define i32 @test212(i32* %ptr, i32 %val) { 3598; PPC64LE-LABEL: test212: 3599; PPC64LE: # %bb.0: 3600; PPC64LE-NEXT: lwsync 3601; PPC64LE-NEXT: .LBB212_1: 3602; PPC64LE-NEXT: lwarx 5, 0, 3 3603; PPC64LE-NEXT: nand 6, 4, 5 3604; PPC64LE-NEXT: stwcx. 6, 0, 3 3605; PPC64LE-NEXT: bne 0, .LBB212_1 3606; PPC64LE-NEXT: # %bb.2: 3607; PPC64LE-NEXT: mr 3, 5 3608; PPC64LE-NEXT: blr 3609 %ret = atomicrmw nand i32* %ptr, i32 %val release 3610 ret i32 %ret 3611} 3612 3613define i32 @test213(i32* %ptr, i32 %val) { 3614; PPC64LE-LABEL: test213: 3615; PPC64LE: # %bb.0: 3616; PPC64LE-NEXT: lwsync 3617; PPC64LE-NEXT: .LBB213_1: 3618; PPC64LE-NEXT: lwarx 5, 0, 3 3619; PPC64LE-NEXT: nand 6, 4, 5 3620; PPC64LE-NEXT: stwcx. 6, 0, 3 3621; PPC64LE-NEXT: bne 0, .LBB213_1 3622; PPC64LE-NEXT: # %bb.2: 3623; PPC64LE-NEXT: mr 3, 5 3624; PPC64LE-NEXT: lwsync 3625; PPC64LE-NEXT: blr 3626 %ret = atomicrmw nand i32* %ptr, i32 %val acq_rel 3627 ret i32 %ret 3628} 3629 3630define i32 @test214(i32* %ptr, i32 %val) { 3631; PPC64LE-LABEL: test214: 3632; PPC64LE: # %bb.0: 3633; PPC64LE-NEXT: sync 3634; PPC64LE-NEXT: .LBB214_1: 3635; PPC64LE-NEXT: lwarx 5, 0, 3 3636; PPC64LE-NEXT: nand 6, 4, 5 3637; PPC64LE-NEXT: stwcx. 6, 0, 3 3638; PPC64LE-NEXT: bne 0, .LBB214_1 3639; PPC64LE-NEXT: # %bb.2: 3640; PPC64LE-NEXT: mr 3, 5 3641; PPC64LE-NEXT: lwsync 3642; PPC64LE-NEXT: blr 3643 %ret = atomicrmw nand i32* %ptr, i32 %val seq_cst 3644 ret i32 %ret 3645} 3646 3647define i64 @test215(i64* %ptr, i64 %val) { 3648; PPC64LE-LABEL: test215: 3649; PPC64LE: # %bb.0: 3650; PPC64LE-NEXT: .LBB215_1: 3651; PPC64LE-NEXT: ldarx 5, 0, 3 3652; PPC64LE-NEXT: nand 6, 4, 5 3653; PPC64LE-NEXT: stdcx. 6, 0, 3 3654; PPC64LE-NEXT: bne 0, .LBB215_1 3655; PPC64LE-NEXT: # %bb.2: 3656; PPC64LE-NEXT: mr 3, 5 3657; PPC64LE-NEXT: blr 3658 %ret = atomicrmw nand i64* %ptr, i64 %val monotonic 3659 ret i64 %ret 3660} 3661 3662define i64 @test216(i64* %ptr, i64 %val) { 3663; PPC64LE-LABEL: test216: 3664; PPC64LE: # %bb.0: 3665; PPC64LE-NEXT: mr 5, 3 3666; PPC64LE-NEXT: .LBB216_1: 3667; PPC64LE-NEXT: ldarx 3, 0, 5 3668; PPC64LE-NEXT: nand 6, 4, 3 3669; PPC64LE-NEXT: stdcx. 6, 0, 5 3670; PPC64LE-NEXT: bne 0, .LBB216_1 3671; PPC64LE-NEXT: # %bb.2: 3672; PPC64LE-NEXT: lwsync 3673; PPC64LE-NEXT: blr 3674 %ret = atomicrmw nand i64* %ptr, i64 %val acquire 3675 ret i64 %ret 3676} 3677 3678define i64 @test217(i64* %ptr, i64 %val) { 3679; PPC64LE-LABEL: test217: 3680; PPC64LE: # %bb.0: 3681; PPC64LE-NEXT: lwsync 3682; PPC64LE-NEXT: .LBB217_1: 3683; PPC64LE-NEXT: ldarx 5, 0, 3 3684; PPC64LE-NEXT: nand 6, 4, 5 3685; PPC64LE-NEXT: stdcx. 6, 0, 3 3686; PPC64LE-NEXT: bne 0, .LBB217_1 3687; PPC64LE-NEXT: # %bb.2: 3688; PPC64LE-NEXT: mr 3, 5 3689; PPC64LE-NEXT: blr 3690 %ret = atomicrmw nand i64* %ptr, i64 %val release 3691 ret i64 %ret 3692} 3693 3694define i64 @test218(i64* %ptr, i64 %val) { 3695; PPC64LE-LABEL: test218: 3696; PPC64LE: # %bb.0: 3697; PPC64LE-NEXT: lwsync 3698; PPC64LE-NEXT: .LBB218_1: 3699; PPC64LE-NEXT: ldarx 5, 0, 3 3700; PPC64LE-NEXT: nand 6, 4, 5 3701; PPC64LE-NEXT: stdcx. 6, 0, 3 3702; PPC64LE-NEXT: bne 0, .LBB218_1 3703; PPC64LE-NEXT: # %bb.2: 3704; PPC64LE-NEXT: mr 3, 5 3705; PPC64LE-NEXT: lwsync 3706; PPC64LE-NEXT: blr 3707 %ret = atomicrmw nand i64* %ptr, i64 %val acq_rel 3708 ret i64 %ret 3709} 3710 3711define i64 @test219(i64* %ptr, i64 %val) { 3712; PPC64LE-LABEL: test219: 3713; PPC64LE: # %bb.0: 3714; PPC64LE-NEXT: sync 3715; PPC64LE-NEXT: .LBB219_1: 3716; PPC64LE-NEXT: ldarx 5, 0, 3 3717; PPC64LE-NEXT: nand 6, 4, 5 3718; PPC64LE-NEXT: stdcx. 6, 0, 3 3719; PPC64LE-NEXT: bne 0, .LBB219_1 3720; PPC64LE-NEXT: # %bb.2: 3721; PPC64LE-NEXT: mr 3, 5 3722; PPC64LE-NEXT: lwsync 3723; PPC64LE-NEXT: blr 3724 %ret = atomicrmw nand i64* %ptr, i64 %val seq_cst 3725 ret i64 %ret 3726} 3727 3728define i8 @test220(i8* %ptr, i8 %val) { 3729; PPC64LE-LABEL: test220: 3730; PPC64LE: # %bb.0: 3731; PPC64LE-NEXT: .LBB220_1: 3732; PPC64LE-NEXT: lbarx 5, 0, 3 3733; PPC64LE-NEXT: or 6, 4, 5 3734; PPC64LE-NEXT: stbcx. 6, 0, 3 3735; PPC64LE-NEXT: bne 0, .LBB220_1 3736; PPC64LE-NEXT: # %bb.2: 3737; PPC64LE-NEXT: mr 3, 5 3738; PPC64LE-NEXT: blr 3739 %ret = atomicrmw or i8* %ptr, i8 %val monotonic 3740 ret i8 %ret 3741} 3742 3743define i8 @test221(i8* %ptr, i8 %val) { 3744; PPC64LE-LABEL: test221: 3745; PPC64LE: # %bb.0: 3746; PPC64LE-NEXT: mr 5, 3 3747; PPC64LE-NEXT: .LBB221_1: 3748; PPC64LE-NEXT: lbarx 3, 0, 5 3749; PPC64LE-NEXT: or 6, 4, 3 3750; PPC64LE-NEXT: stbcx. 6, 0, 5 3751; PPC64LE-NEXT: bne 0, .LBB221_1 3752; PPC64LE-NEXT: # %bb.2: 3753; PPC64LE-NEXT: lwsync 3754; PPC64LE-NEXT: blr 3755 %ret = atomicrmw or i8* %ptr, i8 %val acquire 3756 ret i8 %ret 3757} 3758 3759define i8 @test222(i8* %ptr, i8 %val) { 3760; PPC64LE-LABEL: test222: 3761; PPC64LE: # %bb.0: 3762; PPC64LE-NEXT: lwsync 3763; PPC64LE-NEXT: .LBB222_1: 3764; PPC64LE-NEXT: lbarx 5, 0, 3 3765; PPC64LE-NEXT: or 6, 4, 5 3766; PPC64LE-NEXT: stbcx. 6, 0, 3 3767; PPC64LE-NEXT: bne 0, .LBB222_1 3768; PPC64LE-NEXT: # %bb.2: 3769; PPC64LE-NEXT: mr 3, 5 3770; PPC64LE-NEXT: blr 3771 %ret = atomicrmw or i8* %ptr, i8 %val release 3772 ret i8 %ret 3773} 3774 3775define i8 @test223(i8* %ptr, i8 %val) { 3776; PPC64LE-LABEL: test223: 3777; PPC64LE: # %bb.0: 3778; PPC64LE-NEXT: lwsync 3779; PPC64LE-NEXT: .LBB223_1: 3780; PPC64LE-NEXT: lbarx 5, 0, 3 3781; PPC64LE-NEXT: or 6, 4, 5 3782; PPC64LE-NEXT: stbcx. 6, 0, 3 3783; PPC64LE-NEXT: bne 0, .LBB223_1 3784; PPC64LE-NEXT: # %bb.2: 3785; PPC64LE-NEXT: mr 3, 5 3786; PPC64LE-NEXT: lwsync 3787; PPC64LE-NEXT: blr 3788 %ret = atomicrmw or i8* %ptr, i8 %val acq_rel 3789 ret i8 %ret 3790} 3791 3792define i8 @test224(i8* %ptr, i8 %val) { 3793; PPC64LE-LABEL: test224: 3794; PPC64LE: # %bb.0: 3795; PPC64LE-NEXT: sync 3796; PPC64LE-NEXT: .LBB224_1: 3797; PPC64LE-NEXT: lbarx 5, 0, 3 3798; PPC64LE-NEXT: or 6, 4, 5 3799; PPC64LE-NEXT: stbcx. 6, 0, 3 3800; PPC64LE-NEXT: bne 0, .LBB224_1 3801; PPC64LE-NEXT: # %bb.2: 3802; PPC64LE-NEXT: mr 3, 5 3803; PPC64LE-NEXT: lwsync 3804; PPC64LE-NEXT: blr 3805 %ret = atomicrmw or i8* %ptr, i8 %val seq_cst 3806 ret i8 %ret 3807} 3808 3809define i16 @test225(i16* %ptr, i16 %val) { 3810; PPC64LE-LABEL: test225: 3811; PPC64LE: # %bb.0: 3812; PPC64LE-NEXT: .LBB225_1: 3813; PPC64LE-NEXT: lharx 5, 0, 3 3814; PPC64LE-NEXT: or 6, 4, 5 3815; PPC64LE-NEXT: sthcx. 6, 0, 3 3816; PPC64LE-NEXT: bne 0, .LBB225_1 3817; PPC64LE-NEXT: # %bb.2: 3818; PPC64LE-NEXT: mr 3, 5 3819; PPC64LE-NEXT: blr 3820 %ret = atomicrmw or i16* %ptr, i16 %val monotonic 3821 ret i16 %ret 3822} 3823 3824define i16 @test226(i16* %ptr, i16 %val) { 3825; PPC64LE-LABEL: test226: 3826; PPC64LE: # %bb.0: 3827; PPC64LE-NEXT: mr 5, 3 3828; PPC64LE-NEXT: .LBB226_1: 3829; PPC64LE-NEXT: lharx 3, 0, 5 3830; PPC64LE-NEXT: or 6, 4, 3 3831; PPC64LE-NEXT: sthcx. 6, 0, 5 3832; PPC64LE-NEXT: bne 0, .LBB226_1 3833; PPC64LE-NEXT: # %bb.2: 3834; PPC64LE-NEXT: lwsync 3835; PPC64LE-NEXT: blr 3836 %ret = atomicrmw or i16* %ptr, i16 %val acquire 3837 ret i16 %ret 3838} 3839 3840define i16 @test227(i16* %ptr, i16 %val) { 3841; PPC64LE-LABEL: test227: 3842; PPC64LE: # %bb.0: 3843; PPC64LE-NEXT: lwsync 3844; PPC64LE-NEXT: .LBB227_1: 3845; PPC64LE-NEXT: lharx 5, 0, 3 3846; PPC64LE-NEXT: or 6, 4, 5 3847; PPC64LE-NEXT: sthcx. 6, 0, 3 3848; PPC64LE-NEXT: bne 0, .LBB227_1 3849; PPC64LE-NEXT: # %bb.2: 3850; PPC64LE-NEXT: mr 3, 5 3851; PPC64LE-NEXT: blr 3852 %ret = atomicrmw or i16* %ptr, i16 %val release 3853 ret i16 %ret 3854} 3855 3856define i16 @test228(i16* %ptr, i16 %val) { 3857; PPC64LE-LABEL: test228: 3858; PPC64LE: # %bb.0: 3859; PPC64LE-NEXT: lwsync 3860; PPC64LE-NEXT: .LBB228_1: 3861; PPC64LE-NEXT: lharx 5, 0, 3 3862; PPC64LE-NEXT: or 6, 4, 5 3863; PPC64LE-NEXT: sthcx. 6, 0, 3 3864; PPC64LE-NEXT: bne 0, .LBB228_1 3865; PPC64LE-NEXT: # %bb.2: 3866; PPC64LE-NEXT: mr 3, 5 3867; PPC64LE-NEXT: lwsync 3868; PPC64LE-NEXT: blr 3869 %ret = atomicrmw or i16* %ptr, i16 %val acq_rel 3870 ret i16 %ret 3871} 3872 3873define i16 @test229(i16* %ptr, i16 %val) { 3874; PPC64LE-LABEL: test229: 3875; PPC64LE: # %bb.0: 3876; PPC64LE-NEXT: sync 3877; PPC64LE-NEXT: .LBB229_1: 3878; PPC64LE-NEXT: lharx 5, 0, 3 3879; PPC64LE-NEXT: or 6, 4, 5 3880; PPC64LE-NEXT: sthcx. 6, 0, 3 3881; PPC64LE-NEXT: bne 0, .LBB229_1 3882; PPC64LE-NEXT: # %bb.2: 3883; PPC64LE-NEXT: mr 3, 5 3884; PPC64LE-NEXT: lwsync 3885; PPC64LE-NEXT: blr 3886 %ret = atomicrmw or i16* %ptr, i16 %val seq_cst 3887 ret i16 %ret 3888} 3889 3890define i32 @test230(i32* %ptr, i32 %val) { 3891; PPC64LE-LABEL: test230: 3892; PPC64LE: # %bb.0: 3893; PPC64LE-NEXT: .LBB230_1: 3894; PPC64LE-NEXT: lwarx 5, 0, 3 3895; PPC64LE-NEXT: or 6, 4, 5 3896; PPC64LE-NEXT: stwcx. 6, 0, 3 3897; PPC64LE-NEXT: bne 0, .LBB230_1 3898; PPC64LE-NEXT: # %bb.2: 3899; PPC64LE-NEXT: mr 3, 5 3900; PPC64LE-NEXT: blr 3901 %ret = atomicrmw or i32* %ptr, i32 %val monotonic 3902 ret i32 %ret 3903} 3904 3905define i32 @test231(i32* %ptr, i32 %val) { 3906; PPC64LE-LABEL: test231: 3907; PPC64LE: # %bb.0: 3908; PPC64LE-NEXT: mr 5, 3 3909; PPC64LE-NEXT: .LBB231_1: 3910; PPC64LE-NEXT: lwarx 3, 0, 5 3911; PPC64LE-NEXT: or 6, 4, 3 3912; PPC64LE-NEXT: stwcx. 6, 0, 5 3913; PPC64LE-NEXT: bne 0, .LBB231_1 3914; PPC64LE-NEXT: # %bb.2: 3915; PPC64LE-NEXT: lwsync 3916; PPC64LE-NEXT: blr 3917 %ret = atomicrmw or i32* %ptr, i32 %val acquire 3918 ret i32 %ret 3919} 3920 3921define i32 @test232(i32* %ptr, i32 %val) { 3922; PPC64LE-LABEL: test232: 3923; PPC64LE: # %bb.0: 3924; PPC64LE-NEXT: lwsync 3925; PPC64LE-NEXT: .LBB232_1: 3926; PPC64LE-NEXT: lwarx 5, 0, 3 3927; PPC64LE-NEXT: or 6, 4, 5 3928; PPC64LE-NEXT: stwcx. 6, 0, 3 3929; PPC64LE-NEXT: bne 0, .LBB232_1 3930; PPC64LE-NEXT: # %bb.2: 3931; PPC64LE-NEXT: mr 3, 5 3932; PPC64LE-NEXT: blr 3933 %ret = atomicrmw or i32* %ptr, i32 %val release 3934 ret i32 %ret 3935} 3936 3937define i32 @test233(i32* %ptr, i32 %val) { 3938; PPC64LE-LABEL: test233: 3939; PPC64LE: # %bb.0: 3940; PPC64LE-NEXT: lwsync 3941; PPC64LE-NEXT: .LBB233_1: 3942; PPC64LE-NEXT: lwarx 5, 0, 3 3943; PPC64LE-NEXT: or 6, 4, 5 3944; PPC64LE-NEXT: stwcx. 6, 0, 3 3945; PPC64LE-NEXT: bne 0, .LBB233_1 3946; PPC64LE-NEXT: # %bb.2: 3947; PPC64LE-NEXT: mr 3, 5 3948; PPC64LE-NEXT: lwsync 3949; PPC64LE-NEXT: blr 3950 %ret = atomicrmw or i32* %ptr, i32 %val acq_rel 3951 ret i32 %ret 3952} 3953 3954define i32 @test234(i32* %ptr, i32 %val) { 3955; PPC64LE-LABEL: test234: 3956; PPC64LE: # %bb.0: 3957; PPC64LE-NEXT: sync 3958; PPC64LE-NEXT: .LBB234_1: 3959; PPC64LE-NEXT: lwarx 5, 0, 3 3960; PPC64LE-NEXT: or 6, 4, 5 3961; PPC64LE-NEXT: stwcx. 6, 0, 3 3962; PPC64LE-NEXT: bne 0, .LBB234_1 3963; PPC64LE-NEXT: # %bb.2: 3964; PPC64LE-NEXT: mr 3, 5 3965; PPC64LE-NEXT: lwsync 3966; PPC64LE-NEXT: blr 3967 %ret = atomicrmw or i32* %ptr, i32 %val seq_cst 3968 ret i32 %ret 3969} 3970 3971define i64 @test235(i64* %ptr, i64 %val) { 3972; PPC64LE-LABEL: test235: 3973; PPC64LE: # %bb.0: 3974; PPC64LE-NEXT: .LBB235_1: 3975; PPC64LE-NEXT: ldarx 5, 0, 3 3976; PPC64LE-NEXT: or 6, 4, 5 3977; PPC64LE-NEXT: stdcx. 6, 0, 3 3978; PPC64LE-NEXT: bne 0, .LBB235_1 3979; PPC64LE-NEXT: # %bb.2: 3980; PPC64LE-NEXT: mr 3, 5 3981; PPC64LE-NEXT: blr 3982 %ret = atomicrmw or i64* %ptr, i64 %val monotonic 3983 ret i64 %ret 3984} 3985 3986define i64 @test236(i64* %ptr, i64 %val) { 3987; PPC64LE-LABEL: test236: 3988; PPC64LE: # %bb.0: 3989; PPC64LE-NEXT: mr 5, 3 3990; PPC64LE-NEXT: .LBB236_1: 3991; PPC64LE-NEXT: ldarx 3, 0, 5 3992; PPC64LE-NEXT: or 6, 4, 3 3993; PPC64LE-NEXT: stdcx. 6, 0, 5 3994; PPC64LE-NEXT: bne 0, .LBB236_1 3995; PPC64LE-NEXT: # %bb.2: 3996; PPC64LE-NEXT: lwsync 3997; PPC64LE-NEXT: blr 3998 %ret = atomicrmw or i64* %ptr, i64 %val acquire 3999 ret i64 %ret 4000} 4001 4002define i64 @test237(i64* %ptr, i64 %val) { 4003; PPC64LE-LABEL: test237: 4004; PPC64LE: # %bb.0: 4005; PPC64LE-NEXT: lwsync 4006; PPC64LE-NEXT: .LBB237_1: 4007; PPC64LE-NEXT: ldarx 5, 0, 3 4008; PPC64LE-NEXT: or 6, 4, 5 4009; PPC64LE-NEXT: stdcx. 6, 0, 3 4010; PPC64LE-NEXT: bne 0, .LBB237_1 4011; PPC64LE-NEXT: # %bb.2: 4012; PPC64LE-NEXT: mr 3, 5 4013; PPC64LE-NEXT: blr 4014 %ret = atomicrmw or i64* %ptr, i64 %val release 4015 ret i64 %ret 4016} 4017 4018define i64 @test238(i64* %ptr, i64 %val) { 4019; PPC64LE-LABEL: test238: 4020; PPC64LE: # %bb.0: 4021; PPC64LE-NEXT: lwsync 4022; PPC64LE-NEXT: .LBB238_1: 4023; PPC64LE-NEXT: ldarx 5, 0, 3 4024; PPC64LE-NEXT: or 6, 4, 5 4025; PPC64LE-NEXT: stdcx. 6, 0, 3 4026; PPC64LE-NEXT: bne 0, .LBB238_1 4027; PPC64LE-NEXT: # %bb.2: 4028; PPC64LE-NEXT: mr 3, 5 4029; PPC64LE-NEXT: lwsync 4030; PPC64LE-NEXT: blr 4031 %ret = atomicrmw or i64* %ptr, i64 %val acq_rel 4032 ret i64 %ret 4033} 4034 4035define i64 @test239(i64* %ptr, i64 %val) { 4036; PPC64LE-LABEL: test239: 4037; PPC64LE: # %bb.0: 4038; PPC64LE-NEXT: sync 4039; PPC64LE-NEXT: .LBB239_1: 4040; PPC64LE-NEXT: ldarx 5, 0, 3 4041; PPC64LE-NEXT: or 6, 4, 5 4042; PPC64LE-NEXT: stdcx. 6, 0, 3 4043; PPC64LE-NEXT: bne 0, .LBB239_1 4044; PPC64LE-NEXT: # %bb.2: 4045; PPC64LE-NEXT: mr 3, 5 4046; PPC64LE-NEXT: lwsync 4047; PPC64LE-NEXT: blr 4048 %ret = atomicrmw or i64* %ptr, i64 %val seq_cst 4049 ret i64 %ret 4050} 4051 4052define i8 @test240(i8* %ptr, i8 %val) { 4053; PPC64LE-LABEL: test240: 4054; PPC64LE: # %bb.0: 4055; PPC64LE-NEXT: .LBB240_1: 4056; PPC64LE-NEXT: lbarx 5, 0, 3 4057; PPC64LE-NEXT: xor 6, 4, 5 4058; PPC64LE-NEXT: stbcx. 6, 0, 3 4059; PPC64LE-NEXT: bne 0, .LBB240_1 4060; PPC64LE-NEXT: # %bb.2: 4061; PPC64LE-NEXT: mr 3, 5 4062; PPC64LE-NEXT: blr 4063 %ret = atomicrmw xor i8* %ptr, i8 %val monotonic 4064 ret i8 %ret 4065} 4066 4067define i8 @test241(i8* %ptr, i8 %val) { 4068; PPC64LE-LABEL: test241: 4069; PPC64LE: # %bb.0: 4070; PPC64LE-NEXT: mr 5, 3 4071; PPC64LE-NEXT: .LBB241_1: 4072; PPC64LE-NEXT: lbarx 3, 0, 5 4073; PPC64LE-NEXT: xor 6, 4, 3 4074; PPC64LE-NEXT: stbcx. 6, 0, 5 4075; PPC64LE-NEXT: bne 0, .LBB241_1 4076; PPC64LE-NEXT: # %bb.2: 4077; PPC64LE-NEXT: lwsync 4078; PPC64LE-NEXT: blr 4079 %ret = atomicrmw xor i8* %ptr, i8 %val acquire 4080 ret i8 %ret 4081} 4082 4083define i8 @test242(i8* %ptr, i8 %val) { 4084; PPC64LE-LABEL: test242: 4085; PPC64LE: # %bb.0: 4086; PPC64LE-NEXT: lwsync 4087; PPC64LE-NEXT: .LBB242_1: 4088; PPC64LE-NEXT: lbarx 5, 0, 3 4089; PPC64LE-NEXT: xor 6, 4, 5 4090; PPC64LE-NEXT: stbcx. 6, 0, 3 4091; PPC64LE-NEXT: bne 0, .LBB242_1 4092; PPC64LE-NEXT: # %bb.2: 4093; PPC64LE-NEXT: mr 3, 5 4094; PPC64LE-NEXT: blr 4095 %ret = atomicrmw xor i8* %ptr, i8 %val release 4096 ret i8 %ret 4097} 4098 4099define i8 @test243(i8* %ptr, i8 %val) { 4100; PPC64LE-LABEL: test243: 4101; PPC64LE: # %bb.0: 4102; PPC64LE-NEXT: lwsync 4103; PPC64LE-NEXT: .LBB243_1: 4104; PPC64LE-NEXT: lbarx 5, 0, 3 4105; PPC64LE-NEXT: xor 6, 4, 5 4106; PPC64LE-NEXT: stbcx. 6, 0, 3 4107; PPC64LE-NEXT: bne 0, .LBB243_1 4108; PPC64LE-NEXT: # %bb.2: 4109; PPC64LE-NEXT: mr 3, 5 4110; PPC64LE-NEXT: lwsync 4111; PPC64LE-NEXT: blr 4112 %ret = atomicrmw xor i8* %ptr, i8 %val acq_rel 4113 ret i8 %ret 4114} 4115 4116define i8 @test244(i8* %ptr, i8 %val) { 4117; PPC64LE-LABEL: test244: 4118; PPC64LE: # %bb.0: 4119; PPC64LE-NEXT: sync 4120; PPC64LE-NEXT: .LBB244_1: 4121; PPC64LE-NEXT: lbarx 5, 0, 3 4122; PPC64LE-NEXT: xor 6, 4, 5 4123; PPC64LE-NEXT: stbcx. 6, 0, 3 4124; PPC64LE-NEXT: bne 0, .LBB244_1 4125; PPC64LE-NEXT: # %bb.2: 4126; PPC64LE-NEXT: mr 3, 5 4127; PPC64LE-NEXT: lwsync 4128; PPC64LE-NEXT: blr 4129 %ret = atomicrmw xor i8* %ptr, i8 %val seq_cst 4130 ret i8 %ret 4131} 4132 4133define i16 @test245(i16* %ptr, i16 %val) { 4134; PPC64LE-LABEL: test245: 4135; PPC64LE: # %bb.0: 4136; PPC64LE-NEXT: .LBB245_1: 4137; PPC64LE-NEXT: lharx 5, 0, 3 4138; PPC64LE-NEXT: xor 6, 4, 5 4139; PPC64LE-NEXT: sthcx. 6, 0, 3 4140; PPC64LE-NEXT: bne 0, .LBB245_1 4141; PPC64LE-NEXT: # %bb.2: 4142; PPC64LE-NEXT: mr 3, 5 4143; PPC64LE-NEXT: blr 4144 %ret = atomicrmw xor i16* %ptr, i16 %val monotonic 4145 ret i16 %ret 4146} 4147 4148define i16 @test246(i16* %ptr, i16 %val) { 4149; PPC64LE-LABEL: test246: 4150; PPC64LE: # %bb.0: 4151; PPC64LE-NEXT: mr 5, 3 4152; PPC64LE-NEXT: .LBB246_1: 4153; PPC64LE-NEXT: lharx 3, 0, 5 4154; PPC64LE-NEXT: xor 6, 4, 3 4155; PPC64LE-NEXT: sthcx. 6, 0, 5 4156; PPC64LE-NEXT: bne 0, .LBB246_1 4157; PPC64LE-NEXT: # %bb.2: 4158; PPC64LE-NEXT: lwsync 4159; PPC64LE-NEXT: blr 4160 %ret = atomicrmw xor i16* %ptr, i16 %val acquire 4161 ret i16 %ret 4162} 4163 4164define i16 @test247(i16* %ptr, i16 %val) { 4165; PPC64LE-LABEL: test247: 4166; PPC64LE: # %bb.0: 4167; PPC64LE-NEXT: lwsync 4168; PPC64LE-NEXT: .LBB247_1: 4169; PPC64LE-NEXT: lharx 5, 0, 3 4170; PPC64LE-NEXT: xor 6, 4, 5 4171; PPC64LE-NEXT: sthcx. 6, 0, 3 4172; PPC64LE-NEXT: bne 0, .LBB247_1 4173; PPC64LE-NEXT: # %bb.2: 4174; PPC64LE-NEXT: mr 3, 5 4175; PPC64LE-NEXT: blr 4176 %ret = atomicrmw xor i16* %ptr, i16 %val release 4177 ret i16 %ret 4178} 4179 4180define i16 @test248(i16* %ptr, i16 %val) { 4181; PPC64LE-LABEL: test248: 4182; PPC64LE: # %bb.0: 4183; PPC64LE-NEXT: lwsync 4184; PPC64LE-NEXT: .LBB248_1: 4185; PPC64LE-NEXT: lharx 5, 0, 3 4186; PPC64LE-NEXT: xor 6, 4, 5 4187; PPC64LE-NEXT: sthcx. 6, 0, 3 4188; PPC64LE-NEXT: bne 0, .LBB248_1 4189; PPC64LE-NEXT: # %bb.2: 4190; PPC64LE-NEXT: mr 3, 5 4191; PPC64LE-NEXT: lwsync 4192; PPC64LE-NEXT: blr 4193 %ret = atomicrmw xor i16* %ptr, i16 %val acq_rel 4194 ret i16 %ret 4195} 4196 4197define i16 @test249(i16* %ptr, i16 %val) { 4198; PPC64LE-LABEL: test249: 4199; PPC64LE: # %bb.0: 4200; PPC64LE-NEXT: sync 4201; PPC64LE-NEXT: .LBB249_1: 4202; PPC64LE-NEXT: lharx 5, 0, 3 4203; PPC64LE-NEXT: xor 6, 4, 5 4204; PPC64LE-NEXT: sthcx. 6, 0, 3 4205; PPC64LE-NEXT: bne 0, .LBB249_1 4206; PPC64LE-NEXT: # %bb.2: 4207; PPC64LE-NEXT: mr 3, 5 4208; PPC64LE-NEXT: lwsync 4209; PPC64LE-NEXT: blr 4210 %ret = atomicrmw xor i16* %ptr, i16 %val seq_cst 4211 ret i16 %ret 4212} 4213 4214define i32 @test250(i32* %ptr, i32 %val) { 4215; PPC64LE-LABEL: test250: 4216; PPC64LE: # %bb.0: 4217; PPC64LE-NEXT: .LBB250_1: 4218; PPC64LE-NEXT: lwarx 5, 0, 3 4219; PPC64LE-NEXT: xor 6, 4, 5 4220; PPC64LE-NEXT: stwcx. 6, 0, 3 4221; PPC64LE-NEXT: bne 0, .LBB250_1 4222; PPC64LE-NEXT: # %bb.2: 4223; PPC64LE-NEXT: mr 3, 5 4224; PPC64LE-NEXT: blr 4225 %ret = atomicrmw xor i32* %ptr, i32 %val monotonic 4226 ret i32 %ret 4227} 4228 4229define i32 @test251(i32* %ptr, i32 %val) { 4230; PPC64LE-LABEL: test251: 4231; PPC64LE: # %bb.0: 4232; PPC64LE-NEXT: mr 5, 3 4233; PPC64LE-NEXT: .LBB251_1: 4234; PPC64LE-NEXT: lwarx 3, 0, 5 4235; PPC64LE-NEXT: xor 6, 4, 3 4236; PPC64LE-NEXT: stwcx. 6, 0, 5 4237; PPC64LE-NEXT: bne 0, .LBB251_1 4238; PPC64LE-NEXT: # %bb.2: 4239; PPC64LE-NEXT: lwsync 4240; PPC64LE-NEXT: blr 4241 %ret = atomicrmw xor i32* %ptr, i32 %val acquire 4242 ret i32 %ret 4243} 4244 4245define i32 @test252(i32* %ptr, i32 %val) { 4246; PPC64LE-LABEL: test252: 4247; PPC64LE: # %bb.0: 4248; PPC64LE-NEXT: lwsync 4249; PPC64LE-NEXT: .LBB252_1: 4250; PPC64LE-NEXT: lwarx 5, 0, 3 4251; PPC64LE-NEXT: xor 6, 4, 5 4252; PPC64LE-NEXT: stwcx. 6, 0, 3 4253; PPC64LE-NEXT: bne 0, .LBB252_1 4254; PPC64LE-NEXT: # %bb.2: 4255; PPC64LE-NEXT: mr 3, 5 4256; PPC64LE-NEXT: blr 4257 %ret = atomicrmw xor i32* %ptr, i32 %val release 4258 ret i32 %ret 4259} 4260 4261define i32 @test253(i32* %ptr, i32 %val) { 4262; PPC64LE-LABEL: test253: 4263; PPC64LE: # %bb.0: 4264; PPC64LE-NEXT: lwsync 4265; PPC64LE-NEXT: .LBB253_1: 4266; PPC64LE-NEXT: lwarx 5, 0, 3 4267; PPC64LE-NEXT: xor 6, 4, 5 4268; PPC64LE-NEXT: stwcx. 6, 0, 3 4269; PPC64LE-NEXT: bne 0, .LBB253_1 4270; PPC64LE-NEXT: # %bb.2: 4271; PPC64LE-NEXT: mr 3, 5 4272; PPC64LE-NEXT: lwsync 4273; PPC64LE-NEXT: blr 4274 %ret = atomicrmw xor i32* %ptr, i32 %val acq_rel 4275 ret i32 %ret 4276} 4277 4278define i32 @test254(i32* %ptr, i32 %val) { 4279; PPC64LE-LABEL: test254: 4280; PPC64LE: # %bb.0: 4281; PPC64LE-NEXT: sync 4282; PPC64LE-NEXT: .LBB254_1: 4283; PPC64LE-NEXT: lwarx 5, 0, 3 4284; PPC64LE-NEXT: xor 6, 4, 5 4285; PPC64LE-NEXT: stwcx. 6, 0, 3 4286; PPC64LE-NEXT: bne 0, .LBB254_1 4287; PPC64LE-NEXT: # %bb.2: 4288; PPC64LE-NEXT: mr 3, 5 4289; PPC64LE-NEXT: lwsync 4290; PPC64LE-NEXT: blr 4291 %ret = atomicrmw xor i32* %ptr, i32 %val seq_cst 4292 ret i32 %ret 4293} 4294 4295define i64 @test255(i64* %ptr, i64 %val) { 4296; PPC64LE-LABEL: test255: 4297; PPC64LE: # %bb.0: 4298; PPC64LE-NEXT: .LBB255_1: 4299; PPC64LE-NEXT: ldarx 5, 0, 3 4300; PPC64LE-NEXT: xor 6, 4, 5 4301; PPC64LE-NEXT: stdcx. 6, 0, 3 4302; PPC64LE-NEXT: bne 0, .LBB255_1 4303; PPC64LE-NEXT: # %bb.2: 4304; PPC64LE-NEXT: mr 3, 5 4305; PPC64LE-NEXT: blr 4306 %ret = atomicrmw xor i64* %ptr, i64 %val monotonic 4307 ret i64 %ret 4308} 4309 4310define i64 @test256(i64* %ptr, i64 %val) { 4311; PPC64LE-LABEL: test256: 4312; PPC64LE: # %bb.0: 4313; PPC64LE-NEXT: mr 5, 3 4314; PPC64LE-NEXT: .LBB256_1: 4315; PPC64LE-NEXT: ldarx 3, 0, 5 4316; PPC64LE-NEXT: xor 6, 4, 3 4317; PPC64LE-NEXT: stdcx. 6, 0, 5 4318; PPC64LE-NEXT: bne 0, .LBB256_1 4319; PPC64LE-NEXT: # %bb.2: 4320; PPC64LE-NEXT: lwsync 4321; PPC64LE-NEXT: blr 4322 %ret = atomicrmw xor i64* %ptr, i64 %val acquire 4323 ret i64 %ret 4324} 4325 4326define i64 @test257(i64* %ptr, i64 %val) { 4327; PPC64LE-LABEL: test257: 4328; PPC64LE: # %bb.0: 4329; PPC64LE-NEXT: lwsync 4330; PPC64LE-NEXT: .LBB257_1: 4331; PPC64LE-NEXT: ldarx 5, 0, 3 4332; PPC64LE-NEXT: xor 6, 4, 5 4333; PPC64LE-NEXT: stdcx. 6, 0, 3 4334; PPC64LE-NEXT: bne 0, .LBB257_1 4335; PPC64LE-NEXT: # %bb.2: 4336; PPC64LE-NEXT: mr 3, 5 4337; PPC64LE-NEXT: blr 4338 %ret = atomicrmw xor i64* %ptr, i64 %val release 4339 ret i64 %ret 4340} 4341 4342define i64 @test258(i64* %ptr, i64 %val) { 4343; PPC64LE-LABEL: test258: 4344; PPC64LE: # %bb.0: 4345; PPC64LE-NEXT: lwsync 4346; PPC64LE-NEXT: .LBB258_1: 4347; PPC64LE-NEXT: ldarx 5, 0, 3 4348; PPC64LE-NEXT: xor 6, 4, 5 4349; PPC64LE-NEXT: stdcx. 6, 0, 3 4350; PPC64LE-NEXT: bne 0, .LBB258_1 4351; PPC64LE-NEXT: # %bb.2: 4352; PPC64LE-NEXT: mr 3, 5 4353; PPC64LE-NEXT: lwsync 4354; PPC64LE-NEXT: blr 4355 %ret = atomicrmw xor i64* %ptr, i64 %val acq_rel 4356 ret i64 %ret 4357} 4358 4359define i64 @test259(i64* %ptr, i64 %val) { 4360; PPC64LE-LABEL: test259: 4361; PPC64LE: # %bb.0: 4362; PPC64LE-NEXT: sync 4363; PPC64LE-NEXT: .LBB259_1: 4364; PPC64LE-NEXT: ldarx 5, 0, 3 4365; PPC64LE-NEXT: xor 6, 4, 5 4366; PPC64LE-NEXT: stdcx. 6, 0, 3 4367; PPC64LE-NEXT: bne 0, .LBB259_1 4368; PPC64LE-NEXT: # %bb.2: 4369; PPC64LE-NEXT: mr 3, 5 4370; PPC64LE-NEXT: lwsync 4371; PPC64LE-NEXT: blr 4372 %ret = atomicrmw xor i64* %ptr, i64 %val seq_cst 4373 ret i64 %ret 4374} 4375 4376define i8 @test260(i8* %ptr, i8 %val) { 4377; PPC64LE-LABEL: test260: 4378; PPC64LE: # %bb.0: 4379; PPC64LE-NEXT: extsb 5, 4 4380; PPC64LE-NEXT: .LBB260_1: 4381; PPC64LE-NEXT: lbarx 4, 0, 3 4382; PPC64LE-NEXT: extsb 6, 4 4383; PPC64LE-NEXT: cmpw 5, 6 4384; PPC64LE-NEXT: ble 0, .LBB260_3 4385; PPC64LE-NEXT: # %bb.2: 4386; PPC64LE-NEXT: stbcx. 5, 0, 3 4387; PPC64LE-NEXT: bne 0, .LBB260_1 4388; PPC64LE-NEXT: .LBB260_3: 4389; PPC64LE-NEXT: mr 3, 4 4390; PPC64LE-NEXT: blr 4391 %ret = atomicrmw max i8* %ptr, i8 %val monotonic 4392 ret i8 %ret 4393} 4394 4395define i8 @test261(i8* %ptr, i8 %val) { 4396; PPC64LE-LABEL: test261: 4397; PPC64LE: # %bb.0: 4398; PPC64LE-NEXT: extsb 5, 4 4399; PPC64LE-NEXT: .LBB261_1: 4400; PPC64LE-NEXT: lbarx 4, 0, 3 4401; PPC64LE-NEXT: extsb 6, 4 4402; PPC64LE-NEXT: cmpw 5, 6 4403; PPC64LE-NEXT: ble 0, .LBB261_3 4404; PPC64LE-NEXT: # %bb.2: 4405; PPC64LE-NEXT: stbcx. 5, 0, 3 4406; PPC64LE-NEXT: bne 0, .LBB261_1 4407; PPC64LE-NEXT: .LBB261_3: 4408; PPC64LE-NEXT: mr 3, 4 4409; PPC64LE-NEXT: lwsync 4410; PPC64LE-NEXT: blr 4411 %ret = atomicrmw max i8* %ptr, i8 %val acquire 4412 ret i8 %ret 4413} 4414 4415define i8 @test262(i8* %ptr, i8 %val) { 4416; PPC64LE-LABEL: test262: 4417; PPC64LE: # %bb.0: 4418; PPC64LE-NEXT: extsb 5, 4 4419; PPC64LE-NEXT: lwsync 4420; PPC64LE-NEXT: .LBB262_1: 4421; PPC64LE-NEXT: lbarx 4, 0, 3 4422; PPC64LE-NEXT: extsb 6, 4 4423; PPC64LE-NEXT: cmpw 5, 6 4424; PPC64LE-NEXT: ble 0, .LBB262_3 4425; PPC64LE-NEXT: # %bb.2: 4426; PPC64LE-NEXT: stbcx. 5, 0, 3 4427; PPC64LE-NEXT: bne 0, .LBB262_1 4428; PPC64LE-NEXT: .LBB262_3: 4429; PPC64LE-NEXT: mr 3, 4 4430; PPC64LE-NEXT: blr 4431 %ret = atomicrmw max i8* %ptr, i8 %val release 4432 ret i8 %ret 4433} 4434 4435define i8 @test263(i8* %ptr, i8 %val) { 4436; PPC64LE-LABEL: test263: 4437; PPC64LE: # %bb.0: 4438; PPC64LE-NEXT: extsb 5, 4 4439; PPC64LE-NEXT: lwsync 4440; PPC64LE-NEXT: .LBB263_1: 4441; PPC64LE-NEXT: lbarx 4, 0, 3 4442; PPC64LE-NEXT: extsb 6, 4 4443; PPC64LE-NEXT: cmpw 5, 6 4444; PPC64LE-NEXT: ble 0, .LBB263_3 4445; PPC64LE-NEXT: # %bb.2: 4446; PPC64LE-NEXT: stbcx. 5, 0, 3 4447; PPC64LE-NEXT: bne 0, .LBB263_1 4448; PPC64LE-NEXT: .LBB263_3: 4449; PPC64LE-NEXT: mr 3, 4 4450; PPC64LE-NEXT: lwsync 4451; PPC64LE-NEXT: blr 4452 %ret = atomicrmw max i8* %ptr, i8 %val acq_rel 4453 ret i8 %ret 4454} 4455 4456define i8 @test264(i8* %ptr, i8 %val) { 4457; PPC64LE-LABEL: test264: 4458; PPC64LE: # %bb.0: 4459; PPC64LE-NEXT: extsb 5, 4 4460; PPC64LE-NEXT: sync 4461; PPC64LE-NEXT: .LBB264_1: 4462; PPC64LE-NEXT: lbarx 4, 0, 3 4463; PPC64LE-NEXT: extsb 6, 4 4464; PPC64LE-NEXT: cmpw 5, 6 4465; PPC64LE-NEXT: ble 0, .LBB264_3 4466; PPC64LE-NEXT: # %bb.2: 4467; PPC64LE-NEXT: stbcx. 5, 0, 3 4468; PPC64LE-NEXT: bne 0, .LBB264_1 4469; PPC64LE-NEXT: .LBB264_3: 4470; PPC64LE-NEXT: mr 3, 4 4471; PPC64LE-NEXT: lwsync 4472; PPC64LE-NEXT: blr 4473 %ret = atomicrmw max i8* %ptr, i8 %val seq_cst 4474 ret i8 %ret 4475} 4476 4477define i16 @test265(i16* %ptr, i16 %val) { 4478; PPC64LE-LABEL: test265: 4479; PPC64LE: # %bb.0: 4480; PPC64LE-NEXT: extsh 5, 4 4481; PPC64LE-NEXT: .LBB265_1: 4482; PPC64LE-NEXT: lharx 4, 0, 3 4483; PPC64LE-NEXT: extsh 6, 4 4484; PPC64LE-NEXT: cmpw 5, 6 4485; PPC64LE-NEXT: ble 0, .LBB265_3 4486; PPC64LE-NEXT: # %bb.2: 4487; PPC64LE-NEXT: sthcx. 5, 0, 3 4488; PPC64LE-NEXT: bne 0, .LBB265_1 4489; PPC64LE-NEXT: .LBB265_3: 4490; PPC64LE-NEXT: mr 3, 4 4491; PPC64LE-NEXT: blr 4492 %ret = atomicrmw max i16* %ptr, i16 %val monotonic 4493 ret i16 %ret 4494} 4495 4496define i16 @test266(i16* %ptr, i16 %val) { 4497; PPC64LE-LABEL: test266: 4498; PPC64LE: # %bb.0: 4499; PPC64LE-NEXT: extsh 5, 4 4500; PPC64LE-NEXT: .LBB266_1: 4501; PPC64LE-NEXT: lharx 4, 0, 3 4502; PPC64LE-NEXT: extsh 6, 4 4503; PPC64LE-NEXT: cmpw 5, 6 4504; PPC64LE-NEXT: ble 0, .LBB266_3 4505; PPC64LE-NEXT: # %bb.2: 4506; PPC64LE-NEXT: sthcx. 5, 0, 3 4507; PPC64LE-NEXT: bne 0, .LBB266_1 4508; PPC64LE-NEXT: .LBB266_3: 4509; PPC64LE-NEXT: mr 3, 4 4510; PPC64LE-NEXT: lwsync 4511; PPC64LE-NEXT: blr 4512 %ret = atomicrmw max i16* %ptr, i16 %val acquire 4513 ret i16 %ret 4514} 4515 4516define i16 @test267(i16* %ptr, i16 %val) { 4517; PPC64LE-LABEL: test267: 4518; PPC64LE: # %bb.0: 4519; PPC64LE-NEXT: extsh 5, 4 4520; PPC64LE-NEXT: lwsync 4521; PPC64LE-NEXT: .LBB267_1: 4522; PPC64LE-NEXT: lharx 4, 0, 3 4523; PPC64LE-NEXT: extsh 6, 4 4524; PPC64LE-NEXT: cmpw 5, 6 4525; PPC64LE-NEXT: ble 0, .LBB267_3 4526; PPC64LE-NEXT: # %bb.2: 4527; PPC64LE-NEXT: sthcx. 5, 0, 3 4528; PPC64LE-NEXT: bne 0, .LBB267_1 4529; PPC64LE-NEXT: .LBB267_3: 4530; PPC64LE-NEXT: mr 3, 4 4531; PPC64LE-NEXT: blr 4532 %ret = atomicrmw max i16* %ptr, i16 %val release 4533 ret i16 %ret 4534} 4535 4536define i16 @test268(i16* %ptr, i16 %val) { 4537; PPC64LE-LABEL: test268: 4538; PPC64LE: # %bb.0: 4539; PPC64LE-NEXT: extsh 5, 4 4540; PPC64LE-NEXT: lwsync 4541; PPC64LE-NEXT: .LBB268_1: 4542; PPC64LE-NEXT: lharx 4, 0, 3 4543; PPC64LE-NEXT: extsh 6, 4 4544; PPC64LE-NEXT: cmpw 5, 6 4545; PPC64LE-NEXT: ble 0, .LBB268_3 4546; PPC64LE-NEXT: # %bb.2: 4547; PPC64LE-NEXT: sthcx. 5, 0, 3 4548; PPC64LE-NEXT: bne 0, .LBB268_1 4549; PPC64LE-NEXT: .LBB268_3: 4550; PPC64LE-NEXT: mr 3, 4 4551; PPC64LE-NEXT: lwsync 4552; PPC64LE-NEXT: blr 4553 %ret = atomicrmw max i16* %ptr, i16 %val acq_rel 4554 ret i16 %ret 4555} 4556 4557define i16 @test269(i16* %ptr, i16 %val) { 4558; PPC64LE-LABEL: test269: 4559; PPC64LE: # %bb.0: 4560; PPC64LE-NEXT: extsh 5, 4 4561; PPC64LE-NEXT: sync 4562; PPC64LE-NEXT: .LBB269_1: 4563; PPC64LE-NEXT: lharx 4, 0, 3 4564; PPC64LE-NEXT: extsh 6, 4 4565; PPC64LE-NEXT: cmpw 5, 6 4566; PPC64LE-NEXT: ble 0, .LBB269_3 4567; PPC64LE-NEXT: # %bb.2: 4568; PPC64LE-NEXT: sthcx. 5, 0, 3 4569; PPC64LE-NEXT: bne 0, .LBB269_1 4570; PPC64LE-NEXT: .LBB269_3: 4571; PPC64LE-NEXT: mr 3, 4 4572; PPC64LE-NEXT: lwsync 4573; PPC64LE-NEXT: blr 4574 %ret = atomicrmw max i16* %ptr, i16 %val seq_cst 4575 ret i16 %ret 4576} 4577 4578define i32 @test270(i32* %ptr, i32 %val) { 4579; PPC64LE-LABEL: test270: 4580; PPC64LE: # %bb.0: 4581; PPC64LE-NEXT: .LBB270_1: 4582; PPC64LE-NEXT: lwarx 5, 0, 3 4583; PPC64LE-NEXT: cmpw 4, 5 4584; PPC64LE-NEXT: ble 0, .LBB270_3 4585; PPC64LE-NEXT: # %bb.2: 4586; PPC64LE-NEXT: stwcx. 4, 0, 3 4587; PPC64LE-NEXT: bne 0, .LBB270_1 4588; PPC64LE-NEXT: .LBB270_3: 4589; PPC64LE-NEXT: mr 3, 5 4590; PPC64LE-NEXT: blr 4591 %ret = atomicrmw max i32* %ptr, i32 %val monotonic 4592 ret i32 %ret 4593} 4594 4595define i32 @test271(i32* %ptr, i32 %val) { 4596; PPC64LE-LABEL: test271: 4597; PPC64LE: # %bb.0: 4598; PPC64LE-NEXT: mr 5, 3 4599; PPC64LE-NEXT: .LBB271_1: 4600; PPC64LE-NEXT: lwarx 3, 0, 5 4601; PPC64LE-NEXT: cmpw 4, 3 4602; PPC64LE-NEXT: ble 0, .LBB271_3 4603; PPC64LE-NEXT: # %bb.2: 4604; PPC64LE-NEXT: stwcx. 4, 0, 5 4605; PPC64LE-NEXT: bne 0, .LBB271_1 4606; PPC64LE-NEXT: .LBB271_3: 4607; PPC64LE-NEXT: lwsync 4608; PPC64LE-NEXT: blr 4609 %ret = atomicrmw max i32* %ptr, i32 %val acquire 4610 ret i32 %ret 4611} 4612 4613define i32 @test272(i32* %ptr, i32 %val) { 4614; PPC64LE-LABEL: test272: 4615; PPC64LE: # %bb.0: 4616; PPC64LE-NEXT: lwsync 4617; PPC64LE-NEXT: .LBB272_1: 4618; PPC64LE-NEXT: lwarx 5, 0, 3 4619; PPC64LE-NEXT: cmpw 4, 5 4620; PPC64LE-NEXT: ble 0, .LBB272_3 4621; PPC64LE-NEXT: # %bb.2: 4622; PPC64LE-NEXT: stwcx. 4, 0, 3 4623; PPC64LE-NEXT: bne 0, .LBB272_1 4624; PPC64LE-NEXT: .LBB272_3: 4625; PPC64LE-NEXT: mr 3, 5 4626; PPC64LE-NEXT: blr 4627 %ret = atomicrmw max i32* %ptr, i32 %val release 4628 ret i32 %ret 4629} 4630 4631define i32 @test273(i32* %ptr, i32 %val) { 4632; PPC64LE-LABEL: test273: 4633; PPC64LE: # %bb.0: 4634; PPC64LE-NEXT: lwsync 4635; PPC64LE-NEXT: .LBB273_1: 4636; PPC64LE-NEXT: lwarx 5, 0, 3 4637; PPC64LE-NEXT: cmpw 4, 5 4638; PPC64LE-NEXT: ble 0, .LBB273_3 4639; PPC64LE-NEXT: # %bb.2: 4640; PPC64LE-NEXT: stwcx. 4, 0, 3 4641; PPC64LE-NEXT: bne 0, .LBB273_1 4642; PPC64LE-NEXT: .LBB273_3: 4643; PPC64LE-NEXT: mr 3, 5 4644; PPC64LE-NEXT: lwsync 4645; PPC64LE-NEXT: blr 4646 %ret = atomicrmw max i32* %ptr, i32 %val acq_rel 4647 ret i32 %ret 4648} 4649 4650define i32 @test274(i32* %ptr, i32 %val) { 4651; PPC64LE-LABEL: test274: 4652; PPC64LE: # %bb.0: 4653; PPC64LE-NEXT: sync 4654; PPC64LE-NEXT: .LBB274_1: 4655; PPC64LE-NEXT: lwarx 5, 0, 3 4656; PPC64LE-NEXT: cmpw 4, 5 4657; PPC64LE-NEXT: ble 0, .LBB274_3 4658; PPC64LE-NEXT: # %bb.2: 4659; PPC64LE-NEXT: stwcx. 4, 0, 3 4660; PPC64LE-NEXT: bne 0, .LBB274_1 4661; PPC64LE-NEXT: .LBB274_3: 4662; PPC64LE-NEXT: mr 3, 5 4663; PPC64LE-NEXT: lwsync 4664; PPC64LE-NEXT: blr 4665 %ret = atomicrmw max i32* %ptr, i32 %val seq_cst 4666 ret i32 %ret 4667} 4668 4669define i64 @test275(i64* %ptr, i64 %val) { 4670; PPC64LE-LABEL: test275: 4671; PPC64LE: # %bb.0: 4672; PPC64LE-NEXT: .LBB275_1: 4673; PPC64LE-NEXT: ldarx 5, 0, 3 4674; PPC64LE-NEXT: cmpd 4, 5 4675; PPC64LE-NEXT: ble 0, .LBB275_3 4676; PPC64LE-NEXT: # %bb.2: 4677; PPC64LE-NEXT: stdcx. 4, 0, 3 4678; PPC64LE-NEXT: bne 0, .LBB275_1 4679; PPC64LE-NEXT: .LBB275_3: 4680; PPC64LE-NEXT: mr 3, 5 4681; PPC64LE-NEXT: blr 4682 %ret = atomicrmw max i64* %ptr, i64 %val monotonic 4683 ret i64 %ret 4684} 4685 4686define i64 @test276(i64* %ptr, i64 %val) { 4687; PPC64LE-LABEL: test276: 4688; PPC64LE: # %bb.0: 4689; PPC64LE-NEXT: mr 5, 3 4690; PPC64LE-NEXT: .LBB276_1: 4691; PPC64LE-NEXT: ldarx 3, 0, 5 4692; PPC64LE-NEXT: cmpd 4, 3 4693; PPC64LE-NEXT: ble 0, .LBB276_3 4694; PPC64LE-NEXT: # %bb.2: 4695; PPC64LE-NEXT: stdcx. 4, 0, 5 4696; PPC64LE-NEXT: bne 0, .LBB276_1 4697; PPC64LE-NEXT: .LBB276_3: 4698; PPC64LE-NEXT: lwsync 4699; PPC64LE-NEXT: blr 4700 %ret = atomicrmw max i64* %ptr, i64 %val acquire 4701 ret i64 %ret 4702} 4703 4704define i64 @test277(i64* %ptr, i64 %val) { 4705; PPC64LE-LABEL: test277: 4706; PPC64LE: # %bb.0: 4707; PPC64LE-NEXT: lwsync 4708; PPC64LE-NEXT: .LBB277_1: 4709; PPC64LE-NEXT: ldarx 5, 0, 3 4710; PPC64LE-NEXT: cmpd 4, 5 4711; PPC64LE-NEXT: ble 0, .LBB277_3 4712; PPC64LE-NEXT: # %bb.2: 4713; PPC64LE-NEXT: stdcx. 4, 0, 3 4714; PPC64LE-NEXT: bne 0, .LBB277_1 4715; PPC64LE-NEXT: .LBB277_3: 4716; PPC64LE-NEXT: mr 3, 5 4717; PPC64LE-NEXT: blr 4718 %ret = atomicrmw max i64* %ptr, i64 %val release 4719 ret i64 %ret 4720} 4721 4722define i64 @test278(i64* %ptr, i64 %val) { 4723; PPC64LE-LABEL: test278: 4724; PPC64LE: # %bb.0: 4725; PPC64LE-NEXT: lwsync 4726; PPC64LE-NEXT: .LBB278_1: 4727; PPC64LE-NEXT: ldarx 5, 0, 3 4728; PPC64LE-NEXT: cmpd 4, 5 4729; PPC64LE-NEXT: ble 0, .LBB278_3 4730; PPC64LE-NEXT: # %bb.2: 4731; PPC64LE-NEXT: stdcx. 4, 0, 3 4732; PPC64LE-NEXT: bne 0, .LBB278_1 4733; PPC64LE-NEXT: .LBB278_3: 4734; PPC64LE-NEXT: mr 3, 5 4735; PPC64LE-NEXT: lwsync 4736; PPC64LE-NEXT: blr 4737 %ret = atomicrmw max i64* %ptr, i64 %val acq_rel 4738 ret i64 %ret 4739} 4740 4741define i64 @test279(i64* %ptr, i64 %val) { 4742; PPC64LE-LABEL: test279: 4743; PPC64LE: # %bb.0: 4744; PPC64LE-NEXT: sync 4745; PPC64LE-NEXT: .LBB279_1: 4746; PPC64LE-NEXT: ldarx 5, 0, 3 4747; PPC64LE-NEXT: cmpd 4, 5 4748; PPC64LE-NEXT: ble 0, .LBB279_3 4749; PPC64LE-NEXT: # %bb.2: 4750; PPC64LE-NEXT: stdcx. 4, 0, 3 4751; PPC64LE-NEXT: bne 0, .LBB279_1 4752; PPC64LE-NEXT: .LBB279_3: 4753; PPC64LE-NEXT: mr 3, 5 4754; PPC64LE-NEXT: lwsync 4755; PPC64LE-NEXT: blr 4756 %ret = atomicrmw max i64* %ptr, i64 %val seq_cst 4757 ret i64 %ret 4758} 4759 4760define i8 @test280(i8* %ptr, i8 %val) { 4761; PPC64LE-LABEL: test280: 4762; PPC64LE: # %bb.0: 4763; PPC64LE-NEXT: extsb 5, 4 4764; PPC64LE-NEXT: .LBB280_1: 4765; PPC64LE-NEXT: lbarx 4, 0, 3 4766; PPC64LE-NEXT: extsb 6, 4 4767; PPC64LE-NEXT: cmpw 5, 6 4768; PPC64LE-NEXT: bge 0, .LBB280_3 4769; PPC64LE-NEXT: # %bb.2: 4770; PPC64LE-NEXT: stbcx. 5, 0, 3 4771; PPC64LE-NEXT: bne 0, .LBB280_1 4772; PPC64LE-NEXT: .LBB280_3: 4773; PPC64LE-NEXT: mr 3, 4 4774; PPC64LE-NEXT: blr 4775 %ret = atomicrmw min i8* %ptr, i8 %val monotonic 4776 ret i8 %ret 4777} 4778 4779define i8 @test281(i8* %ptr, i8 %val) { 4780; PPC64LE-LABEL: test281: 4781; PPC64LE: # %bb.0: 4782; PPC64LE-NEXT: extsb 5, 4 4783; PPC64LE-NEXT: .LBB281_1: 4784; PPC64LE-NEXT: lbarx 4, 0, 3 4785; PPC64LE-NEXT: extsb 6, 4 4786; PPC64LE-NEXT: cmpw 5, 6 4787; PPC64LE-NEXT: bge 0, .LBB281_3 4788; PPC64LE-NEXT: # %bb.2: 4789; PPC64LE-NEXT: stbcx. 5, 0, 3 4790; PPC64LE-NEXT: bne 0, .LBB281_1 4791; PPC64LE-NEXT: .LBB281_3: 4792; PPC64LE-NEXT: mr 3, 4 4793; PPC64LE-NEXT: lwsync 4794; PPC64LE-NEXT: blr 4795 %ret = atomicrmw min i8* %ptr, i8 %val acquire 4796 ret i8 %ret 4797} 4798 4799define i8 @test282(i8* %ptr, i8 %val) { 4800; PPC64LE-LABEL: test282: 4801; PPC64LE: # %bb.0: 4802; PPC64LE-NEXT: extsb 5, 4 4803; PPC64LE-NEXT: lwsync 4804; PPC64LE-NEXT: .LBB282_1: 4805; PPC64LE-NEXT: lbarx 4, 0, 3 4806; PPC64LE-NEXT: extsb 6, 4 4807; PPC64LE-NEXT: cmpw 5, 6 4808; PPC64LE-NEXT: bge 0, .LBB282_3 4809; PPC64LE-NEXT: # %bb.2: 4810; PPC64LE-NEXT: stbcx. 5, 0, 3 4811; PPC64LE-NEXT: bne 0, .LBB282_1 4812; PPC64LE-NEXT: .LBB282_3: 4813; PPC64LE-NEXT: mr 3, 4 4814; PPC64LE-NEXT: blr 4815 %ret = atomicrmw min i8* %ptr, i8 %val release 4816 ret i8 %ret 4817} 4818 4819define i8 @test283(i8* %ptr, i8 %val) { 4820; PPC64LE-LABEL: test283: 4821; PPC64LE: # %bb.0: 4822; PPC64LE-NEXT: extsb 5, 4 4823; PPC64LE-NEXT: lwsync 4824; PPC64LE-NEXT: .LBB283_1: 4825; PPC64LE-NEXT: lbarx 4, 0, 3 4826; PPC64LE-NEXT: extsb 6, 4 4827; PPC64LE-NEXT: cmpw 5, 6 4828; PPC64LE-NEXT: bge 0, .LBB283_3 4829; PPC64LE-NEXT: # %bb.2: 4830; PPC64LE-NEXT: stbcx. 5, 0, 3 4831; PPC64LE-NEXT: bne 0, .LBB283_1 4832; PPC64LE-NEXT: .LBB283_3: 4833; PPC64LE-NEXT: mr 3, 4 4834; PPC64LE-NEXT: lwsync 4835; PPC64LE-NEXT: blr 4836 %ret = atomicrmw min i8* %ptr, i8 %val acq_rel 4837 ret i8 %ret 4838} 4839 4840define i8 @test284(i8* %ptr, i8 %val) { 4841; PPC64LE-LABEL: test284: 4842; PPC64LE: # %bb.0: 4843; PPC64LE-NEXT: extsb 5, 4 4844; PPC64LE-NEXT: sync 4845; PPC64LE-NEXT: .LBB284_1: 4846; PPC64LE-NEXT: lbarx 4, 0, 3 4847; PPC64LE-NEXT: extsb 6, 4 4848; PPC64LE-NEXT: cmpw 5, 6 4849; PPC64LE-NEXT: bge 0, .LBB284_3 4850; PPC64LE-NEXT: # %bb.2: 4851; PPC64LE-NEXT: stbcx. 5, 0, 3 4852; PPC64LE-NEXT: bne 0, .LBB284_1 4853; PPC64LE-NEXT: .LBB284_3: 4854; PPC64LE-NEXT: mr 3, 4 4855; PPC64LE-NEXT: lwsync 4856; PPC64LE-NEXT: blr 4857 %ret = atomicrmw min i8* %ptr, i8 %val seq_cst 4858 ret i8 %ret 4859} 4860 4861define i16 @test285(i16* %ptr, i16 %val) { 4862; PPC64LE-LABEL: test285: 4863; PPC64LE: # %bb.0: 4864; PPC64LE-NEXT: extsh 5, 4 4865; PPC64LE-NEXT: .LBB285_1: 4866; PPC64LE-NEXT: lharx 4, 0, 3 4867; PPC64LE-NEXT: extsh 6, 4 4868; PPC64LE-NEXT: cmpw 5, 6 4869; PPC64LE-NEXT: bge 0, .LBB285_3 4870; PPC64LE-NEXT: # %bb.2: 4871; PPC64LE-NEXT: sthcx. 5, 0, 3 4872; PPC64LE-NEXT: bne 0, .LBB285_1 4873; PPC64LE-NEXT: .LBB285_3: 4874; PPC64LE-NEXT: mr 3, 4 4875; PPC64LE-NEXT: blr 4876 %ret = atomicrmw min i16* %ptr, i16 %val monotonic 4877 ret i16 %ret 4878} 4879 4880define i16 @test286(i16* %ptr, i16 %val) { 4881; PPC64LE-LABEL: test286: 4882; PPC64LE: # %bb.0: 4883; PPC64LE-NEXT: extsh 5, 4 4884; PPC64LE-NEXT: .LBB286_1: 4885; PPC64LE-NEXT: lharx 4, 0, 3 4886; PPC64LE-NEXT: extsh 6, 4 4887; PPC64LE-NEXT: cmpw 5, 6 4888; PPC64LE-NEXT: bge 0, .LBB286_3 4889; PPC64LE-NEXT: # %bb.2: 4890; PPC64LE-NEXT: sthcx. 5, 0, 3 4891; PPC64LE-NEXT: bne 0, .LBB286_1 4892; PPC64LE-NEXT: .LBB286_3: 4893; PPC64LE-NEXT: mr 3, 4 4894; PPC64LE-NEXT: lwsync 4895; PPC64LE-NEXT: blr 4896 %ret = atomicrmw min i16* %ptr, i16 %val acquire 4897 ret i16 %ret 4898} 4899 4900define i16 @test287(i16* %ptr, i16 %val) { 4901; PPC64LE-LABEL: test287: 4902; PPC64LE: # %bb.0: 4903; PPC64LE-NEXT: extsh 5, 4 4904; PPC64LE-NEXT: lwsync 4905; PPC64LE-NEXT: .LBB287_1: 4906; PPC64LE-NEXT: lharx 4, 0, 3 4907; PPC64LE-NEXT: extsh 6, 4 4908; PPC64LE-NEXT: cmpw 5, 6 4909; PPC64LE-NEXT: bge 0, .LBB287_3 4910; PPC64LE-NEXT: # %bb.2: 4911; PPC64LE-NEXT: sthcx. 5, 0, 3 4912; PPC64LE-NEXT: bne 0, .LBB287_1 4913; PPC64LE-NEXT: .LBB287_3: 4914; PPC64LE-NEXT: mr 3, 4 4915; PPC64LE-NEXT: blr 4916 %ret = atomicrmw min i16* %ptr, i16 %val release 4917 ret i16 %ret 4918} 4919 4920define i16 @test288(i16* %ptr, i16 %val) { 4921; PPC64LE-LABEL: test288: 4922; PPC64LE: # %bb.0: 4923; PPC64LE-NEXT: extsh 5, 4 4924; PPC64LE-NEXT: lwsync 4925; PPC64LE-NEXT: .LBB288_1: 4926; PPC64LE-NEXT: lharx 4, 0, 3 4927; PPC64LE-NEXT: extsh 6, 4 4928; PPC64LE-NEXT: cmpw 5, 6 4929; PPC64LE-NEXT: bge 0, .LBB288_3 4930; PPC64LE-NEXT: # %bb.2: 4931; PPC64LE-NEXT: sthcx. 5, 0, 3 4932; PPC64LE-NEXT: bne 0, .LBB288_1 4933; PPC64LE-NEXT: .LBB288_3: 4934; PPC64LE-NEXT: mr 3, 4 4935; PPC64LE-NEXT: lwsync 4936; PPC64LE-NEXT: blr 4937 %ret = atomicrmw min i16* %ptr, i16 %val acq_rel 4938 ret i16 %ret 4939} 4940 4941define i16 @test289(i16* %ptr, i16 %val) { 4942; PPC64LE-LABEL: test289: 4943; PPC64LE: # %bb.0: 4944; PPC64LE-NEXT: extsh 5, 4 4945; PPC64LE-NEXT: sync 4946; PPC64LE-NEXT: .LBB289_1: 4947; PPC64LE-NEXT: lharx 4, 0, 3 4948; PPC64LE-NEXT: extsh 6, 4 4949; PPC64LE-NEXT: cmpw 5, 6 4950; PPC64LE-NEXT: bge 0, .LBB289_3 4951; PPC64LE-NEXT: # %bb.2: 4952; PPC64LE-NEXT: sthcx. 5, 0, 3 4953; PPC64LE-NEXT: bne 0, .LBB289_1 4954; PPC64LE-NEXT: .LBB289_3: 4955; PPC64LE-NEXT: mr 3, 4 4956; PPC64LE-NEXT: lwsync 4957; PPC64LE-NEXT: blr 4958 %ret = atomicrmw min i16* %ptr, i16 %val seq_cst 4959 ret i16 %ret 4960} 4961 4962define i32 @test290(i32* %ptr, i32 %val) { 4963; PPC64LE-LABEL: test290: 4964; PPC64LE: # %bb.0: 4965; PPC64LE-NEXT: .LBB290_1: 4966; PPC64LE-NEXT: lwarx 5, 0, 3 4967; PPC64LE-NEXT: cmpw 4, 5 4968; PPC64LE-NEXT: bge 0, .LBB290_3 4969; PPC64LE-NEXT: # %bb.2: 4970; PPC64LE-NEXT: stwcx. 4, 0, 3 4971; PPC64LE-NEXT: bne 0, .LBB290_1 4972; PPC64LE-NEXT: .LBB290_3: 4973; PPC64LE-NEXT: mr 3, 5 4974; PPC64LE-NEXT: blr 4975 %ret = atomicrmw min i32* %ptr, i32 %val monotonic 4976 ret i32 %ret 4977} 4978 4979define i32 @test291(i32* %ptr, i32 %val) { 4980; PPC64LE-LABEL: test291: 4981; PPC64LE: # %bb.0: 4982; PPC64LE-NEXT: mr 5, 3 4983; PPC64LE-NEXT: .LBB291_1: 4984; PPC64LE-NEXT: lwarx 3, 0, 5 4985; PPC64LE-NEXT: cmpw 4, 3 4986; PPC64LE-NEXT: bge 0, .LBB291_3 4987; PPC64LE-NEXT: # %bb.2: 4988; PPC64LE-NEXT: stwcx. 4, 0, 5 4989; PPC64LE-NEXT: bne 0, .LBB291_1 4990; PPC64LE-NEXT: .LBB291_3: 4991; PPC64LE-NEXT: lwsync 4992; PPC64LE-NEXT: blr 4993 %ret = atomicrmw min i32* %ptr, i32 %val acquire 4994 ret i32 %ret 4995} 4996 4997define i32 @test292(i32* %ptr, i32 %val) { 4998; PPC64LE-LABEL: test292: 4999; PPC64LE: # %bb.0: 5000; PPC64LE-NEXT: lwsync 5001; PPC64LE-NEXT: .LBB292_1: 5002; PPC64LE-NEXT: lwarx 5, 0, 3 5003; PPC64LE-NEXT: cmpw 4, 5 5004; PPC64LE-NEXT: bge 0, .LBB292_3 5005; PPC64LE-NEXT: # %bb.2: 5006; PPC64LE-NEXT: stwcx. 4, 0, 3 5007; PPC64LE-NEXT: bne 0, .LBB292_1 5008; PPC64LE-NEXT: .LBB292_3: 5009; PPC64LE-NEXT: mr 3, 5 5010; PPC64LE-NEXT: blr 5011 %ret = atomicrmw min i32* %ptr, i32 %val release 5012 ret i32 %ret 5013} 5014 5015define i32 @test293(i32* %ptr, i32 %val) { 5016; PPC64LE-LABEL: test293: 5017; PPC64LE: # %bb.0: 5018; PPC64LE-NEXT: lwsync 5019; PPC64LE-NEXT: .LBB293_1: 5020; PPC64LE-NEXT: lwarx 5, 0, 3 5021; PPC64LE-NEXT: cmpw 4, 5 5022; PPC64LE-NEXT: bge 0, .LBB293_3 5023; PPC64LE-NEXT: # %bb.2: 5024; PPC64LE-NEXT: stwcx. 4, 0, 3 5025; PPC64LE-NEXT: bne 0, .LBB293_1 5026; PPC64LE-NEXT: .LBB293_3: 5027; PPC64LE-NEXT: mr 3, 5 5028; PPC64LE-NEXT: lwsync 5029; PPC64LE-NEXT: blr 5030 %ret = atomicrmw min i32* %ptr, i32 %val acq_rel 5031 ret i32 %ret 5032} 5033 5034define i32 @test294(i32* %ptr, i32 %val) { 5035; PPC64LE-LABEL: test294: 5036; PPC64LE: # %bb.0: 5037; PPC64LE-NEXT: sync 5038; PPC64LE-NEXT: .LBB294_1: 5039; PPC64LE-NEXT: lwarx 5, 0, 3 5040; PPC64LE-NEXT: cmpw 4, 5 5041; PPC64LE-NEXT: bge 0, .LBB294_3 5042; PPC64LE-NEXT: # %bb.2: 5043; PPC64LE-NEXT: stwcx. 4, 0, 3 5044; PPC64LE-NEXT: bne 0, .LBB294_1 5045; PPC64LE-NEXT: .LBB294_3: 5046; PPC64LE-NEXT: mr 3, 5 5047; PPC64LE-NEXT: lwsync 5048; PPC64LE-NEXT: blr 5049 %ret = atomicrmw min i32* %ptr, i32 %val seq_cst 5050 ret i32 %ret 5051} 5052 5053define i64 @test295(i64* %ptr, i64 %val) { 5054; PPC64LE-LABEL: test295: 5055; PPC64LE: # %bb.0: 5056; PPC64LE-NEXT: .LBB295_1: 5057; PPC64LE-NEXT: ldarx 5, 0, 3 5058; PPC64LE-NEXT: cmpd 4, 5 5059; PPC64LE-NEXT: bge 0, .LBB295_3 5060; PPC64LE-NEXT: # %bb.2: 5061; PPC64LE-NEXT: stdcx. 4, 0, 3 5062; PPC64LE-NEXT: bne 0, .LBB295_1 5063; PPC64LE-NEXT: .LBB295_3: 5064; PPC64LE-NEXT: mr 3, 5 5065; PPC64LE-NEXT: blr 5066 %ret = atomicrmw min i64* %ptr, i64 %val monotonic 5067 ret i64 %ret 5068} 5069 5070define i64 @test296(i64* %ptr, i64 %val) { 5071; PPC64LE-LABEL: test296: 5072; PPC64LE: # %bb.0: 5073; PPC64LE-NEXT: mr 5, 3 5074; PPC64LE-NEXT: .LBB296_1: 5075; PPC64LE-NEXT: ldarx 3, 0, 5 5076; PPC64LE-NEXT: cmpd 4, 3 5077; PPC64LE-NEXT: bge 0, .LBB296_3 5078; PPC64LE-NEXT: # %bb.2: 5079; PPC64LE-NEXT: stdcx. 4, 0, 5 5080; PPC64LE-NEXT: bne 0, .LBB296_1 5081; PPC64LE-NEXT: .LBB296_3: 5082; PPC64LE-NEXT: lwsync 5083; PPC64LE-NEXT: blr 5084 %ret = atomicrmw min i64* %ptr, i64 %val acquire 5085 ret i64 %ret 5086} 5087 5088define i64 @test297(i64* %ptr, i64 %val) { 5089; PPC64LE-LABEL: test297: 5090; PPC64LE: # %bb.0: 5091; PPC64LE-NEXT: lwsync 5092; PPC64LE-NEXT: .LBB297_1: 5093; PPC64LE-NEXT: ldarx 5, 0, 3 5094; PPC64LE-NEXT: cmpd 4, 5 5095; PPC64LE-NEXT: bge 0, .LBB297_3 5096; PPC64LE-NEXT: # %bb.2: 5097; PPC64LE-NEXT: stdcx. 4, 0, 3 5098; PPC64LE-NEXT: bne 0, .LBB297_1 5099; PPC64LE-NEXT: .LBB297_3: 5100; PPC64LE-NEXT: mr 3, 5 5101; PPC64LE-NEXT: blr 5102 %ret = atomicrmw min i64* %ptr, i64 %val release 5103 ret i64 %ret 5104} 5105 5106define i64 @test298(i64* %ptr, i64 %val) { 5107; PPC64LE-LABEL: test298: 5108; PPC64LE: # %bb.0: 5109; PPC64LE-NEXT: lwsync 5110; PPC64LE-NEXT: .LBB298_1: 5111; PPC64LE-NEXT: ldarx 5, 0, 3 5112; PPC64LE-NEXT: cmpd 4, 5 5113; PPC64LE-NEXT: bge 0, .LBB298_3 5114; PPC64LE-NEXT: # %bb.2: 5115; PPC64LE-NEXT: stdcx. 4, 0, 3 5116; PPC64LE-NEXT: bne 0, .LBB298_1 5117; PPC64LE-NEXT: .LBB298_3: 5118; PPC64LE-NEXT: mr 3, 5 5119; PPC64LE-NEXT: lwsync 5120; PPC64LE-NEXT: blr 5121 %ret = atomicrmw min i64* %ptr, i64 %val acq_rel 5122 ret i64 %ret 5123} 5124 5125define i64 @test299(i64* %ptr, i64 %val) { 5126; PPC64LE-LABEL: test299: 5127; PPC64LE: # %bb.0: 5128; PPC64LE-NEXT: sync 5129; PPC64LE-NEXT: .LBB299_1: 5130; PPC64LE-NEXT: ldarx 5, 0, 3 5131; PPC64LE-NEXT: cmpd 4, 5 5132; PPC64LE-NEXT: bge 0, .LBB299_3 5133; PPC64LE-NEXT: # %bb.2: 5134; PPC64LE-NEXT: stdcx. 4, 0, 3 5135; PPC64LE-NEXT: bne 0, .LBB299_1 5136; PPC64LE-NEXT: .LBB299_3: 5137; PPC64LE-NEXT: mr 3, 5 5138; PPC64LE-NEXT: lwsync 5139; PPC64LE-NEXT: blr 5140 %ret = atomicrmw min i64* %ptr, i64 %val seq_cst 5141 ret i64 %ret 5142} 5143 5144define i8 @test300(i8* %ptr, i8 %val) { 5145; PPC64LE-LABEL: test300: 5146; PPC64LE: # %bb.0: 5147; PPC64LE-NEXT: .LBB300_1: 5148; PPC64LE-NEXT: lbarx 5, 0, 3 5149; PPC64LE-NEXT: cmplw 4, 5 5150; PPC64LE-NEXT: ble 0, .LBB300_3 5151; PPC64LE-NEXT: # %bb.2: 5152; PPC64LE-NEXT: stbcx. 4, 0, 3 5153; PPC64LE-NEXT: bne 0, .LBB300_1 5154; PPC64LE-NEXT: .LBB300_3: 5155; PPC64LE-NEXT: mr 3, 5 5156; PPC64LE-NEXT: blr 5157 %ret = atomicrmw umax i8* %ptr, i8 %val monotonic 5158 ret i8 %ret 5159} 5160 5161define i8 @test301(i8* %ptr, i8 %val) { 5162; PPC64LE-LABEL: test301: 5163; PPC64LE: # %bb.0: 5164; PPC64LE-NEXT: mr 5, 3 5165; PPC64LE-NEXT: .LBB301_1: 5166; PPC64LE-NEXT: lbarx 3, 0, 5 5167; PPC64LE-NEXT: cmplw 4, 3 5168; PPC64LE-NEXT: ble 0, .LBB301_3 5169; PPC64LE-NEXT: # %bb.2: 5170; PPC64LE-NEXT: stbcx. 4, 0, 5 5171; PPC64LE-NEXT: bne 0, .LBB301_1 5172; PPC64LE-NEXT: .LBB301_3: 5173; PPC64LE-NEXT: lwsync 5174; PPC64LE-NEXT: blr 5175 %ret = atomicrmw umax i8* %ptr, i8 %val acquire 5176 ret i8 %ret 5177} 5178 5179define i8 @test302(i8* %ptr, i8 %val) { 5180; PPC64LE-LABEL: test302: 5181; PPC64LE: # %bb.0: 5182; PPC64LE-NEXT: lwsync 5183; PPC64LE-NEXT: .LBB302_1: 5184; PPC64LE-NEXT: lbarx 5, 0, 3 5185; PPC64LE-NEXT: cmplw 4, 5 5186; PPC64LE-NEXT: ble 0, .LBB302_3 5187; PPC64LE-NEXT: # %bb.2: 5188; PPC64LE-NEXT: stbcx. 4, 0, 3 5189; PPC64LE-NEXT: bne 0, .LBB302_1 5190; PPC64LE-NEXT: .LBB302_3: 5191; PPC64LE-NEXT: mr 3, 5 5192; PPC64LE-NEXT: blr 5193 %ret = atomicrmw umax i8* %ptr, i8 %val release 5194 ret i8 %ret 5195} 5196 5197define i8 @test303(i8* %ptr, i8 %val) { 5198; PPC64LE-LABEL: test303: 5199; PPC64LE: # %bb.0: 5200; PPC64LE-NEXT: lwsync 5201; PPC64LE-NEXT: .LBB303_1: 5202; PPC64LE-NEXT: lbarx 5, 0, 3 5203; PPC64LE-NEXT: cmplw 4, 5 5204; PPC64LE-NEXT: ble 0, .LBB303_3 5205; PPC64LE-NEXT: # %bb.2: 5206; PPC64LE-NEXT: stbcx. 4, 0, 3 5207; PPC64LE-NEXT: bne 0, .LBB303_1 5208; PPC64LE-NEXT: .LBB303_3: 5209; PPC64LE-NEXT: mr 3, 5 5210; PPC64LE-NEXT: lwsync 5211; PPC64LE-NEXT: blr 5212 %ret = atomicrmw umax i8* %ptr, i8 %val acq_rel 5213 ret i8 %ret 5214} 5215 5216define i8 @test304(i8* %ptr, i8 %val) { 5217; PPC64LE-LABEL: test304: 5218; PPC64LE: # %bb.0: 5219; PPC64LE-NEXT: sync 5220; PPC64LE-NEXT: .LBB304_1: 5221; PPC64LE-NEXT: lbarx 5, 0, 3 5222; PPC64LE-NEXT: cmplw 4, 5 5223; PPC64LE-NEXT: ble 0, .LBB304_3 5224; PPC64LE-NEXT: # %bb.2: 5225; PPC64LE-NEXT: stbcx. 4, 0, 3 5226; PPC64LE-NEXT: bne 0, .LBB304_1 5227; PPC64LE-NEXT: .LBB304_3: 5228; PPC64LE-NEXT: mr 3, 5 5229; PPC64LE-NEXT: lwsync 5230; PPC64LE-NEXT: blr 5231 %ret = atomicrmw umax i8* %ptr, i8 %val seq_cst 5232 ret i8 %ret 5233} 5234 5235define i16 @test305(i16* %ptr, i16 %val) { 5236; PPC64LE-LABEL: test305: 5237; PPC64LE: # %bb.0: 5238; PPC64LE-NEXT: .LBB305_1: 5239; PPC64LE-NEXT: lharx 5, 0, 3 5240; PPC64LE-NEXT: cmplw 4, 5 5241; PPC64LE-NEXT: ble 0, .LBB305_3 5242; PPC64LE-NEXT: # %bb.2: 5243; PPC64LE-NEXT: sthcx. 4, 0, 3 5244; PPC64LE-NEXT: bne 0, .LBB305_1 5245; PPC64LE-NEXT: .LBB305_3: 5246; PPC64LE-NEXT: mr 3, 5 5247; PPC64LE-NEXT: blr 5248 %ret = atomicrmw umax i16* %ptr, i16 %val monotonic 5249 ret i16 %ret 5250} 5251 5252define i16 @test306(i16* %ptr, i16 %val) { 5253; PPC64LE-LABEL: test306: 5254; PPC64LE: # %bb.0: 5255; PPC64LE-NEXT: mr 5, 3 5256; PPC64LE-NEXT: .LBB306_1: 5257; PPC64LE-NEXT: lharx 3, 0, 5 5258; PPC64LE-NEXT: cmplw 4, 3 5259; PPC64LE-NEXT: ble 0, .LBB306_3 5260; PPC64LE-NEXT: # %bb.2: 5261; PPC64LE-NEXT: sthcx. 4, 0, 5 5262; PPC64LE-NEXT: bne 0, .LBB306_1 5263; PPC64LE-NEXT: .LBB306_3: 5264; PPC64LE-NEXT: lwsync 5265; PPC64LE-NEXT: blr 5266 %ret = atomicrmw umax i16* %ptr, i16 %val acquire 5267 ret i16 %ret 5268} 5269 5270define i16 @test307(i16* %ptr, i16 %val) { 5271; PPC64LE-LABEL: test307: 5272; PPC64LE: # %bb.0: 5273; PPC64LE-NEXT: lwsync 5274; PPC64LE-NEXT: .LBB307_1: 5275; PPC64LE-NEXT: lharx 5, 0, 3 5276; PPC64LE-NEXT: cmplw 4, 5 5277; PPC64LE-NEXT: ble 0, .LBB307_3 5278; PPC64LE-NEXT: # %bb.2: 5279; PPC64LE-NEXT: sthcx. 4, 0, 3 5280; PPC64LE-NEXT: bne 0, .LBB307_1 5281; PPC64LE-NEXT: .LBB307_3: 5282; PPC64LE-NEXT: mr 3, 5 5283; PPC64LE-NEXT: blr 5284 %ret = atomicrmw umax i16* %ptr, i16 %val release 5285 ret i16 %ret 5286} 5287 5288define i16 @test308(i16* %ptr, i16 %val) { 5289; PPC64LE-LABEL: test308: 5290; PPC64LE: # %bb.0: 5291; PPC64LE-NEXT: lwsync 5292; PPC64LE-NEXT: .LBB308_1: 5293; PPC64LE-NEXT: lharx 5, 0, 3 5294; PPC64LE-NEXT: cmplw 4, 5 5295; PPC64LE-NEXT: ble 0, .LBB308_3 5296; PPC64LE-NEXT: # %bb.2: 5297; PPC64LE-NEXT: sthcx. 4, 0, 3 5298; PPC64LE-NEXT: bne 0, .LBB308_1 5299; PPC64LE-NEXT: .LBB308_3: 5300; PPC64LE-NEXT: mr 3, 5 5301; PPC64LE-NEXT: lwsync 5302; PPC64LE-NEXT: blr 5303 %ret = atomicrmw umax i16* %ptr, i16 %val acq_rel 5304 ret i16 %ret 5305} 5306 5307define i16 @test309(i16* %ptr, i16 %val) { 5308; PPC64LE-LABEL: test309: 5309; PPC64LE: # %bb.0: 5310; PPC64LE-NEXT: sync 5311; PPC64LE-NEXT: .LBB309_1: 5312; PPC64LE-NEXT: lharx 5, 0, 3 5313; PPC64LE-NEXT: cmplw 4, 5 5314; PPC64LE-NEXT: ble 0, .LBB309_3 5315; PPC64LE-NEXT: # %bb.2: 5316; PPC64LE-NEXT: sthcx. 4, 0, 3 5317; PPC64LE-NEXT: bne 0, .LBB309_1 5318; PPC64LE-NEXT: .LBB309_3: 5319; PPC64LE-NEXT: mr 3, 5 5320; PPC64LE-NEXT: lwsync 5321; PPC64LE-NEXT: blr 5322 %ret = atomicrmw umax i16* %ptr, i16 %val seq_cst 5323 ret i16 %ret 5324} 5325 5326define i32 @test310(i32* %ptr, i32 %val) { 5327; PPC64LE-LABEL: test310: 5328; PPC64LE: # %bb.0: 5329; PPC64LE-NEXT: .LBB310_1: 5330; PPC64LE-NEXT: lwarx 5, 0, 3 5331; PPC64LE-NEXT: cmplw 4, 5 5332; PPC64LE-NEXT: ble 0, .LBB310_3 5333; PPC64LE-NEXT: # %bb.2: 5334; PPC64LE-NEXT: stwcx. 4, 0, 3 5335; PPC64LE-NEXT: bne 0, .LBB310_1 5336; PPC64LE-NEXT: .LBB310_3: 5337; PPC64LE-NEXT: mr 3, 5 5338; PPC64LE-NEXT: blr 5339 %ret = atomicrmw umax i32* %ptr, i32 %val monotonic 5340 ret i32 %ret 5341} 5342 5343define i32 @test311(i32* %ptr, i32 %val) { 5344; PPC64LE-LABEL: test311: 5345; PPC64LE: # %bb.0: 5346; PPC64LE-NEXT: mr 5, 3 5347; PPC64LE-NEXT: .LBB311_1: 5348; PPC64LE-NEXT: lwarx 3, 0, 5 5349; PPC64LE-NEXT: cmplw 4, 3 5350; PPC64LE-NEXT: ble 0, .LBB311_3 5351; PPC64LE-NEXT: # %bb.2: 5352; PPC64LE-NEXT: stwcx. 4, 0, 5 5353; PPC64LE-NEXT: bne 0, .LBB311_1 5354; PPC64LE-NEXT: .LBB311_3: 5355; PPC64LE-NEXT: lwsync 5356; PPC64LE-NEXT: blr 5357 %ret = atomicrmw umax i32* %ptr, i32 %val acquire 5358 ret i32 %ret 5359} 5360 5361define i32 @test312(i32* %ptr, i32 %val) { 5362; PPC64LE-LABEL: test312: 5363; PPC64LE: # %bb.0: 5364; PPC64LE-NEXT: lwsync 5365; PPC64LE-NEXT: .LBB312_1: 5366; PPC64LE-NEXT: lwarx 5, 0, 3 5367; PPC64LE-NEXT: cmplw 4, 5 5368; PPC64LE-NEXT: ble 0, .LBB312_3 5369; PPC64LE-NEXT: # %bb.2: 5370; PPC64LE-NEXT: stwcx. 4, 0, 3 5371; PPC64LE-NEXT: bne 0, .LBB312_1 5372; PPC64LE-NEXT: .LBB312_3: 5373; PPC64LE-NEXT: mr 3, 5 5374; PPC64LE-NEXT: blr 5375 %ret = atomicrmw umax i32* %ptr, i32 %val release 5376 ret i32 %ret 5377} 5378 5379define i32 @test313(i32* %ptr, i32 %val) { 5380; PPC64LE-LABEL: test313: 5381; PPC64LE: # %bb.0: 5382; PPC64LE-NEXT: lwsync 5383; PPC64LE-NEXT: .LBB313_1: 5384; PPC64LE-NEXT: lwarx 5, 0, 3 5385; PPC64LE-NEXT: cmplw 4, 5 5386; PPC64LE-NEXT: ble 0, .LBB313_3 5387; PPC64LE-NEXT: # %bb.2: 5388; PPC64LE-NEXT: stwcx. 4, 0, 3 5389; PPC64LE-NEXT: bne 0, .LBB313_1 5390; PPC64LE-NEXT: .LBB313_3: 5391; PPC64LE-NEXT: mr 3, 5 5392; PPC64LE-NEXT: lwsync 5393; PPC64LE-NEXT: blr 5394 %ret = atomicrmw umax i32* %ptr, i32 %val acq_rel 5395 ret i32 %ret 5396} 5397 5398define i32 @test314(i32* %ptr, i32 %val) { 5399; PPC64LE-LABEL: test314: 5400; PPC64LE: # %bb.0: 5401; PPC64LE-NEXT: sync 5402; PPC64LE-NEXT: .LBB314_1: 5403; PPC64LE-NEXT: lwarx 5, 0, 3 5404; PPC64LE-NEXT: cmplw 4, 5 5405; PPC64LE-NEXT: ble 0, .LBB314_3 5406; PPC64LE-NEXT: # %bb.2: 5407; PPC64LE-NEXT: stwcx. 4, 0, 3 5408; PPC64LE-NEXT: bne 0, .LBB314_1 5409; PPC64LE-NEXT: .LBB314_3: 5410; PPC64LE-NEXT: mr 3, 5 5411; PPC64LE-NEXT: lwsync 5412; PPC64LE-NEXT: blr 5413 %ret = atomicrmw umax i32* %ptr, i32 %val seq_cst 5414 ret i32 %ret 5415} 5416 5417define i64 @test315(i64* %ptr, i64 %val) { 5418; PPC64LE-LABEL: test315: 5419; PPC64LE: # %bb.0: 5420; PPC64LE-NEXT: .LBB315_1: 5421; PPC64LE-NEXT: ldarx 5, 0, 3 5422; PPC64LE-NEXT: cmpld 4, 5 5423; PPC64LE-NEXT: ble 0, .LBB315_3 5424; PPC64LE-NEXT: # %bb.2: 5425; PPC64LE-NEXT: stdcx. 4, 0, 3 5426; PPC64LE-NEXT: bne 0, .LBB315_1 5427; PPC64LE-NEXT: .LBB315_3: 5428; PPC64LE-NEXT: mr 3, 5 5429; PPC64LE-NEXT: blr 5430 %ret = atomicrmw umax i64* %ptr, i64 %val monotonic 5431 ret i64 %ret 5432} 5433 5434define i64 @test316(i64* %ptr, i64 %val) { 5435; PPC64LE-LABEL: test316: 5436; PPC64LE: # %bb.0: 5437; PPC64LE-NEXT: mr 5, 3 5438; PPC64LE-NEXT: .LBB316_1: 5439; PPC64LE-NEXT: ldarx 3, 0, 5 5440; PPC64LE-NEXT: cmpld 4, 3 5441; PPC64LE-NEXT: ble 0, .LBB316_3 5442; PPC64LE-NEXT: # %bb.2: 5443; PPC64LE-NEXT: stdcx. 4, 0, 5 5444; PPC64LE-NEXT: bne 0, .LBB316_1 5445; PPC64LE-NEXT: .LBB316_3: 5446; PPC64LE-NEXT: lwsync 5447; PPC64LE-NEXT: blr 5448 %ret = atomicrmw umax i64* %ptr, i64 %val acquire 5449 ret i64 %ret 5450} 5451 5452define i64 @test317(i64* %ptr, i64 %val) { 5453; PPC64LE-LABEL: test317: 5454; PPC64LE: # %bb.0: 5455; PPC64LE-NEXT: lwsync 5456; PPC64LE-NEXT: .LBB317_1: 5457; PPC64LE-NEXT: ldarx 5, 0, 3 5458; PPC64LE-NEXT: cmpld 4, 5 5459; PPC64LE-NEXT: ble 0, .LBB317_3 5460; PPC64LE-NEXT: # %bb.2: 5461; PPC64LE-NEXT: stdcx. 4, 0, 3 5462; PPC64LE-NEXT: bne 0, .LBB317_1 5463; PPC64LE-NEXT: .LBB317_3: 5464; PPC64LE-NEXT: mr 3, 5 5465; PPC64LE-NEXT: blr 5466 %ret = atomicrmw umax i64* %ptr, i64 %val release 5467 ret i64 %ret 5468} 5469 5470define i64 @test318(i64* %ptr, i64 %val) { 5471; PPC64LE-LABEL: test318: 5472; PPC64LE: # %bb.0: 5473; PPC64LE-NEXT: lwsync 5474; PPC64LE-NEXT: .LBB318_1: 5475; PPC64LE-NEXT: ldarx 5, 0, 3 5476; PPC64LE-NEXT: cmpld 4, 5 5477; PPC64LE-NEXT: ble 0, .LBB318_3 5478; PPC64LE-NEXT: # %bb.2: 5479; PPC64LE-NEXT: stdcx. 4, 0, 3 5480; PPC64LE-NEXT: bne 0, .LBB318_1 5481; PPC64LE-NEXT: .LBB318_3: 5482; PPC64LE-NEXT: mr 3, 5 5483; PPC64LE-NEXT: lwsync 5484; PPC64LE-NEXT: blr 5485 %ret = atomicrmw umax i64* %ptr, i64 %val acq_rel 5486 ret i64 %ret 5487} 5488 5489define i64 @test319(i64* %ptr, i64 %val) { 5490; PPC64LE-LABEL: test319: 5491; PPC64LE: # %bb.0: 5492; PPC64LE-NEXT: sync 5493; PPC64LE-NEXT: .LBB319_1: 5494; PPC64LE-NEXT: ldarx 5, 0, 3 5495; PPC64LE-NEXT: cmpld 4, 5 5496; PPC64LE-NEXT: ble 0, .LBB319_3 5497; PPC64LE-NEXT: # %bb.2: 5498; PPC64LE-NEXT: stdcx. 4, 0, 3 5499; PPC64LE-NEXT: bne 0, .LBB319_1 5500; PPC64LE-NEXT: .LBB319_3: 5501; PPC64LE-NEXT: mr 3, 5 5502; PPC64LE-NEXT: lwsync 5503; PPC64LE-NEXT: blr 5504 %ret = atomicrmw umax i64* %ptr, i64 %val seq_cst 5505 ret i64 %ret 5506} 5507 5508define i8 @test320(i8* %ptr, i8 %val) { 5509; PPC64LE-LABEL: test320: 5510; PPC64LE: # %bb.0: 5511; PPC64LE-NEXT: .LBB320_1: 5512; PPC64LE-NEXT: lbarx 5, 0, 3 5513; PPC64LE-NEXT: cmplw 4, 5 5514; PPC64LE-NEXT: bge 0, .LBB320_3 5515; PPC64LE-NEXT: # %bb.2: 5516; PPC64LE-NEXT: stbcx. 4, 0, 3 5517; PPC64LE-NEXT: bne 0, .LBB320_1 5518; PPC64LE-NEXT: .LBB320_3: 5519; PPC64LE-NEXT: mr 3, 5 5520; PPC64LE-NEXT: blr 5521 %ret = atomicrmw umin i8* %ptr, i8 %val monotonic 5522 ret i8 %ret 5523} 5524 5525define i8 @test321(i8* %ptr, i8 %val) { 5526; PPC64LE-LABEL: test321: 5527; PPC64LE: # %bb.0: 5528; PPC64LE-NEXT: mr 5, 3 5529; PPC64LE-NEXT: .LBB321_1: 5530; PPC64LE-NEXT: lbarx 3, 0, 5 5531; PPC64LE-NEXT: cmplw 4, 3 5532; PPC64LE-NEXT: bge 0, .LBB321_3 5533; PPC64LE-NEXT: # %bb.2: 5534; PPC64LE-NEXT: stbcx. 4, 0, 5 5535; PPC64LE-NEXT: bne 0, .LBB321_1 5536; PPC64LE-NEXT: .LBB321_3: 5537; PPC64LE-NEXT: lwsync 5538; PPC64LE-NEXT: blr 5539 %ret = atomicrmw umin i8* %ptr, i8 %val acquire 5540 ret i8 %ret 5541} 5542 5543define i8 @test322(i8* %ptr, i8 %val) { 5544; PPC64LE-LABEL: test322: 5545; PPC64LE: # %bb.0: 5546; PPC64LE-NEXT: lwsync 5547; PPC64LE-NEXT: .LBB322_1: 5548; PPC64LE-NEXT: lbarx 5, 0, 3 5549; PPC64LE-NEXT: cmplw 4, 5 5550; PPC64LE-NEXT: bge 0, .LBB322_3 5551; PPC64LE-NEXT: # %bb.2: 5552; PPC64LE-NEXT: stbcx. 4, 0, 3 5553; PPC64LE-NEXT: bne 0, .LBB322_1 5554; PPC64LE-NEXT: .LBB322_3: 5555; PPC64LE-NEXT: mr 3, 5 5556; PPC64LE-NEXT: blr 5557 %ret = atomicrmw umin i8* %ptr, i8 %val release 5558 ret i8 %ret 5559} 5560 5561define i8 @test323(i8* %ptr, i8 %val) { 5562; PPC64LE-LABEL: test323: 5563; PPC64LE: # %bb.0: 5564; PPC64LE-NEXT: lwsync 5565; PPC64LE-NEXT: .LBB323_1: 5566; PPC64LE-NEXT: lbarx 5, 0, 3 5567; PPC64LE-NEXT: cmplw 4, 5 5568; PPC64LE-NEXT: bge 0, .LBB323_3 5569; PPC64LE-NEXT: # %bb.2: 5570; PPC64LE-NEXT: stbcx. 4, 0, 3 5571; PPC64LE-NEXT: bne 0, .LBB323_1 5572; PPC64LE-NEXT: .LBB323_3: 5573; PPC64LE-NEXT: mr 3, 5 5574; PPC64LE-NEXT: lwsync 5575; PPC64LE-NEXT: blr 5576 %ret = atomicrmw umin i8* %ptr, i8 %val acq_rel 5577 ret i8 %ret 5578} 5579 5580define i8 @test324(i8* %ptr, i8 %val) { 5581; PPC64LE-LABEL: test324: 5582; PPC64LE: # %bb.0: 5583; PPC64LE-NEXT: sync 5584; PPC64LE-NEXT: .LBB324_1: 5585; PPC64LE-NEXT: lbarx 5, 0, 3 5586; PPC64LE-NEXT: cmplw 4, 5 5587; PPC64LE-NEXT: bge 0, .LBB324_3 5588; PPC64LE-NEXT: # %bb.2: 5589; PPC64LE-NEXT: stbcx. 4, 0, 3 5590; PPC64LE-NEXT: bne 0, .LBB324_1 5591; PPC64LE-NEXT: .LBB324_3: 5592; PPC64LE-NEXT: mr 3, 5 5593; PPC64LE-NEXT: lwsync 5594; PPC64LE-NEXT: blr 5595 %ret = atomicrmw umin i8* %ptr, i8 %val seq_cst 5596 ret i8 %ret 5597} 5598 5599define i16 @test325(i16* %ptr, i16 %val) { 5600; PPC64LE-LABEL: test325: 5601; PPC64LE: # %bb.0: 5602; PPC64LE-NEXT: .LBB325_1: 5603; PPC64LE-NEXT: lharx 5, 0, 3 5604; PPC64LE-NEXT: cmplw 4, 5 5605; PPC64LE-NEXT: bge 0, .LBB325_3 5606; PPC64LE-NEXT: # %bb.2: 5607; PPC64LE-NEXT: sthcx. 4, 0, 3 5608; PPC64LE-NEXT: bne 0, .LBB325_1 5609; PPC64LE-NEXT: .LBB325_3: 5610; PPC64LE-NEXT: mr 3, 5 5611; PPC64LE-NEXT: blr 5612 %ret = atomicrmw umin i16* %ptr, i16 %val monotonic 5613 ret i16 %ret 5614} 5615 5616define i16 @test326(i16* %ptr, i16 %val) { 5617; PPC64LE-LABEL: test326: 5618; PPC64LE: # %bb.0: 5619; PPC64LE-NEXT: mr 5, 3 5620; PPC64LE-NEXT: .LBB326_1: 5621; PPC64LE-NEXT: lharx 3, 0, 5 5622; PPC64LE-NEXT: cmplw 4, 3 5623; PPC64LE-NEXT: bge 0, .LBB326_3 5624; PPC64LE-NEXT: # %bb.2: 5625; PPC64LE-NEXT: sthcx. 4, 0, 5 5626; PPC64LE-NEXT: bne 0, .LBB326_1 5627; PPC64LE-NEXT: .LBB326_3: 5628; PPC64LE-NEXT: lwsync 5629; PPC64LE-NEXT: blr 5630 %ret = atomicrmw umin i16* %ptr, i16 %val acquire 5631 ret i16 %ret 5632} 5633 5634define i16 @test327(i16* %ptr, i16 %val) { 5635; PPC64LE-LABEL: test327: 5636; PPC64LE: # %bb.0: 5637; PPC64LE-NEXT: lwsync 5638; PPC64LE-NEXT: .LBB327_1: 5639; PPC64LE-NEXT: lharx 5, 0, 3 5640; PPC64LE-NEXT: cmplw 4, 5 5641; PPC64LE-NEXT: bge 0, .LBB327_3 5642; PPC64LE-NEXT: # %bb.2: 5643; PPC64LE-NEXT: sthcx. 4, 0, 3 5644; PPC64LE-NEXT: bne 0, .LBB327_1 5645; PPC64LE-NEXT: .LBB327_3: 5646; PPC64LE-NEXT: mr 3, 5 5647; PPC64LE-NEXT: blr 5648 %ret = atomicrmw umin i16* %ptr, i16 %val release 5649 ret i16 %ret 5650} 5651 5652define i16 @test328(i16* %ptr, i16 %val) { 5653; PPC64LE-LABEL: test328: 5654; PPC64LE: # %bb.0: 5655; PPC64LE-NEXT: lwsync 5656; PPC64LE-NEXT: .LBB328_1: 5657; PPC64LE-NEXT: lharx 5, 0, 3 5658; PPC64LE-NEXT: cmplw 4, 5 5659; PPC64LE-NEXT: bge 0, .LBB328_3 5660; PPC64LE-NEXT: # %bb.2: 5661; PPC64LE-NEXT: sthcx. 4, 0, 3 5662; PPC64LE-NEXT: bne 0, .LBB328_1 5663; PPC64LE-NEXT: .LBB328_3: 5664; PPC64LE-NEXT: mr 3, 5 5665; PPC64LE-NEXT: lwsync 5666; PPC64LE-NEXT: blr 5667 %ret = atomicrmw umin i16* %ptr, i16 %val acq_rel 5668 ret i16 %ret 5669} 5670 5671define i16 @test329(i16* %ptr, i16 %val) { 5672; PPC64LE-LABEL: test329: 5673; PPC64LE: # %bb.0: 5674; PPC64LE-NEXT: sync 5675; PPC64LE-NEXT: .LBB329_1: 5676; PPC64LE-NEXT: lharx 5, 0, 3 5677; PPC64LE-NEXT: cmplw 4, 5 5678; PPC64LE-NEXT: bge 0, .LBB329_3 5679; PPC64LE-NEXT: # %bb.2: 5680; PPC64LE-NEXT: sthcx. 4, 0, 3 5681; PPC64LE-NEXT: bne 0, .LBB329_1 5682; PPC64LE-NEXT: .LBB329_3: 5683; PPC64LE-NEXT: mr 3, 5 5684; PPC64LE-NEXT: lwsync 5685; PPC64LE-NEXT: blr 5686 %ret = atomicrmw umin i16* %ptr, i16 %val seq_cst 5687 ret i16 %ret 5688} 5689 5690define i32 @test330(i32* %ptr, i32 %val) { 5691; PPC64LE-LABEL: test330: 5692; PPC64LE: # %bb.0: 5693; PPC64LE-NEXT: .LBB330_1: 5694; PPC64LE-NEXT: lwarx 5, 0, 3 5695; PPC64LE-NEXT: cmplw 4, 5 5696; PPC64LE-NEXT: bge 0, .LBB330_3 5697; PPC64LE-NEXT: # %bb.2: 5698; PPC64LE-NEXT: stwcx. 4, 0, 3 5699; PPC64LE-NEXT: bne 0, .LBB330_1 5700; PPC64LE-NEXT: .LBB330_3: 5701; PPC64LE-NEXT: mr 3, 5 5702; PPC64LE-NEXT: blr 5703 %ret = atomicrmw umin i32* %ptr, i32 %val monotonic 5704 ret i32 %ret 5705} 5706 5707define i32 @test331(i32* %ptr, i32 %val) { 5708; PPC64LE-LABEL: test331: 5709; PPC64LE: # %bb.0: 5710; PPC64LE-NEXT: mr 5, 3 5711; PPC64LE-NEXT: .LBB331_1: 5712; PPC64LE-NEXT: lwarx 3, 0, 5 5713; PPC64LE-NEXT: cmplw 4, 3 5714; PPC64LE-NEXT: bge 0, .LBB331_3 5715; PPC64LE-NEXT: # %bb.2: 5716; PPC64LE-NEXT: stwcx. 4, 0, 5 5717; PPC64LE-NEXT: bne 0, .LBB331_1 5718; PPC64LE-NEXT: .LBB331_3: 5719; PPC64LE-NEXT: lwsync 5720; PPC64LE-NEXT: blr 5721 %ret = atomicrmw umin i32* %ptr, i32 %val acquire 5722 ret i32 %ret 5723} 5724 5725define i32 @test332(i32* %ptr, i32 %val) { 5726; PPC64LE-LABEL: test332: 5727; PPC64LE: # %bb.0: 5728; PPC64LE-NEXT: lwsync 5729; PPC64LE-NEXT: .LBB332_1: 5730; PPC64LE-NEXT: lwarx 5, 0, 3 5731; PPC64LE-NEXT: cmplw 4, 5 5732; PPC64LE-NEXT: bge 0, .LBB332_3 5733; PPC64LE-NEXT: # %bb.2: 5734; PPC64LE-NEXT: stwcx. 4, 0, 3 5735; PPC64LE-NEXT: bne 0, .LBB332_1 5736; PPC64LE-NEXT: .LBB332_3: 5737; PPC64LE-NEXT: mr 3, 5 5738; PPC64LE-NEXT: blr 5739 %ret = atomicrmw umin i32* %ptr, i32 %val release 5740 ret i32 %ret 5741} 5742 5743define i32 @test333(i32* %ptr, i32 %val) { 5744; PPC64LE-LABEL: test333: 5745; PPC64LE: # %bb.0: 5746; PPC64LE-NEXT: lwsync 5747; PPC64LE-NEXT: .LBB333_1: 5748; PPC64LE-NEXT: lwarx 5, 0, 3 5749; PPC64LE-NEXT: cmplw 4, 5 5750; PPC64LE-NEXT: bge 0, .LBB333_3 5751; PPC64LE-NEXT: # %bb.2: 5752; PPC64LE-NEXT: stwcx. 4, 0, 3 5753; PPC64LE-NEXT: bne 0, .LBB333_1 5754; PPC64LE-NEXT: .LBB333_3: 5755; PPC64LE-NEXT: mr 3, 5 5756; PPC64LE-NEXT: lwsync 5757; PPC64LE-NEXT: blr 5758 %ret = atomicrmw umin i32* %ptr, i32 %val acq_rel 5759 ret i32 %ret 5760} 5761 5762define i32 @test334(i32* %ptr, i32 %val) { 5763; PPC64LE-LABEL: test334: 5764; PPC64LE: # %bb.0: 5765; PPC64LE-NEXT: sync 5766; PPC64LE-NEXT: .LBB334_1: 5767; PPC64LE-NEXT: lwarx 5, 0, 3 5768; PPC64LE-NEXT: cmplw 4, 5 5769; PPC64LE-NEXT: bge 0, .LBB334_3 5770; PPC64LE-NEXT: # %bb.2: 5771; PPC64LE-NEXT: stwcx. 4, 0, 3 5772; PPC64LE-NEXT: bne 0, .LBB334_1 5773; PPC64LE-NEXT: .LBB334_3: 5774; PPC64LE-NEXT: mr 3, 5 5775; PPC64LE-NEXT: lwsync 5776; PPC64LE-NEXT: blr 5777 %ret = atomicrmw umin i32* %ptr, i32 %val seq_cst 5778 ret i32 %ret 5779} 5780 5781define i64 @test335(i64* %ptr, i64 %val) { 5782; PPC64LE-LABEL: test335: 5783; PPC64LE: # %bb.0: 5784; PPC64LE-NEXT: .LBB335_1: 5785; PPC64LE-NEXT: ldarx 5, 0, 3 5786; PPC64LE-NEXT: cmpld 4, 5 5787; PPC64LE-NEXT: bge 0, .LBB335_3 5788; PPC64LE-NEXT: # %bb.2: 5789; PPC64LE-NEXT: stdcx. 4, 0, 3 5790; PPC64LE-NEXT: bne 0, .LBB335_1 5791; PPC64LE-NEXT: .LBB335_3: 5792; PPC64LE-NEXT: mr 3, 5 5793; PPC64LE-NEXT: blr 5794 %ret = atomicrmw umin i64* %ptr, i64 %val monotonic 5795 ret i64 %ret 5796} 5797 5798define i64 @test336(i64* %ptr, i64 %val) { 5799; PPC64LE-LABEL: test336: 5800; PPC64LE: # %bb.0: 5801; PPC64LE-NEXT: mr 5, 3 5802; PPC64LE-NEXT: .LBB336_1: 5803; PPC64LE-NEXT: ldarx 3, 0, 5 5804; PPC64LE-NEXT: cmpld 4, 3 5805; PPC64LE-NEXT: bge 0, .LBB336_3 5806; PPC64LE-NEXT: # %bb.2: 5807; PPC64LE-NEXT: stdcx. 4, 0, 5 5808; PPC64LE-NEXT: bne 0, .LBB336_1 5809; PPC64LE-NEXT: .LBB336_3: 5810; PPC64LE-NEXT: lwsync 5811; PPC64LE-NEXT: blr 5812 %ret = atomicrmw umin i64* %ptr, i64 %val acquire 5813 ret i64 %ret 5814} 5815 5816define i64 @test337(i64* %ptr, i64 %val) { 5817; PPC64LE-LABEL: test337: 5818; PPC64LE: # %bb.0: 5819; PPC64LE-NEXT: lwsync 5820; PPC64LE-NEXT: .LBB337_1: 5821; PPC64LE-NEXT: ldarx 5, 0, 3 5822; PPC64LE-NEXT: cmpld 4, 5 5823; PPC64LE-NEXT: bge 0, .LBB337_3 5824; PPC64LE-NEXT: # %bb.2: 5825; PPC64LE-NEXT: stdcx. 4, 0, 3 5826; PPC64LE-NEXT: bne 0, .LBB337_1 5827; PPC64LE-NEXT: .LBB337_3: 5828; PPC64LE-NEXT: mr 3, 5 5829; PPC64LE-NEXT: blr 5830 %ret = atomicrmw umin i64* %ptr, i64 %val release 5831 ret i64 %ret 5832} 5833 5834define i64 @test338(i64* %ptr, i64 %val) { 5835; PPC64LE-LABEL: test338: 5836; PPC64LE: # %bb.0: 5837; PPC64LE-NEXT: lwsync 5838; PPC64LE-NEXT: .LBB338_1: 5839; PPC64LE-NEXT: ldarx 5, 0, 3 5840; PPC64LE-NEXT: cmpld 4, 5 5841; PPC64LE-NEXT: bge 0, .LBB338_3 5842; PPC64LE-NEXT: # %bb.2: 5843; PPC64LE-NEXT: stdcx. 4, 0, 3 5844; PPC64LE-NEXT: bne 0, .LBB338_1 5845; PPC64LE-NEXT: .LBB338_3: 5846; PPC64LE-NEXT: mr 3, 5 5847; PPC64LE-NEXT: lwsync 5848; PPC64LE-NEXT: blr 5849 %ret = atomicrmw umin i64* %ptr, i64 %val acq_rel 5850 ret i64 %ret 5851} 5852 5853define i64 @test339(i64* %ptr, i64 %val) { 5854; PPC64LE-LABEL: test339: 5855; PPC64LE: # %bb.0: 5856; PPC64LE-NEXT: sync 5857; PPC64LE-NEXT: .LBB339_1: 5858; PPC64LE-NEXT: ldarx 5, 0, 3 5859; PPC64LE-NEXT: cmpld 4, 5 5860; PPC64LE-NEXT: bge 0, .LBB339_3 5861; PPC64LE-NEXT: # %bb.2: 5862; PPC64LE-NEXT: stdcx. 4, 0, 3 5863; PPC64LE-NEXT: bne 0, .LBB339_1 5864; PPC64LE-NEXT: .LBB339_3: 5865; PPC64LE-NEXT: mr 3, 5 5866; PPC64LE-NEXT: lwsync 5867; PPC64LE-NEXT: blr 5868 %ret = atomicrmw umin i64* %ptr, i64 %val seq_cst 5869 ret i64 %ret 5870} 5871 5872define i8 @test340(i8* %ptr, i8 %val) { 5873; PPC64LE-LABEL: test340: 5874; PPC64LE: # %bb.0: 5875; PPC64LE-NEXT: .LBB340_1: 5876; PPC64LE-NEXT: lbarx 5, 0, 3 5877; PPC64LE-NEXT: stbcx. 4, 0, 3 5878; PPC64LE-NEXT: bne 0, .LBB340_1 5879; PPC64LE-NEXT: # %bb.2: 5880; PPC64LE-NEXT: mr 3, 5 5881; PPC64LE-NEXT: blr 5882 %ret = atomicrmw xchg i8* %ptr, i8 %val syncscope("singlethread") monotonic 5883 ret i8 %ret 5884} 5885 5886define i8 @test341(i8* %ptr, i8 %val) { 5887; PPC64LE-LABEL: test341: 5888; PPC64LE: # %bb.0: 5889; PPC64LE-NEXT: mr 5, 3 5890; PPC64LE-NEXT: .LBB341_1: 5891; PPC64LE-NEXT: lbarx 3, 0, 5 5892; PPC64LE-NEXT: stbcx. 4, 0, 5 5893; PPC64LE-NEXT: bne 0, .LBB341_1 5894; PPC64LE-NEXT: # %bb.2: 5895; PPC64LE-NEXT: lwsync 5896; PPC64LE-NEXT: blr 5897 %ret = atomicrmw xchg i8* %ptr, i8 %val syncscope("singlethread") acquire 5898 ret i8 %ret 5899} 5900 5901define i8 @test342(i8* %ptr, i8 %val) { 5902; PPC64LE-LABEL: test342: 5903; PPC64LE: # %bb.0: 5904; PPC64LE-NEXT: lwsync 5905; PPC64LE-NEXT: .LBB342_1: 5906; PPC64LE-NEXT: lbarx 5, 0, 3 5907; PPC64LE-NEXT: stbcx. 4, 0, 3 5908; PPC64LE-NEXT: bne 0, .LBB342_1 5909; PPC64LE-NEXT: # %bb.2: 5910; PPC64LE-NEXT: mr 3, 5 5911; PPC64LE-NEXT: blr 5912 %ret = atomicrmw xchg i8* %ptr, i8 %val syncscope("singlethread") release 5913 ret i8 %ret 5914} 5915 5916define i8 @test343(i8* %ptr, i8 %val) { 5917; PPC64LE-LABEL: test343: 5918; PPC64LE: # %bb.0: 5919; PPC64LE-NEXT: lwsync 5920; PPC64LE-NEXT: .LBB343_1: 5921; PPC64LE-NEXT: lbarx 5, 0, 3 5922; PPC64LE-NEXT: stbcx. 4, 0, 3 5923; PPC64LE-NEXT: bne 0, .LBB343_1 5924; PPC64LE-NEXT: # %bb.2: 5925; PPC64LE-NEXT: mr 3, 5 5926; PPC64LE-NEXT: lwsync 5927; PPC64LE-NEXT: blr 5928 %ret = atomicrmw xchg i8* %ptr, i8 %val syncscope("singlethread") acq_rel 5929 ret i8 %ret 5930} 5931 5932define i8 @test344(i8* %ptr, i8 %val) { 5933; PPC64LE-LABEL: test344: 5934; PPC64LE: # %bb.0: 5935; PPC64LE-NEXT: sync 5936; PPC64LE-NEXT: .LBB344_1: 5937; PPC64LE-NEXT: lbarx 5, 0, 3 5938; PPC64LE-NEXT: stbcx. 4, 0, 3 5939; PPC64LE-NEXT: bne 0, .LBB344_1 5940; PPC64LE-NEXT: # %bb.2: 5941; PPC64LE-NEXT: mr 3, 5 5942; PPC64LE-NEXT: lwsync 5943; PPC64LE-NEXT: blr 5944 %ret = atomicrmw xchg i8* %ptr, i8 %val syncscope("singlethread") seq_cst 5945 ret i8 %ret 5946} 5947 5948define i16 @test345(i16* %ptr, i16 %val) { 5949; PPC64LE-LABEL: test345: 5950; PPC64LE: # %bb.0: 5951; PPC64LE-NEXT: .LBB345_1: 5952; PPC64LE-NEXT: lharx 5, 0, 3 5953; PPC64LE-NEXT: sthcx. 4, 0, 3 5954; PPC64LE-NEXT: bne 0, .LBB345_1 5955; PPC64LE-NEXT: # %bb.2: 5956; PPC64LE-NEXT: mr 3, 5 5957; PPC64LE-NEXT: blr 5958 %ret = atomicrmw xchg i16* %ptr, i16 %val syncscope("singlethread") monotonic 5959 ret i16 %ret 5960} 5961 5962define i16 @test346(i16* %ptr, i16 %val) { 5963; PPC64LE-LABEL: test346: 5964; PPC64LE: # %bb.0: 5965; PPC64LE-NEXT: mr 5, 3 5966; PPC64LE-NEXT: .LBB346_1: 5967; PPC64LE-NEXT: lharx 3, 0, 5 5968; PPC64LE-NEXT: sthcx. 4, 0, 5 5969; PPC64LE-NEXT: bne 0, .LBB346_1 5970; PPC64LE-NEXT: # %bb.2: 5971; PPC64LE-NEXT: lwsync 5972; PPC64LE-NEXT: blr 5973 %ret = atomicrmw xchg i16* %ptr, i16 %val syncscope("singlethread") acquire 5974 ret i16 %ret 5975} 5976 5977define i16 @test347(i16* %ptr, i16 %val) { 5978; PPC64LE-LABEL: test347: 5979; PPC64LE: # %bb.0: 5980; PPC64LE-NEXT: lwsync 5981; PPC64LE-NEXT: .LBB347_1: 5982; PPC64LE-NEXT: lharx 5, 0, 3 5983; PPC64LE-NEXT: sthcx. 4, 0, 3 5984; PPC64LE-NEXT: bne 0, .LBB347_1 5985; PPC64LE-NEXT: # %bb.2: 5986; PPC64LE-NEXT: mr 3, 5 5987; PPC64LE-NEXT: blr 5988 %ret = atomicrmw xchg i16* %ptr, i16 %val syncscope("singlethread") release 5989 ret i16 %ret 5990} 5991 5992define i16 @test348(i16* %ptr, i16 %val) { 5993; PPC64LE-LABEL: test348: 5994; PPC64LE: # %bb.0: 5995; PPC64LE-NEXT: lwsync 5996; PPC64LE-NEXT: .LBB348_1: 5997; PPC64LE-NEXT: lharx 5, 0, 3 5998; PPC64LE-NEXT: sthcx. 4, 0, 3 5999; PPC64LE-NEXT: bne 0, .LBB348_1 6000; PPC64LE-NEXT: # %bb.2: 6001; PPC64LE-NEXT: mr 3, 5 6002; PPC64LE-NEXT: lwsync 6003; PPC64LE-NEXT: blr 6004 %ret = atomicrmw xchg i16* %ptr, i16 %val syncscope("singlethread") acq_rel 6005 ret i16 %ret 6006} 6007 6008define i16 @test349(i16* %ptr, i16 %val) { 6009; PPC64LE-LABEL: test349: 6010; PPC64LE: # %bb.0: 6011; PPC64LE-NEXT: sync 6012; PPC64LE-NEXT: .LBB349_1: 6013; PPC64LE-NEXT: lharx 5, 0, 3 6014; PPC64LE-NEXT: sthcx. 4, 0, 3 6015; PPC64LE-NEXT: bne 0, .LBB349_1 6016; PPC64LE-NEXT: # %bb.2: 6017; PPC64LE-NEXT: mr 3, 5 6018; PPC64LE-NEXT: lwsync 6019; PPC64LE-NEXT: blr 6020 %ret = atomicrmw xchg i16* %ptr, i16 %val syncscope("singlethread") seq_cst 6021 ret i16 %ret 6022} 6023 6024define i32 @test350(i32* %ptr, i32 %val) { 6025; PPC64LE-LABEL: test350: 6026; PPC64LE: # %bb.0: 6027; PPC64LE-NEXT: .LBB350_1: 6028; PPC64LE-NEXT: lwarx 5, 0, 3 6029; PPC64LE-NEXT: stwcx. 4, 0, 3 6030; PPC64LE-NEXT: bne 0, .LBB350_1 6031; PPC64LE-NEXT: # %bb.2: 6032; PPC64LE-NEXT: mr 3, 5 6033; PPC64LE-NEXT: blr 6034 %ret = atomicrmw xchg i32* %ptr, i32 %val syncscope("singlethread") monotonic 6035 ret i32 %ret 6036} 6037 6038define i32 @test351(i32* %ptr, i32 %val) { 6039; PPC64LE-LABEL: test351: 6040; PPC64LE: # %bb.0: 6041; PPC64LE-NEXT: mr 5, 3 6042; PPC64LE-NEXT: .LBB351_1: 6043; PPC64LE-NEXT: lwarx 3, 0, 5 6044; PPC64LE-NEXT: stwcx. 4, 0, 5 6045; PPC64LE-NEXT: bne 0, .LBB351_1 6046; PPC64LE-NEXT: # %bb.2: 6047; PPC64LE-NEXT: lwsync 6048; PPC64LE-NEXT: blr 6049 %ret = atomicrmw xchg i32* %ptr, i32 %val syncscope("singlethread") acquire 6050 ret i32 %ret 6051} 6052 6053define i32 @test352(i32* %ptr, i32 %val) { 6054; PPC64LE-LABEL: test352: 6055; PPC64LE: # %bb.0: 6056; PPC64LE-NEXT: lwsync 6057; PPC64LE-NEXT: .LBB352_1: 6058; PPC64LE-NEXT: lwarx 5, 0, 3 6059; PPC64LE-NEXT: stwcx. 4, 0, 3 6060; PPC64LE-NEXT: bne 0, .LBB352_1 6061; PPC64LE-NEXT: # %bb.2: 6062; PPC64LE-NEXT: mr 3, 5 6063; PPC64LE-NEXT: blr 6064 %ret = atomicrmw xchg i32* %ptr, i32 %val syncscope("singlethread") release 6065 ret i32 %ret 6066} 6067 6068define i32 @test353(i32* %ptr, i32 %val) { 6069; PPC64LE-LABEL: test353: 6070; PPC64LE: # %bb.0: 6071; PPC64LE-NEXT: lwsync 6072; PPC64LE-NEXT: .LBB353_1: 6073; PPC64LE-NEXT: lwarx 5, 0, 3 6074; PPC64LE-NEXT: stwcx. 4, 0, 3 6075; PPC64LE-NEXT: bne 0, .LBB353_1 6076; PPC64LE-NEXT: # %bb.2: 6077; PPC64LE-NEXT: mr 3, 5 6078; PPC64LE-NEXT: lwsync 6079; PPC64LE-NEXT: blr 6080 %ret = atomicrmw xchg i32* %ptr, i32 %val syncscope("singlethread") acq_rel 6081 ret i32 %ret 6082} 6083 6084define i32 @test354(i32* %ptr, i32 %val) { 6085; PPC64LE-LABEL: test354: 6086; PPC64LE: # %bb.0: 6087; PPC64LE-NEXT: sync 6088; PPC64LE-NEXT: .LBB354_1: 6089; PPC64LE-NEXT: lwarx 5, 0, 3 6090; PPC64LE-NEXT: stwcx. 4, 0, 3 6091; PPC64LE-NEXT: bne 0, .LBB354_1 6092; PPC64LE-NEXT: # %bb.2: 6093; PPC64LE-NEXT: mr 3, 5 6094; PPC64LE-NEXT: lwsync 6095; PPC64LE-NEXT: blr 6096 %ret = atomicrmw xchg i32* %ptr, i32 %val syncscope("singlethread") seq_cst 6097 ret i32 %ret 6098} 6099 6100define i64 @test355(i64* %ptr, i64 %val) { 6101; PPC64LE-LABEL: test355: 6102; PPC64LE: # %bb.0: 6103; PPC64LE-NEXT: .LBB355_1: 6104; PPC64LE-NEXT: ldarx 5, 0, 3 6105; PPC64LE-NEXT: stdcx. 4, 0, 3 6106; PPC64LE-NEXT: bne 0, .LBB355_1 6107; PPC64LE-NEXT: # %bb.2: 6108; PPC64LE-NEXT: mr 3, 5 6109; PPC64LE-NEXT: blr 6110 %ret = atomicrmw xchg i64* %ptr, i64 %val syncscope("singlethread") monotonic 6111 ret i64 %ret 6112} 6113 6114define i64 @test356(i64* %ptr, i64 %val) { 6115; PPC64LE-LABEL: test356: 6116; PPC64LE: # %bb.0: 6117; PPC64LE-NEXT: mr 5, 3 6118; PPC64LE-NEXT: .LBB356_1: 6119; PPC64LE-NEXT: ldarx 3, 0, 5 6120; PPC64LE-NEXT: stdcx. 4, 0, 5 6121; PPC64LE-NEXT: bne 0, .LBB356_1 6122; PPC64LE-NEXT: # %bb.2: 6123; PPC64LE-NEXT: lwsync 6124; PPC64LE-NEXT: blr 6125 %ret = atomicrmw xchg i64* %ptr, i64 %val syncscope("singlethread") acquire 6126 ret i64 %ret 6127} 6128 6129define i64 @test357(i64* %ptr, i64 %val) { 6130; PPC64LE-LABEL: test357: 6131; PPC64LE: # %bb.0: 6132; PPC64LE-NEXT: lwsync 6133; PPC64LE-NEXT: .LBB357_1: 6134; PPC64LE-NEXT: ldarx 5, 0, 3 6135; PPC64LE-NEXT: stdcx. 4, 0, 3 6136; PPC64LE-NEXT: bne 0, .LBB357_1 6137; PPC64LE-NEXT: # %bb.2: 6138; PPC64LE-NEXT: mr 3, 5 6139; PPC64LE-NEXT: blr 6140 %ret = atomicrmw xchg i64* %ptr, i64 %val syncscope("singlethread") release 6141 ret i64 %ret 6142} 6143 6144define i64 @test358(i64* %ptr, i64 %val) { 6145; PPC64LE-LABEL: test358: 6146; PPC64LE: # %bb.0: 6147; PPC64LE-NEXT: lwsync 6148; PPC64LE-NEXT: .LBB358_1: 6149; PPC64LE-NEXT: ldarx 5, 0, 3 6150; PPC64LE-NEXT: stdcx. 4, 0, 3 6151; PPC64LE-NEXT: bne 0, .LBB358_1 6152; PPC64LE-NEXT: # %bb.2: 6153; PPC64LE-NEXT: mr 3, 5 6154; PPC64LE-NEXT: lwsync 6155; PPC64LE-NEXT: blr 6156 %ret = atomicrmw xchg i64* %ptr, i64 %val syncscope("singlethread") acq_rel 6157 ret i64 %ret 6158} 6159 6160define i64 @test359(i64* %ptr, i64 %val) { 6161; PPC64LE-LABEL: test359: 6162; PPC64LE: # %bb.0: 6163; PPC64LE-NEXT: sync 6164; PPC64LE-NEXT: .LBB359_1: 6165; PPC64LE-NEXT: ldarx 5, 0, 3 6166; PPC64LE-NEXT: stdcx. 4, 0, 3 6167; PPC64LE-NEXT: bne 0, .LBB359_1 6168; PPC64LE-NEXT: # %bb.2: 6169; PPC64LE-NEXT: mr 3, 5 6170; PPC64LE-NEXT: lwsync 6171; PPC64LE-NEXT: blr 6172 %ret = atomicrmw xchg i64* %ptr, i64 %val syncscope("singlethread") seq_cst 6173 ret i64 %ret 6174} 6175 6176define i8 @test360(i8* %ptr, i8 %val) { 6177; PPC64LE-LABEL: test360: 6178; PPC64LE: # %bb.0: 6179; PPC64LE-NEXT: .LBB360_1: 6180; PPC64LE-NEXT: lbarx 5, 0, 3 6181; PPC64LE-NEXT: add 6, 4, 5 6182; PPC64LE-NEXT: stbcx. 6, 0, 3 6183; PPC64LE-NEXT: bne 0, .LBB360_1 6184; PPC64LE-NEXT: # %bb.2: 6185; PPC64LE-NEXT: mr 3, 5 6186; PPC64LE-NEXT: blr 6187 %ret = atomicrmw add i8* %ptr, i8 %val syncscope("singlethread") monotonic 6188 ret i8 %ret 6189} 6190 6191define i8 @test361(i8* %ptr, i8 %val) { 6192; PPC64LE-LABEL: test361: 6193; PPC64LE: # %bb.0: 6194; PPC64LE-NEXT: mr 5, 3 6195; PPC64LE-NEXT: .LBB361_1: 6196; PPC64LE-NEXT: lbarx 3, 0, 5 6197; PPC64LE-NEXT: add 6, 4, 3 6198; PPC64LE-NEXT: stbcx. 6, 0, 5 6199; PPC64LE-NEXT: bne 0, .LBB361_1 6200; PPC64LE-NEXT: # %bb.2: 6201; PPC64LE-NEXT: lwsync 6202; PPC64LE-NEXT: blr 6203 %ret = atomicrmw add i8* %ptr, i8 %val syncscope("singlethread") acquire 6204 ret i8 %ret 6205} 6206 6207define i8 @test362(i8* %ptr, i8 %val) { 6208; PPC64LE-LABEL: test362: 6209; PPC64LE: # %bb.0: 6210; PPC64LE-NEXT: lwsync 6211; PPC64LE-NEXT: .LBB362_1: 6212; PPC64LE-NEXT: lbarx 5, 0, 3 6213; PPC64LE-NEXT: add 6, 4, 5 6214; PPC64LE-NEXT: stbcx. 6, 0, 3 6215; PPC64LE-NEXT: bne 0, .LBB362_1 6216; PPC64LE-NEXT: # %bb.2: 6217; PPC64LE-NEXT: mr 3, 5 6218; PPC64LE-NEXT: blr 6219 %ret = atomicrmw add i8* %ptr, i8 %val syncscope("singlethread") release 6220 ret i8 %ret 6221} 6222 6223define i8 @test363(i8* %ptr, i8 %val) { 6224; PPC64LE-LABEL: test363: 6225; PPC64LE: # %bb.0: 6226; PPC64LE-NEXT: lwsync 6227; PPC64LE-NEXT: .LBB363_1: 6228; PPC64LE-NEXT: lbarx 5, 0, 3 6229; PPC64LE-NEXT: add 6, 4, 5 6230; PPC64LE-NEXT: stbcx. 6, 0, 3 6231; PPC64LE-NEXT: bne 0, .LBB363_1 6232; PPC64LE-NEXT: # %bb.2: 6233; PPC64LE-NEXT: mr 3, 5 6234; PPC64LE-NEXT: lwsync 6235; PPC64LE-NEXT: blr 6236 %ret = atomicrmw add i8* %ptr, i8 %val syncscope("singlethread") acq_rel 6237 ret i8 %ret 6238} 6239 6240define i8 @test364(i8* %ptr, i8 %val) { 6241; PPC64LE-LABEL: test364: 6242; PPC64LE: # %bb.0: 6243; PPC64LE-NEXT: sync 6244; PPC64LE-NEXT: .LBB364_1: 6245; PPC64LE-NEXT: lbarx 5, 0, 3 6246; PPC64LE-NEXT: add 6, 4, 5 6247; PPC64LE-NEXT: stbcx. 6, 0, 3 6248; PPC64LE-NEXT: bne 0, .LBB364_1 6249; PPC64LE-NEXT: # %bb.2: 6250; PPC64LE-NEXT: mr 3, 5 6251; PPC64LE-NEXT: lwsync 6252; PPC64LE-NEXT: blr 6253 %ret = atomicrmw add i8* %ptr, i8 %val syncscope("singlethread") seq_cst 6254 ret i8 %ret 6255} 6256 6257define i16 @test365(i16* %ptr, i16 %val) { 6258; PPC64LE-LABEL: test365: 6259; PPC64LE: # %bb.0: 6260; PPC64LE-NEXT: .LBB365_1: 6261; PPC64LE-NEXT: lharx 5, 0, 3 6262; PPC64LE-NEXT: add 6, 4, 5 6263; PPC64LE-NEXT: sthcx. 6, 0, 3 6264; PPC64LE-NEXT: bne 0, .LBB365_1 6265; PPC64LE-NEXT: # %bb.2: 6266; PPC64LE-NEXT: mr 3, 5 6267; PPC64LE-NEXT: blr 6268 %ret = atomicrmw add i16* %ptr, i16 %val syncscope("singlethread") monotonic 6269 ret i16 %ret 6270} 6271 6272define i16 @test366(i16* %ptr, i16 %val) { 6273; PPC64LE-LABEL: test366: 6274; PPC64LE: # %bb.0: 6275; PPC64LE-NEXT: mr 5, 3 6276; PPC64LE-NEXT: .LBB366_1: 6277; PPC64LE-NEXT: lharx 3, 0, 5 6278; PPC64LE-NEXT: add 6, 4, 3 6279; PPC64LE-NEXT: sthcx. 6, 0, 5 6280; PPC64LE-NEXT: bne 0, .LBB366_1 6281; PPC64LE-NEXT: # %bb.2: 6282; PPC64LE-NEXT: lwsync 6283; PPC64LE-NEXT: blr 6284 %ret = atomicrmw add i16* %ptr, i16 %val syncscope("singlethread") acquire 6285 ret i16 %ret 6286} 6287 6288define i16 @test367(i16* %ptr, i16 %val) { 6289; PPC64LE-LABEL: test367: 6290; PPC64LE: # %bb.0: 6291; PPC64LE-NEXT: lwsync 6292; PPC64LE-NEXT: .LBB367_1: 6293; PPC64LE-NEXT: lharx 5, 0, 3 6294; PPC64LE-NEXT: add 6, 4, 5 6295; PPC64LE-NEXT: sthcx. 6, 0, 3 6296; PPC64LE-NEXT: bne 0, .LBB367_1 6297; PPC64LE-NEXT: # %bb.2: 6298; PPC64LE-NEXT: mr 3, 5 6299; PPC64LE-NEXT: blr 6300 %ret = atomicrmw add i16* %ptr, i16 %val syncscope("singlethread") release 6301 ret i16 %ret 6302} 6303 6304define i16 @test368(i16* %ptr, i16 %val) { 6305; PPC64LE-LABEL: test368: 6306; PPC64LE: # %bb.0: 6307; PPC64LE-NEXT: lwsync 6308; PPC64LE-NEXT: .LBB368_1: 6309; PPC64LE-NEXT: lharx 5, 0, 3 6310; PPC64LE-NEXT: add 6, 4, 5 6311; PPC64LE-NEXT: sthcx. 6, 0, 3 6312; PPC64LE-NEXT: bne 0, .LBB368_1 6313; PPC64LE-NEXT: # %bb.2: 6314; PPC64LE-NEXT: mr 3, 5 6315; PPC64LE-NEXT: lwsync 6316; PPC64LE-NEXT: blr 6317 %ret = atomicrmw add i16* %ptr, i16 %val syncscope("singlethread") acq_rel 6318 ret i16 %ret 6319} 6320 6321define i16 @test369(i16* %ptr, i16 %val) { 6322; PPC64LE-LABEL: test369: 6323; PPC64LE: # %bb.0: 6324; PPC64LE-NEXT: sync 6325; PPC64LE-NEXT: .LBB369_1: 6326; PPC64LE-NEXT: lharx 5, 0, 3 6327; PPC64LE-NEXT: add 6, 4, 5 6328; PPC64LE-NEXT: sthcx. 6, 0, 3 6329; PPC64LE-NEXT: bne 0, .LBB369_1 6330; PPC64LE-NEXT: # %bb.2: 6331; PPC64LE-NEXT: mr 3, 5 6332; PPC64LE-NEXT: lwsync 6333; PPC64LE-NEXT: blr 6334 %ret = atomicrmw add i16* %ptr, i16 %val syncscope("singlethread") seq_cst 6335 ret i16 %ret 6336} 6337 6338define i32 @test370(i32* %ptr, i32 %val) { 6339; PPC64LE-LABEL: test370: 6340; PPC64LE: # %bb.0: 6341; PPC64LE-NEXT: .LBB370_1: 6342; PPC64LE-NEXT: lwarx 5, 0, 3 6343; PPC64LE-NEXT: add 6, 4, 5 6344; PPC64LE-NEXT: stwcx. 6, 0, 3 6345; PPC64LE-NEXT: bne 0, .LBB370_1 6346; PPC64LE-NEXT: # %bb.2: 6347; PPC64LE-NEXT: mr 3, 5 6348; PPC64LE-NEXT: blr 6349 %ret = atomicrmw add i32* %ptr, i32 %val syncscope("singlethread") monotonic 6350 ret i32 %ret 6351} 6352 6353define i32 @test371(i32* %ptr, i32 %val) { 6354; PPC64LE-LABEL: test371: 6355; PPC64LE: # %bb.0: 6356; PPC64LE-NEXT: mr 5, 3 6357; PPC64LE-NEXT: .LBB371_1: 6358; PPC64LE-NEXT: lwarx 3, 0, 5 6359; PPC64LE-NEXT: add 6, 4, 3 6360; PPC64LE-NEXT: stwcx. 6, 0, 5 6361; PPC64LE-NEXT: bne 0, .LBB371_1 6362; PPC64LE-NEXT: # %bb.2: 6363; PPC64LE-NEXT: lwsync 6364; PPC64LE-NEXT: blr 6365 %ret = atomicrmw add i32* %ptr, i32 %val syncscope("singlethread") acquire 6366 ret i32 %ret 6367} 6368 6369define i32 @test372(i32* %ptr, i32 %val) { 6370; PPC64LE-LABEL: test372: 6371; PPC64LE: # %bb.0: 6372; PPC64LE-NEXT: lwsync 6373; PPC64LE-NEXT: .LBB372_1: 6374; PPC64LE-NEXT: lwarx 5, 0, 3 6375; PPC64LE-NEXT: add 6, 4, 5 6376; PPC64LE-NEXT: stwcx. 6, 0, 3 6377; PPC64LE-NEXT: bne 0, .LBB372_1 6378; PPC64LE-NEXT: # %bb.2: 6379; PPC64LE-NEXT: mr 3, 5 6380; PPC64LE-NEXT: blr 6381 %ret = atomicrmw add i32* %ptr, i32 %val syncscope("singlethread") release 6382 ret i32 %ret 6383} 6384 6385define i32 @test373(i32* %ptr, i32 %val) { 6386; PPC64LE-LABEL: test373: 6387; PPC64LE: # %bb.0: 6388; PPC64LE-NEXT: lwsync 6389; PPC64LE-NEXT: .LBB373_1: 6390; PPC64LE-NEXT: lwarx 5, 0, 3 6391; PPC64LE-NEXT: add 6, 4, 5 6392; PPC64LE-NEXT: stwcx. 6, 0, 3 6393; PPC64LE-NEXT: bne 0, .LBB373_1 6394; PPC64LE-NEXT: # %bb.2: 6395; PPC64LE-NEXT: mr 3, 5 6396; PPC64LE-NEXT: lwsync 6397; PPC64LE-NEXT: blr 6398 %ret = atomicrmw add i32* %ptr, i32 %val syncscope("singlethread") acq_rel 6399 ret i32 %ret 6400} 6401 6402define i32 @test374(i32* %ptr, i32 %val) { 6403; PPC64LE-LABEL: test374: 6404; PPC64LE: # %bb.0: 6405; PPC64LE-NEXT: sync 6406; PPC64LE-NEXT: .LBB374_1: 6407; PPC64LE-NEXT: lwarx 5, 0, 3 6408; PPC64LE-NEXT: add 6, 4, 5 6409; PPC64LE-NEXT: stwcx. 6, 0, 3 6410; PPC64LE-NEXT: bne 0, .LBB374_1 6411; PPC64LE-NEXT: # %bb.2: 6412; PPC64LE-NEXT: mr 3, 5 6413; PPC64LE-NEXT: lwsync 6414; PPC64LE-NEXT: blr 6415 %ret = atomicrmw add i32* %ptr, i32 %val syncscope("singlethread") seq_cst 6416 ret i32 %ret 6417} 6418 6419define i64 @test375(i64* %ptr, i64 %val) { 6420; PPC64LE-LABEL: test375: 6421; PPC64LE: # %bb.0: 6422; PPC64LE-NEXT: .LBB375_1: 6423; PPC64LE-NEXT: ldarx 5, 0, 3 6424; PPC64LE-NEXT: add 6, 4, 5 6425; PPC64LE-NEXT: stdcx. 6, 0, 3 6426; PPC64LE-NEXT: bne 0, .LBB375_1 6427; PPC64LE-NEXT: # %bb.2: 6428; PPC64LE-NEXT: mr 3, 5 6429; PPC64LE-NEXT: blr 6430 %ret = atomicrmw add i64* %ptr, i64 %val syncscope("singlethread") monotonic 6431 ret i64 %ret 6432} 6433 6434define i64 @test376(i64* %ptr, i64 %val) { 6435; PPC64LE-LABEL: test376: 6436; PPC64LE: # %bb.0: 6437; PPC64LE-NEXT: mr 5, 3 6438; PPC64LE-NEXT: .LBB376_1: 6439; PPC64LE-NEXT: ldarx 3, 0, 5 6440; PPC64LE-NEXT: add 6, 4, 3 6441; PPC64LE-NEXT: stdcx. 6, 0, 5 6442; PPC64LE-NEXT: bne 0, .LBB376_1 6443; PPC64LE-NEXT: # %bb.2: 6444; PPC64LE-NEXT: lwsync 6445; PPC64LE-NEXT: blr 6446 %ret = atomicrmw add i64* %ptr, i64 %val syncscope("singlethread") acquire 6447 ret i64 %ret 6448} 6449 6450define i64 @test377(i64* %ptr, i64 %val) { 6451; PPC64LE-LABEL: test377: 6452; PPC64LE: # %bb.0: 6453; PPC64LE-NEXT: lwsync 6454; PPC64LE-NEXT: .LBB377_1: 6455; PPC64LE-NEXT: ldarx 5, 0, 3 6456; PPC64LE-NEXT: add 6, 4, 5 6457; PPC64LE-NEXT: stdcx. 6, 0, 3 6458; PPC64LE-NEXT: bne 0, .LBB377_1 6459; PPC64LE-NEXT: # %bb.2: 6460; PPC64LE-NEXT: mr 3, 5 6461; PPC64LE-NEXT: blr 6462 %ret = atomicrmw add i64* %ptr, i64 %val syncscope("singlethread") release 6463 ret i64 %ret 6464} 6465 6466define i64 @test378(i64* %ptr, i64 %val) { 6467; PPC64LE-LABEL: test378: 6468; PPC64LE: # %bb.0: 6469; PPC64LE-NEXT: lwsync 6470; PPC64LE-NEXT: .LBB378_1: 6471; PPC64LE-NEXT: ldarx 5, 0, 3 6472; PPC64LE-NEXT: add 6, 4, 5 6473; PPC64LE-NEXT: stdcx. 6, 0, 3 6474; PPC64LE-NEXT: bne 0, .LBB378_1 6475; PPC64LE-NEXT: # %bb.2: 6476; PPC64LE-NEXT: mr 3, 5 6477; PPC64LE-NEXT: lwsync 6478; PPC64LE-NEXT: blr 6479 %ret = atomicrmw add i64* %ptr, i64 %val syncscope("singlethread") acq_rel 6480 ret i64 %ret 6481} 6482 6483define i64 @test379(i64* %ptr, i64 %val) { 6484; PPC64LE-LABEL: test379: 6485; PPC64LE: # %bb.0: 6486; PPC64LE-NEXT: sync 6487; PPC64LE-NEXT: .LBB379_1: 6488; PPC64LE-NEXT: ldarx 5, 0, 3 6489; PPC64LE-NEXT: add 6, 4, 5 6490; PPC64LE-NEXT: stdcx. 6, 0, 3 6491; PPC64LE-NEXT: bne 0, .LBB379_1 6492; PPC64LE-NEXT: # %bb.2: 6493; PPC64LE-NEXT: mr 3, 5 6494; PPC64LE-NEXT: lwsync 6495; PPC64LE-NEXT: blr 6496 %ret = atomicrmw add i64* %ptr, i64 %val syncscope("singlethread") seq_cst 6497 ret i64 %ret 6498} 6499 6500define i8 @test380(i8* %ptr, i8 %val) { 6501; PPC64LE-LABEL: test380: 6502; PPC64LE: # %bb.0: 6503; PPC64LE-NEXT: .LBB380_1: 6504; PPC64LE-NEXT: lbarx 5, 0, 3 6505; PPC64LE-NEXT: sub 6, 5, 4 6506; PPC64LE-NEXT: stbcx. 6, 0, 3 6507; PPC64LE-NEXT: bne 0, .LBB380_1 6508; PPC64LE-NEXT: # %bb.2: 6509; PPC64LE-NEXT: mr 3, 5 6510; PPC64LE-NEXT: blr 6511 %ret = atomicrmw sub i8* %ptr, i8 %val syncscope("singlethread") monotonic 6512 ret i8 %ret 6513} 6514 6515define i8 @test381(i8* %ptr, i8 %val) { 6516; PPC64LE-LABEL: test381: 6517; PPC64LE: # %bb.0: 6518; PPC64LE-NEXT: mr 5, 3 6519; PPC64LE-NEXT: .LBB381_1: 6520; PPC64LE-NEXT: lbarx 3, 0, 5 6521; PPC64LE-NEXT: sub 6, 3, 4 6522; PPC64LE-NEXT: stbcx. 6, 0, 5 6523; PPC64LE-NEXT: bne 0, .LBB381_1 6524; PPC64LE-NEXT: # %bb.2: 6525; PPC64LE-NEXT: lwsync 6526; PPC64LE-NEXT: blr 6527 %ret = atomicrmw sub i8* %ptr, i8 %val syncscope("singlethread") acquire 6528 ret i8 %ret 6529} 6530 6531define i8 @test382(i8* %ptr, i8 %val) { 6532; PPC64LE-LABEL: test382: 6533; PPC64LE: # %bb.0: 6534; PPC64LE-NEXT: lwsync 6535; PPC64LE-NEXT: .LBB382_1: 6536; PPC64LE-NEXT: lbarx 5, 0, 3 6537; PPC64LE-NEXT: sub 6, 5, 4 6538; PPC64LE-NEXT: stbcx. 6, 0, 3 6539; PPC64LE-NEXT: bne 0, .LBB382_1 6540; PPC64LE-NEXT: # %bb.2: 6541; PPC64LE-NEXT: mr 3, 5 6542; PPC64LE-NEXT: blr 6543 %ret = atomicrmw sub i8* %ptr, i8 %val syncscope("singlethread") release 6544 ret i8 %ret 6545} 6546 6547define i8 @test383(i8* %ptr, i8 %val) { 6548; PPC64LE-LABEL: test383: 6549; PPC64LE: # %bb.0: 6550; PPC64LE-NEXT: lwsync 6551; PPC64LE-NEXT: .LBB383_1: 6552; PPC64LE-NEXT: lbarx 5, 0, 3 6553; PPC64LE-NEXT: sub 6, 5, 4 6554; PPC64LE-NEXT: stbcx. 6, 0, 3 6555; PPC64LE-NEXT: bne 0, .LBB383_1 6556; PPC64LE-NEXT: # %bb.2: 6557; PPC64LE-NEXT: mr 3, 5 6558; PPC64LE-NEXT: lwsync 6559; PPC64LE-NEXT: blr 6560 %ret = atomicrmw sub i8* %ptr, i8 %val syncscope("singlethread") acq_rel 6561 ret i8 %ret 6562} 6563 6564define i8 @test384(i8* %ptr, i8 %val) { 6565; PPC64LE-LABEL: test384: 6566; PPC64LE: # %bb.0: 6567; PPC64LE-NEXT: sync 6568; PPC64LE-NEXT: .LBB384_1: 6569; PPC64LE-NEXT: lbarx 5, 0, 3 6570; PPC64LE-NEXT: sub 6, 5, 4 6571; PPC64LE-NEXT: stbcx. 6, 0, 3 6572; PPC64LE-NEXT: bne 0, .LBB384_1 6573; PPC64LE-NEXT: # %bb.2: 6574; PPC64LE-NEXT: mr 3, 5 6575; PPC64LE-NEXT: lwsync 6576; PPC64LE-NEXT: blr 6577 %ret = atomicrmw sub i8* %ptr, i8 %val syncscope("singlethread") seq_cst 6578 ret i8 %ret 6579} 6580 6581define i16 @test385(i16* %ptr, i16 %val) { 6582; PPC64LE-LABEL: test385: 6583; PPC64LE: # %bb.0: 6584; PPC64LE-NEXT: .LBB385_1: 6585; PPC64LE-NEXT: lharx 5, 0, 3 6586; PPC64LE-NEXT: sub 6, 5, 4 6587; PPC64LE-NEXT: sthcx. 6, 0, 3 6588; PPC64LE-NEXT: bne 0, .LBB385_1 6589; PPC64LE-NEXT: # %bb.2: 6590; PPC64LE-NEXT: mr 3, 5 6591; PPC64LE-NEXT: blr 6592 %ret = atomicrmw sub i16* %ptr, i16 %val syncscope("singlethread") monotonic 6593 ret i16 %ret 6594} 6595 6596define i16 @test386(i16* %ptr, i16 %val) { 6597; PPC64LE-LABEL: test386: 6598; PPC64LE: # %bb.0: 6599; PPC64LE-NEXT: mr 5, 3 6600; PPC64LE-NEXT: .LBB386_1: 6601; PPC64LE-NEXT: lharx 3, 0, 5 6602; PPC64LE-NEXT: sub 6, 3, 4 6603; PPC64LE-NEXT: sthcx. 6, 0, 5 6604; PPC64LE-NEXT: bne 0, .LBB386_1 6605; PPC64LE-NEXT: # %bb.2: 6606; PPC64LE-NEXT: lwsync 6607; PPC64LE-NEXT: blr 6608 %ret = atomicrmw sub i16* %ptr, i16 %val syncscope("singlethread") acquire 6609 ret i16 %ret 6610} 6611 6612define i16 @test387(i16* %ptr, i16 %val) { 6613; PPC64LE-LABEL: test387: 6614; PPC64LE: # %bb.0: 6615; PPC64LE-NEXT: lwsync 6616; PPC64LE-NEXT: .LBB387_1: 6617; PPC64LE-NEXT: lharx 5, 0, 3 6618; PPC64LE-NEXT: sub 6, 5, 4 6619; PPC64LE-NEXT: sthcx. 6, 0, 3 6620; PPC64LE-NEXT: bne 0, .LBB387_1 6621; PPC64LE-NEXT: # %bb.2: 6622; PPC64LE-NEXT: mr 3, 5 6623; PPC64LE-NEXT: blr 6624 %ret = atomicrmw sub i16* %ptr, i16 %val syncscope("singlethread") release 6625 ret i16 %ret 6626} 6627 6628define i16 @test388(i16* %ptr, i16 %val) { 6629; PPC64LE-LABEL: test388: 6630; PPC64LE: # %bb.0: 6631; PPC64LE-NEXT: lwsync 6632; PPC64LE-NEXT: .LBB388_1: 6633; PPC64LE-NEXT: lharx 5, 0, 3 6634; PPC64LE-NEXT: sub 6, 5, 4 6635; PPC64LE-NEXT: sthcx. 6, 0, 3 6636; PPC64LE-NEXT: bne 0, .LBB388_1 6637; PPC64LE-NEXT: # %bb.2: 6638; PPC64LE-NEXT: mr 3, 5 6639; PPC64LE-NEXT: lwsync 6640; PPC64LE-NEXT: blr 6641 %ret = atomicrmw sub i16* %ptr, i16 %val syncscope("singlethread") acq_rel 6642 ret i16 %ret 6643} 6644 6645define i16 @test389(i16* %ptr, i16 %val) { 6646; PPC64LE-LABEL: test389: 6647; PPC64LE: # %bb.0: 6648; PPC64LE-NEXT: sync 6649; PPC64LE-NEXT: .LBB389_1: 6650; PPC64LE-NEXT: lharx 5, 0, 3 6651; PPC64LE-NEXT: sub 6, 5, 4 6652; PPC64LE-NEXT: sthcx. 6, 0, 3 6653; PPC64LE-NEXT: bne 0, .LBB389_1 6654; PPC64LE-NEXT: # %bb.2: 6655; PPC64LE-NEXT: mr 3, 5 6656; PPC64LE-NEXT: lwsync 6657; PPC64LE-NEXT: blr 6658 %ret = atomicrmw sub i16* %ptr, i16 %val syncscope("singlethread") seq_cst 6659 ret i16 %ret 6660} 6661 6662define i32 @test390(i32* %ptr, i32 %val) { 6663; PPC64LE-LABEL: test390: 6664; PPC64LE: # %bb.0: 6665; PPC64LE-NEXT: .LBB390_1: 6666; PPC64LE-NEXT: lwarx 5, 0, 3 6667; PPC64LE-NEXT: sub 6, 5, 4 6668; PPC64LE-NEXT: stwcx. 6, 0, 3 6669; PPC64LE-NEXT: bne 0, .LBB390_1 6670; PPC64LE-NEXT: # %bb.2: 6671; PPC64LE-NEXT: mr 3, 5 6672; PPC64LE-NEXT: blr 6673 %ret = atomicrmw sub i32* %ptr, i32 %val syncscope("singlethread") monotonic 6674 ret i32 %ret 6675} 6676 6677define i32 @test391(i32* %ptr, i32 %val) { 6678; PPC64LE-LABEL: test391: 6679; PPC64LE: # %bb.0: 6680; PPC64LE-NEXT: mr 5, 3 6681; PPC64LE-NEXT: .LBB391_1: 6682; PPC64LE-NEXT: lwarx 3, 0, 5 6683; PPC64LE-NEXT: sub 6, 3, 4 6684; PPC64LE-NEXT: stwcx. 6, 0, 5 6685; PPC64LE-NEXT: bne 0, .LBB391_1 6686; PPC64LE-NEXT: # %bb.2: 6687; PPC64LE-NEXT: lwsync 6688; PPC64LE-NEXT: blr 6689 %ret = atomicrmw sub i32* %ptr, i32 %val syncscope("singlethread") acquire 6690 ret i32 %ret 6691} 6692 6693define i32 @test392(i32* %ptr, i32 %val) { 6694; PPC64LE-LABEL: test392: 6695; PPC64LE: # %bb.0: 6696; PPC64LE-NEXT: lwsync 6697; PPC64LE-NEXT: .LBB392_1: 6698; PPC64LE-NEXT: lwarx 5, 0, 3 6699; PPC64LE-NEXT: sub 6, 5, 4 6700; PPC64LE-NEXT: stwcx. 6, 0, 3 6701; PPC64LE-NEXT: bne 0, .LBB392_1 6702; PPC64LE-NEXT: # %bb.2: 6703; PPC64LE-NEXT: mr 3, 5 6704; PPC64LE-NEXT: blr 6705 %ret = atomicrmw sub i32* %ptr, i32 %val syncscope("singlethread") release 6706 ret i32 %ret 6707} 6708 6709define i32 @test393(i32* %ptr, i32 %val) { 6710; PPC64LE-LABEL: test393: 6711; PPC64LE: # %bb.0: 6712; PPC64LE-NEXT: lwsync 6713; PPC64LE-NEXT: .LBB393_1: 6714; PPC64LE-NEXT: lwarx 5, 0, 3 6715; PPC64LE-NEXT: sub 6, 5, 4 6716; PPC64LE-NEXT: stwcx. 6, 0, 3 6717; PPC64LE-NEXT: bne 0, .LBB393_1 6718; PPC64LE-NEXT: # %bb.2: 6719; PPC64LE-NEXT: mr 3, 5 6720; PPC64LE-NEXT: lwsync 6721; PPC64LE-NEXT: blr 6722 %ret = atomicrmw sub i32* %ptr, i32 %val syncscope("singlethread") acq_rel 6723 ret i32 %ret 6724} 6725 6726define i32 @test394(i32* %ptr, i32 %val) { 6727; PPC64LE-LABEL: test394: 6728; PPC64LE: # %bb.0: 6729; PPC64LE-NEXT: sync 6730; PPC64LE-NEXT: .LBB394_1: 6731; PPC64LE-NEXT: lwarx 5, 0, 3 6732; PPC64LE-NEXT: sub 6, 5, 4 6733; PPC64LE-NEXT: stwcx. 6, 0, 3 6734; PPC64LE-NEXT: bne 0, .LBB394_1 6735; PPC64LE-NEXT: # %bb.2: 6736; PPC64LE-NEXT: mr 3, 5 6737; PPC64LE-NEXT: lwsync 6738; PPC64LE-NEXT: blr 6739 %ret = atomicrmw sub i32* %ptr, i32 %val syncscope("singlethread") seq_cst 6740 ret i32 %ret 6741} 6742 6743define i64 @test395(i64* %ptr, i64 %val) { 6744; PPC64LE-LABEL: test395: 6745; PPC64LE: # %bb.0: 6746; PPC64LE-NEXT: .LBB395_1: 6747; PPC64LE-NEXT: ldarx 5, 0, 3 6748; PPC64LE-NEXT: sub 6, 5, 4 6749; PPC64LE-NEXT: stdcx. 6, 0, 3 6750; PPC64LE-NEXT: bne 0, .LBB395_1 6751; PPC64LE-NEXT: # %bb.2: 6752; PPC64LE-NEXT: mr 3, 5 6753; PPC64LE-NEXT: blr 6754 %ret = atomicrmw sub i64* %ptr, i64 %val syncscope("singlethread") monotonic 6755 ret i64 %ret 6756} 6757 6758define i64 @test396(i64* %ptr, i64 %val) { 6759; PPC64LE-LABEL: test396: 6760; PPC64LE: # %bb.0: 6761; PPC64LE-NEXT: mr 5, 3 6762; PPC64LE-NEXT: .LBB396_1: 6763; PPC64LE-NEXT: ldarx 3, 0, 5 6764; PPC64LE-NEXT: sub 6, 3, 4 6765; PPC64LE-NEXT: stdcx. 6, 0, 5 6766; PPC64LE-NEXT: bne 0, .LBB396_1 6767; PPC64LE-NEXT: # %bb.2: 6768; PPC64LE-NEXT: lwsync 6769; PPC64LE-NEXT: blr 6770 %ret = atomicrmw sub i64* %ptr, i64 %val syncscope("singlethread") acquire 6771 ret i64 %ret 6772} 6773 6774define i64 @test397(i64* %ptr, i64 %val) { 6775; PPC64LE-LABEL: test397: 6776; PPC64LE: # %bb.0: 6777; PPC64LE-NEXT: lwsync 6778; PPC64LE-NEXT: .LBB397_1: 6779; PPC64LE-NEXT: ldarx 5, 0, 3 6780; PPC64LE-NEXT: sub 6, 5, 4 6781; PPC64LE-NEXT: stdcx. 6, 0, 3 6782; PPC64LE-NEXT: bne 0, .LBB397_1 6783; PPC64LE-NEXT: # %bb.2: 6784; PPC64LE-NEXT: mr 3, 5 6785; PPC64LE-NEXT: blr 6786 %ret = atomicrmw sub i64* %ptr, i64 %val syncscope("singlethread") release 6787 ret i64 %ret 6788} 6789 6790define i64 @test398(i64* %ptr, i64 %val) { 6791; PPC64LE-LABEL: test398: 6792; PPC64LE: # %bb.0: 6793; PPC64LE-NEXT: lwsync 6794; PPC64LE-NEXT: .LBB398_1: 6795; PPC64LE-NEXT: ldarx 5, 0, 3 6796; PPC64LE-NEXT: sub 6, 5, 4 6797; PPC64LE-NEXT: stdcx. 6, 0, 3 6798; PPC64LE-NEXT: bne 0, .LBB398_1 6799; PPC64LE-NEXT: # %bb.2: 6800; PPC64LE-NEXT: mr 3, 5 6801; PPC64LE-NEXT: lwsync 6802; PPC64LE-NEXT: blr 6803 %ret = atomicrmw sub i64* %ptr, i64 %val syncscope("singlethread") acq_rel 6804 ret i64 %ret 6805} 6806 6807define i64 @test399(i64* %ptr, i64 %val) { 6808; PPC64LE-LABEL: test399: 6809; PPC64LE: # %bb.0: 6810; PPC64LE-NEXT: sync 6811; PPC64LE-NEXT: .LBB399_1: 6812; PPC64LE-NEXT: ldarx 5, 0, 3 6813; PPC64LE-NEXT: sub 6, 5, 4 6814; PPC64LE-NEXT: stdcx. 6, 0, 3 6815; PPC64LE-NEXT: bne 0, .LBB399_1 6816; PPC64LE-NEXT: # %bb.2: 6817; PPC64LE-NEXT: mr 3, 5 6818; PPC64LE-NEXT: lwsync 6819; PPC64LE-NEXT: blr 6820 %ret = atomicrmw sub i64* %ptr, i64 %val syncscope("singlethread") seq_cst 6821 ret i64 %ret 6822} 6823 6824define i8 @test400(i8* %ptr, i8 %val) { 6825; PPC64LE-LABEL: test400: 6826; PPC64LE: # %bb.0: 6827; PPC64LE-NEXT: .LBB400_1: 6828; PPC64LE-NEXT: lbarx 5, 0, 3 6829; PPC64LE-NEXT: and 6, 4, 5 6830; PPC64LE-NEXT: stbcx. 6, 0, 3 6831; PPC64LE-NEXT: bne 0, .LBB400_1 6832; PPC64LE-NEXT: # %bb.2: 6833; PPC64LE-NEXT: mr 3, 5 6834; PPC64LE-NEXT: blr 6835 %ret = atomicrmw and i8* %ptr, i8 %val syncscope("singlethread") monotonic 6836 ret i8 %ret 6837} 6838 6839define i8 @test401(i8* %ptr, i8 %val) { 6840; PPC64LE-LABEL: test401: 6841; PPC64LE: # %bb.0: 6842; PPC64LE-NEXT: mr 5, 3 6843; PPC64LE-NEXT: .LBB401_1: 6844; PPC64LE-NEXT: lbarx 3, 0, 5 6845; PPC64LE-NEXT: and 6, 4, 3 6846; PPC64LE-NEXT: stbcx. 6, 0, 5 6847; PPC64LE-NEXT: bne 0, .LBB401_1 6848; PPC64LE-NEXT: # %bb.2: 6849; PPC64LE-NEXT: lwsync 6850; PPC64LE-NEXT: blr 6851 %ret = atomicrmw and i8* %ptr, i8 %val syncscope("singlethread") acquire 6852 ret i8 %ret 6853} 6854 6855define i8 @test402(i8* %ptr, i8 %val) { 6856; PPC64LE-LABEL: test402: 6857; PPC64LE: # %bb.0: 6858; PPC64LE-NEXT: lwsync 6859; PPC64LE-NEXT: .LBB402_1: 6860; PPC64LE-NEXT: lbarx 5, 0, 3 6861; PPC64LE-NEXT: and 6, 4, 5 6862; PPC64LE-NEXT: stbcx. 6, 0, 3 6863; PPC64LE-NEXT: bne 0, .LBB402_1 6864; PPC64LE-NEXT: # %bb.2: 6865; PPC64LE-NEXT: mr 3, 5 6866; PPC64LE-NEXT: blr 6867 %ret = atomicrmw and i8* %ptr, i8 %val syncscope("singlethread") release 6868 ret i8 %ret 6869} 6870 6871define i8 @test403(i8* %ptr, i8 %val) { 6872; PPC64LE-LABEL: test403: 6873; PPC64LE: # %bb.0: 6874; PPC64LE-NEXT: lwsync 6875; PPC64LE-NEXT: .LBB403_1: 6876; PPC64LE-NEXT: lbarx 5, 0, 3 6877; PPC64LE-NEXT: and 6, 4, 5 6878; PPC64LE-NEXT: stbcx. 6, 0, 3 6879; PPC64LE-NEXT: bne 0, .LBB403_1 6880; PPC64LE-NEXT: # %bb.2: 6881; PPC64LE-NEXT: mr 3, 5 6882; PPC64LE-NEXT: lwsync 6883; PPC64LE-NEXT: blr 6884 %ret = atomicrmw and i8* %ptr, i8 %val syncscope("singlethread") acq_rel 6885 ret i8 %ret 6886} 6887 6888define i8 @test404(i8* %ptr, i8 %val) { 6889; PPC64LE-LABEL: test404: 6890; PPC64LE: # %bb.0: 6891; PPC64LE-NEXT: sync 6892; PPC64LE-NEXT: .LBB404_1: 6893; PPC64LE-NEXT: lbarx 5, 0, 3 6894; PPC64LE-NEXT: and 6, 4, 5 6895; PPC64LE-NEXT: stbcx. 6, 0, 3 6896; PPC64LE-NEXT: bne 0, .LBB404_1 6897; PPC64LE-NEXT: # %bb.2: 6898; PPC64LE-NEXT: mr 3, 5 6899; PPC64LE-NEXT: lwsync 6900; PPC64LE-NEXT: blr 6901 %ret = atomicrmw and i8* %ptr, i8 %val syncscope("singlethread") seq_cst 6902 ret i8 %ret 6903} 6904 6905define i16 @test405(i16* %ptr, i16 %val) { 6906; PPC64LE-LABEL: test405: 6907; PPC64LE: # %bb.0: 6908; PPC64LE-NEXT: .LBB405_1: 6909; PPC64LE-NEXT: lharx 5, 0, 3 6910; PPC64LE-NEXT: and 6, 4, 5 6911; PPC64LE-NEXT: sthcx. 6, 0, 3 6912; PPC64LE-NEXT: bne 0, .LBB405_1 6913; PPC64LE-NEXT: # %bb.2: 6914; PPC64LE-NEXT: mr 3, 5 6915; PPC64LE-NEXT: blr 6916 %ret = atomicrmw and i16* %ptr, i16 %val syncscope("singlethread") monotonic 6917 ret i16 %ret 6918} 6919 6920define i16 @test406(i16* %ptr, i16 %val) { 6921; PPC64LE-LABEL: test406: 6922; PPC64LE: # %bb.0: 6923; PPC64LE-NEXT: mr 5, 3 6924; PPC64LE-NEXT: .LBB406_1: 6925; PPC64LE-NEXT: lharx 3, 0, 5 6926; PPC64LE-NEXT: and 6, 4, 3 6927; PPC64LE-NEXT: sthcx. 6, 0, 5 6928; PPC64LE-NEXT: bne 0, .LBB406_1 6929; PPC64LE-NEXT: # %bb.2: 6930; PPC64LE-NEXT: lwsync 6931; PPC64LE-NEXT: blr 6932 %ret = atomicrmw and i16* %ptr, i16 %val syncscope("singlethread") acquire 6933 ret i16 %ret 6934} 6935 6936define i16 @test407(i16* %ptr, i16 %val) { 6937; PPC64LE-LABEL: test407: 6938; PPC64LE: # %bb.0: 6939; PPC64LE-NEXT: lwsync 6940; PPC64LE-NEXT: .LBB407_1: 6941; PPC64LE-NEXT: lharx 5, 0, 3 6942; PPC64LE-NEXT: and 6, 4, 5 6943; PPC64LE-NEXT: sthcx. 6, 0, 3 6944; PPC64LE-NEXT: bne 0, .LBB407_1 6945; PPC64LE-NEXT: # %bb.2: 6946; PPC64LE-NEXT: mr 3, 5 6947; PPC64LE-NEXT: blr 6948 %ret = atomicrmw and i16* %ptr, i16 %val syncscope("singlethread") release 6949 ret i16 %ret 6950} 6951 6952define i16 @test408(i16* %ptr, i16 %val) { 6953; PPC64LE-LABEL: test408: 6954; PPC64LE: # %bb.0: 6955; PPC64LE-NEXT: lwsync 6956; PPC64LE-NEXT: .LBB408_1: 6957; PPC64LE-NEXT: lharx 5, 0, 3 6958; PPC64LE-NEXT: and 6, 4, 5 6959; PPC64LE-NEXT: sthcx. 6, 0, 3 6960; PPC64LE-NEXT: bne 0, .LBB408_1 6961; PPC64LE-NEXT: # %bb.2: 6962; PPC64LE-NEXT: mr 3, 5 6963; PPC64LE-NEXT: lwsync 6964; PPC64LE-NEXT: blr 6965 %ret = atomicrmw and i16* %ptr, i16 %val syncscope("singlethread") acq_rel 6966 ret i16 %ret 6967} 6968 6969define i16 @test409(i16* %ptr, i16 %val) { 6970; PPC64LE-LABEL: test409: 6971; PPC64LE: # %bb.0: 6972; PPC64LE-NEXT: sync 6973; PPC64LE-NEXT: .LBB409_1: 6974; PPC64LE-NEXT: lharx 5, 0, 3 6975; PPC64LE-NEXT: and 6, 4, 5 6976; PPC64LE-NEXT: sthcx. 6, 0, 3 6977; PPC64LE-NEXT: bne 0, .LBB409_1 6978; PPC64LE-NEXT: # %bb.2: 6979; PPC64LE-NEXT: mr 3, 5 6980; PPC64LE-NEXT: lwsync 6981; PPC64LE-NEXT: blr 6982 %ret = atomicrmw and i16* %ptr, i16 %val syncscope("singlethread") seq_cst 6983 ret i16 %ret 6984} 6985 6986define i32 @test410(i32* %ptr, i32 %val) { 6987; PPC64LE-LABEL: test410: 6988; PPC64LE: # %bb.0: 6989; PPC64LE-NEXT: .LBB410_1: 6990; PPC64LE-NEXT: lwarx 5, 0, 3 6991; PPC64LE-NEXT: and 6, 4, 5 6992; PPC64LE-NEXT: stwcx. 6, 0, 3 6993; PPC64LE-NEXT: bne 0, .LBB410_1 6994; PPC64LE-NEXT: # %bb.2: 6995; PPC64LE-NEXT: mr 3, 5 6996; PPC64LE-NEXT: blr 6997 %ret = atomicrmw and i32* %ptr, i32 %val syncscope("singlethread") monotonic 6998 ret i32 %ret 6999} 7000 7001define i32 @test411(i32* %ptr, i32 %val) { 7002; PPC64LE-LABEL: test411: 7003; PPC64LE: # %bb.0: 7004; PPC64LE-NEXT: mr 5, 3 7005; PPC64LE-NEXT: .LBB411_1: 7006; PPC64LE-NEXT: lwarx 3, 0, 5 7007; PPC64LE-NEXT: and 6, 4, 3 7008; PPC64LE-NEXT: stwcx. 6, 0, 5 7009; PPC64LE-NEXT: bne 0, .LBB411_1 7010; PPC64LE-NEXT: # %bb.2: 7011; PPC64LE-NEXT: lwsync 7012; PPC64LE-NEXT: blr 7013 %ret = atomicrmw and i32* %ptr, i32 %val syncscope("singlethread") acquire 7014 ret i32 %ret 7015} 7016 7017define i32 @test412(i32* %ptr, i32 %val) { 7018; PPC64LE-LABEL: test412: 7019; PPC64LE: # %bb.0: 7020; PPC64LE-NEXT: lwsync 7021; PPC64LE-NEXT: .LBB412_1: 7022; PPC64LE-NEXT: lwarx 5, 0, 3 7023; PPC64LE-NEXT: and 6, 4, 5 7024; PPC64LE-NEXT: stwcx. 6, 0, 3 7025; PPC64LE-NEXT: bne 0, .LBB412_1 7026; PPC64LE-NEXT: # %bb.2: 7027; PPC64LE-NEXT: mr 3, 5 7028; PPC64LE-NEXT: blr 7029 %ret = atomicrmw and i32* %ptr, i32 %val syncscope("singlethread") release 7030 ret i32 %ret 7031} 7032 7033define i32 @test413(i32* %ptr, i32 %val) { 7034; PPC64LE-LABEL: test413: 7035; PPC64LE: # %bb.0: 7036; PPC64LE-NEXT: lwsync 7037; PPC64LE-NEXT: .LBB413_1: 7038; PPC64LE-NEXT: lwarx 5, 0, 3 7039; PPC64LE-NEXT: and 6, 4, 5 7040; PPC64LE-NEXT: stwcx. 6, 0, 3 7041; PPC64LE-NEXT: bne 0, .LBB413_1 7042; PPC64LE-NEXT: # %bb.2: 7043; PPC64LE-NEXT: mr 3, 5 7044; PPC64LE-NEXT: lwsync 7045; PPC64LE-NEXT: blr 7046 %ret = atomicrmw and i32* %ptr, i32 %val syncscope("singlethread") acq_rel 7047 ret i32 %ret 7048} 7049 7050define i32 @test414(i32* %ptr, i32 %val) { 7051; PPC64LE-LABEL: test414: 7052; PPC64LE: # %bb.0: 7053; PPC64LE-NEXT: sync 7054; PPC64LE-NEXT: .LBB414_1: 7055; PPC64LE-NEXT: lwarx 5, 0, 3 7056; PPC64LE-NEXT: and 6, 4, 5 7057; PPC64LE-NEXT: stwcx. 6, 0, 3 7058; PPC64LE-NEXT: bne 0, .LBB414_1 7059; PPC64LE-NEXT: # %bb.2: 7060; PPC64LE-NEXT: mr 3, 5 7061; PPC64LE-NEXT: lwsync 7062; PPC64LE-NEXT: blr 7063 %ret = atomicrmw and i32* %ptr, i32 %val syncscope("singlethread") seq_cst 7064 ret i32 %ret 7065} 7066 7067define i64 @test415(i64* %ptr, i64 %val) { 7068; PPC64LE-LABEL: test415: 7069; PPC64LE: # %bb.0: 7070; PPC64LE-NEXT: .LBB415_1: 7071; PPC64LE-NEXT: ldarx 5, 0, 3 7072; PPC64LE-NEXT: and 6, 4, 5 7073; PPC64LE-NEXT: stdcx. 6, 0, 3 7074; PPC64LE-NEXT: bne 0, .LBB415_1 7075; PPC64LE-NEXT: # %bb.2: 7076; PPC64LE-NEXT: mr 3, 5 7077; PPC64LE-NEXT: blr 7078 %ret = atomicrmw and i64* %ptr, i64 %val syncscope("singlethread") monotonic 7079 ret i64 %ret 7080} 7081 7082define i64 @test416(i64* %ptr, i64 %val) { 7083; PPC64LE-LABEL: test416: 7084; PPC64LE: # %bb.0: 7085; PPC64LE-NEXT: mr 5, 3 7086; PPC64LE-NEXT: .LBB416_1: 7087; PPC64LE-NEXT: ldarx 3, 0, 5 7088; PPC64LE-NEXT: and 6, 4, 3 7089; PPC64LE-NEXT: stdcx. 6, 0, 5 7090; PPC64LE-NEXT: bne 0, .LBB416_1 7091; PPC64LE-NEXT: # %bb.2: 7092; PPC64LE-NEXT: lwsync 7093; PPC64LE-NEXT: blr 7094 %ret = atomicrmw and i64* %ptr, i64 %val syncscope("singlethread") acquire 7095 ret i64 %ret 7096} 7097 7098define i64 @test417(i64* %ptr, i64 %val) { 7099; PPC64LE-LABEL: test417: 7100; PPC64LE: # %bb.0: 7101; PPC64LE-NEXT: lwsync 7102; PPC64LE-NEXT: .LBB417_1: 7103; PPC64LE-NEXT: ldarx 5, 0, 3 7104; PPC64LE-NEXT: and 6, 4, 5 7105; PPC64LE-NEXT: stdcx. 6, 0, 3 7106; PPC64LE-NEXT: bne 0, .LBB417_1 7107; PPC64LE-NEXT: # %bb.2: 7108; PPC64LE-NEXT: mr 3, 5 7109; PPC64LE-NEXT: blr 7110 %ret = atomicrmw and i64* %ptr, i64 %val syncscope("singlethread") release 7111 ret i64 %ret 7112} 7113 7114define i64 @test418(i64* %ptr, i64 %val) { 7115; PPC64LE-LABEL: test418: 7116; PPC64LE: # %bb.0: 7117; PPC64LE-NEXT: lwsync 7118; PPC64LE-NEXT: .LBB418_1: 7119; PPC64LE-NEXT: ldarx 5, 0, 3 7120; PPC64LE-NEXT: and 6, 4, 5 7121; PPC64LE-NEXT: stdcx. 6, 0, 3 7122; PPC64LE-NEXT: bne 0, .LBB418_1 7123; PPC64LE-NEXT: # %bb.2: 7124; PPC64LE-NEXT: mr 3, 5 7125; PPC64LE-NEXT: lwsync 7126; PPC64LE-NEXT: blr 7127 %ret = atomicrmw and i64* %ptr, i64 %val syncscope("singlethread") acq_rel 7128 ret i64 %ret 7129} 7130 7131define i64 @test419(i64* %ptr, i64 %val) { 7132; PPC64LE-LABEL: test419: 7133; PPC64LE: # %bb.0: 7134; PPC64LE-NEXT: sync 7135; PPC64LE-NEXT: .LBB419_1: 7136; PPC64LE-NEXT: ldarx 5, 0, 3 7137; PPC64LE-NEXT: and 6, 4, 5 7138; PPC64LE-NEXT: stdcx. 6, 0, 3 7139; PPC64LE-NEXT: bne 0, .LBB419_1 7140; PPC64LE-NEXT: # %bb.2: 7141; PPC64LE-NEXT: mr 3, 5 7142; PPC64LE-NEXT: lwsync 7143; PPC64LE-NEXT: blr 7144 %ret = atomicrmw and i64* %ptr, i64 %val syncscope("singlethread") seq_cst 7145 ret i64 %ret 7146} 7147 7148define i8 @test420(i8* %ptr, i8 %val) { 7149; PPC64LE-LABEL: test420: 7150; PPC64LE: # %bb.0: 7151; PPC64LE-NEXT: .LBB420_1: 7152; PPC64LE-NEXT: lbarx 5, 0, 3 7153; PPC64LE-NEXT: nand 6, 4, 5 7154; PPC64LE-NEXT: stbcx. 6, 0, 3 7155; PPC64LE-NEXT: bne 0, .LBB420_1 7156; PPC64LE-NEXT: # %bb.2: 7157; PPC64LE-NEXT: mr 3, 5 7158; PPC64LE-NEXT: blr 7159 %ret = atomicrmw nand i8* %ptr, i8 %val syncscope("singlethread") monotonic 7160 ret i8 %ret 7161} 7162 7163define i8 @test421(i8* %ptr, i8 %val) { 7164; PPC64LE-LABEL: test421: 7165; PPC64LE: # %bb.0: 7166; PPC64LE-NEXT: mr 5, 3 7167; PPC64LE-NEXT: .LBB421_1: 7168; PPC64LE-NEXT: lbarx 3, 0, 5 7169; PPC64LE-NEXT: nand 6, 4, 3 7170; PPC64LE-NEXT: stbcx. 6, 0, 5 7171; PPC64LE-NEXT: bne 0, .LBB421_1 7172; PPC64LE-NEXT: # %bb.2: 7173; PPC64LE-NEXT: lwsync 7174; PPC64LE-NEXT: blr 7175 %ret = atomicrmw nand i8* %ptr, i8 %val syncscope("singlethread") acquire 7176 ret i8 %ret 7177} 7178 7179define i8 @test422(i8* %ptr, i8 %val) { 7180; PPC64LE-LABEL: test422: 7181; PPC64LE: # %bb.0: 7182; PPC64LE-NEXT: lwsync 7183; PPC64LE-NEXT: .LBB422_1: 7184; PPC64LE-NEXT: lbarx 5, 0, 3 7185; PPC64LE-NEXT: nand 6, 4, 5 7186; PPC64LE-NEXT: stbcx. 6, 0, 3 7187; PPC64LE-NEXT: bne 0, .LBB422_1 7188; PPC64LE-NEXT: # %bb.2: 7189; PPC64LE-NEXT: mr 3, 5 7190; PPC64LE-NEXT: blr 7191 %ret = atomicrmw nand i8* %ptr, i8 %val syncscope("singlethread") release 7192 ret i8 %ret 7193} 7194 7195define i8 @test423(i8* %ptr, i8 %val) { 7196; PPC64LE-LABEL: test423: 7197; PPC64LE: # %bb.0: 7198; PPC64LE-NEXT: lwsync 7199; PPC64LE-NEXT: .LBB423_1: 7200; PPC64LE-NEXT: lbarx 5, 0, 3 7201; PPC64LE-NEXT: nand 6, 4, 5 7202; PPC64LE-NEXT: stbcx. 6, 0, 3 7203; PPC64LE-NEXT: bne 0, .LBB423_1 7204; PPC64LE-NEXT: # %bb.2: 7205; PPC64LE-NEXT: mr 3, 5 7206; PPC64LE-NEXT: lwsync 7207; PPC64LE-NEXT: blr 7208 %ret = atomicrmw nand i8* %ptr, i8 %val syncscope("singlethread") acq_rel 7209 ret i8 %ret 7210} 7211 7212define i8 @test424(i8* %ptr, i8 %val) { 7213; PPC64LE-LABEL: test424: 7214; PPC64LE: # %bb.0: 7215; PPC64LE-NEXT: sync 7216; PPC64LE-NEXT: .LBB424_1: 7217; PPC64LE-NEXT: lbarx 5, 0, 3 7218; PPC64LE-NEXT: nand 6, 4, 5 7219; PPC64LE-NEXT: stbcx. 6, 0, 3 7220; PPC64LE-NEXT: bne 0, .LBB424_1 7221; PPC64LE-NEXT: # %bb.2: 7222; PPC64LE-NEXT: mr 3, 5 7223; PPC64LE-NEXT: lwsync 7224; PPC64LE-NEXT: blr 7225 %ret = atomicrmw nand i8* %ptr, i8 %val syncscope("singlethread") seq_cst 7226 ret i8 %ret 7227} 7228 7229define i16 @test425(i16* %ptr, i16 %val) { 7230; PPC64LE-LABEL: test425: 7231; PPC64LE: # %bb.0: 7232; PPC64LE-NEXT: .LBB425_1: 7233; PPC64LE-NEXT: lharx 5, 0, 3 7234; PPC64LE-NEXT: nand 6, 4, 5 7235; PPC64LE-NEXT: sthcx. 6, 0, 3 7236; PPC64LE-NEXT: bne 0, .LBB425_1 7237; PPC64LE-NEXT: # %bb.2: 7238; PPC64LE-NEXT: mr 3, 5 7239; PPC64LE-NEXT: blr 7240 %ret = atomicrmw nand i16* %ptr, i16 %val syncscope("singlethread") monotonic 7241 ret i16 %ret 7242} 7243 7244define i16 @test426(i16* %ptr, i16 %val) { 7245; PPC64LE-LABEL: test426: 7246; PPC64LE: # %bb.0: 7247; PPC64LE-NEXT: mr 5, 3 7248; PPC64LE-NEXT: .LBB426_1: 7249; PPC64LE-NEXT: lharx 3, 0, 5 7250; PPC64LE-NEXT: nand 6, 4, 3 7251; PPC64LE-NEXT: sthcx. 6, 0, 5 7252; PPC64LE-NEXT: bne 0, .LBB426_1 7253; PPC64LE-NEXT: # %bb.2: 7254; PPC64LE-NEXT: lwsync 7255; PPC64LE-NEXT: blr 7256 %ret = atomicrmw nand i16* %ptr, i16 %val syncscope("singlethread") acquire 7257 ret i16 %ret 7258} 7259 7260define i16 @test427(i16* %ptr, i16 %val) { 7261; PPC64LE-LABEL: test427: 7262; PPC64LE: # %bb.0: 7263; PPC64LE-NEXT: lwsync 7264; PPC64LE-NEXT: .LBB427_1: 7265; PPC64LE-NEXT: lharx 5, 0, 3 7266; PPC64LE-NEXT: nand 6, 4, 5 7267; PPC64LE-NEXT: sthcx. 6, 0, 3 7268; PPC64LE-NEXT: bne 0, .LBB427_1 7269; PPC64LE-NEXT: # %bb.2: 7270; PPC64LE-NEXT: mr 3, 5 7271; PPC64LE-NEXT: blr 7272 %ret = atomicrmw nand i16* %ptr, i16 %val syncscope("singlethread") release 7273 ret i16 %ret 7274} 7275 7276define i16 @test428(i16* %ptr, i16 %val) { 7277; PPC64LE-LABEL: test428: 7278; PPC64LE: # %bb.0: 7279; PPC64LE-NEXT: lwsync 7280; PPC64LE-NEXT: .LBB428_1: 7281; PPC64LE-NEXT: lharx 5, 0, 3 7282; PPC64LE-NEXT: nand 6, 4, 5 7283; PPC64LE-NEXT: sthcx. 6, 0, 3 7284; PPC64LE-NEXT: bne 0, .LBB428_1 7285; PPC64LE-NEXT: # %bb.2: 7286; PPC64LE-NEXT: mr 3, 5 7287; PPC64LE-NEXT: lwsync 7288; PPC64LE-NEXT: blr 7289 %ret = atomicrmw nand i16* %ptr, i16 %val syncscope("singlethread") acq_rel 7290 ret i16 %ret 7291} 7292 7293define i16 @test429(i16* %ptr, i16 %val) { 7294; PPC64LE-LABEL: test429: 7295; PPC64LE: # %bb.0: 7296; PPC64LE-NEXT: sync 7297; PPC64LE-NEXT: .LBB429_1: 7298; PPC64LE-NEXT: lharx 5, 0, 3 7299; PPC64LE-NEXT: nand 6, 4, 5 7300; PPC64LE-NEXT: sthcx. 6, 0, 3 7301; PPC64LE-NEXT: bne 0, .LBB429_1 7302; PPC64LE-NEXT: # %bb.2: 7303; PPC64LE-NEXT: mr 3, 5 7304; PPC64LE-NEXT: lwsync 7305; PPC64LE-NEXT: blr 7306 %ret = atomicrmw nand i16* %ptr, i16 %val syncscope("singlethread") seq_cst 7307 ret i16 %ret 7308} 7309 7310define i32 @test430(i32* %ptr, i32 %val) { 7311; PPC64LE-LABEL: test430: 7312; PPC64LE: # %bb.0: 7313; PPC64LE-NEXT: .LBB430_1: 7314; PPC64LE-NEXT: lwarx 5, 0, 3 7315; PPC64LE-NEXT: nand 6, 4, 5 7316; PPC64LE-NEXT: stwcx. 6, 0, 3 7317; PPC64LE-NEXT: bne 0, .LBB430_1 7318; PPC64LE-NEXT: # %bb.2: 7319; PPC64LE-NEXT: mr 3, 5 7320; PPC64LE-NEXT: blr 7321 %ret = atomicrmw nand i32* %ptr, i32 %val syncscope("singlethread") monotonic 7322 ret i32 %ret 7323} 7324 7325define i32 @test431(i32* %ptr, i32 %val) { 7326; PPC64LE-LABEL: test431: 7327; PPC64LE: # %bb.0: 7328; PPC64LE-NEXT: mr 5, 3 7329; PPC64LE-NEXT: .LBB431_1: 7330; PPC64LE-NEXT: lwarx 3, 0, 5 7331; PPC64LE-NEXT: nand 6, 4, 3 7332; PPC64LE-NEXT: stwcx. 6, 0, 5 7333; PPC64LE-NEXT: bne 0, .LBB431_1 7334; PPC64LE-NEXT: # %bb.2: 7335; PPC64LE-NEXT: lwsync 7336; PPC64LE-NEXT: blr 7337 %ret = atomicrmw nand i32* %ptr, i32 %val syncscope("singlethread") acquire 7338 ret i32 %ret 7339} 7340 7341define i32 @test432(i32* %ptr, i32 %val) { 7342; PPC64LE-LABEL: test432: 7343; PPC64LE: # %bb.0: 7344; PPC64LE-NEXT: lwsync 7345; PPC64LE-NEXT: .LBB432_1: 7346; PPC64LE-NEXT: lwarx 5, 0, 3 7347; PPC64LE-NEXT: nand 6, 4, 5 7348; PPC64LE-NEXT: stwcx. 6, 0, 3 7349; PPC64LE-NEXT: bne 0, .LBB432_1 7350; PPC64LE-NEXT: # %bb.2: 7351; PPC64LE-NEXT: mr 3, 5 7352; PPC64LE-NEXT: blr 7353 %ret = atomicrmw nand i32* %ptr, i32 %val syncscope("singlethread") release 7354 ret i32 %ret 7355} 7356 7357define i32 @test433(i32* %ptr, i32 %val) { 7358; PPC64LE-LABEL: test433: 7359; PPC64LE: # %bb.0: 7360; PPC64LE-NEXT: lwsync 7361; PPC64LE-NEXT: .LBB433_1: 7362; PPC64LE-NEXT: lwarx 5, 0, 3 7363; PPC64LE-NEXT: nand 6, 4, 5 7364; PPC64LE-NEXT: stwcx. 6, 0, 3 7365; PPC64LE-NEXT: bne 0, .LBB433_1 7366; PPC64LE-NEXT: # %bb.2: 7367; PPC64LE-NEXT: mr 3, 5 7368; PPC64LE-NEXT: lwsync 7369; PPC64LE-NEXT: blr 7370 %ret = atomicrmw nand i32* %ptr, i32 %val syncscope("singlethread") acq_rel 7371 ret i32 %ret 7372} 7373 7374define i32 @test434(i32* %ptr, i32 %val) { 7375; PPC64LE-LABEL: test434: 7376; PPC64LE: # %bb.0: 7377; PPC64LE-NEXT: sync 7378; PPC64LE-NEXT: .LBB434_1: 7379; PPC64LE-NEXT: lwarx 5, 0, 3 7380; PPC64LE-NEXT: nand 6, 4, 5 7381; PPC64LE-NEXT: stwcx. 6, 0, 3 7382; PPC64LE-NEXT: bne 0, .LBB434_1 7383; PPC64LE-NEXT: # %bb.2: 7384; PPC64LE-NEXT: mr 3, 5 7385; PPC64LE-NEXT: lwsync 7386; PPC64LE-NEXT: blr 7387 %ret = atomicrmw nand i32* %ptr, i32 %val syncscope("singlethread") seq_cst 7388 ret i32 %ret 7389} 7390 7391define i64 @test435(i64* %ptr, i64 %val) { 7392; PPC64LE-LABEL: test435: 7393; PPC64LE: # %bb.0: 7394; PPC64LE-NEXT: .LBB435_1: 7395; PPC64LE-NEXT: ldarx 5, 0, 3 7396; PPC64LE-NEXT: nand 6, 4, 5 7397; PPC64LE-NEXT: stdcx. 6, 0, 3 7398; PPC64LE-NEXT: bne 0, .LBB435_1 7399; PPC64LE-NEXT: # %bb.2: 7400; PPC64LE-NEXT: mr 3, 5 7401; PPC64LE-NEXT: blr 7402 %ret = atomicrmw nand i64* %ptr, i64 %val syncscope("singlethread") monotonic 7403 ret i64 %ret 7404} 7405 7406define i64 @test436(i64* %ptr, i64 %val) { 7407; PPC64LE-LABEL: test436: 7408; PPC64LE: # %bb.0: 7409; PPC64LE-NEXT: mr 5, 3 7410; PPC64LE-NEXT: .LBB436_1: 7411; PPC64LE-NEXT: ldarx 3, 0, 5 7412; PPC64LE-NEXT: nand 6, 4, 3 7413; PPC64LE-NEXT: stdcx. 6, 0, 5 7414; PPC64LE-NEXT: bne 0, .LBB436_1 7415; PPC64LE-NEXT: # %bb.2: 7416; PPC64LE-NEXT: lwsync 7417; PPC64LE-NEXT: blr 7418 %ret = atomicrmw nand i64* %ptr, i64 %val syncscope("singlethread") acquire 7419 ret i64 %ret 7420} 7421 7422define i64 @test437(i64* %ptr, i64 %val) { 7423; PPC64LE-LABEL: test437: 7424; PPC64LE: # %bb.0: 7425; PPC64LE-NEXT: lwsync 7426; PPC64LE-NEXT: .LBB437_1: 7427; PPC64LE-NEXT: ldarx 5, 0, 3 7428; PPC64LE-NEXT: nand 6, 4, 5 7429; PPC64LE-NEXT: stdcx. 6, 0, 3 7430; PPC64LE-NEXT: bne 0, .LBB437_1 7431; PPC64LE-NEXT: # %bb.2: 7432; PPC64LE-NEXT: mr 3, 5 7433; PPC64LE-NEXT: blr 7434 %ret = atomicrmw nand i64* %ptr, i64 %val syncscope("singlethread") release 7435 ret i64 %ret 7436} 7437 7438define i64 @test438(i64* %ptr, i64 %val) { 7439; PPC64LE-LABEL: test438: 7440; PPC64LE: # %bb.0: 7441; PPC64LE-NEXT: lwsync 7442; PPC64LE-NEXT: .LBB438_1: 7443; PPC64LE-NEXT: ldarx 5, 0, 3 7444; PPC64LE-NEXT: nand 6, 4, 5 7445; PPC64LE-NEXT: stdcx. 6, 0, 3 7446; PPC64LE-NEXT: bne 0, .LBB438_1 7447; PPC64LE-NEXT: # %bb.2: 7448; PPC64LE-NEXT: mr 3, 5 7449; PPC64LE-NEXT: lwsync 7450; PPC64LE-NEXT: blr 7451 %ret = atomicrmw nand i64* %ptr, i64 %val syncscope("singlethread") acq_rel 7452 ret i64 %ret 7453} 7454 7455define i64 @test439(i64* %ptr, i64 %val) { 7456; PPC64LE-LABEL: test439: 7457; PPC64LE: # %bb.0: 7458; PPC64LE-NEXT: sync 7459; PPC64LE-NEXT: .LBB439_1: 7460; PPC64LE-NEXT: ldarx 5, 0, 3 7461; PPC64LE-NEXT: nand 6, 4, 5 7462; PPC64LE-NEXT: stdcx. 6, 0, 3 7463; PPC64LE-NEXT: bne 0, .LBB439_1 7464; PPC64LE-NEXT: # %bb.2: 7465; PPC64LE-NEXT: mr 3, 5 7466; PPC64LE-NEXT: lwsync 7467; PPC64LE-NEXT: blr 7468 %ret = atomicrmw nand i64* %ptr, i64 %val syncscope("singlethread") seq_cst 7469 ret i64 %ret 7470} 7471 7472define i8 @test440(i8* %ptr, i8 %val) { 7473; PPC64LE-LABEL: test440: 7474; PPC64LE: # %bb.0: 7475; PPC64LE-NEXT: .LBB440_1: 7476; PPC64LE-NEXT: lbarx 5, 0, 3 7477; PPC64LE-NEXT: or 6, 4, 5 7478; PPC64LE-NEXT: stbcx. 6, 0, 3 7479; PPC64LE-NEXT: bne 0, .LBB440_1 7480; PPC64LE-NEXT: # %bb.2: 7481; PPC64LE-NEXT: mr 3, 5 7482; PPC64LE-NEXT: blr 7483 %ret = atomicrmw or i8* %ptr, i8 %val syncscope("singlethread") monotonic 7484 ret i8 %ret 7485} 7486 7487define i8 @test441(i8* %ptr, i8 %val) { 7488; PPC64LE-LABEL: test441: 7489; PPC64LE: # %bb.0: 7490; PPC64LE-NEXT: mr 5, 3 7491; PPC64LE-NEXT: .LBB441_1: 7492; PPC64LE-NEXT: lbarx 3, 0, 5 7493; PPC64LE-NEXT: or 6, 4, 3 7494; PPC64LE-NEXT: stbcx. 6, 0, 5 7495; PPC64LE-NEXT: bne 0, .LBB441_1 7496; PPC64LE-NEXT: # %bb.2: 7497; PPC64LE-NEXT: lwsync 7498; PPC64LE-NEXT: blr 7499 %ret = atomicrmw or i8* %ptr, i8 %val syncscope("singlethread") acquire 7500 ret i8 %ret 7501} 7502 7503define i8 @test442(i8* %ptr, i8 %val) { 7504; PPC64LE-LABEL: test442: 7505; PPC64LE: # %bb.0: 7506; PPC64LE-NEXT: lwsync 7507; PPC64LE-NEXT: .LBB442_1: 7508; PPC64LE-NEXT: lbarx 5, 0, 3 7509; PPC64LE-NEXT: or 6, 4, 5 7510; PPC64LE-NEXT: stbcx. 6, 0, 3 7511; PPC64LE-NEXT: bne 0, .LBB442_1 7512; PPC64LE-NEXT: # %bb.2: 7513; PPC64LE-NEXT: mr 3, 5 7514; PPC64LE-NEXT: blr 7515 %ret = atomicrmw or i8* %ptr, i8 %val syncscope("singlethread") release 7516 ret i8 %ret 7517} 7518 7519define i8 @test443(i8* %ptr, i8 %val) { 7520; PPC64LE-LABEL: test443: 7521; PPC64LE: # %bb.0: 7522; PPC64LE-NEXT: lwsync 7523; PPC64LE-NEXT: .LBB443_1: 7524; PPC64LE-NEXT: lbarx 5, 0, 3 7525; PPC64LE-NEXT: or 6, 4, 5 7526; PPC64LE-NEXT: stbcx. 6, 0, 3 7527; PPC64LE-NEXT: bne 0, .LBB443_1 7528; PPC64LE-NEXT: # %bb.2: 7529; PPC64LE-NEXT: mr 3, 5 7530; PPC64LE-NEXT: lwsync 7531; PPC64LE-NEXT: blr 7532 %ret = atomicrmw or i8* %ptr, i8 %val syncscope("singlethread") acq_rel 7533 ret i8 %ret 7534} 7535 7536define i8 @test444(i8* %ptr, i8 %val) { 7537; PPC64LE-LABEL: test444: 7538; PPC64LE: # %bb.0: 7539; PPC64LE-NEXT: sync 7540; PPC64LE-NEXT: .LBB444_1: 7541; PPC64LE-NEXT: lbarx 5, 0, 3 7542; PPC64LE-NEXT: or 6, 4, 5 7543; PPC64LE-NEXT: stbcx. 6, 0, 3 7544; PPC64LE-NEXT: bne 0, .LBB444_1 7545; PPC64LE-NEXT: # %bb.2: 7546; PPC64LE-NEXT: mr 3, 5 7547; PPC64LE-NEXT: lwsync 7548; PPC64LE-NEXT: blr 7549 %ret = atomicrmw or i8* %ptr, i8 %val syncscope("singlethread") seq_cst 7550 ret i8 %ret 7551} 7552 7553define i16 @test445(i16* %ptr, i16 %val) { 7554; PPC64LE-LABEL: test445: 7555; PPC64LE: # %bb.0: 7556; PPC64LE-NEXT: .LBB445_1: 7557; PPC64LE-NEXT: lharx 5, 0, 3 7558; PPC64LE-NEXT: or 6, 4, 5 7559; PPC64LE-NEXT: sthcx. 6, 0, 3 7560; PPC64LE-NEXT: bne 0, .LBB445_1 7561; PPC64LE-NEXT: # %bb.2: 7562; PPC64LE-NEXT: mr 3, 5 7563; PPC64LE-NEXT: blr 7564 %ret = atomicrmw or i16* %ptr, i16 %val syncscope("singlethread") monotonic 7565 ret i16 %ret 7566} 7567 7568define i16 @test446(i16* %ptr, i16 %val) { 7569; PPC64LE-LABEL: test446: 7570; PPC64LE: # %bb.0: 7571; PPC64LE-NEXT: mr 5, 3 7572; PPC64LE-NEXT: .LBB446_1: 7573; PPC64LE-NEXT: lharx 3, 0, 5 7574; PPC64LE-NEXT: or 6, 4, 3 7575; PPC64LE-NEXT: sthcx. 6, 0, 5 7576; PPC64LE-NEXT: bne 0, .LBB446_1 7577; PPC64LE-NEXT: # %bb.2: 7578; PPC64LE-NEXT: lwsync 7579; PPC64LE-NEXT: blr 7580 %ret = atomicrmw or i16* %ptr, i16 %val syncscope("singlethread") acquire 7581 ret i16 %ret 7582} 7583 7584define i16 @test447(i16* %ptr, i16 %val) { 7585; PPC64LE-LABEL: test447: 7586; PPC64LE: # %bb.0: 7587; PPC64LE-NEXT: lwsync 7588; PPC64LE-NEXT: .LBB447_1: 7589; PPC64LE-NEXT: lharx 5, 0, 3 7590; PPC64LE-NEXT: or 6, 4, 5 7591; PPC64LE-NEXT: sthcx. 6, 0, 3 7592; PPC64LE-NEXT: bne 0, .LBB447_1 7593; PPC64LE-NEXT: # %bb.2: 7594; PPC64LE-NEXT: mr 3, 5 7595; PPC64LE-NEXT: blr 7596 %ret = atomicrmw or i16* %ptr, i16 %val syncscope("singlethread") release 7597 ret i16 %ret 7598} 7599 7600define i16 @test448(i16* %ptr, i16 %val) { 7601; PPC64LE-LABEL: test448: 7602; PPC64LE: # %bb.0: 7603; PPC64LE-NEXT: lwsync 7604; PPC64LE-NEXT: .LBB448_1: 7605; PPC64LE-NEXT: lharx 5, 0, 3 7606; PPC64LE-NEXT: or 6, 4, 5 7607; PPC64LE-NEXT: sthcx. 6, 0, 3 7608; PPC64LE-NEXT: bne 0, .LBB448_1 7609; PPC64LE-NEXT: # %bb.2: 7610; PPC64LE-NEXT: mr 3, 5 7611; PPC64LE-NEXT: lwsync 7612; PPC64LE-NEXT: blr 7613 %ret = atomicrmw or i16* %ptr, i16 %val syncscope("singlethread") acq_rel 7614 ret i16 %ret 7615} 7616 7617define i16 @test449(i16* %ptr, i16 %val) { 7618; PPC64LE-LABEL: test449: 7619; PPC64LE: # %bb.0: 7620; PPC64LE-NEXT: sync 7621; PPC64LE-NEXT: .LBB449_1: 7622; PPC64LE-NEXT: lharx 5, 0, 3 7623; PPC64LE-NEXT: or 6, 4, 5 7624; PPC64LE-NEXT: sthcx. 6, 0, 3 7625; PPC64LE-NEXT: bne 0, .LBB449_1 7626; PPC64LE-NEXT: # %bb.2: 7627; PPC64LE-NEXT: mr 3, 5 7628; PPC64LE-NEXT: lwsync 7629; PPC64LE-NEXT: blr 7630 %ret = atomicrmw or i16* %ptr, i16 %val syncscope("singlethread") seq_cst 7631 ret i16 %ret 7632} 7633 7634define i32 @test450(i32* %ptr, i32 %val) { 7635; PPC64LE-LABEL: test450: 7636; PPC64LE: # %bb.0: 7637; PPC64LE-NEXT: .LBB450_1: 7638; PPC64LE-NEXT: lwarx 5, 0, 3 7639; PPC64LE-NEXT: or 6, 4, 5 7640; PPC64LE-NEXT: stwcx. 6, 0, 3 7641; PPC64LE-NEXT: bne 0, .LBB450_1 7642; PPC64LE-NEXT: # %bb.2: 7643; PPC64LE-NEXT: mr 3, 5 7644; PPC64LE-NEXT: blr 7645 %ret = atomicrmw or i32* %ptr, i32 %val syncscope("singlethread") monotonic 7646 ret i32 %ret 7647} 7648 7649define i32 @test451(i32* %ptr, i32 %val) { 7650; PPC64LE-LABEL: test451: 7651; PPC64LE: # %bb.0: 7652; PPC64LE-NEXT: mr 5, 3 7653; PPC64LE-NEXT: .LBB451_1: 7654; PPC64LE-NEXT: lwarx 3, 0, 5 7655; PPC64LE-NEXT: or 6, 4, 3 7656; PPC64LE-NEXT: stwcx. 6, 0, 5 7657; PPC64LE-NEXT: bne 0, .LBB451_1 7658; PPC64LE-NEXT: # %bb.2: 7659; PPC64LE-NEXT: lwsync 7660; PPC64LE-NEXT: blr 7661 %ret = atomicrmw or i32* %ptr, i32 %val syncscope("singlethread") acquire 7662 ret i32 %ret 7663} 7664 7665define i32 @test452(i32* %ptr, i32 %val) { 7666; PPC64LE-LABEL: test452: 7667; PPC64LE: # %bb.0: 7668; PPC64LE-NEXT: lwsync 7669; PPC64LE-NEXT: .LBB452_1: 7670; PPC64LE-NEXT: lwarx 5, 0, 3 7671; PPC64LE-NEXT: or 6, 4, 5 7672; PPC64LE-NEXT: stwcx. 6, 0, 3 7673; PPC64LE-NEXT: bne 0, .LBB452_1 7674; PPC64LE-NEXT: # %bb.2: 7675; PPC64LE-NEXT: mr 3, 5 7676; PPC64LE-NEXT: blr 7677 %ret = atomicrmw or i32* %ptr, i32 %val syncscope("singlethread") release 7678 ret i32 %ret 7679} 7680 7681define i32 @test453(i32* %ptr, i32 %val) { 7682; PPC64LE-LABEL: test453: 7683; PPC64LE: # %bb.0: 7684; PPC64LE-NEXT: lwsync 7685; PPC64LE-NEXT: .LBB453_1: 7686; PPC64LE-NEXT: lwarx 5, 0, 3 7687; PPC64LE-NEXT: or 6, 4, 5 7688; PPC64LE-NEXT: stwcx. 6, 0, 3 7689; PPC64LE-NEXT: bne 0, .LBB453_1 7690; PPC64LE-NEXT: # %bb.2: 7691; PPC64LE-NEXT: mr 3, 5 7692; PPC64LE-NEXT: lwsync 7693; PPC64LE-NEXT: blr 7694 %ret = atomicrmw or i32* %ptr, i32 %val syncscope("singlethread") acq_rel 7695 ret i32 %ret 7696} 7697 7698define i32 @test454(i32* %ptr, i32 %val) { 7699; PPC64LE-LABEL: test454: 7700; PPC64LE: # %bb.0: 7701; PPC64LE-NEXT: sync 7702; PPC64LE-NEXT: .LBB454_1: 7703; PPC64LE-NEXT: lwarx 5, 0, 3 7704; PPC64LE-NEXT: or 6, 4, 5 7705; PPC64LE-NEXT: stwcx. 6, 0, 3 7706; PPC64LE-NEXT: bne 0, .LBB454_1 7707; PPC64LE-NEXT: # %bb.2: 7708; PPC64LE-NEXT: mr 3, 5 7709; PPC64LE-NEXT: lwsync 7710; PPC64LE-NEXT: blr 7711 %ret = atomicrmw or i32* %ptr, i32 %val syncscope("singlethread") seq_cst 7712 ret i32 %ret 7713} 7714 7715define i64 @test455(i64* %ptr, i64 %val) { 7716; PPC64LE-LABEL: test455: 7717; PPC64LE: # %bb.0: 7718; PPC64LE-NEXT: .LBB455_1: 7719; PPC64LE-NEXT: ldarx 5, 0, 3 7720; PPC64LE-NEXT: or 6, 4, 5 7721; PPC64LE-NEXT: stdcx. 6, 0, 3 7722; PPC64LE-NEXT: bne 0, .LBB455_1 7723; PPC64LE-NEXT: # %bb.2: 7724; PPC64LE-NEXT: mr 3, 5 7725; PPC64LE-NEXT: blr 7726 %ret = atomicrmw or i64* %ptr, i64 %val syncscope("singlethread") monotonic 7727 ret i64 %ret 7728} 7729 7730define i64 @test456(i64* %ptr, i64 %val) { 7731; PPC64LE-LABEL: test456: 7732; PPC64LE: # %bb.0: 7733; PPC64LE-NEXT: mr 5, 3 7734; PPC64LE-NEXT: .LBB456_1: 7735; PPC64LE-NEXT: ldarx 3, 0, 5 7736; PPC64LE-NEXT: or 6, 4, 3 7737; PPC64LE-NEXT: stdcx. 6, 0, 5 7738; PPC64LE-NEXT: bne 0, .LBB456_1 7739; PPC64LE-NEXT: # %bb.2: 7740; PPC64LE-NEXT: lwsync 7741; PPC64LE-NEXT: blr 7742 %ret = atomicrmw or i64* %ptr, i64 %val syncscope("singlethread") acquire 7743 ret i64 %ret 7744} 7745 7746define i64 @test457(i64* %ptr, i64 %val) { 7747; PPC64LE-LABEL: test457: 7748; PPC64LE: # %bb.0: 7749; PPC64LE-NEXT: lwsync 7750; PPC64LE-NEXT: .LBB457_1: 7751; PPC64LE-NEXT: ldarx 5, 0, 3 7752; PPC64LE-NEXT: or 6, 4, 5 7753; PPC64LE-NEXT: stdcx. 6, 0, 3 7754; PPC64LE-NEXT: bne 0, .LBB457_1 7755; PPC64LE-NEXT: # %bb.2: 7756; PPC64LE-NEXT: mr 3, 5 7757; PPC64LE-NEXT: blr 7758 %ret = atomicrmw or i64* %ptr, i64 %val syncscope("singlethread") release 7759 ret i64 %ret 7760} 7761 7762define i64 @test458(i64* %ptr, i64 %val) { 7763; PPC64LE-LABEL: test458: 7764; PPC64LE: # %bb.0: 7765; PPC64LE-NEXT: lwsync 7766; PPC64LE-NEXT: .LBB458_1: 7767; PPC64LE-NEXT: ldarx 5, 0, 3 7768; PPC64LE-NEXT: or 6, 4, 5 7769; PPC64LE-NEXT: stdcx. 6, 0, 3 7770; PPC64LE-NEXT: bne 0, .LBB458_1 7771; PPC64LE-NEXT: # %bb.2: 7772; PPC64LE-NEXT: mr 3, 5 7773; PPC64LE-NEXT: lwsync 7774; PPC64LE-NEXT: blr 7775 %ret = atomicrmw or i64* %ptr, i64 %val syncscope("singlethread") acq_rel 7776 ret i64 %ret 7777} 7778 7779define i64 @test459(i64* %ptr, i64 %val) { 7780; PPC64LE-LABEL: test459: 7781; PPC64LE: # %bb.0: 7782; PPC64LE-NEXT: sync 7783; PPC64LE-NEXT: .LBB459_1: 7784; PPC64LE-NEXT: ldarx 5, 0, 3 7785; PPC64LE-NEXT: or 6, 4, 5 7786; PPC64LE-NEXT: stdcx. 6, 0, 3 7787; PPC64LE-NEXT: bne 0, .LBB459_1 7788; PPC64LE-NEXT: # %bb.2: 7789; PPC64LE-NEXT: mr 3, 5 7790; PPC64LE-NEXT: lwsync 7791; PPC64LE-NEXT: blr 7792 %ret = atomicrmw or i64* %ptr, i64 %val syncscope("singlethread") seq_cst 7793 ret i64 %ret 7794} 7795 7796define i8 @test460(i8* %ptr, i8 %val) { 7797; PPC64LE-LABEL: test460: 7798; PPC64LE: # %bb.0: 7799; PPC64LE-NEXT: .LBB460_1: 7800; PPC64LE-NEXT: lbarx 5, 0, 3 7801; PPC64LE-NEXT: xor 6, 4, 5 7802; PPC64LE-NEXT: stbcx. 6, 0, 3 7803; PPC64LE-NEXT: bne 0, .LBB460_1 7804; PPC64LE-NEXT: # %bb.2: 7805; PPC64LE-NEXT: mr 3, 5 7806; PPC64LE-NEXT: blr 7807 %ret = atomicrmw xor i8* %ptr, i8 %val syncscope("singlethread") monotonic 7808 ret i8 %ret 7809} 7810 7811define i8 @test461(i8* %ptr, i8 %val) { 7812; PPC64LE-LABEL: test461: 7813; PPC64LE: # %bb.0: 7814; PPC64LE-NEXT: mr 5, 3 7815; PPC64LE-NEXT: .LBB461_1: 7816; PPC64LE-NEXT: lbarx 3, 0, 5 7817; PPC64LE-NEXT: xor 6, 4, 3 7818; PPC64LE-NEXT: stbcx. 6, 0, 5 7819; PPC64LE-NEXT: bne 0, .LBB461_1 7820; PPC64LE-NEXT: # %bb.2: 7821; PPC64LE-NEXT: lwsync 7822; PPC64LE-NEXT: blr 7823 %ret = atomicrmw xor i8* %ptr, i8 %val syncscope("singlethread") acquire 7824 ret i8 %ret 7825} 7826 7827define i8 @test462(i8* %ptr, i8 %val) { 7828; PPC64LE-LABEL: test462: 7829; PPC64LE: # %bb.0: 7830; PPC64LE-NEXT: lwsync 7831; PPC64LE-NEXT: .LBB462_1: 7832; PPC64LE-NEXT: lbarx 5, 0, 3 7833; PPC64LE-NEXT: xor 6, 4, 5 7834; PPC64LE-NEXT: stbcx. 6, 0, 3 7835; PPC64LE-NEXT: bne 0, .LBB462_1 7836; PPC64LE-NEXT: # %bb.2: 7837; PPC64LE-NEXT: mr 3, 5 7838; PPC64LE-NEXT: blr 7839 %ret = atomicrmw xor i8* %ptr, i8 %val syncscope("singlethread") release 7840 ret i8 %ret 7841} 7842 7843define i8 @test463(i8* %ptr, i8 %val) { 7844; PPC64LE-LABEL: test463: 7845; PPC64LE: # %bb.0: 7846; PPC64LE-NEXT: lwsync 7847; PPC64LE-NEXT: .LBB463_1: 7848; PPC64LE-NEXT: lbarx 5, 0, 3 7849; PPC64LE-NEXT: xor 6, 4, 5 7850; PPC64LE-NEXT: stbcx. 6, 0, 3 7851; PPC64LE-NEXT: bne 0, .LBB463_1 7852; PPC64LE-NEXT: # %bb.2: 7853; PPC64LE-NEXT: mr 3, 5 7854; PPC64LE-NEXT: lwsync 7855; PPC64LE-NEXT: blr 7856 %ret = atomicrmw xor i8* %ptr, i8 %val syncscope("singlethread") acq_rel 7857 ret i8 %ret 7858} 7859 7860define i8 @test464(i8* %ptr, i8 %val) { 7861; PPC64LE-LABEL: test464: 7862; PPC64LE: # %bb.0: 7863; PPC64LE-NEXT: sync 7864; PPC64LE-NEXT: .LBB464_1: 7865; PPC64LE-NEXT: lbarx 5, 0, 3 7866; PPC64LE-NEXT: xor 6, 4, 5 7867; PPC64LE-NEXT: stbcx. 6, 0, 3 7868; PPC64LE-NEXT: bne 0, .LBB464_1 7869; PPC64LE-NEXT: # %bb.2: 7870; PPC64LE-NEXT: mr 3, 5 7871; PPC64LE-NEXT: lwsync 7872; PPC64LE-NEXT: blr 7873 %ret = atomicrmw xor i8* %ptr, i8 %val syncscope("singlethread") seq_cst 7874 ret i8 %ret 7875} 7876 7877define i16 @test465(i16* %ptr, i16 %val) { 7878; PPC64LE-LABEL: test465: 7879; PPC64LE: # %bb.0: 7880; PPC64LE-NEXT: .LBB465_1: 7881; PPC64LE-NEXT: lharx 5, 0, 3 7882; PPC64LE-NEXT: xor 6, 4, 5 7883; PPC64LE-NEXT: sthcx. 6, 0, 3 7884; PPC64LE-NEXT: bne 0, .LBB465_1 7885; PPC64LE-NEXT: # %bb.2: 7886; PPC64LE-NEXT: mr 3, 5 7887; PPC64LE-NEXT: blr 7888 %ret = atomicrmw xor i16* %ptr, i16 %val syncscope("singlethread") monotonic 7889 ret i16 %ret 7890} 7891 7892define i16 @test466(i16* %ptr, i16 %val) { 7893; PPC64LE-LABEL: test466: 7894; PPC64LE: # %bb.0: 7895; PPC64LE-NEXT: mr 5, 3 7896; PPC64LE-NEXT: .LBB466_1: 7897; PPC64LE-NEXT: lharx 3, 0, 5 7898; PPC64LE-NEXT: xor 6, 4, 3 7899; PPC64LE-NEXT: sthcx. 6, 0, 5 7900; PPC64LE-NEXT: bne 0, .LBB466_1 7901; PPC64LE-NEXT: # %bb.2: 7902; PPC64LE-NEXT: lwsync 7903; PPC64LE-NEXT: blr 7904 %ret = atomicrmw xor i16* %ptr, i16 %val syncscope("singlethread") acquire 7905 ret i16 %ret 7906} 7907 7908define i16 @test467(i16* %ptr, i16 %val) { 7909; PPC64LE-LABEL: test467: 7910; PPC64LE: # %bb.0: 7911; PPC64LE-NEXT: lwsync 7912; PPC64LE-NEXT: .LBB467_1: 7913; PPC64LE-NEXT: lharx 5, 0, 3 7914; PPC64LE-NEXT: xor 6, 4, 5 7915; PPC64LE-NEXT: sthcx. 6, 0, 3 7916; PPC64LE-NEXT: bne 0, .LBB467_1 7917; PPC64LE-NEXT: # %bb.2: 7918; PPC64LE-NEXT: mr 3, 5 7919; PPC64LE-NEXT: blr 7920 %ret = atomicrmw xor i16* %ptr, i16 %val syncscope("singlethread") release 7921 ret i16 %ret 7922} 7923 7924define i16 @test468(i16* %ptr, i16 %val) { 7925; PPC64LE-LABEL: test468: 7926; PPC64LE: # %bb.0: 7927; PPC64LE-NEXT: lwsync 7928; PPC64LE-NEXT: .LBB468_1: 7929; PPC64LE-NEXT: lharx 5, 0, 3 7930; PPC64LE-NEXT: xor 6, 4, 5 7931; PPC64LE-NEXT: sthcx. 6, 0, 3 7932; PPC64LE-NEXT: bne 0, .LBB468_1 7933; PPC64LE-NEXT: # %bb.2: 7934; PPC64LE-NEXT: mr 3, 5 7935; PPC64LE-NEXT: lwsync 7936; PPC64LE-NEXT: blr 7937 %ret = atomicrmw xor i16* %ptr, i16 %val syncscope("singlethread") acq_rel 7938 ret i16 %ret 7939} 7940 7941define i16 @test469(i16* %ptr, i16 %val) { 7942; PPC64LE-LABEL: test469: 7943; PPC64LE: # %bb.0: 7944; PPC64LE-NEXT: sync 7945; PPC64LE-NEXT: .LBB469_1: 7946; PPC64LE-NEXT: lharx 5, 0, 3 7947; PPC64LE-NEXT: xor 6, 4, 5 7948; PPC64LE-NEXT: sthcx. 6, 0, 3 7949; PPC64LE-NEXT: bne 0, .LBB469_1 7950; PPC64LE-NEXT: # %bb.2: 7951; PPC64LE-NEXT: mr 3, 5 7952; PPC64LE-NEXT: lwsync 7953; PPC64LE-NEXT: blr 7954 %ret = atomicrmw xor i16* %ptr, i16 %val syncscope("singlethread") seq_cst 7955 ret i16 %ret 7956} 7957 7958define i32 @test470(i32* %ptr, i32 %val) { 7959; PPC64LE-LABEL: test470: 7960; PPC64LE: # %bb.0: 7961; PPC64LE-NEXT: .LBB470_1: 7962; PPC64LE-NEXT: lwarx 5, 0, 3 7963; PPC64LE-NEXT: xor 6, 4, 5 7964; PPC64LE-NEXT: stwcx. 6, 0, 3 7965; PPC64LE-NEXT: bne 0, .LBB470_1 7966; PPC64LE-NEXT: # %bb.2: 7967; PPC64LE-NEXT: mr 3, 5 7968; PPC64LE-NEXT: blr 7969 %ret = atomicrmw xor i32* %ptr, i32 %val syncscope("singlethread") monotonic 7970 ret i32 %ret 7971} 7972 7973define i32 @test471(i32* %ptr, i32 %val) { 7974; PPC64LE-LABEL: test471: 7975; PPC64LE: # %bb.0: 7976; PPC64LE-NEXT: mr 5, 3 7977; PPC64LE-NEXT: .LBB471_1: 7978; PPC64LE-NEXT: lwarx 3, 0, 5 7979; PPC64LE-NEXT: xor 6, 4, 3 7980; PPC64LE-NEXT: stwcx. 6, 0, 5 7981; PPC64LE-NEXT: bne 0, .LBB471_1 7982; PPC64LE-NEXT: # %bb.2: 7983; PPC64LE-NEXT: lwsync 7984; PPC64LE-NEXT: blr 7985 %ret = atomicrmw xor i32* %ptr, i32 %val syncscope("singlethread") acquire 7986 ret i32 %ret 7987} 7988 7989define i32 @test472(i32* %ptr, i32 %val) { 7990; PPC64LE-LABEL: test472: 7991; PPC64LE: # %bb.0: 7992; PPC64LE-NEXT: lwsync 7993; PPC64LE-NEXT: .LBB472_1: 7994; PPC64LE-NEXT: lwarx 5, 0, 3 7995; PPC64LE-NEXT: xor 6, 4, 5 7996; PPC64LE-NEXT: stwcx. 6, 0, 3 7997; PPC64LE-NEXT: bne 0, .LBB472_1 7998; PPC64LE-NEXT: # %bb.2: 7999; PPC64LE-NEXT: mr 3, 5 8000; PPC64LE-NEXT: blr 8001 %ret = atomicrmw xor i32* %ptr, i32 %val syncscope("singlethread") release 8002 ret i32 %ret 8003} 8004 8005define i32 @test473(i32* %ptr, i32 %val) { 8006; PPC64LE-LABEL: test473: 8007; PPC64LE: # %bb.0: 8008; PPC64LE-NEXT: lwsync 8009; PPC64LE-NEXT: .LBB473_1: 8010; PPC64LE-NEXT: lwarx 5, 0, 3 8011; PPC64LE-NEXT: xor 6, 4, 5 8012; PPC64LE-NEXT: stwcx. 6, 0, 3 8013; PPC64LE-NEXT: bne 0, .LBB473_1 8014; PPC64LE-NEXT: # %bb.2: 8015; PPC64LE-NEXT: mr 3, 5 8016; PPC64LE-NEXT: lwsync 8017; PPC64LE-NEXT: blr 8018 %ret = atomicrmw xor i32* %ptr, i32 %val syncscope("singlethread") acq_rel 8019 ret i32 %ret 8020} 8021 8022define i32 @test474(i32* %ptr, i32 %val) { 8023; PPC64LE-LABEL: test474: 8024; PPC64LE: # %bb.0: 8025; PPC64LE-NEXT: sync 8026; PPC64LE-NEXT: .LBB474_1: 8027; PPC64LE-NEXT: lwarx 5, 0, 3 8028; PPC64LE-NEXT: xor 6, 4, 5 8029; PPC64LE-NEXT: stwcx. 6, 0, 3 8030; PPC64LE-NEXT: bne 0, .LBB474_1 8031; PPC64LE-NEXT: # %bb.2: 8032; PPC64LE-NEXT: mr 3, 5 8033; PPC64LE-NEXT: lwsync 8034; PPC64LE-NEXT: blr 8035 %ret = atomicrmw xor i32* %ptr, i32 %val syncscope("singlethread") seq_cst 8036 ret i32 %ret 8037} 8038 8039define i64 @test475(i64* %ptr, i64 %val) { 8040; PPC64LE-LABEL: test475: 8041; PPC64LE: # %bb.0: 8042; PPC64LE-NEXT: .LBB475_1: 8043; PPC64LE-NEXT: ldarx 5, 0, 3 8044; PPC64LE-NEXT: xor 6, 4, 5 8045; PPC64LE-NEXT: stdcx. 6, 0, 3 8046; PPC64LE-NEXT: bne 0, .LBB475_1 8047; PPC64LE-NEXT: # %bb.2: 8048; PPC64LE-NEXT: mr 3, 5 8049; PPC64LE-NEXT: blr 8050 %ret = atomicrmw xor i64* %ptr, i64 %val syncscope("singlethread") monotonic 8051 ret i64 %ret 8052} 8053 8054define i64 @test476(i64* %ptr, i64 %val) { 8055; PPC64LE-LABEL: test476: 8056; PPC64LE: # %bb.0: 8057; PPC64LE-NEXT: mr 5, 3 8058; PPC64LE-NEXT: .LBB476_1: 8059; PPC64LE-NEXT: ldarx 3, 0, 5 8060; PPC64LE-NEXT: xor 6, 4, 3 8061; PPC64LE-NEXT: stdcx. 6, 0, 5 8062; PPC64LE-NEXT: bne 0, .LBB476_1 8063; PPC64LE-NEXT: # %bb.2: 8064; PPC64LE-NEXT: lwsync 8065; PPC64LE-NEXT: blr 8066 %ret = atomicrmw xor i64* %ptr, i64 %val syncscope("singlethread") acquire 8067 ret i64 %ret 8068} 8069 8070define i64 @test477(i64* %ptr, i64 %val) { 8071; PPC64LE-LABEL: test477: 8072; PPC64LE: # %bb.0: 8073; PPC64LE-NEXT: lwsync 8074; PPC64LE-NEXT: .LBB477_1: 8075; PPC64LE-NEXT: ldarx 5, 0, 3 8076; PPC64LE-NEXT: xor 6, 4, 5 8077; PPC64LE-NEXT: stdcx. 6, 0, 3 8078; PPC64LE-NEXT: bne 0, .LBB477_1 8079; PPC64LE-NEXT: # %bb.2: 8080; PPC64LE-NEXT: mr 3, 5 8081; PPC64LE-NEXT: blr 8082 %ret = atomicrmw xor i64* %ptr, i64 %val syncscope("singlethread") release 8083 ret i64 %ret 8084} 8085 8086define i64 @test478(i64* %ptr, i64 %val) { 8087; PPC64LE-LABEL: test478: 8088; PPC64LE: # %bb.0: 8089; PPC64LE-NEXT: lwsync 8090; PPC64LE-NEXT: .LBB478_1: 8091; PPC64LE-NEXT: ldarx 5, 0, 3 8092; PPC64LE-NEXT: xor 6, 4, 5 8093; PPC64LE-NEXT: stdcx. 6, 0, 3 8094; PPC64LE-NEXT: bne 0, .LBB478_1 8095; PPC64LE-NEXT: # %bb.2: 8096; PPC64LE-NEXT: mr 3, 5 8097; PPC64LE-NEXT: lwsync 8098; PPC64LE-NEXT: blr 8099 %ret = atomicrmw xor i64* %ptr, i64 %val syncscope("singlethread") acq_rel 8100 ret i64 %ret 8101} 8102 8103define i64 @test479(i64* %ptr, i64 %val) { 8104; PPC64LE-LABEL: test479: 8105; PPC64LE: # %bb.0: 8106; PPC64LE-NEXT: sync 8107; PPC64LE-NEXT: .LBB479_1: 8108; PPC64LE-NEXT: ldarx 5, 0, 3 8109; PPC64LE-NEXT: xor 6, 4, 5 8110; PPC64LE-NEXT: stdcx. 6, 0, 3 8111; PPC64LE-NEXT: bne 0, .LBB479_1 8112; PPC64LE-NEXT: # %bb.2: 8113; PPC64LE-NEXT: mr 3, 5 8114; PPC64LE-NEXT: lwsync 8115; PPC64LE-NEXT: blr 8116 %ret = atomicrmw xor i64* %ptr, i64 %val syncscope("singlethread") seq_cst 8117 ret i64 %ret 8118} 8119 8120define i8 @test480(i8* %ptr, i8 %val) { 8121; PPC64LE-LABEL: test480: 8122; PPC64LE: # %bb.0: 8123; PPC64LE-NEXT: extsb 5, 4 8124; PPC64LE-NEXT: .LBB480_1: 8125; PPC64LE-NEXT: lbarx 4, 0, 3 8126; PPC64LE-NEXT: extsb 6, 4 8127; PPC64LE-NEXT: cmpw 5, 6 8128; PPC64LE-NEXT: ble 0, .LBB480_3 8129; PPC64LE-NEXT: # %bb.2: 8130; PPC64LE-NEXT: stbcx. 5, 0, 3 8131; PPC64LE-NEXT: bne 0, .LBB480_1 8132; PPC64LE-NEXT: .LBB480_3: 8133; PPC64LE-NEXT: mr 3, 4 8134; PPC64LE-NEXT: blr 8135 %ret = atomicrmw max i8* %ptr, i8 %val syncscope("singlethread") monotonic 8136 ret i8 %ret 8137} 8138 8139define i8 @test481(i8* %ptr, i8 %val) { 8140; PPC64LE-LABEL: test481: 8141; PPC64LE: # %bb.0: 8142; PPC64LE-NEXT: extsb 5, 4 8143; PPC64LE-NEXT: .LBB481_1: 8144; PPC64LE-NEXT: lbarx 4, 0, 3 8145; PPC64LE-NEXT: extsb 6, 4 8146; PPC64LE-NEXT: cmpw 5, 6 8147; PPC64LE-NEXT: ble 0, .LBB481_3 8148; PPC64LE-NEXT: # %bb.2: 8149; PPC64LE-NEXT: stbcx. 5, 0, 3 8150; PPC64LE-NEXT: bne 0, .LBB481_1 8151; PPC64LE-NEXT: .LBB481_3: 8152; PPC64LE-NEXT: mr 3, 4 8153; PPC64LE-NEXT: lwsync 8154; PPC64LE-NEXT: blr 8155 %ret = atomicrmw max i8* %ptr, i8 %val syncscope("singlethread") acquire 8156 ret i8 %ret 8157} 8158 8159define i8 @test482(i8* %ptr, i8 %val) { 8160; PPC64LE-LABEL: test482: 8161; PPC64LE: # %bb.0: 8162; PPC64LE-NEXT: extsb 5, 4 8163; PPC64LE-NEXT: lwsync 8164; PPC64LE-NEXT: .LBB482_1: 8165; PPC64LE-NEXT: lbarx 4, 0, 3 8166; PPC64LE-NEXT: extsb 6, 4 8167; PPC64LE-NEXT: cmpw 5, 6 8168; PPC64LE-NEXT: ble 0, .LBB482_3 8169; PPC64LE-NEXT: # %bb.2: 8170; PPC64LE-NEXT: stbcx. 5, 0, 3 8171; PPC64LE-NEXT: bne 0, .LBB482_1 8172; PPC64LE-NEXT: .LBB482_3: 8173; PPC64LE-NEXT: mr 3, 4 8174; PPC64LE-NEXT: blr 8175 %ret = atomicrmw max i8* %ptr, i8 %val syncscope("singlethread") release 8176 ret i8 %ret 8177} 8178 8179define i8 @test483(i8* %ptr, i8 %val) { 8180; PPC64LE-LABEL: test483: 8181; PPC64LE: # %bb.0: 8182; PPC64LE-NEXT: extsb 5, 4 8183; PPC64LE-NEXT: lwsync 8184; PPC64LE-NEXT: .LBB483_1: 8185; PPC64LE-NEXT: lbarx 4, 0, 3 8186; PPC64LE-NEXT: extsb 6, 4 8187; PPC64LE-NEXT: cmpw 5, 6 8188; PPC64LE-NEXT: ble 0, .LBB483_3 8189; PPC64LE-NEXT: # %bb.2: 8190; PPC64LE-NEXT: stbcx. 5, 0, 3 8191; PPC64LE-NEXT: bne 0, .LBB483_1 8192; PPC64LE-NEXT: .LBB483_3: 8193; PPC64LE-NEXT: mr 3, 4 8194; PPC64LE-NEXT: lwsync 8195; PPC64LE-NEXT: blr 8196 %ret = atomicrmw max i8* %ptr, i8 %val syncscope("singlethread") acq_rel 8197 ret i8 %ret 8198} 8199 8200define i8 @test484(i8* %ptr, i8 %val) { 8201; PPC64LE-LABEL: test484: 8202; PPC64LE: # %bb.0: 8203; PPC64LE-NEXT: extsb 5, 4 8204; PPC64LE-NEXT: sync 8205; PPC64LE-NEXT: .LBB484_1: 8206; PPC64LE-NEXT: lbarx 4, 0, 3 8207; PPC64LE-NEXT: extsb 6, 4 8208; PPC64LE-NEXT: cmpw 5, 6 8209; PPC64LE-NEXT: ble 0, .LBB484_3 8210; PPC64LE-NEXT: # %bb.2: 8211; PPC64LE-NEXT: stbcx. 5, 0, 3 8212; PPC64LE-NEXT: bne 0, .LBB484_1 8213; PPC64LE-NEXT: .LBB484_3: 8214; PPC64LE-NEXT: mr 3, 4 8215; PPC64LE-NEXT: lwsync 8216; PPC64LE-NEXT: blr 8217 %ret = atomicrmw max i8* %ptr, i8 %val syncscope("singlethread") seq_cst 8218 ret i8 %ret 8219} 8220 8221define i16 @test485(i16* %ptr, i16 %val) { 8222; PPC64LE-LABEL: test485: 8223; PPC64LE: # %bb.0: 8224; PPC64LE-NEXT: extsh 5, 4 8225; PPC64LE-NEXT: .LBB485_1: 8226; PPC64LE-NEXT: lharx 4, 0, 3 8227; PPC64LE-NEXT: extsh 6, 4 8228; PPC64LE-NEXT: cmpw 5, 6 8229; PPC64LE-NEXT: ble 0, .LBB485_3 8230; PPC64LE-NEXT: # %bb.2: 8231; PPC64LE-NEXT: sthcx. 5, 0, 3 8232; PPC64LE-NEXT: bne 0, .LBB485_1 8233; PPC64LE-NEXT: .LBB485_3: 8234; PPC64LE-NEXT: mr 3, 4 8235; PPC64LE-NEXT: blr 8236 %ret = atomicrmw max i16* %ptr, i16 %val syncscope("singlethread") monotonic 8237 ret i16 %ret 8238} 8239 8240define i16 @test486(i16* %ptr, i16 %val) { 8241; PPC64LE-LABEL: test486: 8242; PPC64LE: # %bb.0: 8243; PPC64LE-NEXT: extsh 5, 4 8244; PPC64LE-NEXT: .LBB486_1: 8245; PPC64LE-NEXT: lharx 4, 0, 3 8246; PPC64LE-NEXT: extsh 6, 4 8247; PPC64LE-NEXT: cmpw 5, 6 8248; PPC64LE-NEXT: ble 0, .LBB486_3 8249; PPC64LE-NEXT: # %bb.2: 8250; PPC64LE-NEXT: sthcx. 5, 0, 3 8251; PPC64LE-NEXT: bne 0, .LBB486_1 8252; PPC64LE-NEXT: .LBB486_3: 8253; PPC64LE-NEXT: mr 3, 4 8254; PPC64LE-NEXT: lwsync 8255; PPC64LE-NEXT: blr 8256 %ret = atomicrmw max i16* %ptr, i16 %val syncscope("singlethread") acquire 8257 ret i16 %ret 8258} 8259 8260define i16 @test487(i16* %ptr, i16 %val) { 8261; PPC64LE-LABEL: test487: 8262; PPC64LE: # %bb.0: 8263; PPC64LE-NEXT: extsh 5, 4 8264; PPC64LE-NEXT: lwsync 8265; PPC64LE-NEXT: .LBB487_1: 8266; PPC64LE-NEXT: lharx 4, 0, 3 8267; PPC64LE-NEXT: extsh 6, 4 8268; PPC64LE-NEXT: cmpw 5, 6 8269; PPC64LE-NEXT: ble 0, .LBB487_3 8270; PPC64LE-NEXT: # %bb.2: 8271; PPC64LE-NEXT: sthcx. 5, 0, 3 8272; PPC64LE-NEXT: bne 0, .LBB487_1 8273; PPC64LE-NEXT: .LBB487_3: 8274; PPC64LE-NEXT: mr 3, 4 8275; PPC64LE-NEXT: blr 8276 %ret = atomicrmw max i16* %ptr, i16 %val syncscope("singlethread") release 8277 ret i16 %ret 8278} 8279 8280define i16 @test488(i16* %ptr, i16 %val) { 8281; PPC64LE-LABEL: test488: 8282; PPC64LE: # %bb.0: 8283; PPC64LE-NEXT: extsh 5, 4 8284; PPC64LE-NEXT: lwsync 8285; PPC64LE-NEXT: .LBB488_1: 8286; PPC64LE-NEXT: lharx 4, 0, 3 8287; PPC64LE-NEXT: extsh 6, 4 8288; PPC64LE-NEXT: cmpw 5, 6 8289; PPC64LE-NEXT: ble 0, .LBB488_3 8290; PPC64LE-NEXT: # %bb.2: 8291; PPC64LE-NEXT: sthcx. 5, 0, 3 8292; PPC64LE-NEXT: bne 0, .LBB488_1 8293; PPC64LE-NEXT: .LBB488_3: 8294; PPC64LE-NEXT: mr 3, 4 8295; PPC64LE-NEXT: lwsync 8296; PPC64LE-NEXT: blr 8297 %ret = atomicrmw max i16* %ptr, i16 %val syncscope("singlethread") acq_rel 8298 ret i16 %ret 8299} 8300 8301define i16 @test489(i16* %ptr, i16 %val) { 8302; PPC64LE-LABEL: test489: 8303; PPC64LE: # %bb.0: 8304; PPC64LE-NEXT: extsh 5, 4 8305; PPC64LE-NEXT: sync 8306; PPC64LE-NEXT: .LBB489_1: 8307; PPC64LE-NEXT: lharx 4, 0, 3 8308; PPC64LE-NEXT: extsh 6, 4 8309; PPC64LE-NEXT: cmpw 5, 6 8310; PPC64LE-NEXT: ble 0, .LBB489_3 8311; PPC64LE-NEXT: # %bb.2: 8312; PPC64LE-NEXT: sthcx. 5, 0, 3 8313; PPC64LE-NEXT: bne 0, .LBB489_1 8314; PPC64LE-NEXT: .LBB489_3: 8315; PPC64LE-NEXT: mr 3, 4 8316; PPC64LE-NEXT: lwsync 8317; PPC64LE-NEXT: blr 8318 %ret = atomicrmw max i16* %ptr, i16 %val syncscope("singlethread") seq_cst 8319 ret i16 %ret 8320} 8321 8322define i32 @test490(i32* %ptr, i32 %val) { 8323; PPC64LE-LABEL: test490: 8324; PPC64LE: # %bb.0: 8325; PPC64LE-NEXT: .LBB490_1: 8326; PPC64LE-NEXT: lwarx 5, 0, 3 8327; PPC64LE-NEXT: cmpw 4, 5 8328; PPC64LE-NEXT: ble 0, .LBB490_3 8329; PPC64LE-NEXT: # %bb.2: 8330; PPC64LE-NEXT: stwcx. 4, 0, 3 8331; PPC64LE-NEXT: bne 0, .LBB490_1 8332; PPC64LE-NEXT: .LBB490_3: 8333; PPC64LE-NEXT: mr 3, 5 8334; PPC64LE-NEXT: blr 8335 %ret = atomicrmw max i32* %ptr, i32 %val syncscope("singlethread") monotonic 8336 ret i32 %ret 8337} 8338 8339define i32 @test491(i32* %ptr, i32 %val) { 8340; PPC64LE-LABEL: test491: 8341; PPC64LE: # %bb.0: 8342; PPC64LE-NEXT: mr 5, 3 8343; PPC64LE-NEXT: .LBB491_1: 8344; PPC64LE-NEXT: lwarx 3, 0, 5 8345; PPC64LE-NEXT: cmpw 4, 3 8346; PPC64LE-NEXT: ble 0, .LBB491_3 8347; PPC64LE-NEXT: # %bb.2: 8348; PPC64LE-NEXT: stwcx. 4, 0, 5 8349; PPC64LE-NEXT: bne 0, .LBB491_1 8350; PPC64LE-NEXT: .LBB491_3: 8351; PPC64LE-NEXT: lwsync 8352; PPC64LE-NEXT: blr 8353 %ret = atomicrmw max i32* %ptr, i32 %val syncscope("singlethread") acquire 8354 ret i32 %ret 8355} 8356 8357define i32 @test492(i32* %ptr, i32 %val) { 8358; PPC64LE-LABEL: test492: 8359; PPC64LE: # %bb.0: 8360; PPC64LE-NEXT: lwsync 8361; PPC64LE-NEXT: .LBB492_1: 8362; PPC64LE-NEXT: lwarx 5, 0, 3 8363; PPC64LE-NEXT: cmpw 4, 5 8364; PPC64LE-NEXT: ble 0, .LBB492_3 8365; PPC64LE-NEXT: # %bb.2: 8366; PPC64LE-NEXT: stwcx. 4, 0, 3 8367; PPC64LE-NEXT: bne 0, .LBB492_1 8368; PPC64LE-NEXT: .LBB492_3: 8369; PPC64LE-NEXT: mr 3, 5 8370; PPC64LE-NEXT: blr 8371 %ret = atomicrmw max i32* %ptr, i32 %val syncscope("singlethread") release 8372 ret i32 %ret 8373} 8374 8375define i32 @test493(i32* %ptr, i32 %val) { 8376; PPC64LE-LABEL: test493: 8377; PPC64LE: # %bb.0: 8378; PPC64LE-NEXT: lwsync 8379; PPC64LE-NEXT: .LBB493_1: 8380; PPC64LE-NEXT: lwarx 5, 0, 3 8381; PPC64LE-NEXT: cmpw 4, 5 8382; PPC64LE-NEXT: ble 0, .LBB493_3 8383; PPC64LE-NEXT: # %bb.2: 8384; PPC64LE-NEXT: stwcx. 4, 0, 3 8385; PPC64LE-NEXT: bne 0, .LBB493_1 8386; PPC64LE-NEXT: .LBB493_3: 8387; PPC64LE-NEXT: mr 3, 5 8388; PPC64LE-NEXT: lwsync 8389; PPC64LE-NEXT: blr 8390 %ret = atomicrmw max i32* %ptr, i32 %val syncscope("singlethread") acq_rel 8391 ret i32 %ret 8392} 8393 8394define i32 @test494(i32* %ptr, i32 %val) { 8395; PPC64LE-LABEL: test494: 8396; PPC64LE: # %bb.0: 8397; PPC64LE-NEXT: sync 8398; PPC64LE-NEXT: .LBB494_1: 8399; PPC64LE-NEXT: lwarx 5, 0, 3 8400; PPC64LE-NEXT: cmpw 4, 5 8401; PPC64LE-NEXT: ble 0, .LBB494_3 8402; PPC64LE-NEXT: # %bb.2: 8403; PPC64LE-NEXT: stwcx. 4, 0, 3 8404; PPC64LE-NEXT: bne 0, .LBB494_1 8405; PPC64LE-NEXT: .LBB494_3: 8406; PPC64LE-NEXT: mr 3, 5 8407; PPC64LE-NEXT: lwsync 8408; PPC64LE-NEXT: blr 8409 %ret = atomicrmw max i32* %ptr, i32 %val syncscope("singlethread") seq_cst 8410 ret i32 %ret 8411} 8412 8413define i64 @test495(i64* %ptr, i64 %val) { 8414; PPC64LE-LABEL: test495: 8415; PPC64LE: # %bb.0: 8416; PPC64LE-NEXT: .LBB495_1: 8417; PPC64LE-NEXT: ldarx 5, 0, 3 8418; PPC64LE-NEXT: cmpd 4, 5 8419; PPC64LE-NEXT: ble 0, .LBB495_3 8420; PPC64LE-NEXT: # %bb.2: 8421; PPC64LE-NEXT: stdcx. 4, 0, 3 8422; PPC64LE-NEXT: bne 0, .LBB495_1 8423; PPC64LE-NEXT: .LBB495_3: 8424; PPC64LE-NEXT: mr 3, 5 8425; PPC64LE-NEXT: blr 8426 %ret = atomicrmw max i64* %ptr, i64 %val syncscope("singlethread") monotonic 8427 ret i64 %ret 8428} 8429 8430define i64 @test496(i64* %ptr, i64 %val) { 8431; PPC64LE-LABEL: test496: 8432; PPC64LE: # %bb.0: 8433; PPC64LE-NEXT: mr 5, 3 8434; PPC64LE-NEXT: .LBB496_1: 8435; PPC64LE-NEXT: ldarx 3, 0, 5 8436; PPC64LE-NEXT: cmpd 4, 3 8437; PPC64LE-NEXT: ble 0, .LBB496_3 8438; PPC64LE-NEXT: # %bb.2: 8439; PPC64LE-NEXT: stdcx. 4, 0, 5 8440; PPC64LE-NEXT: bne 0, .LBB496_1 8441; PPC64LE-NEXT: .LBB496_3: 8442; PPC64LE-NEXT: lwsync 8443; PPC64LE-NEXT: blr 8444 %ret = atomicrmw max i64* %ptr, i64 %val syncscope("singlethread") acquire 8445 ret i64 %ret 8446} 8447 8448define i64 @test497(i64* %ptr, i64 %val) { 8449; PPC64LE-LABEL: test497: 8450; PPC64LE: # %bb.0: 8451; PPC64LE-NEXT: lwsync 8452; PPC64LE-NEXT: .LBB497_1: 8453; PPC64LE-NEXT: ldarx 5, 0, 3 8454; PPC64LE-NEXT: cmpd 4, 5 8455; PPC64LE-NEXT: ble 0, .LBB497_3 8456; PPC64LE-NEXT: # %bb.2: 8457; PPC64LE-NEXT: stdcx. 4, 0, 3 8458; PPC64LE-NEXT: bne 0, .LBB497_1 8459; PPC64LE-NEXT: .LBB497_3: 8460; PPC64LE-NEXT: mr 3, 5 8461; PPC64LE-NEXT: blr 8462 %ret = atomicrmw max i64* %ptr, i64 %val syncscope("singlethread") release 8463 ret i64 %ret 8464} 8465 8466define i64 @test498(i64* %ptr, i64 %val) { 8467; PPC64LE-LABEL: test498: 8468; PPC64LE: # %bb.0: 8469; PPC64LE-NEXT: lwsync 8470; PPC64LE-NEXT: .LBB498_1: 8471; PPC64LE-NEXT: ldarx 5, 0, 3 8472; PPC64LE-NEXT: cmpd 4, 5 8473; PPC64LE-NEXT: ble 0, .LBB498_3 8474; PPC64LE-NEXT: # %bb.2: 8475; PPC64LE-NEXT: stdcx. 4, 0, 3 8476; PPC64LE-NEXT: bne 0, .LBB498_1 8477; PPC64LE-NEXT: .LBB498_3: 8478; PPC64LE-NEXT: mr 3, 5 8479; PPC64LE-NEXT: lwsync 8480; PPC64LE-NEXT: blr 8481 %ret = atomicrmw max i64* %ptr, i64 %val syncscope("singlethread") acq_rel 8482 ret i64 %ret 8483} 8484 8485define i64 @test499(i64* %ptr, i64 %val) { 8486; PPC64LE-LABEL: test499: 8487; PPC64LE: # %bb.0: 8488; PPC64LE-NEXT: sync 8489; PPC64LE-NEXT: .LBB499_1: 8490; PPC64LE-NEXT: ldarx 5, 0, 3 8491; PPC64LE-NEXT: cmpd 4, 5 8492; PPC64LE-NEXT: ble 0, .LBB499_3 8493; PPC64LE-NEXT: # %bb.2: 8494; PPC64LE-NEXT: stdcx. 4, 0, 3 8495; PPC64LE-NEXT: bne 0, .LBB499_1 8496; PPC64LE-NEXT: .LBB499_3: 8497; PPC64LE-NEXT: mr 3, 5 8498; PPC64LE-NEXT: lwsync 8499; PPC64LE-NEXT: blr 8500 %ret = atomicrmw max i64* %ptr, i64 %val syncscope("singlethread") seq_cst 8501 ret i64 %ret 8502} 8503 8504define i8 @test500(i8* %ptr, i8 %val) { 8505; PPC64LE-LABEL: test500: 8506; PPC64LE: # %bb.0: 8507; PPC64LE-NEXT: extsb 5, 4 8508; PPC64LE-NEXT: .LBB500_1: 8509; PPC64LE-NEXT: lbarx 4, 0, 3 8510; PPC64LE-NEXT: extsb 6, 4 8511; PPC64LE-NEXT: cmpw 5, 6 8512; PPC64LE-NEXT: bge 0, .LBB500_3 8513; PPC64LE-NEXT: # %bb.2: 8514; PPC64LE-NEXT: stbcx. 5, 0, 3 8515; PPC64LE-NEXT: bne 0, .LBB500_1 8516; PPC64LE-NEXT: .LBB500_3: 8517; PPC64LE-NEXT: mr 3, 4 8518; PPC64LE-NEXT: blr 8519 %ret = atomicrmw min i8* %ptr, i8 %val syncscope("singlethread") monotonic 8520 ret i8 %ret 8521} 8522 8523define i8 @test501(i8* %ptr, i8 %val) { 8524; PPC64LE-LABEL: test501: 8525; PPC64LE: # %bb.0: 8526; PPC64LE-NEXT: extsb 5, 4 8527; PPC64LE-NEXT: .LBB501_1: 8528; PPC64LE-NEXT: lbarx 4, 0, 3 8529; PPC64LE-NEXT: extsb 6, 4 8530; PPC64LE-NEXT: cmpw 5, 6 8531; PPC64LE-NEXT: bge 0, .LBB501_3 8532; PPC64LE-NEXT: # %bb.2: 8533; PPC64LE-NEXT: stbcx. 5, 0, 3 8534; PPC64LE-NEXT: bne 0, .LBB501_1 8535; PPC64LE-NEXT: .LBB501_3: 8536; PPC64LE-NEXT: mr 3, 4 8537; PPC64LE-NEXT: lwsync 8538; PPC64LE-NEXT: blr 8539 %ret = atomicrmw min i8* %ptr, i8 %val syncscope("singlethread") acquire 8540 ret i8 %ret 8541} 8542 8543define i8 @test502(i8* %ptr, i8 %val) { 8544; PPC64LE-LABEL: test502: 8545; PPC64LE: # %bb.0: 8546; PPC64LE-NEXT: extsb 5, 4 8547; PPC64LE-NEXT: lwsync 8548; PPC64LE-NEXT: .LBB502_1: 8549; PPC64LE-NEXT: lbarx 4, 0, 3 8550; PPC64LE-NEXT: extsb 6, 4 8551; PPC64LE-NEXT: cmpw 5, 6 8552; PPC64LE-NEXT: bge 0, .LBB502_3 8553; PPC64LE-NEXT: # %bb.2: 8554; PPC64LE-NEXT: stbcx. 5, 0, 3 8555; PPC64LE-NEXT: bne 0, .LBB502_1 8556; PPC64LE-NEXT: .LBB502_3: 8557; PPC64LE-NEXT: mr 3, 4 8558; PPC64LE-NEXT: blr 8559 %ret = atomicrmw min i8* %ptr, i8 %val syncscope("singlethread") release 8560 ret i8 %ret 8561} 8562 8563define i8 @test503(i8* %ptr, i8 %val) { 8564; PPC64LE-LABEL: test503: 8565; PPC64LE: # %bb.0: 8566; PPC64LE-NEXT: extsb 5, 4 8567; PPC64LE-NEXT: lwsync 8568; PPC64LE-NEXT: .LBB503_1: 8569; PPC64LE-NEXT: lbarx 4, 0, 3 8570; PPC64LE-NEXT: extsb 6, 4 8571; PPC64LE-NEXT: cmpw 5, 6 8572; PPC64LE-NEXT: bge 0, .LBB503_3 8573; PPC64LE-NEXT: # %bb.2: 8574; PPC64LE-NEXT: stbcx. 5, 0, 3 8575; PPC64LE-NEXT: bne 0, .LBB503_1 8576; PPC64LE-NEXT: .LBB503_3: 8577; PPC64LE-NEXT: mr 3, 4 8578; PPC64LE-NEXT: lwsync 8579; PPC64LE-NEXT: blr 8580 %ret = atomicrmw min i8* %ptr, i8 %val syncscope("singlethread") acq_rel 8581 ret i8 %ret 8582} 8583 8584define i8 @test504(i8* %ptr, i8 %val) { 8585; PPC64LE-LABEL: test504: 8586; PPC64LE: # %bb.0: 8587; PPC64LE-NEXT: extsb 5, 4 8588; PPC64LE-NEXT: sync 8589; PPC64LE-NEXT: .LBB504_1: 8590; PPC64LE-NEXT: lbarx 4, 0, 3 8591; PPC64LE-NEXT: extsb 6, 4 8592; PPC64LE-NEXT: cmpw 5, 6 8593; PPC64LE-NEXT: bge 0, .LBB504_3 8594; PPC64LE-NEXT: # %bb.2: 8595; PPC64LE-NEXT: stbcx. 5, 0, 3 8596; PPC64LE-NEXT: bne 0, .LBB504_1 8597; PPC64LE-NEXT: .LBB504_3: 8598; PPC64LE-NEXT: mr 3, 4 8599; PPC64LE-NEXT: lwsync 8600; PPC64LE-NEXT: blr 8601 %ret = atomicrmw min i8* %ptr, i8 %val syncscope("singlethread") seq_cst 8602 ret i8 %ret 8603} 8604 8605define i16 @test505(i16* %ptr, i16 %val) { 8606; PPC64LE-LABEL: test505: 8607; PPC64LE: # %bb.0: 8608; PPC64LE-NEXT: extsh 5, 4 8609; PPC64LE-NEXT: .LBB505_1: 8610; PPC64LE-NEXT: lharx 4, 0, 3 8611; PPC64LE-NEXT: extsh 6, 4 8612; PPC64LE-NEXT: cmpw 5, 6 8613; PPC64LE-NEXT: bge 0, .LBB505_3 8614; PPC64LE-NEXT: # %bb.2: 8615; PPC64LE-NEXT: sthcx. 5, 0, 3 8616; PPC64LE-NEXT: bne 0, .LBB505_1 8617; PPC64LE-NEXT: .LBB505_3: 8618; PPC64LE-NEXT: mr 3, 4 8619; PPC64LE-NEXT: blr 8620 %ret = atomicrmw min i16* %ptr, i16 %val syncscope("singlethread") monotonic 8621 ret i16 %ret 8622} 8623 8624define i16 @test506(i16* %ptr, i16 %val) { 8625; PPC64LE-LABEL: test506: 8626; PPC64LE: # %bb.0: 8627; PPC64LE-NEXT: extsh 5, 4 8628; PPC64LE-NEXT: .LBB506_1: 8629; PPC64LE-NEXT: lharx 4, 0, 3 8630; PPC64LE-NEXT: extsh 6, 4 8631; PPC64LE-NEXT: cmpw 5, 6 8632; PPC64LE-NEXT: bge 0, .LBB506_3 8633; PPC64LE-NEXT: # %bb.2: 8634; PPC64LE-NEXT: sthcx. 5, 0, 3 8635; PPC64LE-NEXT: bne 0, .LBB506_1 8636; PPC64LE-NEXT: .LBB506_3: 8637; PPC64LE-NEXT: mr 3, 4 8638; PPC64LE-NEXT: lwsync 8639; PPC64LE-NEXT: blr 8640 %ret = atomicrmw min i16* %ptr, i16 %val syncscope("singlethread") acquire 8641 ret i16 %ret 8642} 8643 8644define i16 @test507(i16* %ptr, i16 %val) { 8645; PPC64LE-LABEL: test507: 8646; PPC64LE: # %bb.0: 8647; PPC64LE-NEXT: extsh 5, 4 8648; PPC64LE-NEXT: lwsync 8649; PPC64LE-NEXT: .LBB507_1: 8650; PPC64LE-NEXT: lharx 4, 0, 3 8651; PPC64LE-NEXT: extsh 6, 4 8652; PPC64LE-NEXT: cmpw 5, 6 8653; PPC64LE-NEXT: bge 0, .LBB507_3 8654; PPC64LE-NEXT: # %bb.2: 8655; PPC64LE-NEXT: sthcx. 5, 0, 3 8656; PPC64LE-NEXT: bne 0, .LBB507_1 8657; PPC64LE-NEXT: .LBB507_3: 8658; PPC64LE-NEXT: mr 3, 4 8659; PPC64LE-NEXT: blr 8660 %ret = atomicrmw min i16* %ptr, i16 %val syncscope("singlethread") release 8661 ret i16 %ret 8662} 8663 8664define i16 @test508(i16* %ptr, i16 %val) { 8665; PPC64LE-LABEL: test508: 8666; PPC64LE: # %bb.0: 8667; PPC64LE-NEXT: extsh 5, 4 8668; PPC64LE-NEXT: lwsync 8669; PPC64LE-NEXT: .LBB508_1: 8670; PPC64LE-NEXT: lharx 4, 0, 3 8671; PPC64LE-NEXT: extsh 6, 4 8672; PPC64LE-NEXT: cmpw 5, 6 8673; PPC64LE-NEXT: bge 0, .LBB508_3 8674; PPC64LE-NEXT: # %bb.2: 8675; PPC64LE-NEXT: sthcx. 5, 0, 3 8676; PPC64LE-NEXT: bne 0, .LBB508_1 8677; PPC64LE-NEXT: .LBB508_3: 8678; PPC64LE-NEXT: mr 3, 4 8679; PPC64LE-NEXT: lwsync 8680; PPC64LE-NEXT: blr 8681 %ret = atomicrmw min i16* %ptr, i16 %val syncscope("singlethread") acq_rel 8682 ret i16 %ret 8683} 8684 8685define i16 @test509(i16* %ptr, i16 %val) { 8686; PPC64LE-LABEL: test509: 8687; PPC64LE: # %bb.0: 8688; PPC64LE-NEXT: extsh 5, 4 8689; PPC64LE-NEXT: sync 8690; PPC64LE-NEXT: .LBB509_1: 8691; PPC64LE-NEXT: lharx 4, 0, 3 8692; PPC64LE-NEXT: extsh 6, 4 8693; PPC64LE-NEXT: cmpw 5, 6 8694; PPC64LE-NEXT: bge 0, .LBB509_3 8695; PPC64LE-NEXT: # %bb.2: 8696; PPC64LE-NEXT: sthcx. 5, 0, 3 8697; PPC64LE-NEXT: bne 0, .LBB509_1 8698; PPC64LE-NEXT: .LBB509_3: 8699; PPC64LE-NEXT: mr 3, 4 8700; PPC64LE-NEXT: lwsync 8701; PPC64LE-NEXT: blr 8702 %ret = atomicrmw min i16* %ptr, i16 %val syncscope("singlethread") seq_cst 8703 ret i16 %ret 8704} 8705 8706define i32 @test510(i32* %ptr, i32 %val) { 8707; PPC64LE-LABEL: test510: 8708; PPC64LE: # %bb.0: 8709; PPC64LE-NEXT: .LBB510_1: 8710; PPC64LE-NEXT: lwarx 5, 0, 3 8711; PPC64LE-NEXT: cmpw 4, 5 8712; PPC64LE-NEXT: bge 0, .LBB510_3 8713; PPC64LE-NEXT: # %bb.2: 8714; PPC64LE-NEXT: stwcx. 4, 0, 3 8715; PPC64LE-NEXT: bne 0, .LBB510_1 8716; PPC64LE-NEXT: .LBB510_3: 8717; PPC64LE-NEXT: mr 3, 5 8718; PPC64LE-NEXT: blr 8719 %ret = atomicrmw min i32* %ptr, i32 %val syncscope("singlethread") monotonic 8720 ret i32 %ret 8721} 8722 8723define i32 @test511(i32* %ptr, i32 %val) { 8724; PPC64LE-LABEL: test511: 8725; PPC64LE: # %bb.0: 8726; PPC64LE-NEXT: mr 5, 3 8727; PPC64LE-NEXT: .LBB511_1: 8728; PPC64LE-NEXT: lwarx 3, 0, 5 8729; PPC64LE-NEXT: cmpw 4, 3 8730; PPC64LE-NEXT: bge 0, .LBB511_3 8731; PPC64LE-NEXT: # %bb.2: 8732; PPC64LE-NEXT: stwcx. 4, 0, 5 8733; PPC64LE-NEXT: bne 0, .LBB511_1 8734; PPC64LE-NEXT: .LBB511_3: 8735; PPC64LE-NEXT: lwsync 8736; PPC64LE-NEXT: blr 8737 %ret = atomicrmw min i32* %ptr, i32 %val syncscope("singlethread") acquire 8738 ret i32 %ret 8739} 8740 8741define i32 @test512(i32* %ptr, i32 %val) { 8742; PPC64LE-LABEL: test512: 8743; PPC64LE: # %bb.0: 8744; PPC64LE-NEXT: lwsync 8745; PPC64LE-NEXT: .LBB512_1: 8746; PPC64LE-NEXT: lwarx 5, 0, 3 8747; PPC64LE-NEXT: cmpw 4, 5 8748; PPC64LE-NEXT: bge 0, .LBB512_3 8749; PPC64LE-NEXT: # %bb.2: 8750; PPC64LE-NEXT: stwcx. 4, 0, 3 8751; PPC64LE-NEXT: bne 0, .LBB512_1 8752; PPC64LE-NEXT: .LBB512_3: 8753; PPC64LE-NEXT: mr 3, 5 8754; PPC64LE-NEXT: blr 8755 %ret = atomicrmw min i32* %ptr, i32 %val syncscope("singlethread") release 8756 ret i32 %ret 8757} 8758 8759define i32 @test513(i32* %ptr, i32 %val) { 8760; PPC64LE-LABEL: test513: 8761; PPC64LE: # %bb.0: 8762; PPC64LE-NEXT: lwsync 8763; PPC64LE-NEXT: .LBB513_1: 8764; PPC64LE-NEXT: lwarx 5, 0, 3 8765; PPC64LE-NEXT: cmpw 4, 5 8766; PPC64LE-NEXT: bge 0, .LBB513_3 8767; PPC64LE-NEXT: # %bb.2: 8768; PPC64LE-NEXT: stwcx. 4, 0, 3 8769; PPC64LE-NEXT: bne 0, .LBB513_1 8770; PPC64LE-NEXT: .LBB513_3: 8771; PPC64LE-NEXT: mr 3, 5 8772; PPC64LE-NEXT: lwsync 8773; PPC64LE-NEXT: blr 8774 %ret = atomicrmw min i32* %ptr, i32 %val syncscope("singlethread") acq_rel 8775 ret i32 %ret 8776} 8777 8778define i32 @test514(i32* %ptr, i32 %val) { 8779; PPC64LE-LABEL: test514: 8780; PPC64LE: # %bb.0: 8781; PPC64LE-NEXT: sync 8782; PPC64LE-NEXT: .LBB514_1: 8783; PPC64LE-NEXT: lwarx 5, 0, 3 8784; PPC64LE-NEXT: cmpw 4, 5 8785; PPC64LE-NEXT: bge 0, .LBB514_3 8786; PPC64LE-NEXT: # %bb.2: 8787; PPC64LE-NEXT: stwcx. 4, 0, 3 8788; PPC64LE-NEXT: bne 0, .LBB514_1 8789; PPC64LE-NEXT: .LBB514_3: 8790; PPC64LE-NEXT: mr 3, 5 8791; PPC64LE-NEXT: lwsync 8792; PPC64LE-NEXT: blr 8793 %ret = atomicrmw min i32* %ptr, i32 %val syncscope("singlethread") seq_cst 8794 ret i32 %ret 8795} 8796 8797define i64 @test515(i64* %ptr, i64 %val) { 8798; PPC64LE-LABEL: test515: 8799; PPC64LE: # %bb.0: 8800; PPC64LE-NEXT: .LBB515_1: 8801; PPC64LE-NEXT: ldarx 5, 0, 3 8802; PPC64LE-NEXT: cmpd 4, 5 8803; PPC64LE-NEXT: bge 0, .LBB515_3 8804; PPC64LE-NEXT: # %bb.2: 8805; PPC64LE-NEXT: stdcx. 4, 0, 3 8806; PPC64LE-NEXT: bne 0, .LBB515_1 8807; PPC64LE-NEXT: .LBB515_3: 8808; PPC64LE-NEXT: mr 3, 5 8809; PPC64LE-NEXT: blr 8810 %ret = atomicrmw min i64* %ptr, i64 %val syncscope("singlethread") monotonic 8811 ret i64 %ret 8812} 8813 8814define i64 @test516(i64* %ptr, i64 %val) { 8815; PPC64LE-LABEL: test516: 8816; PPC64LE: # %bb.0: 8817; PPC64LE-NEXT: mr 5, 3 8818; PPC64LE-NEXT: .LBB516_1: 8819; PPC64LE-NEXT: ldarx 3, 0, 5 8820; PPC64LE-NEXT: cmpd 4, 3 8821; PPC64LE-NEXT: bge 0, .LBB516_3 8822; PPC64LE-NEXT: # %bb.2: 8823; PPC64LE-NEXT: stdcx. 4, 0, 5 8824; PPC64LE-NEXT: bne 0, .LBB516_1 8825; PPC64LE-NEXT: .LBB516_3: 8826; PPC64LE-NEXT: lwsync 8827; PPC64LE-NEXT: blr 8828 %ret = atomicrmw min i64* %ptr, i64 %val syncscope("singlethread") acquire 8829 ret i64 %ret 8830} 8831 8832define i64 @test517(i64* %ptr, i64 %val) { 8833; PPC64LE-LABEL: test517: 8834; PPC64LE: # %bb.0: 8835; PPC64LE-NEXT: lwsync 8836; PPC64LE-NEXT: .LBB517_1: 8837; PPC64LE-NEXT: ldarx 5, 0, 3 8838; PPC64LE-NEXT: cmpd 4, 5 8839; PPC64LE-NEXT: bge 0, .LBB517_3 8840; PPC64LE-NEXT: # %bb.2: 8841; PPC64LE-NEXT: stdcx. 4, 0, 3 8842; PPC64LE-NEXT: bne 0, .LBB517_1 8843; PPC64LE-NEXT: .LBB517_3: 8844; PPC64LE-NEXT: mr 3, 5 8845; PPC64LE-NEXT: blr 8846 %ret = atomicrmw min i64* %ptr, i64 %val syncscope("singlethread") release 8847 ret i64 %ret 8848} 8849 8850define i64 @test518(i64* %ptr, i64 %val) { 8851; PPC64LE-LABEL: test518: 8852; PPC64LE: # %bb.0: 8853; PPC64LE-NEXT: lwsync 8854; PPC64LE-NEXT: .LBB518_1: 8855; PPC64LE-NEXT: ldarx 5, 0, 3 8856; PPC64LE-NEXT: cmpd 4, 5 8857; PPC64LE-NEXT: bge 0, .LBB518_3 8858; PPC64LE-NEXT: # %bb.2: 8859; PPC64LE-NEXT: stdcx. 4, 0, 3 8860; PPC64LE-NEXT: bne 0, .LBB518_1 8861; PPC64LE-NEXT: .LBB518_3: 8862; PPC64LE-NEXT: mr 3, 5 8863; PPC64LE-NEXT: lwsync 8864; PPC64LE-NEXT: blr 8865 %ret = atomicrmw min i64* %ptr, i64 %val syncscope("singlethread") acq_rel 8866 ret i64 %ret 8867} 8868 8869define i64 @test519(i64* %ptr, i64 %val) { 8870; PPC64LE-LABEL: test519: 8871; PPC64LE: # %bb.0: 8872; PPC64LE-NEXT: sync 8873; PPC64LE-NEXT: .LBB519_1: 8874; PPC64LE-NEXT: ldarx 5, 0, 3 8875; PPC64LE-NEXT: cmpd 4, 5 8876; PPC64LE-NEXT: bge 0, .LBB519_3 8877; PPC64LE-NEXT: # %bb.2: 8878; PPC64LE-NEXT: stdcx. 4, 0, 3 8879; PPC64LE-NEXT: bne 0, .LBB519_1 8880; PPC64LE-NEXT: .LBB519_3: 8881; PPC64LE-NEXT: mr 3, 5 8882; PPC64LE-NEXT: lwsync 8883; PPC64LE-NEXT: blr 8884 %ret = atomicrmw min i64* %ptr, i64 %val syncscope("singlethread") seq_cst 8885 ret i64 %ret 8886} 8887 8888define i8 @test520(i8* %ptr, i8 %val) { 8889; PPC64LE-LABEL: test520: 8890; PPC64LE: # %bb.0: 8891; PPC64LE-NEXT: .LBB520_1: 8892; PPC64LE-NEXT: lbarx 5, 0, 3 8893; PPC64LE-NEXT: cmplw 4, 5 8894; PPC64LE-NEXT: ble 0, .LBB520_3 8895; PPC64LE-NEXT: # %bb.2: 8896; PPC64LE-NEXT: stbcx. 4, 0, 3 8897; PPC64LE-NEXT: bne 0, .LBB520_1 8898; PPC64LE-NEXT: .LBB520_3: 8899; PPC64LE-NEXT: mr 3, 5 8900; PPC64LE-NEXT: blr 8901 %ret = atomicrmw umax i8* %ptr, i8 %val syncscope("singlethread") monotonic 8902 ret i8 %ret 8903} 8904 8905define i8 @test521(i8* %ptr, i8 %val) { 8906; PPC64LE-LABEL: test521: 8907; PPC64LE: # %bb.0: 8908; PPC64LE-NEXT: mr 5, 3 8909; PPC64LE-NEXT: .LBB521_1: 8910; PPC64LE-NEXT: lbarx 3, 0, 5 8911; PPC64LE-NEXT: cmplw 4, 3 8912; PPC64LE-NEXT: ble 0, .LBB521_3 8913; PPC64LE-NEXT: # %bb.2: 8914; PPC64LE-NEXT: stbcx. 4, 0, 5 8915; PPC64LE-NEXT: bne 0, .LBB521_1 8916; PPC64LE-NEXT: .LBB521_3: 8917; PPC64LE-NEXT: lwsync 8918; PPC64LE-NEXT: blr 8919 %ret = atomicrmw umax i8* %ptr, i8 %val syncscope("singlethread") acquire 8920 ret i8 %ret 8921} 8922 8923define i8 @test522(i8* %ptr, i8 %val) { 8924; PPC64LE-LABEL: test522: 8925; PPC64LE: # %bb.0: 8926; PPC64LE-NEXT: lwsync 8927; PPC64LE-NEXT: .LBB522_1: 8928; PPC64LE-NEXT: lbarx 5, 0, 3 8929; PPC64LE-NEXT: cmplw 4, 5 8930; PPC64LE-NEXT: ble 0, .LBB522_3 8931; PPC64LE-NEXT: # %bb.2: 8932; PPC64LE-NEXT: stbcx. 4, 0, 3 8933; PPC64LE-NEXT: bne 0, .LBB522_1 8934; PPC64LE-NEXT: .LBB522_3: 8935; PPC64LE-NEXT: mr 3, 5 8936; PPC64LE-NEXT: blr 8937 %ret = atomicrmw umax i8* %ptr, i8 %val syncscope("singlethread") release 8938 ret i8 %ret 8939} 8940 8941define i8 @test523(i8* %ptr, i8 %val) { 8942; PPC64LE-LABEL: test523: 8943; PPC64LE: # %bb.0: 8944; PPC64LE-NEXT: lwsync 8945; PPC64LE-NEXT: .LBB523_1: 8946; PPC64LE-NEXT: lbarx 5, 0, 3 8947; PPC64LE-NEXT: cmplw 4, 5 8948; PPC64LE-NEXT: ble 0, .LBB523_3 8949; PPC64LE-NEXT: # %bb.2: 8950; PPC64LE-NEXT: stbcx. 4, 0, 3 8951; PPC64LE-NEXT: bne 0, .LBB523_1 8952; PPC64LE-NEXT: .LBB523_3: 8953; PPC64LE-NEXT: mr 3, 5 8954; PPC64LE-NEXT: lwsync 8955; PPC64LE-NEXT: blr 8956 %ret = atomicrmw umax i8* %ptr, i8 %val syncscope("singlethread") acq_rel 8957 ret i8 %ret 8958} 8959 8960define i8 @test524(i8* %ptr, i8 %val) { 8961; PPC64LE-LABEL: test524: 8962; PPC64LE: # %bb.0: 8963; PPC64LE-NEXT: sync 8964; PPC64LE-NEXT: .LBB524_1: 8965; PPC64LE-NEXT: lbarx 5, 0, 3 8966; PPC64LE-NEXT: cmplw 4, 5 8967; PPC64LE-NEXT: ble 0, .LBB524_3 8968; PPC64LE-NEXT: # %bb.2: 8969; PPC64LE-NEXT: stbcx. 4, 0, 3 8970; PPC64LE-NEXT: bne 0, .LBB524_1 8971; PPC64LE-NEXT: .LBB524_3: 8972; PPC64LE-NEXT: mr 3, 5 8973; PPC64LE-NEXT: lwsync 8974; PPC64LE-NEXT: blr 8975 %ret = atomicrmw umax i8* %ptr, i8 %val syncscope("singlethread") seq_cst 8976 ret i8 %ret 8977} 8978 8979define i16 @test525(i16* %ptr, i16 %val) { 8980; PPC64LE-LABEL: test525: 8981; PPC64LE: # %bb.0: 8982; PPC64LE-NEXT: .LBB525_1: 8983; PPC64LE-NEXT: lharx 5, 0, 3 8984; PPC64LE-NEXT: cmplw 4, 5 8985; PPC64LE-NEXT: ble 0, .LBB525_3 8986; PPC64LE-NEXT: # %bb.2: 8987; PPC64LE-NEXT: sthcx. 4, 0, 3 8988; PPC64LE-NEXT: bne 0, .LBB525_1 8989; PPC64LE-NEXT: .LBB525_3: 8990; PPC64LE-NEXT: mr 3, 5 8991; PPC64LE-NEXT: blr 8992 %ret = atomicrmw umax i16* %ptr, i16 %val syncscope("singlethread") monotonic 8993 ret i16 %ret 8994} 8995 8996define i16 @test526(i16* %ptr, i16 %val) { 8997; PPC64LE-LABEL: test526: 8998; PPC64LE: # %bb.0: 8999; PPC64LE-NEXT: mr 5, 3 9000; PPC64LE-NEXT: .LBB526_1: 9001; PPC64LE-NEXT: lharx 3, 0, 5 9002; PPC64LE-NEXT: cmplw 4, 3 9003; PPC64LE-NEXT: ble 0, .LBB526_3 9004; PPC64LE-NEXT: # %bb.2: 9005; PPC64LE-NEXT: sthcx. 4, 0, 5 9006; PPC64LE-NEXT: bne 0, .LBB526_1 9007; PPC64LE-NEXT: .LBB526_3: 9008; PPC64LE-NEXT: lwsync 9009; PPC64LE-NEXT: blr 9010 %ret = atomicrmw umax i16* %ptr, i16 %val syncscope("singlethread") acquire 9011 ret i16 %ret 9012} 9013 9014define i16 @test527(i16* %ptr, i16 %val) { 9015; PPC64LE-LABEL: test527: 9016; PPC64LE: # %bb.0: 9017; PPC64LE-NEXT: lwsync 9018; PPC64LE-NEXT: .LBB527_1: 9019; PPC64LE-NEXT: lharx 5, 0, 3 9020; PPC64LE-NEXT: cmplw 4, 5 9021; PPC64LE-NEXT: ble 0, .LBB527_3 9022; PPC64LE-NEXT: # %bb.2: 9023; PPC64LE-NEXT: sthcx. 4, 0, 3 9024; PPC64LE-NEXT: bne 0, .LBB527_1 9025; PPC64LE-NEXT: .LBB527_3: 9026; PPC64LE-NEXT: mr 3, 5 9027; PPC64LE-NEXT: blr 9028 %ret = atomicrmw umax i16* %ptr, i16 %val syncscope("singlethread") release 9029 ret i16 %ret 9030} 9031 9032define i16 @test528(i16* %ptr, i16 %val) { 9033; PPC64LE-LABEL: test528: 9034; PPC64LE: # %bb.0: 9035; PPC64LE-NEXT: lwsync 9036; PPC64LE-NEXT: .LBB528_1: 9037; PPC64LE-NEXT: lharx 5, 0, 3 9038; PPC64LE-NEXT: cmplw 4, 5 9039; PPC64LE-NEXT: ble 0, .LBB528_3 9040; PPC64LE-NEXT: # %bb.2: 9041; PPC64LE-NEXT: sthcx. 4, 0, 3 9042; PPC64LE-NEXT: bne 0, .LBB528_1 9043; PPC64LE-NEXT: .LBB528_3: 9044; PPC64LE-NEXT: mr 3, 5 9045; PPC64LE-NEXT: lwsync 9046; PPC64LE-NEXT: blr 9047 %ret = atomicrmw umax i16* %ptr, i16 %val syncscope("singlethread") acq_rel 9048 ret i16 %ret 9049} 9050 9051define i16 @test529(i16* %ptr, i16 %val) { 9052; PPC64LE-LABEL: test529: 9053; PPC64LE: # %bb.0: 9054; PPC64LE-NEXT: sync 9055; PPC64LE-NEXT: .LBB529_1: 9056; PPC64LE-NEXT: lharx 5, 0, 3 9057; PPC64LE-NEXT: cmplw 4, 5 9058; PPC64LE-NEXT: ble 0, .LBB529_3 9059; PPC64LE-NEXT: # %bb.2: 9060; PPC64LE-NEXT: sthcx. 4, 0, 3 9061; PPC64LE-NEXT: bne 0, .LBB529_1 9062; PPC64LE-NEXT: .LBB529_3: 9063; PPC64LE-NEXT: mr 3, 5 9064; PPC64LE-NEXT: lwsync 9065; PPC64LE-NEXT: blr 9066 %ret = atomicrmw umax i16* %ptr, i16 %val syncscope("singlethread") seq_cst 9067 ret i16 %ret 9068} 9069 9070define i32 @test530(i32* %ptr, i32 %val) { 9071; PPC64LE-LABEL: test530: 9072; PPC64LE: # %bb.0: 9073; PPC64LE-NEXT: .LBB530_1: 9074; PPC64LE-NEXT: lwarx 5, 0, 3 9075; PPC64LE-NEXT: cmplw 4, 5 9076; PPC64LE-NEXT: ble 0, .LBB530_3 9077; PPC64LE-NEXT: # %bb.2: 9078; PPC64LE-NEXT: stwcx. 4, 0, 3 9079; PPC64LE-NEXT: bne 0, .LBB530_1 9080; PPC64LE-NEXT: .LBB530_3: 9081; PPC64LE-NEXT: mr 3, 5 9082; PPC64LE-NEXT: blr 9083 %ret = atomicrmw umax i32* %ptr, i32 %val syncscope("singlethread") monotonic 9084 ret i32 %ret 9085} 9086 9087define i32 @test531(i32* %ptr, i32 %val) { 9088; PPC64LE-LABEL: test531: 9089; PPC64LE: # %bb.0: 9090; PPC64LE-NEXT: mr 5, 3 9091; PPC64LE-NEXT: .LBB531_1: 9092; PPC64LE-NEXT: lwarx 3, 0, 5 9093; PPC64LE-NEXT: cmplw 4, 3 9094; PPC64LE-NEXT: ble 0, .LBB531_3 9095; PPC64LE-NEXT: # %bb.2: 9096; PPC64LE-NEXT: stwcx. 4, 0, 5 9097; PPC64LE-NEXT: bne 0, .LBB531_1 9098; PPC64LE-NEXT: .LBB531_3: 9099; PPC64LE-NEXT: lwsync 9100; PPC64LE-NEXT: blr 9101 %ret = atomicrmw umax i32* %ptr, i32 %val syncscope("singlethread") acquire 9102 ret i32 %ret 9103} 9104 9105define i32 @test532(i32* %ptr, i32 %val) { 9106; PPC64LE-LABEL: test532: 9107; PPC64LE: # %bb.0: 9108; PPC64LE-NEXT: lwsync 9109; PPC64LE-NEXT: .LBB532_1: 9110; PPC64LE-NEXT: lwarx 5, 0, 3 9111; PPC64LE-NEXT: cmplw 4, 5 9112; PPC64LE-NEXT: ble 0, .LBB532_3 9113; PPC64LE-NEXT: # %bb.2: 9114; PPC64LE-NEXT: stwcx. 4, 0, 3 9115; PPC64LE-NEXT: bne 0, .LBB532_1 9116; PPC64LE-NEXT: .LBB532_3: 9117; PPC64LE-NEXT: mr 3, 5 9118; PPC64LE-NEXT: blr 9119 %ret = atomicrmw umax i32* %ptr, i32 %val syncscope("singlethread") release 9120 ret i32 %ret 9121} 9122 9123define i32 @test533(i32* %ptr, i32 %val) { 9124; PPC64LE-LABEL: test533: 9125; PPC64LE: # %bb.0: 9126; PPC64LE-NEXT: lwsync 9127; PPC64LE-NEXT: .LBB533_1: 9128; PPC64LE-NEXT: lwarx 5, 0, 3 9129; PPC64LE-NEXT: cmplw 4, 5 9130; PPC64LE-NEXT: ble 0, .LBB533_3 9131; PPC64LE-NEXT: # %bb.2: 9132; PPC64LE-NEXT: stwcx. 4, 0, 3 9133; PPC64LE-NEXT: bne 0, .LBB533_1 9134; PPC64LE-NEXT: .LBB533_3: 9135; PPC64LE-NEXT: mr 3, 5 9136; PPC64LE-NEXT: lwsync 9137; PPC64LE-NEXT: blr 9138 %ret = atomicrmw umax i32* %ptr, i32 %val syncscope("singlethread") acq_rel 9139 ret i32 %ret 9140} 9141 9142define i32 @test534(i32* %ptr, i32 %val) { 9143; PPC64LE-LABEL: test534: 9144; PPC64LE: # %bb.0: 9145; PPC64LE-NEXT: sync 9146; PPC64LE-NEXT: .LBB534_1: 9147; PPC64LE-NEXT: lwarx 5, 0, 3 9148; PPC64LE-NEXT: cmplw 4, 5 9149; PPC64LE-NEXT: ble 0, .LBB534_3 9150; PPC64LE-NEXT: # %bb.2: 9151; PPC64LE-NEXT: stwcx. 4, 0, 3 9152; PPC64LE-NEXT: bne 0, .LBB534_1 9153; PPC64LE-NEXT: .LBB534_3: 9154; PPC64LE-NEXT: mr 3, 5 9155; PPC64LE-NEXT: lwsync 9156; PPC64LE-NEXT: blr 9157 %ret = atomicrmw umax i32* %ptr, i32 %val syncscope("singlethread") seq_cst 9158 ret i32 %ret 9159} 9160 9161define i64 @test535(i64* %ptr, i64 %val) { 9162; PPC64LE-LABEL: test535: 9163; PPC64LE: # %bb.0: 9164; PPC64LE-NEXT: .LBB535_1: 9165; PPC64LE-NEXT: ldarx 5, 0, 3 9166; PPC64LE-NEXT: cmpld 4, 5 9167; PPC64LE-NEXT: ble 0, .LBB535_3 9168; PPC64LE-NEXT: # %bb.2: 9169; PPC64LE-NEXT: stdcx. 4, 0, 3 9170; PPC64LE-NEXT: bne 0, .LBB535_1 9171; PPC64LE-NEXT: .LBB535_3: 9172; PPC64LE-NEXT: mr 3, 5 9173; PPC64LE-NEXT: blr 9174 %ret = atomicrmw umax i64* %ptr, i64 %val syncscope("singlethread") monotonic 9175 ret i64 %ret 9176} 9177 9178define i64 @test536(i64* %ptr, i64 %val) { 9179; PPC64LE-LABEL: test536: 9180; PPC64LE: # %bb.0: 9181; PPC64LE-NEXT: mr 5, 3 9182; PPC64LE-NEXT: .LBB536_1: 9183; PPC64LE-NEXT: ldarx 3, 0, 5 9184; PPC64LE-NEXT: cmpld 4, 3 9185; PPC64LE-NEXT: ble 0, .LBB536_3 9186; PPC64LE-NEXT: # %bb.2: 9187; PPC64LE-NEXT: stdcx. 4, 0, 5 9188; PPC64LE-NEXT: bne 0, .LBB536_1 9189; PPC64LE-NEXT: .LBB536_3: 9190; PPC64LE-NEXT: lwsync 9191; PPC64LE-NEXT: blr 9192 %ret = atomicrmw umax i64* %ptr, i64 %val syncscope("singlethread") acquire 9193 ret i64 %ret 9194} 9195 9196define i64 @test537(i64* %ptr, i64 %val) { 9197; PPC64LE-LABEL: test537: 9198; PPC64LE: # %bb.0: 9199; PPC64LE-NEXT: lwsync 9200; PPC64LE-NEXT: .LBB537_1: 9201; PPC64LE-NEXT: ldarx 5, 0, 3 9202; PPC64LE-NEXT: cmpld 4, 5 9203; PPC64LE-NEXT: ble 0, .LBB537_3 9204; PPC64LE-NEXT: # %bb.2: 9205; PPC64LE-NEXT: stdcx. 4, 0, 3 9206; PPC64LE-NEXT: bne 0, .LBB537_1 9207; PPC64LE-NEXT: .LBB537_3: 9208; PPC64LE-NEXT: mr 3, 5 9209; PPC64LE-NEXT: blr 9210 %ret = atomicrmw umax i64* %ptr, i64 %val syncscope("singlethread") release 9211 ret i64 %ret 9212} 9213 9214define i64 @test538(i64* %ptr, i64 %val) { 9215; PPC64LE-LABEL: test538: 9216; PPC64LE: # %bb.0: 9217; PPC64LE-NEXT: lwsync 9218; PPC64LE-NEXT: .LBB538_1: 9219; PPC64LE-NEXT: ldarx 5, 0, 3 9220; PPC64LE-NEXT: cmpld 4, 5 9221; PPC64LE-NEXT: ble 0, .LBB538_3 9222; PPC64LE-NEXT: # %bb.2: 9223; PPC64LE-NEXT: stdcx. 4, 0, 3 9224; PPC64LE-NEXT: bne 0, .LBB538_1 9225; PPC64LE-NEXT: .LBB538_3: 9226; PPC64LE-NEXT: mr 3, 5 9227; PPC64LE-NEXT: lwsync 9228; PPC64LE-NEXT: blr 9229 %ret = atomicrmw umax i64* %ptr, i64 %val syncscope("singlethread") acq_rel 9230 ret i64 %ret 9231} 9232 9233define i64 @test539(i64* %ptr, i64 %val) { 9234; PPC64LE-LABEL: test539: 9235; PPC64LE: # %bb.0: 9236; PPC64LE-NEXT: sync 9237; PPC64LE-NEXT: .LBB539_1: 9238; PPC64LE-NEXT: ldarx 5, 0, 3 9239; PPC64LE-NEXT: cmpld 4, 5 9240; PPC64LE-NEXT: ble 0, .LBB539_3 9241; PPC64LE-NEXT: # %bb.2: 9242; PPC64LE-NEXT: stdcx. 4, 0, 3 9243; PPC64LE-NEXT: bne 0, .LBB539_1 9244; PPC64LE-NEXT: .LBB539_3: 9245; PPC64LE-NEXT: mr 3, 5 9246; PPC64LE-NEXT: lwsync 9247; PPC64LE-NEXT: blr 9248 %ret = atomicrmw umax i64* %ptr, i64 %val syncscope("singlethread") seq_cst 9249 ret i64 %ret 9250} 9251 9252define i8 @test540(i8* %ptr, i8 %val) { 9253; PPC64LE-LABEL: test540: 9254; PPC64LE: # %bb.0: 9255; PPC64LE-NEXT: .LBB540_1: 9256; PPC64LE-NEXT: lbarx 5, 0, 3 9257; PPC64LE-NEXT: cmplw 4, 5 9258; PPC64LE-NEXT: bge 0, .LBB540_3 9259; PPC64LE-NEXT: # %bb.2: 9260; PPC64LE-NEXT: stbcx. 4, 0, 3 9261; PPC64LE-NEXT: bne 0, .LBB540_1 9262; PPC64LE-NEXT: .LBB540_3: 9263; PPC64LE-NEXT: mr 3, 5 9264; PPC64LE-NEXT: blr 9265 %ret = atomicrmw umin i8* %ptr, i8 %val syncscope("singlethread") monotonic 9266 ret i8 %ret 9267} 9268 9269define i8 @test541(i8* %ptr, i8 %val) { 9270; PPC64LE-LABEL: test541: 9271; PPC64LE: # %bb.0: 9272; PPC64LE-NEXT: mr 5, 3 9273; PPC64LE-NEXT: .LBB541_1: 9274; PPC64LE-NEXT: lbarx 3, 0, 5 9275; PPC64LE-NEXT: cmplw 4, 3 9276; PPC64LE-NEXT: bge 0, .LBB541_3 9277; PPC64LE-NEXT: # %bb.2: 9278; PPC64LE-NEXT: stbcx. 4, 0, 5 9279; PPC64LE-NEXT: bne 0, .LBB541_1 9280; PPC64LE-NEXT: .LBB541_3: 9281; PPC64LE-NEXT: lwsync 9282; PPC64LE-NEXT: blr 9283 %ret = atomicrmw umin i8* %ptr, i8 %val syncscope("singlethread") acquire 9284 ret i8 %ret 9285} 9286 9287define i8 @test542(i8* %ptr, i8 %val) { 9288; PPC64LE-LABEL: test542: 9289; PPC64LE: # %bb.0: 9290; PPC64LE-NEXT: lwsync 9291; PPC64LE-NEXT: .LBB542_1: 9292; PPC64LE-NEXT: lbarx 5, 0, 3 9293; PPC64LE-NEXT: cmplw 4, 5 9294; PPC64LE-NEXT: bge 0, .LBB542_3 9295; PPC64LE-NEXT: # %bb.2: 9296; PPC64LE-NEXT: stbcx. 4, 0, 3 9297; PPC64LE-NEXT: bne 0, .LBB542_1 9298; PPC64LE-NEXT: .LBB542_3: 9299; PPC64LE-NEXT: mr 3, 5 9300; PPC64LE-NEXT: blr 9301 %ret = atomicrmw umin i8* %ptr, i8 %val syncscope("singlethread") release 9302 ret i8 %ret 9303} 9304 9305define i8 @test543(i8* %ptr, i8 %val) { 9306; PPC64LE-LABEL: test543: 9307; PPC64LE: # %bb.0: 9308; PPC64LE-NEXT: lwsync 9309; PPC64LE-NEXT: .LBB543_1: 9310; PPC64LE-NEXT: lbarx 5, 0, 3 9311; PPC64LE-NEXT: cmplw 4, 5 9312; PPC64LE-NEXT: bge 0, .LBB543_3 9313; PPC64LE-NEXT: # %bb.2: 9314; PPC64LE-NEXT: stbcx. 4, 0, 3 9315; PPC64LE-NEXT: bne 0, .LBB543_1 9316; PPC64LE-NEXT: .LBB543_3: 9317; PPC64LE-NEXT: mr 3, 5 9318; PPC64LE-NEXT: lwsync 9319; PPC64LE-NEXT: blr 9320 %ret = atomicrmw umin i8* %ptr, i8 %val syncscope("singlethread") acq_rel 9321 ret i8 %ret 9322} 9323 9324define i8 @test544(i8* %ptr, i8 %val) { 9325; PPC64LE-LABEL: test544: 9326; PPC64LE: # %bb.0: 9327; PPC64LE-NEXT: sync 9328; PPC64LE-NEXT: .LBB544_1: 9329; PPC64LE-NEXT: lbarx 5, 0, 3 9330; PPC64LE-NEXT: cmplw 4, 5 9331; PPC64LE-NEXT: bge 0, .LBB544_3 9332; PPC64LE-NEXT: # %bb.2: 9333; PPC64LE-NEXT: stbcx. 4, 0, 3 9334; PPC64LE-NEXT: bne 0, .LBB544_1 9335; PPC64LE-NEXT: .LBB544_3: 9336; PPC64LE-NEXT: mr 3, 5 9337; PPC64LE-NEXT: lwsync 9338; PPC64LE-NEXT: blr 9339 %ret = atomicrmw umin i8* %ptr, i8 %val syncscope("singlethread") seq_cst 9340 ret i8 %ret 9341} 9342 9343define i16 @test545(i16* %ptr, i16 %val) { 9344; PPC64LE-LABEL: test545: 9345; PPC64LE: # %bb.0: 9346; PPC64LE-NEXT: .LBB545_1: 9347; PPC64LE-NEXT: lharx 5, 0, 3 9348; PPC64LE-NEXT: cmplw 4, 5 9349; PPC64LE-NEXT: bge 0, .LBB545_3 9350; PPC64LE-NEXT: # %bb.2: 9351; PPC64LE-NEXT: sthcx. 4, 0, 3 9352; PPC64LE-NEXT: bne 0, .LBB545_1 9353; PPC64LE-NEXT: .LBB545_3: 9354; PPC64LE-NEXT: mr 3, 5 9355; PPC64LE-NEXT: blr 9356 %ret = atomicrmw umin i16* %ptr, i16 %val syncscope("singlethread") monotonic 9357 ret i16 %ret 9358} 9359 9360define i16 @test546(i16* %ptr, i16 %val) { 9361; PPC64LE-LABEL: test546: 9362; PPC64LE: # %bb.0: 9363; PPC64LE-NEXT: mr 5, 3 9364; PPC64LE-NEXT: .LBB546_1: 9365; PPC64LE-NEXT: lharx 3, 0, 5 9366; PPC64LE-NEXT: cmplw 4, 3 9367; PPC64LE-NEXT: bge 0, .LBB546_3 9368; PPC64LE-NEXT: # %bb.2: 9369; PPC64LE-NEXT: sthcx. 4, 0, 5 9370; PPC64LE-NEXT: bne 0, .LBB546_1 9371; PPC64LE-NEXT: .LBB546_3: 9372; PPC64LE-NEXT: lwsync 9373; PPC64LE-NEXT: blr 9374 %ret = atomicrmw umin i16* %ptr, i16 %val syncscope("singlethread") acquire 9375 ret i16 %ret 9376} 9377 9378define i16 @test547(i16* %ptr, i16 %val) { 9379; PPC64LE-LABEL: test547: 9380; PPC64LE: # %bb.0: 9381; PPC64LE-NEXT: lwsync 9382; PPC64LE-NEXT: .LBB547_1: 9383; PPC64LE-NEXT: lharx 5, 0, 3 9384; PPC64LE-NEXT: cmplw 4, 5 9385; PPC64LE-NEXT: bge 0, .LBB547_3 9386; PPC64LE-NEXT: # %bb.2: 9387; PPC64LE-NEXT: sthcx. 4, 0, 3 9388; PPC64LE-NEXT: bne 0, .LBB547_1 9389; PPC64LE-NEXT: .LBB547_3: 9390; PPC64LE-NEXT: mr 3, 5 9391; PPC64LE-NEXT: blr 9392 %ret = atomicrmw umin i16* %ptr, i16 %val syncscope("singlethread") release 9393 ret i16 %ret 9394} 9395 9396define i16 @test548(i16* %ptr, i16 %val) { 9397; PPC64LE-LABEL: test548: 9398; PPC64LE: # %bb.0: 9399; PPC64LE-NEXT: lwsync 9400; PPC64LE-NEXT: .LBB548_1: 9401; PPC64LE-NEXT: lharx 5, 0, 3 9402; PPC64LE-NEXT: cmplw 4, 5 9403; PPC64LE-NEXT: bge 0, .LBB548_3 9404; PPC64LE-NEXT: # %bb.2: 9405; PPC64LE-NEXT: sthcx. 4, 0, 3 9406; PPC64LE-NEXT: bne 0, .LBB548_1 9407; PPC64LE-NEXT: .LBB548_3: 9408; PPC64LE-NEXT: mr 3, 5 9409; PPC64LE-NEXT: lwsync 9410; PPC64LE-NEXT: blr 9411 %ret = atomicrmw umin i16* %ptr, i16 %val syncscope("singlethread") acq_rel 9412 ret i16 %ret 9413} 9414 9415define i16 @test549(i16* %ptr, i16 %val) { 9416; PPC64LE-LABEL: test549: 9417; PPC64LE: # %bb.0: 9418; PPC64LE-NEXT: sync 9419; PPC64LE-NEXT: .LBB549_1: 9420; PPC64LE-NEXT: lharx 5, 0, 3 9421; PPC64LE-NEXT: cmplw 4, 5 9422; PPC64LE-NEXT: bge 0, .LBB549_3 9423; PPC64LE-NEXT: # %bb.2: 9424; PPC64LE-NEXT: sthcx. 4, 0, 3 9425; PPC64LE-NEXT: bne 0, .LBB549_1 9426; PPC64LE-NEXT: .LBB549_3: 9427; PPC64LE-NEXT: mr 3, 5 9428; PPC64LE-NEXT: lwsync 9429; PPC64LE-NEXT: blr 9430 %ret = atomicrmw umin i16* %ptr, i16 %val syncscope("singlethread") seq_cst 9431 ret i16 %ret 9432} 9433 9434define i32 @test550(i32* %ptr, i32 %val) { 9435; PPC64LE-LABEL: test550: 9436; PPC64LE: # %bb.0: 9437; PPC64LE-NEXT: .LBB550_1: 9438; PPC64LE-NEXT: lwarx 5, 0, 3 9439; PPC64LE-NEXT: cmplw 4, 5 9440; PPC64LE-NEXT: bge 0, .LBB550_3 9441; PPC64LE-NEXT: # %bb.2: 9442; PPC64LE-NEXT: stwcx. 4, 0, 3 9443; PPC64LE-NEXT: bne 0, .LBB550_1 9444; PPC64LE-NEXT: .LBB550_3: 9445; PPC64LE-NEXT: mr 3, 5 9446; PPC64LE-NEXT: blr 9447 %ret = atomicrmw umin i32* %ptr, i32 %val syncscope("singlethread") monotonic 9448 ret i32 %ret 9449} 9450 9451define i32 @test551(i32* %ptr, i32 %val) { 9452; PPC64LE-LABEL: test551: 9453; PPC64LE: # %bb.0: 9454; PPC64LE-NEXT: mr 5, 3 9455; PPC64LE-NEXT: .LBB551_1: 9456; PPC64LE-NEXT: lwarx 3, 0, 5 9457; PPC64LE-NEXT: cmplw 4, 3 9458; PPC64LE-NEXT: bge 0, .LBB551_3 9459; PPC64LE-NEXT: # %bb.2: 9460; PPC64LE-NEXT: stwcx. 4, 0, 5 9461; PPC64LE-NEXT: bne 0, .LBB551_1 9462; PPC64LE-NEXT: .LBB551_3: 9463; PPC64LE-NEXT: lwsync 9464; PPC64LE-NEXT: blr 9465 %ret = atomicrmw umin i32* %ptr, i32 %val syncscope("singlethread") acquire 9466 ret i32 %ret 9467} 9468 9469define i32 @test552(i32* %ptr, i32 %val) { 9470; PPC64LE-LABEL: test552: 9471; PPC64LE: # %bb.0: 9472; PPC64LE-NEXT: lwsync 9473; PPC64LE-NEXT: .LBB552_1: 9474; PPC64LE-NEXT: lwarx 5, 0, 3 9475; PPC64LE-NEXT: cmplw 4, 5 9476; PPC64LE-NEXT: bge 0, .LBB552_3 9477; PPC64LE-NEXT: # %bb.2: 9478; PPC64LE-NEXT: stwcx. 4, 0, 3 9479; PPC64LE-NEXT: bne 0, .LBB552_1 9480; PPC64LE-NEXT: .LBB552_3: 9481; PPC64LE-NEXT: mr 3, 5 9482; PPC64LE-NEXT: blr 9483 %ret = atomicrmw umin i32* %ptr, i32 %val syncscope("singlethread") release 9484 ret i32 %ret 9485} 9486 9487define i32 @test553(i32* %ptr, i32 %val) { 9488; PPC64LE-LABEL: test553: 9489; PPC64LE: # %bb.0: 9490; PPC64LE-NEXT: lwsync 9491; PPC64LE-NEXT: .LBB553_1: 9492; PPC64LE-NEXT: lwarx 5, 0, 3 9493; PPC64LE-NEXT: cmplw 4, 5 9494; PPC64LE-NEXT: bge 0, .LBB553_3 9495; PPC64LE-NEXT: # %bb.2: 9496; PPC64LE-NEXT: stwcx. 4, 0, 3 9497; PPC64LE-NEXT: bne 0, .LBB553_1 9498; PPC64LE-NEXT: .LBB553_3: 9499; PPC64LE-NEXT: mr 3, 5 9500; PPC64LE-NEXT: lwsync 9501; PPC64LE-NEXT: blr 9502 %ret = atomicrmw umin i32* %ptr, i32 %val syncscope("singlethread") acq_rel 9503 ret i32 %ret 9504} 9505 9506define i32 @test554(i32* %ptr, i32 %val) { 9507; PPC64LE-LABEL: test554: 9508; PPC64LE: # %bb.0: 9509; PPC64LE-NEXT: sync 9510; PPC64LE-NEXT: .LBB554_1: 9511; PPC64LE-NEXT: lwarx 5, 0, 3 9512; PPC64LE-NEXT: cmplw 4, 5 9513; PPC64LE-NEXT: bge 0, .LBB554_3 9514; PPC64LE-NEXT: # %bb.2: 9515; PPC64LE-NEXT: stwcx. 4, 0, 3 9516; PPC64LE-NEXT: bne 0, .LBB554_1 9517; PPC64LE-NEXT: .LBB554_3: 9518; PPC64LE-NEXT: mr 3, 5 9519; PPC64LE-NEXT: lwsync 9520; PPC64LE-NEXT: blr 9521 %ret = atomicrmw umin i32* %ptr, i32 %val syncscope("singlethread") seq_cst 9522 ret i32 %ret 9523} 9524 9525define i64 @test555(i64* %ptr, i64 %val) { 9526; PPC64LE-LABEL: test555: 9527; PPC64LE: # %bb.0: 9528; PPC64LE-NEXT: .LBB555_1: 9529; PPC64LE-NEXT: ldarx 5, 0, 3 9530; PPC64LE-NEXT: cmpld 4, 5 9531; PPC64LE-NEXT: bge 0, .LBB555_3 9532; PPC64LE-NEXT: # %bb.2: 9533; PPC64LE-NEXT: stdcx. 4, 0, 3 9534; PPC64LE-NEXT: bne 0, .LBB555_1 9535; PPC64LE-NEXT: .LBB555_3: 9536; PPC64LE-NEXT: mr 3, 5 9537; PPC64LE-NEXT: blr 9538 %ret = atomicrmw umin i64* %ptr, i64 %val syncscope("singlethread") monotonic 9539 ret i64 %ret 9540} 9541 9542define i64 @test556(i64* %ptr, i64 %val) { 9543; PPC64LE-LABEL: test556: 9544; PPC64LE: # %bb.0: 9545; PPC64LE-NEXT: mr 5, 3 9546; PPC64LE-NEXT: .LBB556_1: 9547; PPC64LE-NEXT: ldarx 3, 0, 5 9548; PPC64LE-NEXT: cmpld 4, 3 9549; PPC64LE-NEXT: bge 0, .LBB556_3 9550; PPC64LE-NEXT: # %bb.2: 9551; PPC64LE-NEXT: stdcx. 4, 0, 5 9552; PPC64LE-NEXT: bne 0, .LBB556_1 9553; PPC64LE-NEXT: .LBB556_3: 9554; PPC64LE-NEXT: lwsync 9555; PPC64LE-NEXT: blr 9556 %ret = atomicrmw umin i64* %ptr, i64 %val syncscope("singlethread") acquire 9557 ret i64 %ret 9558} 9559 9560define i64 @test557(i64* %ptr, i64 %val) { 9561; PPC64LE-LABEL: test557: 9562; PPC64LE: # %bb.0: 9563; PPC64LE-NEXT: lwsync 9564; PPC64LE-NEXT: .LBB557_1: 9565; PPC64LE-NEXT: ldarx 5, 0, 3 9566; PPC64LE-NEXT: cmpld 4, 5 9567; PPC64LE-NEXT: bge 0, .LBB557_3 9568; PPC64LE-NEXT: # %bb.2: 9569; PPC64LE-NEXT: stdcx. 4, 0, 3 9570; PPC64LE-NEXT: bne 0, .LBB557_1 9571; PPC64LE-NEXT: .LBB557_3: 9572; PPC64LE-NEXT: mr 3, 5 9573; PPC64LE-NEXT: blr 9574 %ret = atomicrmw umin i64* %ptr, i64 %val syncscope("singlethread") release 9575 ret i64 %ret 9576} 9577 9578define i64 @test558(i64* %ptr, i64 %val) { 9579; PPC64LE-LABEL: test558: 9580; PPC64LE: # %bb.0: 9581; PPC64LE-NEXT: lwsync 9582; PPC64LE-NEXT: .LBB558_1: 9583; PPC64LE-NEXT: ldarx 5, 0, 3 9584; PPC64LE-NEXT: cmpld 4, 5 9585; PPC64LE-NEXT: bge 0, .LBB558_3 9586; PPC64LE-NEXT: # %bb.2: 9587; PPC64LE-NEXT: stdcx. 4, 0, 3 9588; PPC64LE-NEXT: bne 0, .LBB558_1 9589; PPC64LE-NEXT: .LBB558_3: 9590; PPC64LE-NEXT: mr 3, 5 9591; PPC64LE-NEXT: lwsync 9592; PPC64LE-NEXT: blr 9593 %ret = atomicrmw umin i64* %ptr, i64 %val syncscope("singlethread") acq_rel 9594 ret i64 %ret 9595} 9596 9597define i64 @test559(i64* %ptr, i64 %val) { 9598; PPC64LE-LABEL: test559: 9599; PPC64LE: # %bb.0: 9600; PPC64LE-NEXT: sync 9601; PPC64LE-NEXT: .LBB559_1: 9602; PPC64LE-NEXT: ldarx 5, 0, 3 9603; PPC64LE-NEXT: cmpld 4, 5 9604; PPC64LE-NEXT: bge 0, .LBB559_3 9605; PPC64LE-NEXT: # %bb.2: 9606; PPC64LE-NEXT: stdcx. 4, 0, 3 9607; PPC64LE-NEXT: bne 0, .LBB559_1 9608; PPC64LE-NEXT: .LBB559_3: 9609; PPC64LE-NEXT: mr 3, 5 9610; PPC64LE-NEXT: lwsync 9611; PPC64LE-NEXT: blr 9612 %ret = atomicrmw umin i64* %ptr, i64 %val syncscope("singlethread") seq_cst 9613 ret i64 %ret 9614} 9615 9616; The second load should never be scheduled before isync. 9617define i32 @test_ordering0(i32* %ptr1, i32* %ptr2) { 9618; PPC64LE-LABEL: test_ordering0: 9619; PPC64LE: # %bb.0: 9620; PPC64LE-NEXT: lwz 4, 0(3) 9621; PPC64LE-NEXT: cmpd 7, 4, 4 9622; PPC64LE-NEXT: bne- 7, .+4 9623; PPC64LE-NEXT: isync 9624; PPC64LE-NEXT: lwz 3, 0(3) 9625; PPC64LE-NEXT: add 3, 4, 3 9626; PPC64LE-NEXT: blr 9627 %val1 = load atomic i32, i32* %ptr1 acquire, align 4 9628 %val2 = load i32, i32* %ptr1 9629 %add = add i32 %val1, %val2 9630 ret i32 %add 9631} 9632 9633; The second store should never be scheduled before isync. 9634define i32 @test_ordering1(i32* %ptr1, i32 %val1, i32* %ptr2) { 9635; PPC64LE-LABEL: test_ordering1: 9636; PPC64LE: # %bb.0: 9637; PPC64LE-NEXT: lwz 3, 0(3) 9638; PPC64LE-NEXT: cmpd 7, 3, 3 9639; PPC64LE-NEXT: bne- 7, .+4 9640; PPC64LE-NEXT: isync 9641; PPC64LE-NEXT: stw 4, 0(5) 9642; PPC64LE-NEXT: blr 9643 %val2 = load atomic i32, i32* %ptr1 acquire, align 4 9644 store i32 %val1, i32* %ptr2 9645 ret i32 %val2 9646} 9647