1; RUN: llc < %s -mtriple=thumbv7-none-eabi   -mcpu=cortex-m3                    | FileCheck %s -check-prefix=CHECK -check-prefix=SOFT -check-prefix=NONE
2; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m4                    | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=SP -check-prefix=NO-VMLA
3; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m33                   | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=SP -check-prefix=NO-VMLA
4; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m7                    | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=VFP  -check-prefix=FP-ARMv8  -check-prefix=VMLA
5; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m7 -mattr=-fp64 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=SP -check-prefix=FP-ARMv8 -check-prefix=VMLA
6; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-a7                    | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=NEON-A7 -check-prefix=VFP4 -check-prefix=NO-VMLA
7; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-a57                   | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=NEON-A57 -check-prefix=FP-ARMv8 -check-prefix=VMLA
8
9declare float     @llvm.sqrt.f32(float %Val)
10define float @sqrt_f(float %a) {
11; CHECK-LABEL: sqrt_f:
12; SOFT: bl sqrtf
13; HARD: vsqrt.f32 s0, s0
14  %1 = call float @llvm.sqrt.f32(float %a)
15  ret float %1
16}
17
18declare float     @llvm.powi.f32.i32(float %Val, i32 %power)
19define float @powi_f(float %a, i32 %b) {
20; CHECK-LABEL: powi_f:
21; SOFT: bl __powisf2
22; HARD: b __powisf2
23  %1 = call float @llvm.powi.f32.i32(float %a, i32 %b)
24  ret float %1
25}
26
27declare float     @llvm.sin.f32(float %Val)
28define float @sin_f(float %a) {
29; CHECK-LABEL: sin_f:
30; SOFT: bl sinf
31; HARD: b sinf
32  %1 = call float @llvm.sin.f32(float %a)
33  ret float %1
34}
35
36declare float     @llvm.cos.f32(float %Val)
37define float @cos_f(float %a) {
38; CHECK-LABEL: cos_f:
39; SOFT: bl cosf
40; HARD: b cosf
41  %1 = call float @llvm.cos.f32(float %a)
42  ret float %1
43}
44
45declare float     @llvm.pow.f32(float %Val, float %power)
46define float @pow_f(float %a, float %b) {
47; CHECK-LABEL: pow_f:
48; SOFT: bl powf
49; HARD: b powf
50  %1 = call float @llvm.pow.f32(float %a, float %b)
51  ret float %1
52}
53
54declare float     @llvm.exp.f32(float %Val)
55define float @exp_f(float %a) {
56; CHECK-LABEL: exp_f:
57; SOFT: bl expf
58; HARD: b expf
59  %1 = call float @llvm.exp.f32(float %a)
60  ret float %1
61}
62
63declare float     @llvm.exp2.f32(float %Val)
64define float @exp2_f(float %a) {
65; CHECK-LABEL: exp2_f:
66; SOFT: bl exp2f
67; HARD: b exp2f
68  %1 = call float @llvm.exp2.f32(float %a)
69  ret float %1
70}
71
72declare float     @llvm.log.f32(float %Val)
73define float @log_f(float %a) {
74; CHECK-LABEL: log_f:
75; SOFT: bl logf
76; HARD: b logf
77  %1 = call float @llvm.log.f32(float %a)
78  ret float %1
79}
80
81declare float     @llvm.log10.f32(float %Val)
82define float @log10_f(float %a) {
83; CHECK-LABEL: log10_f:
84; SOFT: bl log10f
85; HARD: b log10f
86  %1 = call float @llvm.log10.f32(float %a)
87  ret float %1
88}
89
90declare float     @llvm.log2.f32(float %Val)
91define float @log2_f(float %a) {
92; CHECK-LABEL: log2_f:
93; SOFT: bl log2f
94; HARD: b log2f
95  %1 = call float @llvm.log2.f32(float %a)
96  ret float %1
97}
98
99declare float     @llvm.fma.f32(float %a, float %b, float %c)
100define float @fma_f(float %a, float %b, float %c) {
101; CHECK-LABEL: fma_f:
102; SOFT: bl fmaf
103; HARD: vfma.f32
104  %1 = call float @llvm.fma.f32(float %a, float %b, float %c)
105  ret float %1
106}
107
108declare float     @llvm.fabs.f32(float %Val)
109define float @abs_f(float %a) {
110; CHECK-LABEL: abs_f:
111; SOFT: bic r0, r0, #-2147483648
112; HARD: vabs.f32
113  %1 = call float @llvm.fabs.f32(float %a)
114  ret float %1
115}
116
117declare float     @llvm.copysign.f32(float  %Mag, float  %Sgn)
118define float @copysign_f(float %a, float %b) {
119; CHECK-LABEL: copysign_f:
120; NONE: lsrs [[REG:r[0-9]+]], r{{[0-9]+}}, #31
121; NONE: bfi r{{[0-9]+}}, [[REG]], #31, #1
122; SP: lsrs [[REG:r[0-9]+]], r{{[0-9]+}}, #31
123; SP: bfi r{{[0-9]+}}, [[REG]], #31, #1
124; VFP: lsrs [[REG:r[0-9]+]], r{{[0-9]+}}, #31
125; VFP: bfi r{{[0-9]+}}, [[REG]], #31, #1
126; NEON-A7:       @ %bb.0:
127; NEON-A7-NEXT:    vmov.f32 s2, s1
128; NEON-A7-NEXT:    @ kill: def $s0 killed $s0 def $d0
129; NEON-A7-NEXT:    vmov.i32 d16, #0x80000000
130; NEON-A7-NEXT:    vbit d0, d1, d16
131; NEON-A7-NEXT:    @ kill: def $s0 killed $s0 killed $d0
132; NEON-A7-NEXT:    bx lr
133; NEON-A57:       @ %bb.0:
134; NEON-A57-NEXT:    vmov.f32 s2, s1
135; NEON-A57-NEXT:    vmov.i32 d16, #0x80000000
136; NEON-A57-NEXT:    @ kill: def $s0 killed $s0 def $d0
137; NEON-A57-NEXT:    vbit d0, d1, d16
138; NEON-A57-NEXT:    @ kill: def $s0 killed $s0 killed $d0
139; NEON-A57-NEXT:    bx lr
140  %1 = call float @llvm.copysign.f32(float %a, float %b)
141  ret float %1
142}
143
144declare float     @llvm.floor.f32(float %Val)
145define float @floor_f(float %a) {
146; CHECK-LABEL: floor_f:
147; SOFT: bl floorf
148; VFP4: b floorf
149; FP-ARMv8: vrintm.f32
150  %1 = call float @llvm.floor.f32(float %a)
151  ret float %1
152}
153
154declare float     @llvm.ceil.f32(float %Val)
155define float @ceil_f(float %a) {
156; CHECK-LABEL: ceil_f:
157; SOFT: bl ceilf
158; VFP4: b ceilf
159; FP-ARMv8: vrintp.f32
160  %1 = call float @llvm.ceil.f32(float %a)
161  ret float %1
162}
163
164declare float     @llvm.trunc.f32(float %Val)
165define float @trunc_f(float %a) {
166; CHECK-LABEL: trunc_f:
167; SOFT: bl truncf
168; VFP4: b truncf
169; FP-ARMv8: vrintz.f32
170  %1 = call float @llvm.trunc.f32(float %a)
171  ret float %1
172}
173
174declare float     @llvm.rint.f32(float %Val)
175define float @rint_f(float %a) {
176; CHECK-LABEL: rint_f:
177; SOFT: bl rintf
178; VFP4: b rintf
179; FP-ARMv8: vrintx.f32
180  %1 = call float @llvm.rint.f32(float %a)
181  ret float %1
182}
183
184declare float     @llvm.nearbyint.f32(float %Val)
185define float @nearbyint_f(float %a) {
186; CHECK-LABEL: nearbyint_f:
187; SOFT: bl nearbyintf
188; VFP4: b nearbyintf
189; FP-ARMv8: vrintr.f32
190  %1 = call float @llvm.nearbyint.f32(float %a)
191  ret float %1
192}
193
194declare float     @llvm.round.f32(float %Val)
195define float @round_f(float %a) {
196; CHECK-LABEL: round_f:
197; SOFT: bl roundf
198; VFP4: b roundf
199; FP-ARMv8: vrinta.f32
200  %1 = call float @llvm.round.f32(float %a)
201  ret float %1
202}
203
204declare float     @llvm.fmuladd.f32(float %a, float %b, float %c)
205define float @fmuladd_f(float %a, float %b, float %c) {
206; CHECK-LABEL: fmuladd_f:
207; SOFT: bl __aeabi_fmul
208; SOFT: bl __aeabi_fadd
209; VMLA: vfma.f32
210; NO-VMLA: vmul.f32
211; NO-VMLA: vadd.f32
212  %1 = call float @llvm.fmuladd.f32(float %a, float %b, float %c)
213  ret float %1
214}
215
216declare i16 @llvm.convert.to.fp16.f32(float %a)
217define i16 @f_to_h(float %a) {
218; CHECK-LABEL: f_to_h:
219; SOFT: bl __aeabi_f2h
220; HARD: vcvt{{[bt]}}.f16.f32
221  %1 = call i16 @llvm.convert.to.fp16.f32(float %a)
222  ret i16 %1
223}
224
225declare float @llvm.convert.from.fp16.f32(i16 %a)
226define float @h_to_f(i16 %a) {
227; CHECK-LABEL: h_to_f:
228; SOFT: bl __aeabi_h2f
229; HARD: vcvt{{[bt]}}.f32.f16
230  %1 = call float @llvm.convert.from.fp16.f32(i16 %a)
231  ret float %1
232}
233