1// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s 2 3v_cndmask_b32 v5, v1, v2, vcc 4// CHECK: [0x01,0x05,0x0a,0x00] 5 6v_cndmask_b32 v255, v1, v2, vcc 7// CHECK: [0x01,0x05,0xfe,0x01] 8 9v_cndmask_b32 v5, v255, v2, vcc 10// CHECK: [0xff,0x05,0x0a,0x00] 11 12v_cndmask_b32 v5, 0, v2, vcc 13// CHECK: [0x80,0x04,0x0a,0x00] 14 15v_cndmask_b32 v5, -1, v2, vcc 16// CHECK: [0xc1,0x04,0x0a,0x00] 17 18v_cndmask_b32 v5, 0.5, v2, vcc 19// CHECK: [0xf0,0x04,0x0a,0x00] 20 21v_cndmask_b32 v5, -4.0, v2, vcc 22// CHECK: [0xf7,0x04,0x0a,0x00] 23 24v_cndmask_b32 v5, src_lds_direct, v2, vcc 25// CHECK: [0xfe,0x04,0x0a,0x00] 26 27v_cndmask_b32 v5, v1, v255, vcc 28// CHECK: [0x01,0xff,0x0b,0x00] 29 30v_add_f32 v5, v1, v2 31// CHECK: [0x01,0x05,0x0a,0x02] 32 33v_add_f32 v255, v1, v2 34// CHECK: [0x01,0x05,0xfe,0x03] 35 36v_add_f32 v5, v255, v2 37// CHECK: [0xff,0x05,0x0a,0x02] 38 39v_add_f32 v5, s1, v2 40// CHECK: [0x01,0x04,0x0a,0x02] 41 42v_add_f32 v5, s101, v2 43// CHECK: [0x65,0x04,0x0a,0x02] 44 45v_add_f32 v5, flat_scratch_lo, v2 46// CHECK: [0x66,0x04,0x0a,0x02] 47 48v_add_f32 v5, flat_scratch_hi, v2 49// CHECK: [0x67,0x04,0x0a,0x02] 50 51v_add_f32 v5, vcc_lo, v2 52// CHECK: [0x6a,0x04,0x0a,0x02] 53 54v_add_f32 v5, vcc_hi, v2 55// CHECK: [0x6b,0x04,0x0a,0x02] 56 57v_add_f32 v5, ttmp15, v2 58// CHECK: [0x7b,0x04,0x0a,0x02] 59 60v_add_f32 v5, m0, v2 61// CHECK: [0x7c,0x04,0x0a,0x02] 62 63v_add_f32 v5, exec_lo, v2 64// CHECK: [0x7e,0x04,0x0a,0x02] 65 66v_add_f32 v5, exec_hi, v2 67// CHECK: [0x7f,0x04,0x0a,0x02] 68 69v_add_f32 v5, 0, v2 70// CHECK: [0x80,0x04,0x0a,0x02] 71 72v_add_f32 v5, -1, v2 73// CHECK: [0xc1,0x04,0x0a,0x02] 74 75v_add_f32 v5, 0.5, v2 76// CHECK: [0xf0,0x04,0x0a,0x02] 77 78v_add_f32 v5, -4.0, v2 79// CHECK: [0xf7,0x04,0x0a,0x02] 80 81v_add_f32 v5, src_vccz, v2 82// CHECK: [0xfb,0x04,0x0a,0x02] 83 84v_add_f32 v5, src_execz, v2 85// CHECK: [0xfc,0x04,0x0a,0x02] 86 87v_add_f32 v5, src_scc, v2 88// CHECK: [0xfd,0x04,0x0a,0x02] 89 90v_add_f32 v5, src_lds_direct, v2 91// CHECK: [0xfe,0x04,0x0a,0x02] 92 93v_add_f32 v5, 0xaf123456, v2 94// CHECK: [0xff,0x04,0x0a,0x02,0x56,0x34,0x12,0xaf] 95 96v_add_f32 v5, 0x3f717273, v2 97// CHECK: [0xff,0x04,0x0a,0x02,0x73,0x72,0x71,0x3f] 98 99v_add_f32 v5, v1, v255 100// CHECK: [0x01,0xff,0x0b,0x02] 101 102v_sub_f32 v5, v1, v2 103// CHECK: [0x01,0x05,0x0a,0x04] 104 105v_sub_f32 v255, v1, v2 106// CHECK: [0x01,0x05,0xfe,0x05] 107 108v_sub_f32 v5, v255, v2 109// CHECK: [0xff,0x05,0x0a,0x04] 110 111v_sub_f32 v5, s1, v2 112// CHECK: [0x01,0x04,0x0a,0x04] 113 114v_sub_f32 v5, s101, v2 115// CHECK: [0x65,0x04,0x0a,0x04] 116 117v_sub_f32 v5, flat_scratch_lo, v2 118// CHECK: [0x66,0x04,0x0a,0x04] 119 120v_sub_f32 v5, flat_scratch_hi, v2 121// CHECK: [0x67,0x04,0x0a,0x04] 122 123v_sub_f32 v5, vcc_lo, v2 124// CHECK: [0x6a,0x04,0x0a,0x04] 125 126v_sub_f32 v5, vcc_hi, v2 127// CHECK: [0x6b,0x04,0x0a,0x04] 128 129v_sub_f32 v5, ttmp15, v2 130// CHECK: [0x7b,0x04,0x0a,0x04] 131 132v_sub_f32 v5, m0, v2 133// CHECK: [0x7c,0x04,0x0a,0x04] 134 135v_sub_f32 v5, exec_lo, v2 136// CHECK: [0x7e,0x04,0x0a,0x04] 137 138v_sub_f32 v5, exec_hi, v2 139// CHECK: [0x7f,0x04,0x0a,0x04] 140 141v_sub_f32 v5, 0, v2 142// CHECK: [0x80,0x04,0x0a,0x04] 143 144v_sub_f32 v5, -1, v2 145// CHECK: [0xc1,0x04,0x0a,0x04] 146 147v_sub_f32 v5, 0.5, v2 148// CHECK: [0xf0,0x04,0x0a,0x04] 149 150v_sub_f32 v5, -4.0, v2 151// CHECK: [0xf7,0x04,0x0a,0x04] 152 153v_sub_f32 v5, src_vccz, v2 154// CHECK: [0xfb,0x04,0x0a,0x04] 155 156v_sub_f32 v5, src_execz, v2 157// CHECK: [0xfc,0x04,0x0a,0x04] 158 159v_sub_f32 v5, src_scc, v2 160// CHECK: [0xfd,0x04,0x0a,0x04] 161 162v_sub_f32 v5, src_lds_direct, v2 163// CHECK: [0xfe,0x04,0x0a,0x04] 164 165v_sub_f32 v5, 0xaf123456, v2 166// CHECK: [0xff,0x04,0x0a,0x04,0x56,0x34,0x12,0xaf] 167 168v_sub_f32 v5, 0x3f717273, v2 169// CHECK: [0xff,0x04,0x0a,0x04,0x73,0x72,0x71,0x3f] 170 171v_sub_f32 v5, v1, v255 172// CHECK: [0x01,0xff,0x0b,0x04] 173 174v_subrev_f32 v5, v1, v2 175// CHECK: [0x01,0x05,0x0a,0x06] 176 177v_subrev_f32 v255, v1, v2 178// CHECK: [0x01,0x05,0xfe,0x07] 179 180v_subrev_f32 v5, v255, v2 181// CHECK: [0xff,0x05,0x0a,0x06] 182 183v_subrev_f32 v5, s1, v2 184// CHECK: [0x01,0x04,0x0a,0x06] 185 186v_subrev_f32 v5, s101, v2 187// CHECK: [0x65,0x04,0x0a,0x06] 188 189v_subrev_f32 v5, flat_scratch_lo, v2 190// CHECK: [0x66,0x04,0x0a,0x06] 191 192v_subrev_f32 v5, flat_scratch_hi, v2 193// CHECK: [0x67,0x04,0x0a,0x06] 194 195v_subrev_f32 v5, vcc_lo, v2 196// CHECK: [0x6a,0x04,0x0a,0x06] 197 198v_subrev_f32 v5, vcc_hi, v2 199// CHECK: [0x6b,0x04,0x0a,0x06] 200 201v_subrev_f32 v5, ttmp15, v2 202// CHECK: [0x7b,0x04,0x0a,0x06] 203 204v_subrev_f32 v5, m0, v2 205// CHECK: [0x7c,0x04,0x0a,0x06] 206 207v_subrev_f32 v5, exec_lo, v2 208// CHECK: [0x7e,0x04,0x0a,0x06] 209 210v_subrev_f32 v5, exec_hi, v2 211// CHECK: [0x7f,0x04,0x0a,0x06] 212 213v_subrev_f32 v5, 0, v2 214// CHECK: [0x80,0x04,0x0a,0x06] 215 216v_subrev_f32 v5, -1, v2 217// CHECK: [0xc1,0x04,0x0a,0x06] 218 219v_subrev_f32 v5, 0.5, v2 220// CHECK: [0xf0,0x04,0x0a,0x06] 221 222v_subrev_f32 v5, -4.0, v2 223// CHECK: [0xf7,0x04,0x0a,0x06] 224 225v_subrev_f32 v5, src_vccz, v2 226// CHECK: [0xfb,0x04,0x0a,0x06] 227 228v_subrev_f32 v5, src_execz, v2 229// CHECK: [0xfc,0x04,0x0a,0x06] 230 231v_subrev_f32 v5, src_scc, v2 232// CHECK: [0xfd,0x04,0x0a,0x06] 233 234v_subrev_f32 v5, 0xaf123456, v2 235// CHECK: [0xff,0x04,0x0a,0x06,0x56,0x34,0x12,0xaf] 236 237v_subrev_f32 v5, 0x3f717273, v2 238// CHECK: [0xff,0x04,0x0a,0x06,0x73,0x72,0x71,0x3f] 239 240v_subrev_f32 v5, v1, v255 241// CHECK: [0x01,0xff,0x0b,0x06] 242 243v_mul_legacy_f32 v5, v1, v2 244// CHECK: [0x01,0x05,0x0a,0x08] 245 246v_mul_legacy_f32 v255, v1, v2 247// CHECK: [0x01,0x05,0xfe,0x09] 248 249v_mul_legacy_f32 v5, v255, v2 250// CHECK: [0xff,0x05,0x0a,0x08] 251 252v_mul_legacy_f32 v5, s1, v2 253// CHECK: [0x01,0x04,0x0a,0x08] 254 255v_mul_legacy_f32 v5, s101, v2 256// CHECK: [0x65,0x04,0x0a,0x08] 257 258v_mul_legacy_f32 v5, flat_scratch_lo, v2 259// CHECK: [0x66,0x04,0x0a,0x08] 260 261v_mul_legacy_f32 v5, flat_scratch_hi, v2 262// CHECK: [0x67,0x04,0x0a,0x08] 263 264v_mul_legacy_f32 v5, vcc_lo, v2 265// CHECK: [0x6a,0x04,0x0a,0x08] 266 267v_mul_legacy_f32 v5, vcc_hi, v2 268// CHECK: [0x6b,0x04,0x0a,0x08] 269 270v_mul_legacy_f32 v5, ttmp15, v2 271// CHECK: [0x7b,0x04,0x0a,0x08] 272 273v_mul_legacy_f32 v5, m0, v2 274// CHECK: [0x7c,0x04,0x0a,0x08] 275 276v_mul_legacy_f32 v5, exec_lo, v2 277// CHECK: [0x7e,0x04,0x0a,0x08] 278 279v_mul_legacy_f32 v5, exec_hi, v2 280// CHECK: [0x7f,0x04,0x0a,0x08] 281 282v_mul_legacy_f32 v5, 0, v2 283// CHECK: [0x80,0x04,0x0a,0x08] 284 285v_mul_legacy_f32 v5, -1, v2 286// CHECK: [0xc1,0x04,0x0a,0x08] 287 288v_mul_legacy_f32 v5, 0.5, v2 289// CHECK: [0xf0,0x04,0x0a,0x08] 290 291v_mul_legacy_f32 v5, -4.0, v2 292// CHECK: [0xf7,0x04,0x0a,0x08] 293 294v_mul_legacy_f32 v5, src_vccz, v2 295// CHECK: [0xfb,0x04,0x0a,0x08] 296 297v_mul_legacy_f32 v5, src_execz, v2 298// CHECK: [0xfc,0x04,0x0a,0x08] 299 300v_mul_legacy_f32 v5, src_scc, v2 301// CHECK: [0xfd,0x04,0x0a,0x08] 302 303v_mul_legacy_f32 v5, src_lds_direct, v2 304// CHECK: [0xfe,0x04,0x0a,0x08] 305 306v_mul_legacy_f32 v5, 0xaf123456, v2 307// CHECK: [0xff,0x04,0x0a,0x08,0x56,0x34,0x12,0xaf] 308 309v_mul_legacy_f32 v5, 0x3f717273, v2 310// CHECK: [0xff,0x04,0x0a,0x08,0x73,0x72,0x71,0x3f] 311 312v_mul_legacy_f32 v5, v1, v255 313// CHECK: [0x01,0xff,0x0b,0x08] 314 315v_mul_f32 v5, v1, v2 316// CHECK: [0x01,0x05,0x0a,0x0a] 317 318v_mul_f32 v255, v1, v2 319// CHECK: [0x01,0x05,0xfe,0x0b] 320 321v_mul_f32 v5, v255, v2 322// CHECK: [0xff,0x05,0x0a,0x0a] 323 324v_mul_f32 v5, s1, v2 325// CHECK: [0x01,0x04,0x0a,0x0a] 326 327v_mul_f32 v5, s101, v2 328// CHECK: [0x65,0x04,0x0a,0x0a] 329 330v_mul_f32 v5, flat_scratch_lo, v2 331// CHECK: [0x66,0x04,0x0a,0x0a] 332 333v_mul_f32 v5, flat_scratch_hi, v2 334// CHECK: [0x67,0x04,0x0a,0x0a] 335 336v_mul_f32 v5, vcc_lo, v2 337// CHECK: [0x6a,0x04,0x0a,0x0a] 338 339v_mul_f32 v5, vcc_hi, v2 340// CHECK: [0x6b,0x04,0x0a,0x0a] 341 342v_mul_f32 v5, ttmp15, v2 343// CHECK: [0x7b,0x04,0x0a,0x0a] 344 345v_mul_f32 v5, m0, v2 346// CHECK: [0x7c,0x04,0x0a,0x0a] 347 348v_mul_f32 v5, exec_lo, v2 349// CHECK: [0x7e,0x04,0x0a,0x0a] 350 351v_mul_f32 v5, exec_hi, v2 352// CHECK: [0x7f,0x04,0x0a,0x0a] 353 354v_mul_f32 v5, 0, v2 355// CHECK: [0x80,0x04,0x0a,0x0a] 356 357v_mul_f32 v5, -1, v2 358// CHECK: [0xc1,0x04,0x0a,0x0a] 359 360v_mul_f32 v5, 0.5, v2 361// CHECK: [0xf0,0x04,0x0a,0x0a] 362 363v_mul_f32 v5, -4.0, v2 364// CHECK: [0xf7,0x04,0x0a,0x0a] 365 366v_mul_f32 v5, src_vccz, v2 367// CHECK: [0xfb,0x04,0x0a,0x0a] 368 369v_mul_f32 v5, src_execz, v2 370// CHECK: [0xfc,0x04,0x0a,0x0a] 371 372v_mul_f32 v5, src_scc, v2 373// CHECK: [0xfd,0x04,0x0a,0x0a] 374 375v_mul_f32 v5, src_lds_direct, v2 376// CHECK: [0xfe,0x04,0x0a,0x0a] 377 378v_mul_f32 v5, 0xaf123456, v2 379// CHECK: [0xff,0x04,0x0a,0x0a,0x56,0x34,0x12,0xaf] 380 381v_mul_f32 v5, 0x3f717273, v2 382// CHECK: [0xff,0x04,0x0a,0x0a,0x73,0x72,0x71,0x3f] 383 384v_mul_f32 v5, v1, v255 385// CHECK: [0x01,0xff,0x0b,0x0a] 386 387v_mul_i32_i24 v5, v1, v2 388// CHECK: [0x01,0x05,0x0a,0x0c] 389 390v_mul_i32_i24 v255, v1, v2 391// CHECK: [0x01,0x05,0xfe,0x0d] 392 393v_mul_i32_i24 v5, v255, v2 394// CHECK: [0xff,0x05,0x0a,0x0c] 395 396v_mul_i32_i24 v5, s1, v2 397// CHECK: [0x01,0x04,0x0a,0x0c] 398 399v_mul_i32_i24 v5, s101, v2 400// CHECK: [0x65,0x04,0x0a,0x0c] 401 402v_mul_i32_i24 v5, flat_scratch_lo, v2 403// CHECK: [0x66,0x04,0x0a,0x0c] 404 405v_mul_i32_i24 v5, flat_scratch_hi, v2 406// CHECK: [0x67,0x04,0x0a,0x0c] 407 408v_mul_i32_i24 v5, vcc_lo, v2 409// CHECK: [0x6a,0x04,0x0a,0x0c] 410 411v_mul_i32_i24 v5, vcc_hi, v2 412// CHECK: [0x6b,0x04,0x0a,0x0c] 413 414v_mul_i32_i24 v5, ttmp15, v2 415// CHECK: [0x7b,0x04,0x0a,0x0c] 416 417v_mul_i32_i24 v5, m0, v2 418// CHECK: [0x7c,0x04,0x0a,0x0c] 419 420v_mul_i32_i24 v5, exec_lo, v2 421// CHECK: [0x7e,0x04,0x0a,0x0c] 422 423v_mul_i32_i24 v5, exec_hi, v2 424// CHECK: [0x7f,0x04,0x0a,0x0c] 425 426v_mul_i32_i24 v5, 0, v2 427// CHECK: [0x80,0x04,0x0a,0x0c] 428 429v_mul_i32_i24 v5, -1, v2 430// CHECK: [0xc1,0x04,0x0a,0x0c] 431 432v_mul_i32_i24 v5, 0.5, v2 433// CHECK: [0xf0,0x04,0x0a,0x0c] 434 435v_mul_i32_i24 v5, -4.0, v2 436// CHECK: [0xf7,0x04,0x0a,0x0c] 437 438v_mul_i32_i24 v5, src_vccz, v2 439// CHECK: [0xfb,0x04,0x0a,0x0c] 440 441v_mul_i32_i24 v5, src_execz, v2 442// CHECK: [0xfc,0x04,0x0a,0x0c] 443 444v_mul_i32_i24 v5, src_scc, v2 445// CHECK: [0xfd,0x04,0x0a,0x0c] 446 447v_mul_i32_i24 v5, src_lds_direct, v2 448// CHECK: [0xfe,0x04,0x0a,0x0c] 449 450v_mul_i32_i24 v5, 0xaf123456, v2 451// CHECK: [0xff,0x04,0x0a,0x0c,0x56,0x34,0x12,0xaf] 452 453v_mul_i32_i24 v5, 0x3f717273, v2 454// CHECK: [0xff,0x04,0x0a,0x0c,0x73,0x72,0x71,0x3f] 455 456v_mul_i32_i24 v5, v1, v255 457// CHECK: [0x01,0xff,0x0b,0x0c] 458 459v_mul_hi_i32_i24 v5, v1, v2 460// CHECK: [0x01,0x05,0x0a,0x0e] 461 462v_mul_hi_i32_i24 v255, v1, v2 463// CHECK: [0x01,0x05,0xfe,0x0f] 464 465v_mul_hi_i32_i24 v5, v255, v2 466// CHECK: [0xff,0x05,0x0a,0x0e] 467 468v_mul_hi_i32_i24 v5, s1, v2 469// CHECK: [0x01,0x04,0x0a,0x0e] 470 471v_mul_hi_i32_i24 v5, s101, v2 472// CHECK: [0x65,0x04,0x0a,0x0e] 473 474v_mul_hi_i32_i24 v5, flat_scratch_lo, v2 475// CHECK: [0x66,0x04,0x0a,0x0e] 476 477v_mul_hi_i32_i24 v5, flat_scratch_hi, v2 478// CHECK: [0x67,0x04,0x0a,0x0e] 479 480v_mul_hi_i32_i24 v5, vcc_lo, v2 481// CHECK: [0x6a,0x04,0x0a,0x0e] 482 483v_mul_hi_i32_i24 v5, vcc_hi, v2 484// CHECK: [0x6b,0x04,0x0a,0x0e] 485 486v_mul_hi_i32_i24 v5, ttmp15, v2 487// CHECK: [0x7b,0x04,0x0a,0x0e] 488 489v_mul_hi_i32_i24 v5, m0, v2 490// CHECK: [0x7c,0x04,0x0a,0x0e] 491 492v_mul_hi_i32_i24 v5, exec_lo, v2 493// CHECK: [0x7e,0x04,0x0a,0x0e] 494 495v_mul_hi_i32_i24 v5, exec_hi, v2 496// CHECK: [0x7f,0x04,0x0a,0x0e] 497 498v_mul_hi_i32_i24 v5, 0, v2 499// CHECK: [0x80,0x04,0x0a,0x0e] 500 501v_mul_hi_i32_i24 v5, -1, v2 502// CHECK: [0xc1,0x04,0x0a,0x0e] 503 504v_mul_hi_i32_i24 v5, 0.5, v2 505// CHECK: [0xf0,0x04,0x0a,0x0e] 506 507v_mul_hi_i32_i24 v5, -4.0, v2 508// CHECK: [0xf7,0x04,0x0a,0x0e] 509 510v_mul_hi_i32_i24 v5, src_vccz, v2 511// CHECK: [0xfb,0x04,0x0a,0x0e] 512 513v_mul_hi_i32_i24 v5, src_execz, v2 514// CHECK: [0xfc,0x04,0x0a,0x0e] 515 516v_mul_hi_i32_i24 v5, src_scc, v2 517// CHECK: [0xfd,0x04,0x0a,0x0e] 518 519v_mul_hi_i32_i24 v5, src_lds_direct, v2 520// CHECK: [0xfe,0x04,0x0a,0x0e] 521 522v_mul_hi_i32_i24 v5, 0xaf123456, v2 523// CHECK: [0xff,0x04,0x0a,0x0e,0x56,0x34,0x12,0xaf] 524 525v_mul_hi_i32_i24 v5, 0x3f717273, v2 526// CHECK: [0xff,0x04,0x0a,0x0e,0x73,0x72,0x71,0x3f] 527 528v_mul_hi_i32_i24 v5, v1, v255 529// CHECK: [0x01,0xff,0x0b,0x0e] 530 531v_mul_u32_u24 v5, v1, v2 532// CHECK: [0x01,0x05,0x0a,0x10] 533 534v_mul_u32_u24 v255, v1, v2 535// CHECK: [0x01,0x05,0xfe,0x11] 536 537v_mul_u32_u24 v5, v255, v2 538// CHECK: [0xff,0x05,0x0a,0x10] 539 540v_mul_u32_u24 v5, s1, v2 541// CHECK: [0x01,0x04,0x0a,0x10] 542 543v_mul_u32_u24 v5, s101, v2 544// CHECK: [0x65,0x04,0x0a,0x10] 545 546v_mul_u32_u24 v5, flat_scratch_lo, v2 547// CHECK: [0x66,0x04,0x0a,0x10] 548 549v_mul_u32_u24 v5, flat_scratch_hi, v2 550// CHECK: [0x67,0x04,0x0a,0x10] 551 552v_mul_u32_u24 v5, vcc_lo, v2 553// CHECK: [0x6a,0x04,0x0a,0x10] 554 555v_mul_u32_u24 v5, vcc_hi, v2 556// CHECK: [0x6b,0x04,0x0a,0x10] 557 558v_mul_u32_u24 v5, ttmp15, v2 559// CHECK: [0x7b,0x04,0x0a,0x10] 560 561v_mul_u32_u24 v5, m0, v2 562// CHECK: [0x7c,0x04,0x0a,0x10] 563 564v_mul_u32_u24 v5, exec_lo, v2 565// CHECK: [0x7e,0x04,0x0a,0x10] 566 567v_mul_u32_u24 v5, exec_hi, v2 568// CHECK: [0x7f,0x04,0x0a,0x10] 569 570v_mul_u32_u24 v5, 0, v2 571// CHECK: [0x80,0x04,0x0a,0x10] 572 573v_mul_u32_u24 v5, -1, v2 574// CHECK: [0xc1,0x04,0x0a,0x10] 575 576v_mul_u32_u24 v5, 0.5, v2 577// CHECK: [0xf0,0x04,0x0a,0x10] 578 579v_mul_u32_u24 v5, -4.0, v2 580// CHECK: [0xf7,0x04,0x0a,0x10] 581 582v_mul_u32_u24 v5, src_vccz, v2 583// CHECK: [0xfb,0x04,0x0a,0x10] 584 585v_mul_u32_u24 v5, src_execz, v2 586// CHECK: [0xfc,0x04,0x0a,0x10] 587 588v_mul_u32_u24 v5, src_scc, v2 589// CHECK: [0xfd,0x04,0x0a,0x10] 590 591v_mul_u32_u24 v5, src_lds_direct, v2 592// CHECK: [0xfe,0x04,0x0a,0x10] 593 594v_mul_u32_u24 v5, 0xaf123456, v2 595// CHECK: [0xff,0x04,0x0a,0x10,0x56,0x34,0x12,0xaf] 596 597v_mul_u32_u24 v5, 0x3f717273, v2 598// CHECK: [0xff,0x04,0x0a,0x10,0x73,0x72,0x71,0x3f] 599 600v_mul_u32_u24 v5, v1, v255 601// CHECK: [0x01,0xff,0x0b,0x10] 602 603v_mul_hi_u32_u24 v5, v1, v2 604// CHECK: [0x01,0x05,0x0a,0x12] 605 606v_mul_hi_u32_u24 v255, v1, v2 607// CHECK: [0x01,0x05,0xfe,0x13] 608 609v_mul_hi_u32_u24 v5, v255, v2 610// CHECK: [0xff,0x05,0x0a,0x12] 611 612v_mul_hi_u32_u24 v5, s1, v2 613// CHECK: [0x01,0x04,0x0a,0x12] 614 615v_mul_hi_u32_u24 v5, s101, v2 616// CHECK: [0x65,0x04,0x0a,0x12] 617 618v_mul_hi_u32_u24 v5, flat_scratch_lo, v2 619// CHECK: [0x66,0x04,0x0a,0x12] 620 621v_mul_hi_u32_u24 v5, flat_scratch_hi, v2 622// CHECK: [0x67,0x04,0x0a,0x12] 623 624v_mul_hi_u32_u24 v5, vcc_lo, v2 625// CHECK: [0x6a,0x04,0x0a,0x12] 626 627v_mul_hi_u32_u24 v5, vcc_hi, v2 628// CHECK: [0x6b,0x04,0x0a,0x12] 629 630v_mul_hi_u32_u24 v5, ttmp15, v2 631// CHECK: [0x7b,0x04,0x0a,0x12] 632 633v_mul_hi_u32_u24 v5, m0, v2 634// CHECK: [0x7c,0x04,0x0a,0x12] 635 636v_mul_hi_u32_u24 v5, exec_lo, v2 637// CHECK: [0x7e,0x04,0x0a,0x12] 638 639v_mul_hi_u32_u24 v5, exec_hi, v2 640// CHECK: [0x7f,0x04,0x0a,0x12] 641 642v_mul_hi_u32_u24 v5, 0, v2 643// CHECK: [0x80,0x04,0x0a,0x12] 644 645v_mul_hi_u32_u24 v5, -1, v2 646// CHECK: [0xc1,0x04,0x0a,0x12] 647 648v_mul_hi_u32_u24 v5, 0.5, v2 649// CHECK: [0xf0,0x04,0x0a,0x12] 650 651v_mul_hi_u32_u24 v5, -4.0, v2 652// CHECK: [0xf7,0x04,0x0a,0x12] 653 654v_mul_hi_u32_u24 v5, src_vccz, v2 655// CHECK: [0xfb,0x04,0x0a,0x12] 656 657v_mul_hi_u32_u24 v5, src_execz, v2 658// CHECK: [0xfc,0x04,0x0a,0x12] 659 660v_mul_hi_u32_u24 v5, src_scc, v2 661// CHECK: [0xfd,0x04,0x0a,0x12] 662 663v_mul_hi_u32_u24 v5, src_lds_direct, v2 664// CHECK: [0xfe,0x04,0x0a,0x12] 665 666v_mul_hi_u32_u24 v5, 0xaf123456, v2 667// CHECK: [0xff,0x04,0x0a,0x12,0x56,0x34,0x12,0xaf] 668 669v_mul_hi_u32_u24 v5, 0x3f717273, v2 670// CHECK: [0xff,0x04,0x0a,0x12,0x73,0x72,0x71,0x3f] 671 672v_mul_hi_u32_u24 v5, v1, v255 673// CHECK: [0x01,0xff,0x0b,0x12] 674 675v_min_f32 v5, v1, v2 676// CHECK: [0x01,0x05,0x0a,0x14] 677 678v_min_f32 v255, v1, v2 679// CHECK: [0x01,0x05,0xfe,0x15] 680 681v_min_f32 v5, v255, v2 682// CHECK: [0xff,0x05,0x0a,0x14] 683 684v_min_f32 v5, s1, v2 685// CHECK: [0x01,0x04,0x0a,0x14] 686 687v_min_f32 v5, s101, v2 688// CHECK: [0x65,0x04,0x0a,0x14] 689 690v_min_f32 v5, flat_scratch_lo, v2 691// CHECK: [0x66,0x04,0x0a,0x14] 692 693v_min_f32 v5, flat_scratch_hi, v2 694// CHECK: [0x67,0x04,0x0a,0x14] 695 696v_min_f32 v5, vcc_lo, v2 697// CHECK: [0x6a,0x04,0x0a,0x14] 698 699v_min_f32 v5, vcc_hi, v2 700// CHECK: [0x6b,0x04,0x0a,0x14] 701 702v_min_f32 v5, ttmp15, v2 703// CHECK: [0x7b,0x04,0x0a,0x14] 704 705v_min_f32 v5, m0, v2 706// CHECK: [0x7c,0x04,0x0a,0x14] 707 708v_min_f32 v5, exec_lo, v2 709// CHECK: [0x7e,0x04,0x0a,0x14] 710 711v_min_f32 v5, exec_hi, v2 712// CHECK: [0x7f,0x04,0x0a,0x14] 713 714v_min_f32 v5, 0, v2 715// CHECK: [0x80,0x04,0x0a,0x14] 716 717v_min_f32 v5, -1, v2 718// CHECK: [0xc1,0x04,0x0a,0x14] 719 720v_min_f32 v5, 0.5, v2 721// CHECK: [0xf0,0x04,0x0a,0x14] 722 723v_min_f32 v5, -4.0, v2 724// CHECK: [0xf7,0x04,0x0a,0x14] 725 726v_min_f32 v5, src_vccz, v2 727// CHECK: [0xfb,0x04,0x0a,0x14] 728 729v_min_f32 v5, src_execz, v2 730// CHECK: [0xfc,0x04,0x0a,0x14] 731 732v_min_f32 v5, src_scc, v2 733// CHECK: [0xfd,0x04,0x0a,0x14] 734 735v_min_f32 v5, src_lds_direct, v2 736// CHECK: [0xfe,0x04,0x0a,0x14] 737 738v_min_f32 v5, 0xaf123456, v2 739// CHECK: [0xff,0x04,0x0a,0x14,0x56,0x34,0x12,0xaf] 740 741v_min_f32 v5, 0x3f717273, v2 742// CHECK: [0xff,0x04,0x0a,0x14,0x73,0x72,0x71,0x3f] 743 744v_min_f32 v5, v1, v255 745// CHECK: [0x01,0xff,0x0b,0x14] 746 747v_max_f32 v5, v1, v2 748// CHECK: [0x01,0x05,0x0a,0x16] 749 750v_max_f32 v255, v1, v2 751// CHECK: [0x01,0x05,0xfe,0x17] 752 753v_max_f32 v5, v255, v2 754// CHECK: [0xff,0x05,0x0a,0x16] 755 756v_max_f32 v5, s1, v2 757// CHECK: [0x01,0x04,0x0a,0x16] 758 759v_max_f32 v5, s101, v2 760// CHECK: [0x65,0x04,0x0a,0x16] 761 762v_max_f32 v5, flat_scratch_lo, v2 763// CHECK: [0x66,0x04,0x0a,0x16] 764 765v_max_f32 v5, flat_scratch_hi, v2 766// CHECK: [0x67,0x04,0x0a,0x16] 767 768v_max_f32 v5, vcc_lo, v2 769// CHECK: [0x6a,0x04,0x0a,0x16] 770 771v_max_f32 v5, vcc_hi, v2 772// CHECK: [0x6b,0x04,0x0a,0x16] 773 774v_max_f32 v5, ttmp15, v2 775// CHECK: [0x7b,0x04,0x0a,0x16] 776 777v_max_f32 v5, m0, v2 778// CHECK: [0x7c,0x04,0x0a,0x16] 779 780v_max_f32 v5, exec_lo, v2 781// CHECK: [0x7e,0x04,0x0a,0x16] 782 783v_max_f32 v5, exec_hi, v2 784// CHECK: [0x7f,0x04,0x0a,0x16] 785 786v_max_f32 v5, 0, v2 787// CHECK: [0x80,0x04,0x0a,0x16] 788 789v_max_f32 v5, -1, v2 790// CHECK: [0xc1,0x04,0x0a,0x16] 791 792v_max_f32 v5, 0.5, v2 793// CHECK: [0xf0,0x04,0x0a,0x16] 794 795v_max_f32 v5, -4.0, v2 796// CHECK: [0xf7,0x04,0x0a,0x16] 797 798v_max_f32 v5, src_vccz, v2 799// CHECK: [0xfb,0x04,0x0a,0x16] 800 801v_max_f32 v5, src_execz, v2 802// CHECK: [0xfc,0x04,0x0a,0x16] 803 804v_max_f32 v5, src_scc, v2 805// CHECK: [0xfd,0x04,0x0a,0x16] 806 807v_max_f32 v5, src_lds_direct, v2 808// CHECK: [0xfe,0x04,0x0a,0x16] 809 810v_max_f32 v5, 0xaf123456, v2 811// CHECK: [0xff,0x04,0x0a,0x16,0x56,0x34,0x12,0xaf] 812 813v_max_f32 v5, 0x3f717273, v2 814// CHECK: [0xff,0x04,0x0a,0x16,0x73,0x72,0x71,0x3f] 815 816v_max_f32 v5, v1, v255 817// CHECK: [0x01,0xff,0x0b,0x16] 818 819v_min_i32 v5, v1, v2 820// CHECK: [0x01,0x05,0x0a,0x18] 821 822v_min_i32 v255, v1, v2 823// CHECK: [0x01,0x05,0xfe,0x19] 824 825v_min_i32 v5, v255, v2 826// CHECK: [0xff,0x05,0x0a,0x18] 827 828v_min_i32 v5, s1, v2 829// CHECK: [0x01,0x04,0x0a,0x18] 830 831v_min_i32 v5, s101, v2 832// CHECK: [0x65,0x04,0x0a,0x18] 833 834v_min_i32 v5, flat_scratch_lo, v2 835// CHECK: [0x66,0x04,0x0a,0x18] 836 837v_min_i32 v5, flat_scratch_hi, v2 838// CHECK: [0x67,0x04,0x0a,0x18] 839 840v_min_i32 v5, vcc_lo, v2 841// CHECK: [0x6a,0x04,0x0a,0x18] 842 843v_min_i32 v5, vcc_hi, v2 844// CHECK: [0x6b,0x04,0x0a,0x18] 845 846v_min_i32 v5, ttmp15, v2 847// CHECK: [0x7b,0x04,0x0a,0x18] 848 849v_min_i32 v5, m0, v2 850// CHECK: [0x7c,0x04,0x0a,0x18] 851 852v_min_i32 v5, exec_lo, v2 853// CHECK: [0x7e,0x04,0x0a,0x18] 854 855v_min_i32 v5, exec_hi, v2 856// CHECK: [0x7f,0x04,0x0a,0x18] 857 858v_min_i32 v5, 0, v2 859// CHECK: [0x80,0x04,0x0a,0x18] 860 861v_min_i32 v5, -1, v2 862// CHECK: [0xc1,0x04,0x0a,0x18] 863 864v_min_i32 v5, 0.5, v2 865// CHECK: [0xf0,0x04,0x0a,0x18] 866 867v_min_i32 v5, -4.0, v2 868// CHECK: [0xf7,0x04,0x0a,0x18] 869 870v_min_i32 v5, src_vccz, v2 871// CHECK: [0xfb,0x04,0x0a,0x18] 872 873v_min_i32 v5, src_execz, v2 874// CHECK: [0xfc,0x04,0x0a,0x18] 875 876v_min_i32 v5, src_scc, v2 877// CHECK: [0xfd,0x04,0x0a,0x18] 878 879v_min_i32 v5, src_lds_direct, v2 880// CHECK: [0xfe,0x04,0x0a,0x18] 881 882v_min_i32 v5, 0xaf123456, v2 883// CHECK: [0xff,0x04,0x0a,0x18,0x56,0x34,0x12,0xaf] 884 885v_min_i32 v5, 0x3f717273, v2 886// CHECK: [0xff,0x04,0x0a,0x18,0x73,0x72,0x71,0x3f] 887 888v_min_i32 v5, v1, v255 889// CHECK: [0x01,0xff,0x0b,0x18] 890 891v_max_i32 v5, v1, v2 892// CHECK: [0x01,0x05,0x0a,0x1a] 893 894v_max_i32 v255, v1, v2 895// CHECK: [0x01,0x05,0xfe,0x1b] 896 897v_max_i32 v5, v255, v2 898// CHECK: [0xff,0x05,0x0a,0x1a] 899 900v_max_i32 v5, s1, v2 901// CHECK: [0x01,0x04,0x0a,0x1a] 902 903v_max_i32 v5, s101, v2 904// CHECK: [0x65,0x04,0x0a,0x1a] 905 906v_max_i32 v5, flat_scratch_lo, v2 907// CHECK: [0x66,0x04,0x0a,0x1a] 908 909v_max_i32 v5, flat_scratch_hi, v2 910// CHECK: [0x67,0x04,0x0a,0x1a] 911 912v_max_i32 v5, vcc_lo, v2 913// CHECK: [0x6a,0x04,0x0a,0x1a] 914 915v_max_i32 v5, vcc_hi, v2 916// CHECK: [0x6b,0x04,0x0a,0x1a] 917 918v_max_i32 v5, ttmp15, v2 919// CHECK: [0x7b,0x04,0x0a,0x1a] 920 921v_max_i32 v5, m0, v2 922// CHECK: [0x7c,0x04,0x0a,0x1a] 923 924v_max_i32 v5, exec_lo, v2 925// CHECK: [0x7e,0x04,0x0a,0x1a] 926 927v_max_i32 v5, exec_hi, v2 928// CHECK: [0x7f,0x04,0x0a,0x1a] 929 930v_max_i32 v5, 0, v2 931// CHECK: [0x80,0x04,0x0a,0x1a] 932 933v_max_i32 v5, -1, v2 934// CHECK: [0xc1,0x04,0x0a,0x1a] 935 936v_max_i32 v5, 0.5, v2 937// CHECK: [0xf0,0x04,0x0a,0x1a] 938 939v_max_i32 v5, -4.0, v2 940// CHECK: [0xf7,0x04,0x0a,0x1a] 941 942v_max_i32 v5, src_vccz, v2 943// CHECK: [0xfb,0x04,0x0a,0x1a] 944 945v_max_i32 v5, src_execz, v2 946// CHECK: [0xfc,0x04,0x0a,0x1a] 947 948v_max_i32 v5, src_scc, v2 949// CHECK: [0xfd,0x04,0x0a,0x1a] 950 951v_max_i32 v5, src_lds_direct, v2 952// CHECK: [0xfe,0x04,0x0a,0x1a] 953 954v_max_i32 v5, 0xaf123456, v2 955// CHECK: [0xff,0x04,0x0a,0x1a,0x56,0x34,0x12,0xaf] 956 957v_max_i32 v5, 0x3f717273, v2 958// CHECK: [0xff,0x04,0x0a,0x1a,0x73,0x72,0x71,0x3f] 959 960v_max_i32 v5, v1, v255 961// CHECK: [0x01,0xff,0x0b,0x1a] 962 963v_min_u32 v5, v1, v2 964// CHECK: [0x01,0x05,0x0a,0x1c] 965 966v_min_u32 v255, v1, v2 967// CHECK: [0x01,0x05,0xfe,0x1d] 968 969v_min_u32 v5, v255, v2 970// CHECK: [0xff,0x05,0x0a,0x1c] 971 972v_min_u32 v5, s1, v2 973// CHECK: [0x01,0x04,0x0a,0x1c] 974 975v_min_u32 v5, s101, v2 976// CHECK: [0x65,0x04,0x0a,0x1c] 977 978v_min_u32 v5, flat_scratch_lo, v2 979// CHECK: [0x66,0x04,0x0a,0x1c] 980 981v_min_u32 v5, flat_scratch_hi, v2 982// CHECK: [0x67,0x04,0x0a,0x1c] 983 984v_min_u32 v5, vcc_lo, v2 985// CHECK: [0x6a,0x04,0x0a,0x1c] 986 987v_min_u32 v5, vcc_hi, v2 988// CHECK: [0x6b,0x04,0x0a,0x1c] 989 990v_min_u32 v5, ttmp15, v2 991// CHECK: [0x7b,0x04,0x0a,0x1c] 992 993v_min_u32 v5, m0, v2 994// CHECK: [0x7c,0x04,0x0a,0x1c] 995 996v_min_u32 v5, exec_lo, v2 997// CHECK: [0x7e,0x04,0x0a,0x1c] 998 999v_min_u32 v5, exec_hi, v2 1000// CHECK: [0x7f,0x04,0x0a,0x1c] 1001 1002v_min_u32 v5, 0, v2 1003// CHECK: [0x80,0x04,0x0a,0x1c] 1004 1005v_min_u32 v5, -1, v2 1006// CHECK: [0xc1,0x04,0x0a,0x1c] 1007 1008v_min_u32 v5, 0.5, v2 1009// CHECK: [0xf0,0x04,0x0a,0x1c] 1010 1011v_min_u32 v5, -4.0, v2 1012// CHECK: [0xf7,0x04,0x0a,0x1c] 1013 1014v_min_u32 v5, src_vccz, v2 1015// CHECK: [0xfb,0x04,0x0a,0x1c] 1016 1017v_min_u32 v5, src_execz, v2 1018// CHECK: [0xfc,0x04,0x0a,0x1c] 1019 1020v_min_u32 v5, src_scc, v2 1021// CHECK: [0xfd,0x04,0x0a,0x1c] 1022 1023v_min_u32 v5, src_lds_direct, v2 1024// CHECK: [0xfe,0x04,0x0a,0x1c] 1025 1026v_min_u32 v5, 0xaf123456, v2 1027// CHECK: [0xff,0x04,0x0a,0x1c,0x56,0x34,0x12,0xaf] 1028 1029v_min_u32 v5, 0x3f717273, v2 1030// CHECK: [0xff,0x04,0x0a,0x1c,0x73,0x72,0x71,0x3f] 1031 1032v_min_u32 v5, v1, v255 1033// CHECK: [0x01,0xff,0x0b,0x1c] 1034 1035v_max_u32 v5, v1, v2 1036// CHECK: [0x01,0x05,0x0a,0x1e] 1037 1038v_max_u32 v255, v1, v2 1039// CHECK: [0x01,0x05,0xfe,0x1f] 1040 1041v_max_u32 v5, v255, v2 1042// CHECK: [0xff,0x05,0x0a,0x1e] 1043 1044v_max_u32 v5, s1, v2 1045// CHECK: [0x01,0x04,0x0a,0x1e] 1046 1047v_max_u32 v5, s101, v2 1048// CHECK: [0x65,0x04,0x0a,0x1e] 1049 1050v_max_u32 v5, flat_scratch_lo, v2 1051// CHECK: [0x66,0x04,0x0a,0x1e] 1052 1053v_max_u32 v5, flat_scratch_hi, v2 1054// CHECK: [0x67,0x04,0x0a,0x1e] 1055 1056v_max_u32 v5, vcc_lo, v2 1057// CHECK: [0x6a,0x04,0x0a,0x1e] 1058 1059v_max_u32 v5, vcc_hi, v2 1060// CHECK: [0x6b,0x04,0x0a,0x1e] 1061 1062v_max_u32 v5, ttmp15, v2 1063// CHECK: [0x7b,0x04,0x0a,0x1e] 1064 1065v_max_u32 v5, m0, v2 1066// CHECK: [0x7c,0x04,0x0a,0x1e] 1067 1068v_max_u32 v5, exec_lo, v2 1069// CHECK: [0x7e,0x04,0x0a,0x1e] 1070 1071v_max_u32 v5, exec_hi, v2 1072// CHECK: [0x7f,0x04,0x0a,0x1e] 1073 1074v_max_u32 v5, 0, v2 1075// CHECK: [0x80,0x04,0x0a,0x1e] 1076 1077v_max_u32 v5, -1, v2 1078// CHECK: [0xc1,0x04,0x0a,0x1e] 1079 1080v_max_u32 v5, 0.5, v2 1081// CHECK: [0xf0,0x04,0x0a,0x1e] 1082 1083v_max_u32 v5, -4.0, v2 1084// CHECK: [0xf7,0x04,0x0a,0x1e] 1085 1086v_max_u32 v5, src_vccz, v2 1087// CHECK: [0xfb,0x04,0x0a,0x1e] 1088 1089v_max_u32 v5, src_execz, v2 1090// CHECK: [0xfc,0x04,0x0a,0x1e] 1091 1092v_max_u32 v5, src_scc, v2 1093// CHECK: [0xfd,0x04,0x0a,0x1e] 1094 1095v_max_u32 v5, src_lds_direct, v2 1096// CHECK: [0xfe,0x04,0x0a,0x1e] 1097 1098v_max_u32 v5, 0xaf123456, v2 1099// CHECK: [0xff,0x04,0x0a,0x1e,0x56,0x34,0x12,0xaf] 1100 1101v_max_u32 v5, 0x3f717273, v2 1102// CHECK: [0xff,0x04,0x0a,0x1e,0x73,0x72,0x71,0x3f] 1103 1104v_max_u32 v5, v1, v255 1105// CHECK: [0x01,0xff,0x0b,0x1e] 1106 1107v_lshrrev_b32 v5, v1, v2 1108// CHECK: [0x01,0x05,0x0a,0x20] 1109 1110v_lshrrev_b32 v255, v1, v2 1111// CHECK: [0x01,0x05,0xfe,0x21] 1112 1113v_lshrrev_b32 v5, v255, v2 1114// CHECK: [0xff,0x05,0x0a,0x20] 1115 1116v_lshrrev_b32 v5, s1, v2 1117// CHECK: [0x01,0x04,0x0a,0x20] 1118 1119v_lshrrev_b32 v5, s101, v2 1120// CHECK: [0x65,0x04,0x0a,0x20] 1121 1122v_lshrrev_b32 v5, flat_scratch_lo, v2 1123// CHECK: [0x66,0x04,0x0a,0x20] 1124 1125v_lshrrev_b32 v5, flat_scratch_hi, v2 1126// CHECK: [0x67,0x04,0x0a,0x20] 1127 1128v_lshrrev_b32 v5, vcc_lo, v2 1129// CHECK: [0x6a,0x04,0x0a,0x20] 1130 1131v_lshrrev_b32 v5, vcc_hi, v2 1132// CHECK: [0x6b,0x04,0x0a,0x20] 1133 1134v_lshrrev_b32 v5, ttmp15, v2 1135// CHECK: [0x7b,0x04,0x0a,0x20] 1136 1137v_lshrrev_b32 v5, m0, v2 1138// CHECK: [0x7c,0x04,0x0a,0x20] 1139 1140v_lshrrev_b32 v5, exec_lo, v2 1141// CHECK: [0x7e,0x04,0x0a,0x20] 1142 1143v_lshrrev_b32 v5, exec_hi, v2 1144// CHECK: [0x7f,0x04,0x0a,0x20] 1145 1146v_lshrrev_b32 v5, 0, v2 1147// CHECK: [0x80,0x04,0x0a,0x20] 1148 1149v_lshrrev_b32 v5, -1, v2 1150// CHECK: [0xc1,0x04,0x0a,0x20] 1151 1152v_lshrrev_b32 v5, 0.5, v2 1153// CHECK: [0xf0,0x04,0x0a,0x20] 1154 1155v_lshrrev_b32 v5, -4.0, v2 1156// CHECK: [0xf7,0x04,0x0a,0x20] 1157 1158v_lshrrev_b32 v5, src_vccz, v2 1159// CHECK: [0xfb,0x04,0x0a,0x20] 1160 1161v_lshrrev_b32 v5, src_execz, v2 1162// CHECK: [0xfc,0x04,0x0a,0x20] 1163 1164v_lshrrev_b32 v5, src_scc, v2 1165// CHECK: [0xfd,0x04,0x0a,0x20] 1166 1167v_lshrrev_b32 v5, 0xaf123456, v2 1168// CHECK: [0xff,0x04,0x0a,0x20,0x56,0x34,0x12,0xaf] 1169 1170v_lshrrev_b32 v5, 0x3f717273, v2 1171// CHECK: [0xff,0x04,0x0a,0x20,0x73,0x72,0x71,0x3f] 1172 1173v_lshrrev_b32 v5, v1, v255 1174// CHECK: [0x01,0xff,0x0b,0x20] 1175 1176v_ashrrev_i32 v5, v1, v2 1177// CHECK: [0x01,0x05,0x0a,0x22] 1178 1179v_ashrrev_i32 v255, v1, v2 1180// CHECK: [0x01,0x05,0xfe,0x23] 1181 1182v_ashrrev_i32 v5, v255, v2 1183// CHECK: [0xff,0x05,0x0a,0x22] 1184 1185v_ashrrev_i32 v5, s1, v2 1186// CHECK: [0x01,0x04,0x0a,0x22] 1187 1188v_ashrrev_i32 v5, s101, v2 1189// CHECK: [0x65,0x04,0x0a,0x22] 1190 1191v_ashrrev_i32 v5, flat_scratch_lo, v2 1192// CHECK: [0x66,0x04,0x0a,0x22] 1193 1194v_ashrrev_i32 v5, flat_scratch_hi, v2 1195// CHECK: [0x67,0x04,0x0a,0x22] 1196 1197v_ashrrev_i32 v5, vcc_lo, v2 1198// CHECK: [0x6a,0x04,0x0a,0x22] 1199 1200v_ashrrev_i32 v5, vcc_hi, v2 1201// CHECK: [0x6b,0x04,0x0a,0x22] 1202 1203v_ashrrev_i32 v5, ttmp15, v2 1204// CHECK: [0x7b,0x04,0x0a,0x22] 1205 1206v_ashrrev_i32 v5, m0, v2 1207// CHECK: [0x7c,0x04,0x0a,0x22] 1208 1209v_ashrrev_i32 v5, exec_lo, v2 1210// CHECK: [0x7e,0x04,0x0a,0x22] 1211 1212v_ashrrev_i32 v5, exec_hi, v2 1213// CHECK: [0x7f,0x04,0x0a,0x22] 1214 1215v_ashrrev_i32 v5, 0, v2 1216// CHECK: [0x80,0x04,0x0a,0x22] 1217 1218v_ashrrev_i32 v5, -1, v2 1219// CHECK: [0xc1,0x04,0x0a,0x22] 1220 1221v_ashrrev_i32 v5, 0.5, v2 1222// CHECK: [0xf0,0x04,0x0a,0x22] 1223 1224v_ashrrev_i32 v5, -4.0, v2 1225// CHECK: [0xf7,0x04,0x0a,0x22] 1226 1227v_ashrrev_i32 v5, src_vccz, v2 1228// CHECK: [0xfb,0x04,0x0a,0x22] 1229 1230v_ashrrev_i32 v5, src_execz, v2 1231// CHECK: [0xfc,0x04,0x0a,0x22] 1232 1233v_ashrrev_i32 v5, src_scc, v2 1234// CHECK: [0xfd,0x04,0x0a,0x22] 1235 1236v_ashrrev_i32 v5, 0xaf123456, v2 1237// CHECK: [0xff,0x04,0x0a,0x22,0x56,0x34,0x12,0xaf] 1238 1239v_ashrrev_i32 v5, 0x3f717273, v2 1240// CHECK: [0xff,0x04,0x0a,0x22,0x73,0x72,0x71,0x3f] 1241 1242v_ashrrev_i32 v5, v1, v255 1243// CHECK: [0x01,0xff,0x0b,0x22] 1244 1245v_lshlrev_b32 v5, v1, v2 1246// CHECK: [0x01,0x05,0x0a,0x24] 1247 1248v_lshlrev_b32 v255, v1, v2 1249// CHECK: [0x01,0x05,0xfe,0x25] 1250 1251v_lshlrev_b32 v5, v255, v2 1252// CHECK: [0xff,0x05,0x0a,0x24] 1253 1254v_lshlrev_b32 v5, s1, v2 1255// CHECK: [0x01,0x04,0x0a,0x24] 1256 1257v_lshlrev_b32 v5, s101, v2 1258// CHECK: [0x65,0x04,0x0a,0x24] 1259 1260v_lshlrev_b32 v5, flat_scratch_lo, v2 1261// CHECK: [0x66,0x04,0x0a,0x24] 1262 1263v_lshlrev_b32 v5, flat_scratch_hi, v2 1264// CHECK: [0x67,0x04,0x0a,0x24] 1265 1266v_lshlrev_b32 v5, vcc_lo, v2 1267// CHECK: [0x6a,0x04,0x0a,0x24] 1268 1269v_lshlrev_b32 v5, vcc_hi, v2 1270// CHECK: [0x6b,0x04,0x0a,0x24] 1271 1272v_lshlrev_b32 v5, ttmp15, v2 1273// CHECK: [0x7b,0x04,0x0a,0x24] 1274 1275v_lshlrev_b32 v5, m0, v2 1276// CHECK: [0x7c,0x04,0x0a,0x24] 1277 1278v_lshlrev_b32 v5, exec_lo, v2 1279// CHECK: [0x7e,0x04,0x0a,0x24] 1280 1281v_lshlrev_b32 v5, exec_hi, v2 1282// CHECK: [0x7f,0x04,0x0a,0x24] 1283 1284v_lshlrev_b32 v5, 0, v2 1285// CHECK: [0x80,0x04,0x0a,0x24] 1286 1287v_lshlrev_b32 v5, -1, v2 1288// CHECK: [0xc1,0x04,0x0a,0x24] 1289 1290v_lshlrev_b32 v5, 0.5, v2 1291// CHECK: [0xf0,0x04,0x0a,0x24] 1292 1293v_lshlrev_b32 v5, -4.0, v2 1294// CHECK: [0xf7,0x04,0x0a,0x24] 1295 1296v_lshlrev_b32 v5, src_vccz, v2 1297// CHECK: [0xfb,0x04,0x0a,0x24] 1298 1299v_lshlrev_b32 v5, src_execz, v2 1300// CHECK: [0xfc,0x04,0x0a,0x24] 1301 1302v_lshlrev_b32 v5, src_scc, v2 1303// CHECK: [0xfd,0x04,0x0a,0x24] 1304 1305v_lshlrev_b32 v5, 0xaf123456, v2 1306// CHECK: [0xff,0x04,0x0a,0x24,0x56,0x34,0x12,0xaf] 1307 1308v_lshlrev_b32 v5, 0x3f717273, v2 1309// CHECK: [0xff,0x04,0x0a,0x24,0x73,0x72,0x71,0x3f] 1310 1311v_lshlrev_b32 v5, v1, v255 1312// CHECK: [0x01,0xff,0x0b,0x24] 1313 1314v_and_b32 v5, v1, v2 1315// CHECK: [0x01,0x05,0x0a,0x26] 1316 1317v_and_b32 v255, v1, v2 1318// CHECK: [0x01,0x05,0xfe,0x27] 1319 1320v_and_b32 v5, v255, v2 1321// CHECK: [0xff,0x05,0x0a,0x26] 1322 1323v_and_b32 v5, s1, v2 1324// CHECK: [0x01,0x04,0x0a,0x26] 1325 1326v_and_b32 v5, s101, v2 1327// CHECK: [0x65,0x04,0x0a,0x26] 1328 1329v_and_b32 v5, flat_scratch_lo, v2 1330// CHECK: [0x66,0x04,0x0a,0x26] 1331 1332v_and_b32 v5, flat_scratch_hi, v2 1333// CHECK: [0x67,0x04,0x0a,0x26] 1334 1335v_and_b32 v5, vcc_lo, v2 1336// CHECK: [0x6a,0x04,0x0a,0x26] 1337 1338v_and_b32 v5, vcc_hi, v2 1339// CHECK: [0x6b,0x04,0x0a,0x26] 1340 1341v_and_b32 v5, ttmp15, v2 1342// CHECK: [0x7b,0x04,0x0a,0x26] 1343 1344v_and_b32 v5, m0, v2 1345// CHECK: [0x7c,0x04,0x0a,0x26] 1346 1347v_and_b32 v5, exec_lo, v2 1348// CHECK: [0x7e,0x04,0x0a,0x26] 1349 1350v_and_b32 v5, exec_hi, v2 1351// CHECK: [0x7f,0x04,0x0a,0x26] 1352 1353v_and_b32 v5, 0, v2 1354// CHECK: [0x80,0x04,0x0a,0x26] 1355 1356v_and_b32 v5, -1, v2 1357// CHECK: [0xc1,0x04,0x0a,0x26] 1358 1359v_and_b32 v5, 0.5, v2 1360// CHECK: [0xf0,0x04,0x0a,0x26] 1361 1362v_and_b32 v5, -4.0, v2 1363// CHECK: [0xf7,0x04,0x0a,0x26] 1364 1365v_and_b32 v5, src_vccz, v2 1366// CHECK: [0xfb,0x04,0x0a,0x26] 1367 1368v_and_b32 v5, src_execz, v2 1369// CHECK: [0xfc,0x04,0x0a,0x26] 1370 1371v_and_b32 v5, src_scc, v2 1372// CHECK: [0xfd,0x04,0x0a,0x26] 1373 1374v_and_b32 v5, src_lds_direct, v2 1375// CHECK: [0xfe,0x04,0x0a,0x26] 1376 1377v_and_b32 v5, 0xaf123456, v2 1378// CHECK: [0xff,0x04,0x0a,0x26,0x56,0x34,0x12,0xaf] 1379 1380v_and_b32 v5, 0x3f717273, v2 1381// CHECK: [0xff,0x04,0x0a,0x26,0x73,0x72,0x71,0x3f] 1382 1383v_and_b32 v5, v1, v255 1384// CHECK: [0x01,0xff,0x0b,0x26] 1385 1386v_or_b32 v5, v1, v2 1387// CHECK: [0x01,0x05,0x0a,0x28] 1388 1389v_or_b32 v255, v1, v2 1390// CHECK: [0x01,0x05,0xfe,0x29] 1391 1392v_or_b32 v5, v255, v2 1393// CHECK: [0xff,0x05,0x0a,0x28] 1394 1395v_or_b32 v5, s1, v2 1396// CHECK: [0x01,0x04,0x0a,0x28] 1397 1398v_or_b32 v5, s101, v2 1399// CHECK: [0x65,0x04,0x0a,0x28] 1400 1401v_or_b32 v5, flat_scratch_lo, v2 1402// CHECK: [0x66,0x04,0x0a,0x28] 1403 1404v_or_b32 v5, flat_scratch_hi, v2 1405// CHECK: [0x67,0x04,0x0a,0x28] 1406 1407v_or_b32 v5, vcc_lo, v2 1408// CHECK: [0x6a,0x04,0x0a,0x28] 1409 1410v_or_b32 v5, vcc_hi, v2 1411// CHECK: [0x6b,0x04,0x0a,0x28] 1412 1413v_or_b32 v5, ttmp15, v2 1414// CHECK: [0x7b,0x04,0x0a,0x28] 1415 1416v_or_b32 v5, m0, v2 1417// CHECK: [0x7c,0x04,0x0a,0x28] 1418 1419v_or_b32 v5, exec_lo, v2 1420// CHECK: [0x7e,0x04,0x0a,0x28] 1421 1422v_or_b32 v5, exec_hi, v2 1423// CHECK: [0x7f,0x04,0x0a,0x28] 1424 1425v_or_b32 v5, 0, v2 1426// CHECK: [0x80,0x04,0x0a,0x28] 1427 1428v_or_b32 v5, -1, v2 1429// CHECK: [0xc1,0x04,0x0a,0x28] 1430 1431v_or_b32 v5, 0.5, v2 1432// CHECK: [0xf0,0x04,0x0a,0x28] 1433 1434v_or_b32 v5, -4.0, v2 1435// CHECK: [0xf7,0x04,0x0a,0x28] 1436 1437v_or_b32 v5, src_vccz, v2 1438// CHECK: [0xfb,0x04,0x0a,0x28] 1439 1440v_or_b32 v5, src_execz, v2 1441// CHECK: [0xfc,0x04,0x0a,0x28] 1442 1443v_or_b32 v5, src_scc, v2 1444// CHECK: [0xfd,0x04,0x0a,0x28] 1445 1446v_or_b32 v5, src_lds_direct, v2 1447// CHECK: [0xfe,0x04,0x0a,0x28] 1448 1449v_or_b32 v5, 0xaf123456, v2 1450// CHECK: [0xff,0x04,0x0a,0x28,0x56,0x34,0x12,0xaf] 1451 1452v_or_b32 v5, 0x3f717273, v2 1453// CHECK: [0xff,0x04,0x0a,0x28,0x73,0x72,0x71,0x3f] 1454 1455v_or_b32 v5, v1, v255 1456// CHECK: [0x01,0xff,0x0b,0x28] 1457 1458v_xor_b32 v5, v1, v2 1459// CHECK: [0x01,0x05,0x0a,0x2a] 1460 1461v_xor_b32 v255, v1, v2 1462// CHECK: [0x01,0x05,0xfe,0x2b] 1463 1464v_xor_b32 v5, v255, v2 1465// CHECK: [0xff,0x05,0x0a,0x2a] 1466 1467v_xor_b32 v5, s1, v2 1468// CHECK: [0x01,0x04,0x0a,0x2a] 1469 1470v_xor_b32 v5, s101, v2 1471// CHECK: [0x65,0x04,0x0a,0x2a] 1472 1473v_xor_b32 v5, flat_scratch_lo, v2 1474// CHECK: [0x66,0x04,0x0a,0x2a] 1475 1476v_xor_b32 v5, flat_scratch_hi, v2 1477// CHECK: [0x67,0x04,0x0a,0x2a] 1478 1479v_xor_b32 v5, vcc_lo, v2 1480// CHECK: [0x6a,0x04,0x0a,0x2a] 1481 1482v_xor_b32 v5, vcc_hi, v2 1483// CHECK: [0x6b,0x04,0x0a,0x2a] 1484 1485v_xor_b32 v5, ttmp15, v2 1486// CHECK: [0x7b,0x04,0x0a,0x2a] 1487 1488v_xor_b32 v5, m0, v2 1489// CHECK: [0x7c,0x04,0x0a,0x2a] 1490 1491v_xor_b32 v5, exec_lo, v2 1492// CHECK: [0x7e,0x04,0x0a,0x2a] 1493 1494v_xor_b32 v5, exec_hi, v2 1495// CHECK: [0x7f,0x04,0x0a,0x2a] 1496 1497v_xor_b32 v5, 0, v2 1498// CHECK: [0x80,0x04,0x0a,0x2a] 1499 1500v_xor_b32 v5, -1, v2 1501// CHECK: [0xc1,0x04,0x0a,0x2a] 1502 1503v_xor_b32 v5, 0.5, v2 1504// CHECK: [0xf0,0x04,0x0a,0x2a] 1505 1506v_xor_b32 v5, -4.0, v2 1507// CHECK: [0xf7,0x04,0x0a,0x2a] 1508 1509v_xor_b32 v5, src_vccz, v2 1510// CHECK: [0xfb,0x04,0x0a,0x2a] 1511 1512v_xor_b32 v5, src_execz, v2 1513// CHECK: [0xfc,0x04,0x0a,0x2a] 1514 1515v_xor_b32 v5, src_scc, v2 1516// CHECK: [0xfd,0x04,0x0a,0x2a] 1517 1518v_xor_b32 v5, src_lds_direct, v2 1519// CHECK: [0xfe,0x04,0x0a,0x2a] 1520 1521v_xor_b32 v5, 0xaf123456, v2 1522// CHECK: [0xff,0x04,0x0a,0x2a,0x56,0x34,0x12,0xaf] 1523 1524v_xor_b32 v5, 0x3f717273, v2 1525// CHECK: [0xff,0x04,0x0a,0x2a,0x73,0x72,0x71,0x3f] 1526 1527v_xor_b32 v5, v1, v255 1528// CHECK: [0x01,0xff,0x0b,0x2a] 1529 1530v_mac_f32 v5, v1, v2 1531// CHECK: [0x01,0x05,0x0a,0x2c] 1532 1533v_mac_f32 v255, v1, v2 1534// CHECK: [0x01,0x05,0xfe,0x2d] 1535 1536v_mac_f32 v5, v255, v2 1537// CHECK: [0xff,0x05,0x0a,0x2c] 1538 1539v_mac_f32 v5, s1, v2 1540// CHECK: [0x01,0x04,0x0a,0x2c] 1541 1542v_mac_f32 v5, s101, v2 1543// CHECK: [0x65,0x04,0x0a,0x2c] 1544 1545v_mac_f32 v5, flat_scratch_lo, v2 1546// CHECK: [0x66,0x04,0x0a,0x2c] 1547 1548v_mac_f32 v5, flat_scratch_hi, v2 1549// CHECK: [0x67,0x04,0x0a,0x2c] 1550 1551v_mac_f32 v5, vcc_lo, v2 1552// CHECK: [0x6a,0x04,0x0a,0x2c] 1553 1554v_mac_f32 v5, vcc_hi, v2 1555// CHECK: [0x6b,0x04,0x0a,0x2c] 1556 1557v_mac_f32 v5, ttmp15, v2 1558// CHECK: [0x7b,0x04,0x0a,0x2c] 1559 1560v_mac_f32 v5, m0, v2 1561// CHECK: [0x7c,0x04,0x0a,0x2c] 1562 1563v_mac_f32 v5, exec_lo, v2 1564// CHECK: [0x7e,0x04,0x0a,0x2c] 1565 1566v_mac_f32 v5, exec_hi, v2 1567// CHECK: [0x7f,0x04,0x0a,0x2c] 1568 1569v_mac_f32 v5, 0, v2 1570// CHECK: [0x80,0x04,0x0a,0x2c] 1571 1572v_mac_f32 v5, -1, v2 1573// CHECK: [0xc1,0x04,0x0a,0x2c] 1574 1575v_mac_f32 v5, 0.5, v2 1576// CHECK: [0xf0,0x04,0x0a,0x2c] 1577 1578v_mac_f32 v5, -4.0, v2 1579// CHECK: [0xf7,0x04,0x0a,0x2c] 1580 1581v_mac_f32 v5, src_vccz, v2 1582// CHECK: [0xfb,0x04,0x0a,0x2c] 1583 1584v_mac_f32 v5, src_execz, v2 1585// CHECK: [0xfc,0x04,0x0a,0x2c] 1586 1587v_mac_f32 v5, src_scc, v2 1588// CHECK: [0xfd,0x04,0x0a,0x2c] 1589 1590v_mac_f32 v5, src_lds_direct, v2 1591// CHECK: [0xfe,0x04,0x0a,0x2c] 1592 1593v_mac_f32 v5, 0xaf123456, v2 1594// CHECK: [0xff,0x04,0x0a,0x2c,0x56,0x34,0x12,0xaf] 1595 1596v_mac_f32 v5, 0x3f717273, v2 1597// CHECK: [0xff,0x04,0x0a,0x2c,0x73,0x72,0x71,0x3f] 1598 1599v_mac_f32 v5, v1, v255 1600// CHECK: [0x01,0xff,0x0b,0x2c] 1601 1602v_madmk_f32 v5, v1, 0x11213141, v3 1603// CHECK: [0x01,0x07,0x0a,0x2e,0x41,0x31,0x21,0x11] 1604 1605v_madmk_f32 v255, v1, 0x11213141, v3 1606// CHECK: [0x01,0x07,0xfe,0x2f,0x41,0x31,0x21,0x11] 1607 1608v_madmk_f32 v5, v255, 0x11213141, v3 1609// CHECK: [0xff,0x07,0x0a,0x2e,0x41,0x31,0x21,0x11] 1610 1611v_madmk_f32 v5, 0, 0x11213141, v3 1612// CHECK: [0x80,0x06,0x0a,0x2e,0x41,0x31,0x21,0x11] 1613 1614v_madmk_f32 v5, -1, 0x11213141, v3 1615// CHECK: [0xc1,0x06,0x0a,0x2e,0x41,0x31,0x21,0x11] 1616 1617v_madmk_f32 v5, 0.5, 0x11213141, v3 1618// CHECK: [0xf0,0x06,0x0a,0x2e,0x41,0x31,0x21,0x11] 1619 1620v_madmk_f32 v5, -4.0, 0x11213141, v3 1621// CHECK: [0xf7,0x06,0x0a,0x2e,0x41,0x31,0x21,0x11] 1622 1623v_madmk_f32 v5, src_lds_direct, 0x11213141, v3 1624// CHECK: [0xfe,0x06,0x0a,0x2e,0x41,0x31,0x21,0x11] 1625 1626v_madmk_f32 v5, v1, 0xa1b1c1d1, v3 1627// CHECK: [0x01,0x07,0x0a,0x2e,0xd1,0xc1,0xb1,0xa1] 1628 1629v_madmk_f32 v5, v1, 0x11213141, v255 1630// CHECK: [0x01,0xff,0x0b,0x2e,0x41,0x31,0x21,0x11] 1631 1632v_madak_f32 v5, v1, v2, 0x11213141 1633// CHECK: [0x01,0x05,0x0a,0x30,0x41,0x31,0x21,0x11] 1634 1635v_madak_f32 v255, v1, v2, 0x11213141 1636// CHECK: [0x01,0x05,0xfe,0x31,0x41,0x31,0x21,0x11] 1637 1638v_madak_f32 v5, v255, v2, 0x11213141 1639// CHECK: [0xff,0x05,0x0a,0x30,0x41,0x31,0x21,0x11] 1640 1641v_madak_f32 v5, 0, v2, 0x11213141 1642// CHECK: [0x80,0x04,0x0a,0x30,0x41,0x31,0x21,0x11] 1643 1644v_madak_f32 v5, -1, v2, 0x11213141 1645// CHECK: [0xc1,0x04,0x0a,0x30,0x41,0x31,0x21,0x11] 1646 1647v_madak_f32 v5, 0.5, v2, 0x11213141 1648// CHECK: [0xf0,0x04,0x0a,0x30,0x41,0x31,0x21,0x11] 1649 1650v_madak_f32 v5, -4.0, v2, 0x11213141 1651// CHECK: [0xf7,0x04,0x0a,0x30,0x41,0x31,0x21,0x11] 1652 1653v_madak_f32 v5, src_lds_direct, v2, 0x11213141 1654// CHECK: [0xfe,0x04,0x0a,0x30,0x41,0x31,0x21,0x11] 1655 1656v_madak_f32 v5, v1, v255, 0x11213141 1657// CHECK: [0x01,0xff,0x0b,0x30,0x41,0x31,0x21,0x11] 1658 1659v_madak_f32 v5, v1, v2, 0xa1b1c1d1 1660// CHECK: [0x01,0x05,0x0a,0x30,0xd1,0xc1,0xb1,0xa1] 1661 1662v_add_co_u32 v5, vcc, v1, v2 1663// CHECK: [0x01,0x05,0x0a,0x32] 1664 1665v_add_co_u32 v255, vcc, v1, v2 1666// CHECK: [0x01,0x05,0xfe,0x33] 1667 1668v_add_co_u32 v5, vcc, v255, v2 1669// CHECK: [0xff,0x05,0x0a,0x32] 1670 1671v_add_co_u32 v5, vcc, s1, v2 1672// CHECK: [0x01,0x04,0x0a,0x32] 1673 1674v_add_co_u32 v5, vcc, s101, v2 1675// CHECK: [0x65,0x04,0x0a,0x32] 1676 1677v_add_co_u32 v5, vcc, flat_scratch_lo, v2 1678// CHECK: [0x66,0x04,0x0a,0x32] 1679 1680v_add_co_u32 v5, vcc, flat_scratch_hi, v2 1681// CHECK: [0x67,0x04,0x0a,0x32] 1682 1683v_add_co_u32 v5, vcc, vcc_lo, v2 1684// CHECK: [0x6a,0x04,0x0a,0x32] 1685 1686v_add_co_u32 v5, vcc, vcc_hi, v2 1687// CHECK: [0x6b,0x04,0x0a,0x32] 1688 1689v_add_co_u32 v5, vcc, ttmp15, v2 1690// CHECK: [0x7b,0x04,0x0a,0x32] 1691 1692v_add_co_u32 v5, vcc, m0, v2 1693// CHECK: [0x7c,0x04,0x0a,0x32] 1694 1695v_add_co_u32 v5, vcc, exec_lo, v2 1696// CHECK: [0x7e,0x04,0x0a,0x32] 1697 1698v_add_co_u32 v5, vcc, exec_hi, v2 1699// CHECK: [0x7f,0x04,0x0a,0x32] 1700 1701v_add_co_u32 v5, vcc, 0, v2 1702// CHECK: [0x80,0x04,0x0a,0x32] 1703 1704v_add_co_u32 v5, vcc, -1, v2 1705// CHECK: [0xc1,0x04,0x0a,0x32] 1706 1707v_add_co_u32 v5, vcc, 0.5, v2 1708// CHECK: [0xf0,0x04,0x0a,0x32] 1709 1710v_add_co_u32 v5, vcc, -4.0, v2 1711// CHECK: [0xf7,0x04,0x0a,0x32] 1712 1713v_add_co_u32 v5, vcc, src_vccz, v2 1714// CHECK: [0xfb,0x04,0x0a,0x32] 1715 1716v_add_co_u32 v5, vcc, src_execz, v2 1717// CHECK: [0xfc,0x04,0x0a,0x32] 1718 1719v_add_co_u32 v5, vcc, src_scc, v2 1720// CHECK: [0xfd,0x04,0x0a,0x32] 1721 1722v_add_co_u32 v5, vcc, src_lds_direct, v2 1723// CHECK: [0xfe,0x04,0x0a,0x32] 1724 1725v_add_co_u32 v5, vcc, 0xaf123456, v2 1726// CHECK: [0xff,0x04,0x0a,0x32,0x56,0x34,0x12,0xaf] 1727 1728v_add_co_u32 v5, vcc, 0x3f717273, v2 1729// CHECK: [0xff,0x04,0x0a,0x32,0x73,0x72,0x71,0x3f] 1730 1731v_add_co_u32 v5, vcc, v1, v255 1732// CHECK: [0x01,0xff,0x0b,0x32] 1733 1734v_sub_co_u32 v5, vcc, v1, v2 1735// CHECK: [0x01,0x05,0x0a,0x34] 1736 1737v_sub_co_u32 v255, vcc, v1, v2 1738// CHECK: [0x01,0x05,0xfe,0x35] 1739 1740v_sub_co_u32 v5, vcc, v255, v2 1741// CHECK: [0xff,0x05,0x0a,0x34] 1742 1743v_sub_co_u32 v5, vcc, s1, v2 1744// CHECK: [0x01,0x04,0x0a,0x34] 1745 1746v_sub_co_u32 v5, vcc, s101, v2 1747// CHECK: [0x65,0x04,0x0a,0x34] 1748 1749v_sub_co_u32 v5, vcc, flat_scratch_lo, v2 1750// CHECK: [0x66,0x04,0x0a,0x34] 1751 1752v_sub_co_u32 v5, vcc, flat_scratch_hi, v2 1753// CHECK: [0x67,0x04,0x0a,0x34] 1754 1755v_sub_co_u32 v5, vcc, vcc_lo, v2 1756// CHECK: [0x6a,0x04,0x0a,0x34] 1757 1758v_sub_co_u32 v5, vcc, vcc_hi, v2 1759// CHECK: [0x6b,0x04,0x0a,0x34] 1760 1761v_sub_co_u32 v5, vcc, ttmp15, v2 1762// CHECK: [0x7b,0x04,0x0a,0x34] 1763 1764v_sub_co_u32 v5, vcc, m0, v2 1765// CHECK: [0x7c,0x04,0x0a,0x34] 1766 1767v_sub_co_u32 v5, vcc, exec_lo, v2 1768// CHECK: [0x7e,0x04,0x0a,0x34] 1769 1770v_sub_co_u32 v5, vcc, exec_hi, v2 1771// CHECK: [0x7f,0x04,0x0a,0x34] 1772 1773v_sub_co_u32 v5, vcc, 0, v2 1774// CHECK: [0x80,0x04,0x0a,0x34] 1775 1776v_sub_co_u32 v5, vcc, -1, v2 1777// CHECK: [0xc1,0x04,0x0a,0x34] 1778 1779v_sub_co_u32 v5, vcc, 0.5, v2 1780// CHECK: [0xf0,0x04,0x0a,0x34] 1781 1782v_sub_co_u32 v5, vcc, -4.0, v2 1783// CHECK: [0xf7,0x04,0x0a,0x34] 1784 1785v_sub_co_u32 v5, vcc, src_vccz, v2 1786// CHECK: [0xfb,0x04,0x0a,0x34] 1787 1788v_sub_co_u32 v5, vcc, src_execz, v2 1789// CHECK: [0xfc,0x04,0x0a,0x34] 1790 1791v_sub_co_u32 v5, vcc, src_scc, v2 1792// CHECK: [0xfd,0x04,0x0a,0x34] 1793 1794v_sub_co_u32 v5, vcc, src_lds_direct, v2 1795// CHECK: [0xfe,0x04,0x0a,0x34] 1796 1797v_sub_co_u32 v5, vcc, 0xaf123456, v2 1798// CHECK: [0xff,0x04,0x0a,0x34,0x56,0x34,0x12,0xaf] 1799 1800v_sub_co_u32 v5, vcc, 0x3f717273, v2 1801// CHECK: [0xff,0x04,0x0a,0x34,0x73,0x72,0x71,0x3f] 1802 1803v_sub_co_u32 v5, vcc, v1, v255 1804// CHECK: [0x01,0xff,0x0b,0x34] 1805 1806v_subrev_co_u32 v5, vcc, v1, v2 1807// CHECK: [0x01,0x05,0x0a,0x36] 1808 1809v_subrev_co_u32 v255, vcc, v1, v2 1810// CHECK: [0x01,0x05,0xfe,0x37] 1811 1812v_subrev_co_u32 v5, vcc, v255, v2 1813// CHECK: [0xff,0x05,0x0a,0x36] 1814 1815v_subrev_co_u32 v5, vcc, s1, v2 1816// CHECK: [0x01,0x04,0x0a,0x36] 1817 1818v_subrev_co_u32 v5, vcc, s101, v2 1819// CHECK: [0x65,0x04,0x0a,0x36] 1820 1821v_subrev_co_u32 v5, vcc, flat_scratch_lo, v2 1822// CHECK: [0x66,0x04,0x0a,0x36] 1823 1824v_subrev_co_u32 v5, vcc, flat_scratch_hi, v2 1825// CHECK: [0x67,0x04,0x0a,0x36] 1826 1827v_subrev_co_u32 v5, vcc, vcc_lo, v2 1828// CHECK: [0x6a,0x04,0x0a,0x36] 1829 1830v_subrev_co_u32 v5, vcc, vcc_hi, v2 1831// CHECK: [0x6b,0x04,0x0a,0x36] 1832 1833v_subrev_co_u32 v5, vcc, ttmp15, v2 1834// CHECK: [0x7b,0x04,0x0a,0x36] 1835 1836v_subrev_co_u32 v5, vcc, m0, v2 1837// CHECK: [0x7c,0x04,0x0a,0x36] 1838 1839v_subrev_co_u32 v5, vcc, exec_lo, v2 1840// CHECK: [0x7e,0x04,0x0a,0x36] 1841 1842v_subrev_co_u32 v5, vcc, exec_hi, v2 1843// CHECK: [0x7f,0x04,0x0a,0x36] 1844 1845v_subrev_co_u32 v5, vcc, 0, v2 1846// CHECK: [0x80,0x04,0x0a,0x36] 1847 1848v_subrev_co_u32 v5, vcc, -1, v2 1849// CHECK: [0xc1,0x04,0x0a,0x36] 1850 1851v_subrev_co_u32 v5, vcc, 0.5, v2 1852// CHECK: [0xf0,0x04,0x0a,0x36] 1853 1854v_subrev_co_u32 v5, vcc, -4.0, v2 1855// CHECK: [0xf7,0x04,0x0a,0x36] 1856 1857v_subrev_co_u32 v5, vcc, src_vccz, v2 1858// CHECK: [0xfb,0x04,0x0a,0x36] 1859 1860v_subrev_co_u32 v5, vcc, src_execz, v2 1861// CHECK: [0xfc,0x04,0x0a,0x36] 1862 1863v_subrev_co_u32 v5, vcc, src_scc, v2 1864// CHECK: [0xfd,0x04,0x0a,0x36] 1865 1866v_subrev_co_u32 v5, vcc, 0xaf123456, v2 1867// CHECK: [0xff,0x04,0x0a,0x36,0x56,0x34,0x12,0xaf] 1868 1869v_subrev_co_u32 v5, vcc, 0x3f717273, v2 1870// CHECK: [0xff,0x04,0x0a,0x36,0x73,0x72,0x71,0x3f] 1871 1872v_subrev_co_u32 v5, vcc, v1, v255 1873// CHECK: [0x01,0xff,0x0b,0x36] 1874 1875v_addc_co_u32 v5, vcc, v1, v2, vcc 1876// CHECK: [0x01,0x05,0x0a,0x38] 1877 1878v_addc_co_u32 v255, vcc, v1, v2, vcc 1879// CHECK: [0x01,0x05,0xfe,0x39] 1880 1881v_addc_co_u32 v5, vcc, v255, v2, vcc 1882// CHECK: [0xff,0x05,0x0a,0x38] 1883 1884v_addc_co_u32 v5, vcc, 0, v2, vcc 1885// CHECK: [0x80,0x04,0x0a,0x38] 1886 1887v_addc_co_u32 v5, vcc, -1, v2, vcc 1888// CHECK: [0xc1,0x04,0x0a,0x38] 1889 1890v_addc_co_u32 v5, vcc, 0.5, v2, vcc 1891// CHECK: [0xf0,0x04,0x0a,0x38] 1892 1893v_addc_co_u32 v5, vcc, -4.0, v2, vcc 1894// CHECK: [0xf7,0x04,0x0a,0x38] 1895 1896v_addc_co_u32 v5, vcc, src_lds_direct, v2, vcc 1897// CHECK: [0xfe,0x04,0x0a,0x38] 1898 1899v_addc_co_u32 v5, vcc, v1, v255, vcc 1900// CHECK: [0x01,0xff,0x0b,0x38] 1901 1902v_subb_co_u32 v5, vcc, v1, v2, vcc 1903// CHECK: [0x01,0x05,0x0a,0x3a] 1904 1905v_subb_co_u32 v255, vcc, v1, v2, vcc 1906// CHECK: [0x01,0x05,0xfe,0x3b] 1907 1908v_subb_co_u32 v5, vcc, v255, v2, vcc 1909// CHECK: [0xff,0x05,0x0a,0x3a] 1910 1911v_subb_co_u32 v5, vcc, 0, v2, vcc 1912// CHECK: [0x80,0x04,0x0a,0x3a] 1913 1914v_subb_co_u32 v5, vcc, -1, v2, vcc 1915// CHECK: [0xc1,0x04,0x0a,0x3a] 1916 1917v_subb_co_u32 v5, vcc, 0.5, v2, vcc 1918// CHECK: [0xf0,0x04,0x0a,0x3a] 1919 1920v_subb_co_u32 v5, vcc, -4.0, v2, vcc 1921// CHECK: [0xf7,0x04,0x0a,0x3a] 1922 1923v_subb_co_u32 v5, vcc, src_lds_direct, v2, vcc 1924// CHECK: [0xfe,0x04,0x0a,0x3a] 1925 1926v_subb_co_u32 v5, vcc, v1, v255, vcc 1927// CHECK: [0x01,0xff,0x0b,0x3a] 1928 1929v_subbrev_co_u32 v5, vcc, v1, v2, vcc 1930// CHECK: [0x01,0x05,0x0a,0x3c] 1931 1932v_subbrev_co_u32 v255, vcc, v1, v2, vcc 1933// CHECK: [0x01,0x05,0xfe,0x3d] 1934 1935v_subbrev_co_u32 v5, vcc, v255, v2, vcc 1936// CHECK: [0xff,0x05,0x0a,0x3c] 1937 1938v_subbrev_co_u32 v5, vcc, 0, v2, vcc 1939// CHECK: [0x80,0x04,0x0a,0x3c] 1940 1941v_subbrev_co_u32 v5, vcc, -1, v2, vcc 1942// CHECK: [0xc1,0x04,0x0a,0x3c] 1943 1944v_subbrev_co_u32 v5, vcc, 0.5, v2, vcc 1945// CHECK: [0xf0,0x04,0x0a,0x3c] 1946 1947v_subbrev_co_u32 v5, vcc, -4.0, v2, vcc 1948// CHECK: [0xf7,0x04,0x0a,0x3c] 1949 1950v_subbrev_co_u32 v5, vcc, v1, v255, vcc 1951// CHECK: [0x01,0xff,0x0b,0x3c] 1952 1953v_add_f16 v5, v1, v2 1954// CHECK: [0x01,0x05,0x0a,0x3e] 1955 1956v_add_f16 v255, v1, v2 1957// CHECK: [0x01,0x05,0xfe,0x3f] 1958 1959v_add_f16 v5, v255, v2 1960// CHECK: [0xff,0x05,0x0a,0x3e] 1961 1962v_add_f16 v5, s1, v2 1963// CHECK: [0x01,0x04,0x0a,0x3e] 1964 1965v_add_f16 v5, s101, v2 1966// CHECK: [0x65,0x04,0x0a,0x3e] 1967 1968v_add_f16 v5, flat_scratch_lo, v2 1969// CHECK: [0x66,0x04,0x0a,0x3e] 1970 1971v_add_f16 v5, flat_scratch_hi, v2 1972// CHECK: [0x67,0x04,0x0a,0x3e] 1973 1974v_add_f16 v5, vcc_lo, v2 1975// CHECK: [0x6a,0x04,0x0a,0x3e] 1976 1977v_add_f16 v5, vcc_hi, v2 1978// CHECK: [0x6b,0x04,0x0a,0x3e] 1979 1980v_add_f16 v5, ttmp15, v2 1981// CHECK: [0x7b,0x04,0x0a,0x3e] 1982 1983v_add_f16 v5, m0, v2 1984// CHECK: [0x7c,0x04,0x0a,0x3e] 1985 1986v_add_f16 v5, exec_lo, v2 1987// CHECK: [0x7e,0x04,0x0a,0x3e] 1988 1989v_add_f16 v5, exec_hi, v2 1990// CHECK: [0x7f,0x04,0x0a,0x3e] 1991 1992v_add_f16 v5, 0, v2 1993// CHECK: [0x80,0x04,0x0a,0x3e] 1994 1995v_add_f16 v5, -1, v2 1996// CHECK: [0xc1,0x04,0x0a,0x3e] 1997 1998v_add_f16 v5, 0.5, v2 1999// CHECK: [0xf0,0x04,0x0a,0x3e] 2000 2001v_add_f16 v5, -4.0, v2 2002// CHECK: [0xf7,0x04,0x0a,0x3e] 2003 2004v_add_f16 v5, src_vccz, v2 2005// CHECK: [0xfb,0x04,0x0a,0x3e] 2006 2007v_add_f16 v5, src_execz, v2 2008// CHECK: [0xfc,0x04,0x0a,0x3e] 2009 2010v_add_f16 v5, src_scc, v2 2011// CHECK: [0xfd,0x04,0x0a,0x3e] 2012 2013v_add_f16 v5, src_lds_direct, v2 2014// CHECK: [0xfe,0x04,0x0a,0x3e] 2015 2016v_add_f16 v5, 0xfe0b, v2 2017// CHECK: [0xff,0x04,0x0a,0x3e,0x0b,0xfe,0x00,0x00] 2018 2019v_add_f16 v5, 0x3456, v2 2020// CHECK: [0xff,0x04,0x0a,0x3e,0x56,0x34,0x00,0x00] 2021 2022v_add_f16 v5, v1, v255 2023// CHECK: [0x01,0xff,0x0b,0x3e] 2024 2025v_sub_f16 v5, v1, v2 2026// CHECK: [0x01,0x05,0x0a,0x40] 2027 2028v_sub_f16 v255, v1, v2 2029// CHECK: [0x01,0x05,0xfe,0x41] 2030 2031v_sub_f16 v5, v255, v2 2032// CHECK: [0xff,0x05,0x0a,0x40] 2033 2034v_sub_f16 v5, s1, v2 2035// CHECK: [0x01,0x04,0x0a,0x40] 2036 2037v_sub_f16 v5, s101, v2 2038// CHECK: [0x65,0x04,0x0a,0x40] 2039 2040v_sub_f16 v5, flat_scratch_lo, v2 2041// CHECK: [0x66,0x04,0x0a,0x40] 2042 2043v_sub_f16 v5, flat_scratch_hi, v2 2044// CHECK: [0x67,0x04,0x0a,0x40] 2045 2046v_sub_f16 v5, vcc_lo, v2 2047// CHECK: [0x6a,0x04,0x0a,0x40] 2048 2049v_sub_f16 v5, vcc_hi, v2 2050// CHECK: [0x6b,0x04,0x0a,0x40] 2051 2052v_sub_f16 v5, ttmp15, v2 2053// CHECK: [0x7b,0x04,0x0a,0x40] 2054 2055v_sub_f16 v5, m0, v2 2056// CHECK: [0x7c,0x04,0x0a,0x40] 2057 2058v_sub_f16 v5, exec_lo, v2 2059// CHECK: [0x7e,0x04,0x0a,0x40] 2060 2061v_sub_f16 v5, exec_hi, v2 2062// CHECK: [0x7f,0x04,0x0a,0x40] 2063 2064v_sub_f16 v5, 0, v2 2065// CHECK: [0x80,0x04,0x0a,0x40] 2066 2067v_sub_f16 v5, -1, v2 2068// CHECK: [0xc1,0x04,0x0a,0x40] 2069 2070v_sub_f16 v5, 0.5, v2 2071// CHECK: [0xf0,0x04,0x0a,0x40] 2072 2073v_sub_f16 v5, -4.0, v2 2074// CHECK: [0xf7,0x04,0x0a,0x40] 2075 2076v_sub_f16 v5, src_vccz, v2 2077// CHECK: [0xfb,0x04,0x0a,0x40] 2078 2079v_sub_f16 v5, src_execz, v2 2080// CHECK: [0xfc,0x04,0x0a,0x40] 2081 2082v_sub_f16 v5, src_scc, v2 2083// CHECK: [0xfd,0x04,0x0a,0x40] 2084 2085v_sub_f16 v5, src_lds_direct, v2 2086// CHECK: [0xfe,0x04,0x0a,0x40] 2087 2088v_sub_f16 v5, 0xfe0b, v2 2089// CHECK: [0xff,0x04,0x0a,0x40,0x0b,0xfe,0x00,0x00] 2090 2091v_sub_f16 v5, 0x3456, v2 2092// CHECK: [0xff,0x04,0x0a,0x40,0x56,0x34,0x00,0x00] 2093 2094v_sub_f16 v5, v1, v255 2095// CHECK: [0x01,0xff,0x0b,0x40] 2096 2097v_subrev_f16 v5, v1, v2 2098// CHECK: [0x01,0x05,0x0a,0x42] 2099 2100v_subrev_f16 v255, v1, v2 2101// CHECK: [0x01,0x05,0xfe,0x43] 2102 2103v_subrev_f16 v5, v255, v2 2104// CHECK: [0xff,0x05,0x0a,0x42] 2105 2106v_subrev_f16 v5, s1, v2 2107// CHECK: [0x01,0x04,0x0a,0x42] 2108 2109v_subrev_f16 v5, s101, v2 2110// CHECK: [0x65,0x04,0x0a,0x42] 2111 2112v_subrev_f16 v5, flat_scratch_lo, v2 2113// CHECK: [0x66,0x04,0x0a,0x42] 2114 2115v_subrev_f16 v5, flat_scratch_hi, v2 2116// CHECK: [0x67,0x04,0x0a,0x42] 2117 2118v_subrev_f16 v5, vcc_lo, v2 2119// CHECK: [0x6a,0x04,0x0a,0x42] 2120 2121v_subrev_f16 v5, vcc_hi, v2 2122// CHECK: [0x6b,0x04,0x0a,0x42] 2123 2124v_subrev_f16 v5, ttmp15, v2 2125// CHECK: [0x7b,0x04,0x0a,0x42] 2126 2127v_subrev_f16 v5, m0, v2 2128// CHECK: [0x7c,0x04,0x0a,0x42] 2129 2130v_subrev_f16 v5, exec_lo, v2 2131// CHECK: [0x7e,0x04,0x0a,0x42] 2132 2133v_subrev_f16 v5, exec_hi, v2 2134// CHECK: [0x7f,0x04,0x0a,0x42] 2135 2136v_subrev_f16 v5, 0, v2 2137// CHECK: [0x80,0x04,0x0a,0x42] 2138 2139v_subrev_f16 v5, -1, v2 2140// CHECK: [0xc1,0x04,0x0a,0x42] 2141 2142v_subrev_f16 v5, 0.5, v2 2143// CHECK: [0xf0,0x04,0x0a,0x42] 2144 2145v_subrev_f16 v5, -4.0, v2 2146// CHECK: [0xf7,0x04,0x0a,0x42] 2147 2148v_subrev_f16 v5, src_vccz, v2 2149// CHECK: [0xfb,0x04,0x0a,0x42] 2150 2151v_subrev_f16 v5, src_execz, v2 2152// CHECK: [0xfc,0x04,0x0a,0x42] 2153 2154v_subrev_f16 v5, src_scc, v2 2155// CHECK: [0xfd,0x04,0x0a,0x42] 2156 2157v_subrev_f16 v5, 0xfe0b, v2 2158// CHECK: [0xff,0x04,0x0a,0x42,0x0b,0xfe,0x00,0x00] 2159 2160v_subrev_f16 v5, 0x3456, v2 2161// CHECK: [0xff,0x04,0x0a,0x42,0x56,0x34,0x00,0x00] 2162 2163v_subrev_f16 v5, v1, v255 2164// CHECK: [0x01,0xff,0x0b,0x42] 2165 2166v_mul_f16 v5, v1, v2 2167// CHECK: [0x01,0x05,0x0a,0x44] 2168 2169v_mul_f16 v255, v1, v2 2170// CHECK: [0x01,0x05,0xfe,0x45] 2171 2172v_mul_f16 v5, v255, v2 2173// CHECK: [0xff,0x05,0x0a,0x44] 2174 2175v_mul_f16 v5, s1, v2 2176// CHECK: [0x01,0x04,0x0a,0x44] 2177 2178v_mul_f16 v5, s101, v2 2179// CHECK: [0x65,0x04,0x0a,0x44] 2180 2181v_mul_f16 v5, flat_scratch_lo, v2 2182// CHECK: [0x66,0x04,0x0a,0x44] 2183 2184v_mul_f16 v5, flat_scratch_hi, v2 2185// CHECK: [0x67,0x04,0x0a,0x44] 2186 2187v_mul_f16 v5, vcc_lo, v2 2188// CHECK: [0x6a,0x04,0x0a,0x44] 2189 2190v_mul_f16 v5, vcc_hi, v2 2191// CHECK: [0x6b,0x04,0x0a,0x44] 2192 2193v_mul_f16 v5, ttmp15, v2 2194// CHECK: [0x7b,0x04,0x0a,0x44] 2195 2196v_mul_f16 v5, m0, v2 2197// CHECK: [0x7c,0x04,0x0a,0x44] 2198 2199v_mul_f16 v5, exec_lo, v2 2200// CHECK: [0x7e,0x04,0x0a,0x44] 2201 2202v_mul_f16 v5, exec_hi, v2 2203// CHECK: [0x7f,0x04,0x0a,0x44] 2204 2205v_mul_f16 v5, 0, v2 2206// CHECK: [0x80,0x04,0x0a,0x44] 2207 2208v_mul_f16 v5, -1, v2 2209// CHECK: [0xc1,0x04,0x0a,0x44] 2210 2211v_mul_f16 v5, 0.5, v2 2212// CHECK: [0xf0,0x04,0x0a,0x44] 2213 2214v_mul_f16 v5, -4.0, v2 2215// CHECK: [0xf7,0x04,0x0a,0x44] 2216 2217v_mul_f16 v5, src_vccz, v2 2218// CHECK: [0xfb,0x04,0x0a,0x44] 2219 2220v_mul_f16 v5, src_execz, v2 2221// CHECK: [0xfc,0x04,0x0a,0x44] 2222 2223v_mul_f16 v5, src_scc, v2 2224// CHECK: [0xfd,0x04,0x0a,0x44] 2225 2226v_mul_f16 v5, src_lds_direct, v2 2227// CHECK: [0xfe,0x04,0x0a,0x44] 2228 2229v_mul_f16 v5, 0xfe0b, v2 2230// CHECK: [0xff,0x04,0x0a,0x44,0x0b,0xfe,0x00,0x00] 2231 2232v_mul_f16 v5, 0x3456, v2 2233// CHECK: [0xff,0x04,0x0a,0x44,0x56,0x34,0x00,0x00] 2234 2235v_mul_f16 v5, v1, v255 2236// CHECK: [0x01,0xff,0x0b,0x44] 2237 2238v_mac_f16 v5, v1, v2 2239// CHECK: [0x01,0x05,0x0a,0x46] 2240 2241v_mac_f16 v255, v1, v2 2242// CHECK: [0x01,0x05,0xfe,0x47] 2243 2244v_mac_f16 v5, v255, v2 2245// CHECK: [0xff,0x05,0x0a,0x46] 2246 2247v_mac_f16 v5, s1, v2 2248// CHECK: [0x01,0x04,0x0a,0x46] 2249 2250v_mac_f16 v5, s101, v2 2251// CHECK: [0x65,0x04,0x0a,0x46] 2252 2253v_mac_f16 v5, flat_scratch_lo, v2 2254// CHECK: [0x66,0x04,0x0a,0x46] 2255 2256v_mac_f16 v5, flat_scratch_hi, v2 2257// CHECK: [0x67,0x04,0x0a,0x46] 2258 2259v_mac_f16 v5, vcc_lo, v2 2260// CHECK: [0x6a,0x04,0x0a,0x46] 2261 2262v_mac_f16 v5, vcc_hi, v2 2263// CHECK: [0x6b,0x04,0x0a,0x46] 2264 2265v_mac_f16 v5, ttmp15, v2 2266// CHECK: [0x7b,0x04,0x0a,0x46] 2267 2268v_mac_f16 v5, m0, v2 2269// CHECK: [0x7c,0x04,0x0a,0x46] 2270 2271v_mac_f16 v5, exec_lo, v2 2272// CHECK: [0x7e,0x04,0x0a,0x46] 2273 2274v_mac_f16 v5, exec_hi, v2 2275// CHECK: [0x7f,0x04,0x0a,0x46] 2276 2277v_mac_f16 v5, 0, v2 2278// CHECK: [0x80,0x04,0x0a,0x46] 2279 2280v_mac_f16 v5, -1, v2 2281// CHECK: [0xc1,0x04,0x0a,0x46] 2282 2283v_mac_f16 v5, 0.5, v2 2284// CHECK: [0xf0,0x04,0x0a,0x46] 2285 2286v_mac_f16 v5, -4.0, v2 2287// CHECK: [0xf7,0x04,0x0a,0x46] 2288 2289v_mac_f16 v5, src_vccz, v2 2290// CHECK: [0xfb,0x04,0x0a,0x46] 2291 2292v_mac_f16 v5, src_execz, v2 2293// CHECK: [0xfc,0x04,0x0a,0x46] 2294 2295v_mac_f16 v5, src_scc, v2 2296// CHECK: [0xfd,0x04,0x0a,0x46] 2297 2298v_mac_f16 v5, src_lds_direct, v2 2299// CHECK: [0xfe,0x04,0x0a,0x46] 2300 2301v_mac_f16 v5, 0xfe0b, v2 2302// CHECK: [0xff,0x04,0x0a,0x46,0x0b,0xfe,0x00,0x00] 2303 2304v_mac_f16 v5, 0x3456, v2 2305// CHECK: [0xff,0x04,0x0a,0x46,0x56,0x34,0x00,0x00] 2306 2307v_mac_f16 v5, v1, v255 2308// CHECK: [0x01,0xff,0x0b,0x46] 2309 2310v_madmk_f16 v5, v1, 0x1121, v3 2311// CHECK: [0x01,0x07,0x0a,0x48,0x21,0x11,0x00,0x00] 2312 2313v_madmk_f16 v255, v1, 0x1121, v3 2314// CHECK: [0x01,0x07,0xfe,0x49,0x21,0x11,0x00,0x00] 2315 2316v_madmk_f16 v5, v255, 0x1121, v3 2317// CHECK: [0xff,0x07,0x0a,0x48,0x21,0x11,0x00,0x00] 2318 2319v_madmk_f16 v5, 0, 0x1121, v3 2320// CHECK: [0x80,0x06,0x0a,0x48,0x21,0x11,0x00,0x00] 2321 2322v_madmk_f16 v5, -1, 0x1121, v3 2323// CHECK: [0xc1,0x06,0x0a,0x48,0x21,0x11,0x00,0x00] 2324 2325v_madmk_f16 v5, 0.5, 0x1121, v3 2326// CHECK: [0xf0,0x06,0x0a,0x48,0x21,0x11,0x00,0x00] 2327 2328v_madmk_f16 v5, -4.0, 0x1121, v3 2329// CHECK: [0xf7,0x06,0x0a,0x48,0x21,0x11,0x00,0x00] 2330 2331v_madmk_f16 v5, src_lds_direct, 0x1121, v3 2332// CHECK: [0xfe,0x06,0x0a,0x48,0x21,0x11,0x00,0x00] 2333 2334v_madmk_f16 v5, v1, 0xa1b1, v3 2335// CHECK: [0x01,0x07,0x0a,0x48,0xb1,0xa1,0x00,0x00] 2336 2337v_madmk_f16 v5, v1, 0x1121, v255 2338// CHECK: [0x01,0xff,0x0b,0x48,0x21,0x11,0x00,0x00] 2339 2340v_madmk_f16 v5, 0x1121, 0x1121, v255 2341// CHECK: [0xff,0xfe,0x0b,0x48,0x21,0x11,0x00,0x00] 2342 2343v_madak_f16 v5, v1, v2, 0x1121 2344// CHECK: [0x01,0x05,0x0a,0x4a,0x21,0x11,0x00,0x00] 2345 2346v_madak_f16 v255, v1, v2, 0x1121 2347// CHECK: [0x01,0x05,0xfe,0x4b,0x21,0x11,0x00,0x00] 2348 2349v_madak_f16 v5, v255, v2, 0x1121 2350// CHECK: [0xff,0x05,0x0a,0x4a,0x21,0x11,0x00,0x00] 2351 2352v_madak_f16 v5, 0, v2, 0x1121 2353// CHECK: [0x80,0x04,0x0a,0x4a,0x21,0x11,0x00,0x00] 2354 2355v_madak_f16 v5, -1, v2, 0x1121 2356// CHECK: [0xc1,0x04,0x0a,0x4a,0x21,0x11,0x00,0x00] 2357 2358v_madak_f16 v5, 0.5, v2, 0x1121 2359// CHECK: [0xf0,0x04,0x0a,0x4a,0x21,0x11,0x00,0x00] 2360 2361v_madak_f16 v5, -4.0, v2, 0x1121 2362// CHECK: [0xf7,0x04,0x0a,0x4a,0x21,0x11,0x00,0x00] 2363 2364v_madak_f16 v5, src_lds_direct, v2, 0x1121 2365// CHECK: [0xfe,0x04,0x0a,0x4a,0x21,0x11,0x00,0x00] 2366 2367v_madak_f16 v5, v1, v255, 0x1121 2368// CHECK: [0x01,0xff,0x0b,0x4a,0x21,0x11,0x00,0x00] 2369 2370v_madak_f16 v5, v1, v2, 0xa1b1 2371// CHECK: [0x01,0x05,0x0a,0x4a,0xb1,0xa1,0x00,0x00] 2372 2373v_madak_f16 v5, 0x1121, v2, 0x1121 2374// CHECK: [0xff,0x04,0x0a,0x4a,0x21,0x11,0x00,0x00] 2375 2376v_add_u16 v5, v1, v2 2377// CHECK: [0x01,0x05,0x0a,0x4c] 2378 2379v_add_u16 v255, v1, v2 2380// CHECK: [0x01,0x05,0xfe,0x4d] 2381 2382v_add_u16 v5, v255, v2 2383// CHECK: [0xff,0x05,0x0a,0x4c] 2384 2385v_add_u16 v5, s1, v2 2386// CHECK: [0x01,0x04,0x0a,0x4c] 2387 2388v_add_u16 v5, s101, v2 2389// CHECK: [0x65,0x04,0x0a,0x4c] 2390 2391v_add_u16 v5, flat_scratch_lo, v2 2392// CHECK: [0x66,0x04,0x0a,0x4c] 2393 2394v_add_u16 v5, flat_scratch_hi, v2 2395// CHECK: [0x67,0x04,0x0a,0x4c] 2396 2397v_add_u16 v5, vcc_lo, v2 2398// CHECK: [0x6a,0x04,0x0a,0x4c] 2399 2400v_add_u16 v5, vcc_hi, v2 2401// CHECK: [0x6b,0x04,0x0a,0x4c] 2402 2403v_add_u16 v5, ttmp15, v2 2404// CHECK: [0x7b,0x04,0x0a,0x4c] 2405 2406v_add_u16 v5, m0, v2 2407// CHECK: [0x7c,0x04,0x0a,0x4c] 2408 2409v_add_u16 v5, exec_lo, v2 2410// CHECK: [0x7e,0x04,0x0a,0x4c] 2411 2412v_add_u16 v5, exec_hi, v2 2413// CHECK: [0x7f,0x04,0x0a,0x4c] 2414 2415v_add_u16 v5, 0, v2 2416// CHECK: [0x80,0x04,0x0a,0x4c] 2417 2418v_add_u16 v5, -1, v2 2419// CHECK: [0xc1,0x04,0x0a,0x4c] 2420 2421v_add_u16 v5, 0.5, v2 2422// CHECK: [0xff,0x04,0x0a,0x4c,0x00,0x38,0x00,0x00] 2423 2424v_add_u16 v5, -4.0, v2 2425// CHECK: [0xff,0x04,0x0a,0x4c,0x00,0xc4,0x00,0x00] 2426 2427v_add_u16 v5, src_vccz, v2 2428// CHECK: [0xfb,0x04,0x0a,0x4c] 2429 2430v_add_u16 v5, src_execz, v2 2431// CHECK: [0xfc,0x04,0x0a,0x4c] 2432 2433v_add_u16 v5, src_scc, v2 2434// CHECK: [0xfd,0x04,0x0a,0x4c] 2435 2436v_add_u16 v5, src_lds_direct, v2 2437// CHECK: [0xfe,0x04,0x0a,0x4c] 2438 2439v_add_u16 v5, 0xfe0b, v2 2440// CHECK: [0xff,0x04,0x0a,0x4c,0x0b,0xfe,0x00,0x00] 2441 2442v_add_u16 v5, 0x3456, v2 2443// CHECK: [0xff,0x04,0x0a,0x4c,0x56,0x34,0x00,0x00] 2444 2445v_add_u16 v5, v1, v255 2446// CHECK: [0x01,0xff,0x0b,0x4c] 2447 2448v_sub_u16 v5, v1, v2 2449// CHECK: [0x01,0x05,0x0a,0x4e] 2450 2451v_sub_u16 v255, v1, v2 2452// CHECK: [0x01,0x05,0xfe,0x4f] 2453 2454v_sub_u16 v5, v255, v2 2455// CHECK: [0xff,0x05,0x0a,0x4e] 2456 2457v_sub_u16 v5, s1, v2 2458// CHECK: [0x01,0x04,0x0a,0x4e] 2459 2460v_sub_u16 v5, s101, v2 2461// CHECK: [0x65,0x04,0x0a,0x4e] 2462 2463v_sub_u16 v5, flat_scratch_lo, v2 2464// CHECK: [0x66,0x04,0x0a,0x4e] 2465 2466v_sub_u16 v5, flat_scratch_hi, v2 2467// CHECK: [0x67,0x04,0x0a,0x4e] 2468 2469v_sub_u16 v5, vcc_lo, v2 2470// CHECK: [0x6a,0x04,0x0a,0x4e] 2471 2472v_sub_u16 v5, vcc_hi, v2 2473// CHECK: [0x6b,0x04,0x0a,0x4e] 2474 2475v_sub_u16 v5, ttmp15, v2 2476// CHECK: [0x7b,0x04,0x0a,0x4e] 2477 2478v_sub_u16 v5, m0, v2 2479// CHECK: [0x7c,0x04,0x0a,0x4e] 2480 2481v_sub_u16 v5, exec_lo, v2 2482// CHECK: [0x7e,0x04,0x0a,0x4e] 2483 2484v_sub_u16 v5, exec_hi, v2 2485// CHECK: [0x7f,0x04,0x0a,0x4e] 2486 2487v_sub_u16 v5, 0, v2 2488// CHECK: [0x80,0x04,0x0a,0x4e] 2489 2490v_sub_u16 v5, -1, v2 2491// CHECK: [0xc1,0x04,0x0a,0x4e] 2492 2493v_sub_u16 v5, 0.5, v2 2494// CHECK: [0xff,0x04,0x0a,0x4e,0x00,0x38,0x00,0x00] 2495 2496v_sub_u16 v5, -4.0, v2 2497// CHECK: [0xff,0x04,0x0a,0x4e,0x00,0xc4,0x00,0x00] 2498 2499v_sub_u16 v5, src_vccz, v2 2500// CHECK: [0xfb,0x04,0x0a,0x4e] 2501 2502v_sub_u16 v5, src_execz, v2 2503// CHECK: [0xfc,0x04,0x0a,0x4e] 2504 2505v_sub_u16 v5, src_scc, v2 2506// CHECK: [0xfd,0x04,0x0a,0x4e] 2507 2508v_sub_u16 v5, src_lds_direct, v2 2509// CHECK: [0xfe,0x04,0x0a,0x4e] 2510 2511v_sub_u16 v5, 0xfe0b, v2 2512// CHECK: [0xff,0x04,0x0a,0x4e,0x0b,0xfe,0x00,0x00] 2513 2514v_sub_u16 v5, 0x3456, v2 2515// CHECK: [0xff,0x04,0x0a,0x4e,0x56,0x34,0x00,0x00] 2516 2517v_sub_u16 v5, v1, v255 2518// CHECK: [0x01,0xff,0x0b,0x4e] 2519 2520v_subrev_u16 v5, v1, v2 2521// CHECK: [0x01,0x05,0x0a,0x50] 2522 2523v_subrev_u16 v255, v1, v2 2524// CHECK: [0x01,0x05,0xfe,0x51] 2525 2526v_subrev_u16 v5, v255, v2 2527// CHECK: [0xff,0x05,0x0a,0x50] 2528 2529v_subrev_u16 v5, s1, v2 2530// CHECK: [0x01,0x04,0x0a,0x50] 2531 2532v_subrev_u16 v5, s101, v2 2533// CHECK: [0x65,0x04,0x0a,0x50] 2534 2535v_subrev_u16 v5, flat_scratch_lo, v2 2536// CHECK: [0x66,0x04,0x0a,0x50] 2537 2538v_subrev_u16 v5, flat_scratch_hi, v2 2539// CHECK: [0x67,0x04,0x0a,0x50] 2540 2541v_subrev_u16 v5, vcc_lo, v2 2542// CHECK: [0x6a,0x04,0x0a,0x50] 2543 2544v_subrev_u16 v5, vcc_hi, v2 2545// CHECK: [0x6b,0x04,0x0a,0x50] 2546 2547v_subrev_u16 v5, ttmp15, v2 2548// CHECK: [0x7b,0x04,0x0a,0x50] 2549 2550v_subrev_u16 v5, m0, v2 2551// CHECK: [0x7c,0x04,0x0a,0x50] 2552 2553v_subrev_u16 v5, exec_lo, v2 2554// CHECK: [0x7e,0x04,0x0a,0x50] 2555 2556v_subrev_u16 v5, exec_hi, v2 2557// CHECK: [0x7f,0x04,0x0a,0x50] 2558 2559v_subrev_u16 v5, 0, v2 2560// CHECK: [0x80,0x04,0x0a,0x50] 2561 2562v_subrev_u16 v5, -1, v2 2563// CHECK: [0xc1,0x04,0x0a,0x50] 2564 2565v_subrev_u16 v5, 0.5, v2 2566// CHECK: [0xff,0x04,0x0a,0x50,0x00,0x38,0x00,0x00] 2567 2568v_subrev_u16 v5, -4.0, v2 2569// CHECK: [0xff,0x04,0x0a,0x50,0x00,0xc4,0x00,0x00] 2570 2571v_subrev_u16 v5, src_vccz, v2 2572// CHECK: [0xfb,0x04,0x0a,0x50] 2573 2574v_subrev_u16 v5, src_execz, v2 2575// CHECK: [0xfc,0x04,0x0a,0x50] 2576 2577v_subrev_u16 v5, src_scc, v2 2578// CHECK: [0xfd,0x04,0x0a,0x50] 2579 2580v_subrev_u16 v5, 0xfe0b, v2 2581// CHECK: [0xff,0x04,0x0a,0x50,0x0b,0xfe,0x00,0x00] 2582 2583v_subrev_u16 v5, 0x3456, v2 2584// CHECK: [0xff,0x04,0x0a,0x50,0x56,0x34,0x00,0x00] 2585 2586v_subrev_u16 v5, v1, v255 2587// CHECK: [0x01,0xff,0x0b,0x50] 2588 2589v_mul_lo_u16 v5, v1, v2 2590// CHECK: [0x01,0x05,0x0a,0x52] 2591 2592v_mul_lo_u16 v255, v1, v2 2593// CHECK: [0x01,0x05,0xfe,0x53] 2594 2595v_mul_lo_u16 v5, v255, v2 2596// CHECK: [0xff,0x05,0x0a,0x52] 2597 2598v_mul_lo_u16 v5, s1, v2 2599// CHECK: [0x01,0x04,0x0a,0x52] 2600 2601v_mul_lo_u16 v5, s101, v2 2602// CHECK: [0x65,0x04,0x0a,0x52] 2603 2604v_mul_lo_u16 v5, flat_scratch_lo, v2 2605// CHECK: [0x66,0x04,0x0a,0x52] 2606 2607v_mul_lo_u16 v5, flat_scratch_hi, v2 2608// CHECK: [0x67,0x04,0x0a,0x52] 2609 2610v_mul_lo_u16 v5, vcc_lo, v2 2611// CHECK: [0x6a,0x04,0x0a,0x52] 2612 2613v_mul_lo_u16 v5, vcc_hi, v2 2614// CHECK: [0x6b,0x04,0x0a,0x52] 2615 2616v_mul_lo_u16 v5, ttmp15, v2 2617// CHECK: [0x7b,0x04,0x0a,0x52] 2618 2619v_mul_lo_u16 v5, m0, v2 2620// CHECK: [0x7c,0x04,0x0a,0x52] 2621 2622v_mul_lo_u16 v5, exec_lo, v2 2623// CHECK: [0x7e,0x04,0x0a,0x52] 2624 2625v_mul_lo_u16 v5, exec_hi, v2 2626// CHECK: [0x7f,0x04,0x0a,0x52] 2627 2628v_mul_lo_u16 v5, 0, v2 2629// CHECK: [0x80,0x04,0x0a,0x52] 2630 2631v_mul_lo_u16 v5, -1, v2 2632// CHECK: [0xc1,0x04,0x0a,0x52] 2633 2634v_mul_lo_u16 v5, 0.5, v2 2635// CHECK: [0xff,0x04,0x0a,0x52,0x00,0x38,0x00,0x00] 2636 2637v_mul_lo_u16 v5, -4.0, v2 2638// CHECK: [0xff,0x04,0x0a,0x52,0x00,0xc4,0x00,0x00] 2639 2640v_mul_lo_u16 v5, src_vccz, v2 2641// CHECK: [0xfb,0x04,0x0a,0x52] 2642 2643v_mul_lo_u16 v5, src_execz, v2 2644// CHECK: [0xfc,0x04,0x0a,0x52] 2645 2646v_mul_lo_u16 v5, src_scc, v2 2647// CHECK: [0xfd,0x04,0x0a,0x52] 2648 2649v_mul_lo_u16 v5, src_lds_direct, v2 2650// CHECK: [0xfe,0x04,0x0a,0x52] 2651 2652v_mul_lo_u16 v5, 0xfe0b, v2 2653// CHECK: [0xff,0x04,0x0a,0x52,0x0b,0xfe,0x00,0x00] 2654 2655v_mul_lo_u16 v5, 0x3456, v2 2656// CHECK: [0xff,0x04,0x0a,0x52,0x56,0x34,0x00,0x00] 2657 2658v_mul_lo_u16 v5, v1, v255 2659// CHECK: [0x01,0xff,0x0b,0x52] 2660 2661v_lshlrev_b16 v5, v1, v2 2662// CHECK: [0x01,0x05,0x0a,0x54] 2663 2664v_lshlrev_b16 v255, v1, v2 2665// CHECK: [0x01,0x05,0xfe,0x55] 2666 2667v_lshlrev_b16 v5, v255, v2 2668// CHECK: [0xff,0x05,0x0a,0x54] 2669 2670v_lshlrev_b16 v5, s1, v2 2671// CHECK: [0x01,0x04,0x0a,0x54] 2672 2673v_lshlrev_b16 v5, s101, v2 2674// CHECK: [0x65,0x04,0x0a,0x54] 2675 2676v_lshlrev_b16 v5, flat_scratch_lo, v2 2677// CHECK: [0x66,0x04,0x0a,0x54] 2678 2679v_lshlrev_b16 v5, flat_scratch_hi, v2 2680// CHECK: [0x67,0x04,0x0a,0x54] 2681 2682v_lshlrev_b16 v5, vcc_lo, v2 2683// CHECK: [0x6a,0x04,0x0a,0x54] 2684 2685v_lshlrev_b16 v5, vcc_hi, v2 2686// CHECK: [0x6b,0x04,0x0a,0x54] 2687 2688v_lshlrev_b16 v5, ttmp15, v2 2689// CHECK: [0x7b,0x04,0x0a,0x54] 2690 2691v_lshlrev_b16 v5, m0, v2 2692// CHECK: [0x7c,0x04,0x0a,0x54] 2693 2694v_lshlrev_b16 v5, exec_lo, v2 2695// CHECK: [0x7e,0x04,0x0a,0x54] 2696 2697v_lshlrev_b16 v5, exec_hi, v2 2698// CHECK: [0x7f,0x04,0x0a,0x54] 2699 2700v_lshlrev_b16 v5, 0, v2 2701// CHECK: [0x80,0x04,0x0a,0x54] 2702 2703v_lshlrev_b16 v5, -1, v2 2704// CHECK: [0xc1,0x04,0x0a,0x54] 2705 2706v_lshlrev_b16 v5, 0.5, v2 2707// CHECK: [0xff,0x04,0x0a,0x54,0x00,0x38,0x00,0x00] 2708 2709v_lshlrev_b16 v5, -4.0, v2 2710// CHECK: [0xff,0x04,0x0a,0x54,0x00,0xc4,0x00,0x00] 2711 2712v_lshlrev_b16 v5, src_vccz, v2 2713// CHECK: [0xfb,0x04,0x0a,0x54] 2714 2715v_lshlrev_b16 v5, src_execz, v2 2716// CHECK: [0xfc,0x04,0x0a,0x54] 2717 2718v_lshlrev_b16 v5, src_scc, v2 2719// CHECK: [0xfd,0x04,0x0a,0x54] 2720 2721v_lshlrev_b16 v5, 0xfe0b, v2 2722// CHECK: [0xff,0x04,0x0a,0x54,0x0b,0xfe,0x00,0x00] 2723 2724v_lshlrev_b16 v5, 0x3456, v2 2725// CHECK: [0xff,0x04,0x0a,0x54,0x56,0x34,0x00,0x00] 2726 2727v_lshlrev_b16 v5, v1, v255 2728// CHECK: [0x01,0xff,0x0b,0x54] 2729 2730v_lshrrev_b16 v5, v1, v2 2731// CHECK: [0x01,0x05,0x0a,0x56] 2732 2733v_lshrrev_b16 v255, v1, v2 2734// CHECK: [0x01,0x05,0xfe,0x57] 2735 2736v_lshrrev_b16 v5, v255, v2 2737// CHECK: [0xff,0x05,0x0a,0x56] 2738 2739v_lshrrev_b16 v5, s1, v2 2740// CHECK: [0x01,0x04,0x0a,0x56] 2741 2742v_lshrrev_b16 v5, s101, v2 2743// CHECK: [0x65,0x04,0x0a,0x56] 2744 2745v_lshrrev_b16 v5, flat_scratch_lo, v2 2746// CHECK: [0x66,0x04,0x0a,0x56] 2747 2748v_lshrrev_b16 v5, flat_scratch_hi, v2 2749// CHECK: [0x67,0x04,0x0a,0x56] 2750 2751v_lshrrev_b16 v5, vcc_lo, v2 2752// CHECK: [0x6a,0x04,0x0a,0x56] 2753 2754v_lshrrev_b16 v5, vcc_hi, v2 2755// CHECK: [0x6b,0x04,0x0a,0x56] 2756 2757v_lshrrev_b16 v5, ttmp15, v2 2758// CHECK: [0x7b,0x04,0x0a,0x56] 2759 2760v_lshrrev_b16 v5, m0, v2 2761// CHECK: [0x7c,0x04,0x0a,0x56] 2762 2763v_lshrrev_b16 v5, exec_lo, v2 2764// CHECK: [0x7e,0x04,0x0a,0x56] 2765 2766v_lshrrev_b16 v5, exec_hi, v2 2767// CHECK: [0x7f,0x04,0x0a,0x56] 2768 2769v_lshrrev_b16 v5, 0, v2 2770// CHECK: [0x80,0x04,0x0a,0x56] 2771 2772v_lshrrev_b16 v5, -1, v2 2773// CHECK: [0xc1,0x04,0x0a,0x56] 2774 2775v_lshrrev_b16 v5, 0.5, v2 2776// CHECK: [0xff,0x04,0x0a,0x56,0x00,0x38,0x00,0x00] 2777 2778v_lshrrev_b16 v5, -4.0, v2 2779// CHECK: [0xff,0x04,0x0a,0x56,0x00,0xc4,0x00,0x00] 2780 2781v_lshrrev_b16 v5, src_vccz, v2 2782// CHECK: [0xfb,0x04,0x0a,0x56] 2783 2784v_lshrrev_b16 v5, src_execz, v2 2785// CHECK: [0xfc,0x04,0x0a,0x56] 2786 2787v_lshrrev_b16 v5, src_scc, v2 2788// CHECK: [0xfd,0x04,0x0a,0x56] 2789 2790v_lshrrev_b16 v5, 0xfe0b, v2 2791// CHECK: [0xff,0x04,0x0a,0x56,0x0b,0xfe,0x00,0x00] 2792 2793v_lshrrev_b16 v5, 0x3456, v2 2794// CHECK: [0xff,0x04,0x0a,0x56,0x56,0x34,0x00,0x00] 2795 2796v_lshrrev_b16 v5, v1, v255 2797// CHECK: [0x01,0xff,0x0b,0x56] 2798 2799v_ashrrev_i16 v5, v1, v2 2800// CHECK: [0x01,0x05,0x0a,0x58] 2801 2802v_ashrrev_i16 v255, v1, v2 2803// CHECK: [0x01,0x05,0xfe,0x59] 2804 2805v_ashrrev_i16 v5, v255, v2 2806// CHECK: [0xff,0x05,0x0a,0x58] 2807 2808v_ashrrev_i16 v5, s1, v2 2809// CHECK: [0x01,0x04,0x0a,0x58] 2810 2811v_ashrrev_i16 v5, s101, v2 2812// CHECK: [0x65,0x04,0x0a,0x58] 2813 2814v_ashrrev_i16 v5, flat_scratch_lo, v2 2815// CHECK: [0x66,0x04,0x0a,0x58] 2816 2817v_ashrrev_i16 v5, flat_scratch_hi, v2 2818// CHECK: [0x67,0x04,0x0a,0x58] 2819 2820v_ashrrev_i16 v5, vcc_lo, v2 2821// CHECK: [0x6a,0x04,0x0a,0x58] 2822 2823v_ashrrev_i16 v5, vcc_hi, v2 2824// CHECK: [0x6b,0x04,0x0a,0x58] 2825 2826v_ashrrev_i16 v5, ttmp15, v2 2827// CHECK: [0x7b,0x04,0x0a,0x58] 2828 2829v_ashrrev_i16 v5, m0, v2 2830// CHECK: [0x7c,0x04,0x0a,0x58] 2831 2832v_ashrrev_i16 v5, exec_lo, v2 2833// CHECK: [0x7e,0x04,0x0a,0x58] 2834 2835v_ashrrev_i16 v5, exec_hi, v2 2836// CHECK: [0x7f,0x04,0x0a,0x58] 2837 2838v_ashrrev_i16 v5, 0, v2 2839// CHECK: [0x80,0x04,0x0a,0x58] 2840 2841v_ashrrev_i16 v5, -1, v2 2842// CHECK: [0xc1,0x04,0x0a,0x58] 2843 2844v_ashrrev_i16 v5, 0.5, v2 2845// CHECK: [0xff,0x04,0x0a,0x58,0x00,0x38,0x00,0x00] 2846 2847v_ashrrev_i16 v5, -4.0, v2 2848// CHECK: [0xff,0x04,0x0a,0x58,0x00,0xc4,0x00,0x00] 2849 2850v_ashrrev_i16 v5, src_vccz, v2 2851// CHECK: [0xfb,0x04,0x0a,0x58] 2852 2853v_ashrrev_i16 v5, src_execz, v2 2854// CHECK: [0xfc,0x04,0x0a,0x58] 2855 2856v_ashrrev_i16 v5, src_scc, v2 2857// CHECK: [0xfd,0x04,0x0a,0x58] 2858 2859v_ashrrev_i16 v5, 0xfe0b, v2 2860// CHECK: [0xff,0x04,0x0a,0x58,0x0b,0xfe,0x00,0x00] 2861 2862v_ashrrev_i16 v5, 0x3456, v2 2863// CHECK: [0xff,0x04,0x0a,0x58,0x56,0x34,0x00,0x00] 2864 2865v_ashrrev_i16 v5, v1, v255 2866// CHECK: [0x01,0xff,0x0b,0x58] 2867 2868v_max_f16 v5, v1, v2 2869// CHECK: [0x01,0x05,0x0a,0x5a] 2870 2871v_max_f16 v255, v1, v2 2872// CHECK: [0x01,0x05,0xfe,0x5b] 2873 2874v_max_f16 v5, v255, v2 2875// CHECK: [0xff,0x05,0x0a,0x5a] 2876 2877v_max_f16 v5, s1, v2 2878// CHECK: [0x01,0x04,0x0a,0x5a] 2879 2880v_max_f16 v5, s101, v2 2881// CHECK: [0x65,0x04,0x0a,0x5a] 2882 2883v_max_f16 v5, flat_scratch_lo, v2 2884// CHECK: [0x66,0x04,0x0a,0x5a] 2885 2886v_max_f16 v5, flat_scratch_hi, v2 2887// CHECK: [0x67,0x04,0x0a,0x5a] 2888 2889v_max_f16 v5, vcc_lo, v2 2890// CHECK: [0x6a,0x04,0x0a,0x5a] 2891 2892v_max_f16 v5, vcc_hi, v2 2893// CHECK: [0x6b,0x04,0x0a,0x5a] 2894 2895v_max_f16 v5, ttmp15, v2 2896// CHECK: [0x7b,0x04,0x0a,0x5a] 2897 2898v_max_f16 v5, m0, v2 2899// CHECK: [0x7c,0x04,0x0a,0x5a] 2900 2901v_max_f16 v5, exec_lo, v2 2902// CHECK: [0x7e,0x04,0x0a,0x5a] 2903 2904v_max_f16 v5, exec_hi, v2 2905// CHECK: [0x7f,0x04,0x0a,0x5a] 2906 2907v_max_f16 v5, 0, v2 2908// CHECK: [0x80,0x04,0x0a,0x5a] 2909 2910v_max_f16 v5, -1, v2 2911// CHECK: [0xc1,0x04,0x0a,0x5a] 2912 2913v_max_f16 v5, 0.5, v2 2914// CHECK: [0xf0,0x04,0x0a,0x5a] 2915 2916v_max_f16 v5, -4.0, v2 2917// CHECK: [0xf7,0x04,0x0a,0x5a] 2918 2919v_max_f16 v5, src_vccz, v2 2920// CHECK: [0xfb,0x04,0x0a,0x5a] 2921 2922v_max_f16 v5, src_execz, v2 2923// CHECK: [0xfc,0x04,0x0a,0x5a] 2924 2925v_max_f16 v5, src_scc, v2 2926// CHECK: [0xfd,0x04,0x0a,0x5a] 2927 2928v_max_f16 v5, src_lds_direct, v2 2929// CHECK: [0xfe,0x04,0x0a,0x5a] 2930 2931v_max_f16 v5, 0xfe0b, v2 2932// CHECK: [0xff,0x04,0x0a,0x5a,0x0b,0xfe,0x00,0x00] 2933 2934v_max_f16 v5, 0x3456, v2 2935// CHECK: [0xff,0x04,0x0a,0x5a,0x56,0x34,0x00,0x00] 2936 2937v_max_f16 v5, v1, v255 2938// CHECK: [0x01,0xff,0x0b,0x5a] 2939 2940v_min_f16 v5, v1, v2 2941// CHECK: [0x01,0x05,0x0a,0x5c] 2942 2943v_min_f16 v255, v1, v2 2944// CHECK: [0x01,0x05,0xfe,0x5d] 2945 2946v_min_f16 v5, v255, v2 2947// CHECK: [0xff,0x05,0x0a,0x5c] 2948 2949v_min_f16 v5, s1, v2 2950// CHECK: [0x01,0x04,0x0a,0x5c] 2951 2952v_min_f16 v5, s101, v2 2953// CHECK: [0x65,0x04,0x0a,0x5c] 2954 2955v_min_f16 v5, flat_scratch_lo, v2 2956// CHECK: [0x66,0x04,0x0a,0x5c] 2957 2958v_min_f16 v5, flat_scratch_hi, v2 2959// CHECK: [0x67,0x04,0x0a,0x5c] 2960 2961v_min_f16 v5, vcc_lo, v2 2962// CHECK: [0x6a,0x04,0x0a,0x5c] 2963 2964v_min_f16 v5, vcc_hi, v2 2965// CHECK: [0x6b,0x04,0x0a,0x5c] 2966 2967v_min_f16 v5, ttmp15, v2 2968// CHECK: [0x7b,0x04,0x0a,0x5c] 2969 2970v_min_f16 v5, m0, v2 2971// CHECK: [0x7c,0x04,0x0a,0x5c] 2972 2973v_min_f16 v5, exec_lo, v2 2974// CHECK: [0x7e,0x04,0x0a,0x5c] 2975 2976v_min_f16 v5, exec_hi, v2 2977// CHECK: [0x7f,0x04,0x0a,0x5c] 2978 2979v_min_f16 v5, 0, v2 2980// CHECK: [0x80,0x04,0x0a,0x5c] 2981 2982v_min_f16 v5, -1, v2 2983// CHECK: [0xc1,0x04,0x0a,0x5c] 2984 2985v_min_f16 v5, 0.5, v2 2986// CHECK: [0xf0,0x04,0x0a,0x5c] 2987 2988v_min_f16 v5, -4.0, v2 2989// CHECK: [0xf7,0x04,0x0a,0x5c] 2990 2991v_min_f16 v5, src_vccz, v2 2992// CHECK: [0xfb,0x04,0x0a,0x5c] 2993 2994v_min_f16 v5, src_execz, v2 2995// CHECK: [0xfc,0x04,0x0a,0x5c] 2996 2997v_min_f16 v5, src_scc, v2 2998// CHECK: [0xfd,0x04,0x0a,0x5c] 2999 3000v_min_f16 v5, src_lds_direct, v2 3001// CHECK: [0xfe,0x04,0x0a,0x5c] 3002 3003v_min_f16 v5, 0xfe0b, v2 3004// CHECK: [0xff,0x04,0x0a,0x5c,0x0b,0xfe,0x00,0x00] 3005 3006v_min_f16 v5, 0x3456, v2 3007// CHECK: [0xff,0x04,0x0a,0x5c,0x56,0x34,0x00,0x00] 3008 3009v_min_f16 v5, v1, v255 3010// CHECK: [0x01,0xff,0x0b,0x5c] 3011 3012v_max_u16 v5, v1, v2 3013// CHECK: [0x01,0x05,0x0a,0x5e] 3014 3015v_max_u16 v255, v1, v2 3016// CHECK: [0x01,0x05,0xfe,0x5f] 3017 3018v_max_u16 v5, v255, v2 3019// CHECK: [0xff,0x05,0x0a,0x5e] 3020 3021v_max_u16 v5, s1, v2 3022// CHECK: [0x01,0x04,0x0a,0x5e] 3023 3024v_max_u16 v5, s101, v2 3025// CHECK: [0x65,0x04,0x0a,0x5e] 3026 3027v_max_u16 v5, flat_scratch_lo, v2 3028// CHECK: [0x66,0x04,0x0a,0x5e] 3029 3030v_max_u16 v5, flat_scratch_hi, v2 3031// CHECK: [0x67,0x04,0x0a,0x5e] 3032 3033v_max_u16 v5, vcc_lo, v2 3034// CHECK: [0x6a,0x04,0x0a,0x5e] 3035 3036v_max_u16 v5, vcc_hi, v2 3037// CHECK: [0x6b,0x04,0x0a,0x5e] 3038 3039v_max_u16 v5, ttmp15, v2 3040// CHECK: [0x7b,0x04,0x0a,0x5e] 3041 3042v_max_u16 v5, m0, v2 3043// CHECK: [0x7c,0x04,0x0a,0x5e] 3044 3045v_max_u16 v5, exec_lo, v2 3046// CHECK: [0x7e,0x04,0x0a,0x5e] 3047 3048v_max_u16 v5, exec_hi, v2 3049// CHECK: [0x7f,0x04,0x0a,0x5e] 3050 3051v_max_u16 v5, 0, v2 3052// CHECK: [0x80,0x04,0x0a,0x5e] 3053 3054v_max_u16 v5, -1, v2 3055// CHECK: [0xc1,0x04,0x0a,0x5e] 3056 3057v_max_u16 v5, 0.5, v2 3058// CHECK: [0xff,0x04,0x0a,0x5e,0x00,0x38,0x00,0x00] 3059 3060v_max_u16 v5, -4.0, v2 3061// CHECK: [0xff,0x04,0x0a,0x5e,0x00,0xc4,0x00,0x00] 3062 3063v_max_u16 v5, src_vccz, v2 3064// CHECK: [0xfb,0x04,0x0a,0x5e] 3065 3066v_max_u16 v5, src_execz, v2 3067// CHECK: [0xfc,0x04,0x0a,0x5e] 3068 3069v_max_u16 v5, src_scc, v2 3070// CHECK: [0xfd,0x04,0x0a,0x5e] 3071 3072v_max_u16 v5, src_lds_direct, v2 3073// CHECK: [0xfe,0x04,0x0a,0x5e] 3074 3075v_max_u16 v5, 0xfe0b, v2 3076// CHECK: [0xff,0x04,0x0a,0x5e,0x0b,0xfe,0x00,0x00] 3077 3078v_max_u16 v5, 0x3456, v2 3079// CHECK: [0xff,0x04,0x0a,0x5e,0x56,0x34,0x00,0x00] 3080 3081v_max_u16 v5, v1, v255 3082// CHECK: [0x01,0xff,0x0b,0x5e] 3083 3084v_max_i16 v5, v1, v2 3085// CHECK: [0x01,0x05,0x0a,0x60] 3086 3087v_max_i16 v255, v1, v2 3088// CHECK: [0x01,0x05,0xfe,0x61] 3089 3090v_max_i16 v5, v255, v2 3091// CHECK: [0xff,0x05,0x0a,0x60] 3092 3093v_max_i16 v5, s1, v2 3094// CHECK: [0x01,0x04,0x0a,0x60] 3095 3096v_max_i16 v5, s101, v2 3097// CHECK: [0x65,0x04,0x0a,0x60] 3098 3099v_max_i16 v5, flat_scratch_lo, v2 3100// CHECK: [0x66,0x04,0x0a,0x60] 3101 3102v_max_i16 v5, flat_scratch_hi, v2 3103// CHECK: [0x67,0x04,0x0a,0x60] 3104 3105v_max_i16 v5, vcc_lo, v2 3106// CHECK: [0x6a,0x04,0x0a,0x60] 3107 3108v_max_i16 v5, vcc_hi, v2 3109// CHECK: [0x6b,0x04,0x0a,0x60] 3110 3111v_max_i16 v5, ttmp15, v2 3112// CHECK: [0x7b,0x04,0x0a,0x60] 3113 3114v_max_i16 v5, m0, v2 3115// CHECK: [0x7c,0x04,0x0a,0x60] 3116 3117v_max_i16 v5, exec_lo, v2 3118// CHECK: [0x7e,0x04,0x0a,0x60] 3119 3120v_max_i16 v5, exec_hi, v2 3121// CHECK: [0x7f,0x04,0x0a,0x60] 3122 3123v_max_i16 v5, 0, v2 3124// CHECK: [0x80,0x04,0x0a,0x60] 3125 3126v_max_i16 v5, -1, v2 3127// CHECK: [0xc1,0x04,0x0a,0x60] 3128 3129v_max_i16 v5, 0.5, v2 3130// CHECK: [0xff,0x04,0x0a,0x60,0x00,0x38,0x00,0x00] 3131 3132v_max_i16 v5, -4.0, v2 3133// CHECK: [0xff,0x04,0x0a,0x60,0x00,0xc4,0x00,0x00] 3134 3135v_max_i16 v5, src_vccz, v2 3136// CHECK: [0xfb,0x04,0x0a,0x60] 3137 3138v_max_i16 v5, src_execz, v2 3139// CHECK: [0xfc,0x04,0x0a,0x60] 3140 3141v_max_i16 v5, src_scc, v2 3142// CHECK: [0xfd,0x04,0x0a,0x60] 3143 3144v_max_i16 v5, src_lds_direct, v2 3145// CHECK: [0xfe,0x04,0x0a,0x60] 3146 3147v_max_i16 v5, 0xfe0b, v2 3148// CHECK: [0xff,0x04,0x0a,0x60,0x0b,0xfe,0x00,0x00] 3149 3150v_max_i16 v5, 0x3456, v2 3151// CHECK: [0xff,0x04,0x0a,0x60,0x56,0x34,0x00,0x00] 3152 3153v_max_i16 v5, v1, v255 3154// CHECK: [0x01,0xff,0x0b,0x60] 3155 3156v_min_u16 v5, v1, v2 3157// CHECK: [0x01,0x05,0x0a,0x62] 3158 3159v_min_u16 v255, v1, v2 3160// CHECK: [0x01,0x05,0xfe,0x63] 3161 3162v_min_u16 v5, v255, v2 3163// CHECK: [0xff,0x05,0x0a,0x62] 3164 3165v_min_u16 v5, s1, v2 3166// CHECK: [0x01,0x04,0x0a,0x62] 3167 3168v_min_u16 v5, s101, v2 3169// CHECK: [0x65,0x04,0x0a,0x62] 3170 3171v_min_u16 v5, flat_scratch_lo, v2 3172// CHECK: [0x66,0x04,0x0a,0x62] 3173 3174v_min_u16 v5, flat_scratch_hi, v2 3175// CHECK: [0x67,0x04,0x0a,0x62] 3176 3177v_min_u16 v5, vcc_lo, v2 3178// CHECK: [0x6a,0x04,0x0a,0x62] 3179 3180v_min_u16 v5, vcc_hi, v2 3181// CHECK: [0x6b,0x04,0x0a,0x62] 3182 3183v_min_u16 v5, ttmp15, v2 3184// CHECK: [0x7b,0x04,0x0a,0x62] 3185 3186v_min_u16 v5, m0, v2 3187// CHECK: [0x7c,0x04,0x0a,0x62] 3188 3189v_min_u16 v5, exec_lo, v2 3190// CHECK: [0x7e,0x04,0x0a,0x62] 3191 3192v_min_u16 v5, exec_hi, v2 3193// CHECK: [0x7f,0x04,0x0a,0x62] 3194 3195v_min_u16 v5, 0, v2 3196// CHECK: [0x80,0x04,0x0a,0x62] 3197 3198v_min_u16 v5, -1, v2 3199// CHECK: [0xc1,0x04,0x0a,0x62] 3200 3201v_min_u16 v5, 0.5, v2 3202// CHECK: [0xff,0x04,0x0a,0x62,0x00,0x38,0x00,0x00] 3203 3204v_min_u16 v5, -4.0, v2 3205// CHECK: [0xff,0x04,0x0a,0x62,0x00,0xc4,0x00,0x00] 3206 3207v_min_u16 v5, src_vccz, v2 3208// CHECK: [0xfb,0x04,0x0a,0x62] 3209 3210v_min_u16 v5, src_execz, v2 3211// CHECK: [0xfc,0x04,0x0a,0x62] 3212 3213v_min_u16 v5, src_scc, v2 3214// CHECK: [0xfd,0x04,0x0a,0x62] 3215 3216v_min_u16 v5, src_lds_direct, v2 3217// CHECK: [0xfe,0x04,0x0a,0x62] 3218 3219v_min_u16 v5, 0xfe0b, v2 3220// CHECK: [0xff,0x04,0x0a,0x62,0x0b,0xfe,0x00,0x00] 3221 3222v_min_u16 v5, 0x3456, v2 3223// CHECK: [0xff,0x04,0x0a,0x62,0x56,0x34,0x00,0x00] 3224 3225v_min_u16 v5, v1, v255 3226// CHECK: [0x01,0xff,0x0b,0x62] 3227 3228v_min_i16 v5, v1, v2 3229// CHECK: [0x01,0x05,0x0a,0x64] 3230 3231v_min_i16 v255, v1, v2 3232// CHECK: [0x01,0x05,0xfe,0x65] 3233 3234v_min_i16 v5, v255, v2 3235// CHECK: [0xff,0x05,0x0a,0x64] 3236 3237v_min_i16 v5, s1, v2 3238// CHECK: [0x01,0x04,0x0a,0x64] 3239 3240v_min_i16 v5, s101, v2 3241// CHECK: [0x65,0x04,0x0a,0x64] 3242 3243v_min_i16 v5, flat_scratch_lo, v2 3244// CHECK: [0x66,0x04,0x0a,0x64] 3245 3246v_min_i16 v5, flat_scratch_hi, v2 3247// CHECK: [0x67,0x04,0x0a,0x64] 3248 3249v_min_i16 v5, vcc_lo, v2 3250// CHECK: [0x6a,0x04,0x0a,0x64] 3251 3252v_min_i16 v5, vcc_hi, v2 3253// CHECK: [0x6b,0x04,0x0a,0x64] 3254 3255v_min_i16 v5, ttmp15, v2 3256// CHECK: [0x7b,0x04,0x0a,0x64] 3257 3258v_min_i16 v5, m0, v2 3259// CHECK: [0x7c,0x04,0x0a,0x64] 3260 3261v_min_i16 v5, exec_lo, v2 3262// CHECK: [0x7e,0x04,0x0a,0x64] 3263 3264v_min_i16 v5, exec_hi, v2 3265// CHECK: [0x7f,0x04,0x0a,0x64] 3266 3267v_min_i16 v5, 0, v2 3268// CHECK: [0x80,0x04,0x0a,0x64] 3269 3270v_min_i16 v5, -1, v2 3271// CHECK: [0xc1,0x04,0x0a,0x64] 3272 3273v_min_i16 v5, 0.5, v2 3274// CHECK: [0xff,0x04,0x0a,0x64,0x00,0x38,0x00,0x00] 3275 3276v_min_i16 v5, -4.0, v2 3277// CHECK: [0xff,0x04,0x0a,0x64,0x00,0xc4,0x00,0x00] 3278 3279v_min_i16 v5, src_vccz, v2 3280// CHECK: [0xfb,0x04,0x0a,0x64] 3281 3282v_min_i16 v5, src_execz, v2 3283// CHECK: [0xfc,0x04,0x0a,0x64] 3284 3285v_min_i16 v5, src_scc, v2 3286// CHECK: [0xfd,0x04,0x0a,0x64] 3287 3288v_min_i16 v5, src_lds_direct, v2 3289// CHECK: [0xfe,0x04,0x0a,0x64] 3290 3291v_min_i16 v5, 0xfe0b, v2 3292// CHECK: [0xff,0x04,0x0a,0x64,0x0b,0xfe,0x00,0x00] 3293 3294v_min_i16 v5, 0x3456, v2 3295// CHECK: [0xff,0x04,0x0a,0x64,0x56,0x34,0x00,0x00] 3296 3297v_min_i16 v5, v1, v255 3298// CHECK: [0x01,0xff,0x0b,0x64] 3299 3300v_ldexp_f16 v5, v1, v2 3301// CHECK: [0x01,0x05,0x0a,0x66] 3302 3303v_ldexp_f16 v255, v1, v2 3304// CHECK: [0x01,0x05,0xfe,0x67] 3305 3306v_ldexp_f16 v5, v255, v2 3307// CHECK: [0xff,0x05,0x0a,0x66] 3308 3309v_ldexp_f16 v5, s1, v2 3310// CHECK: [0x01,0x04,0x0a,0x66] 3311 3312v_ldexp_f16 v5, s101, v2 3313// CHECK: [0x65,0x04,0x0a,0x66] 3314 3315v_ldexp_f16 v5, flat_scratch_lo, v2 3316// CHECK: [0x66,0x04,0x0a,0x66] 3317 3318v_ldexp_f16 v5, flat_scratch_hi, v2 3319// CHECK: [0x67,0x04,0x0a,0x66] 3320 3321v_ldexp_f16 v5, vcc_lo, v2 3322// CHECK: [0x6a,0x04,0x0a,0x66] 3323 3324v_ldexp_f16 v5, vcc_hi, v2 3325// CHECK: [0x6b,0x04,0x0a,0x66] 3326 3327v_ldexp_f16 v5, ttmp15, v2 3328// CHECK: [0x7b,0x04,0x0a,0x66] 3329 3330v_ldexp_f16 v5, m0, v2 3331// CHECK: [0x7c,0x04,0x0a,0x66] 3332 3333v_ldexp_f16 v5, exec_lo, v2 3334// CHECK: [0x7e,0x04,0x0a,0x66] 3335 3336v_ldexp_f16 v5, exec_hi, v2 3337// CHECK: [0x7f,0x04,0x0a,0x66] 3338 3339v_ldexp_f16 v5, 0, v2 3340// CHECK: [0x80,0x04,0x0a,0x66] 3341 3342v_ldexp_f16 v5, -1, v2 3343// CHECK: [0xc1,0x04,0x0a,0x66] 3344 3345v_ldexp_f16 v5, 0.5, v2 3346// CHECK: [0xf0,0x04,0x0a,0x66] 3347 3348v_ldexp_f16 v5, -4.0, v2 3349// CHECK: [0xf7,0x04,0x0a,0x66] 3350 3351v_ldexp_f16 v5, src_vccz, v2 3352// CHECK: [0xfb,0x04,0x0a,0x66] 3353 3354v_ldexp_f16 v5, src_execz, v2 3355// CHECK: [0xfc,0x04,0x0a,0x66] 3356 3357v_ldexp_f16 v5, src_scc, v2 3358// CHECK: [0xfd,0x04,0x0a,0x66] 3359 3360v_ldexp_f16 v5, src_lds_direct, v2 3361// CHECK: [0xfe,0x04,0x0a,0x66] 3362 3363v_ldexp_f16 v5, 0xfe0b, v2 3364// CHECK: [0xff,0x04,0x0a,0x66,0x0b,0xfe,0x00,0x00] 3365 3366v_ldexp_f16 v5, 0x3456, v2 3367// CHECK: [0xff,0x04,0x0a,0x66,0x56,0x34,0x00,0x00] 3368 3369v_ldexp_f16 v5, v1, v255 3370// CHECK: [0x01,0xff,0x0b,0x66] 3371 3372v_add_u32 v5, v1, v2 3373// CHECK: [0x01,0x05,0x0a,0x68] 3374 3375v_add_u32 v255, v1, v2 3376// CHECK: [0x01,0x05,0xfe,0x69] 3377 3378v_add_u32 v5, v255, v2 3379// CHECK: [0xff,0x05,0x0a,0x68] 3380 3381v_add_u32 v5, s1, v2 3382// CHECK: [0x01,0x04,0x0a,0x68] 3383 3384v_add_u32 v5, s101, v2 3385// CHECK: [0x65,0x04,0x0a,0x68] 3386 3387v_add_u32 v5, flat_scratch_lo, v2 3388// CHECK: [0x66,0x04,0x0a,0x68] 3389 3390v_add_u32 v5, flat_scratch_hi, v2 3391// CHECK: [0x67,0x04,0x0a,0x68] 3392 3393v_add_u32 v5, vcc_lo, v2 3394// CHECK: [0x6a,0x04,0x0a,0x68] 3395 3396v_add_u32 v5, vcc_hi, v2 3397// CHECK: [0x6b,0x04,0x0a,0x68] 3398 3399v_add_u32 v5, ttmp15, v2 3400// CHECK: [0x7b,0x04,0x0a,0x68] 3401 3402v_add_u32 v5, m0, v2 3403// CHECK: [0x7c,0x04,0x0a,0x68] 3404 3405v_add_u32 v5, exec_lo, v2 3406// CHECK: [0x7e,0x04,0x0a,0x68] 3407 3408v_add_u32 v5, exec_hi, v2 3409// CHECK: [0x7f,0x04,0x0a,0x68] 3410 3411v_add_u32 v5, 0, v2 3412// CHECK: [0x80,0x04,0x0a,0x68] 3413 3414v_add_u32 v5, -1, v2 3415// CHECK: [0xc1,0x04,0x0a,0x68] 3416 3417v_add_u32 v5, 0.5, v2 3418// CHECK: [0xf0,0x04,0x0a,0x68] 3419 3420v_add_u32 v5, -4.0, v2 3421// CHECK: [0xf7,0x04,0x0a,0x68] 3422 3423v_add_u32 v5, src_vccz, v2 3424// CHECK: [0xfb,0x04,0x0a,0x68] 3425 3426v_add_u32 v5, src_execz, v2 3427// CHECK: [0xfc,0x04,0x0a,0x68] 3428 3429v_add_u32 v5, src_scc, v2 3430// CHECK: [0xfd,0x04,0x0a,0x68] 3431 3432v_add_u32 v5, src_lds_direct, v2 3433// CHECK: [0xfe,0x04,0x0a,0x68] 3434 3435v_add_u32 v5, 0xaf123456, v2 3436// CHECK: [0xff,0x04,0x0a,0x68,0x56,0x34,0x12,0xaf] 3437 3438v_add_u32 v5, 0x3f717273, v2 3439// CHECK: [0xff,0x04,0x0a,0x68,0x73,0x72,0x71,0x3f] 3440 3441v_add_u32 v5, v1, v255 3442// CHECK: [0x01,0xff,0x0b,0x68] 3443 3444v_sub_u32 v5, v1, v2 3445// CHECK: [0x01,0x05,0x0a,0x6a] 3446 3447v_sub_u32 v255, v1, v2 3448// CHECK: [0x01,0x05,0xfe,0x6b] 3449 3450v_sub_u32 v5, v255, v2 3451// CHECK: [0xff,0x05,0x0a,0x6a] 3452 3453v_sub_u32 v5, s1, v2 3454// CHECK: [0x01,0x04,0x0a,0x6a] 3455 3456v_sub_u32 v5, s101, v2 3457// CHECK: [0x65,0x04,0x0a,0x6a] 3458 3459v_sub_u32 v5, flat_scratch_lo, v2 3460// CHECK: [0x66,0x04,0x0a,0x6a] 3461 3462v_sub_u32 v5, flat_scratch_hi, v2 3463// CHECK: [0x67,0x04,0x0a,0x6a] 3464 3465v_sub_u32 v5, vcc_lo, v2 3466// CHECK: [0x6a,0x04,0x0a,0x6a] 3467 3468v_sub_u32 v5, vcc_hi, v2 3469// CHECK: [0x6b,0x04,0x0a,0x6a] 3470 3471v_sub_u32 v5, ttmp15, v2 3472// CHECK: [0x7b,0x04,0x0a,0x6a] 3473 3474v_sub_u32 v5, m0, v2 3475// CHECK: [0x7c,0x04,0x0a,0x6a] 3476 3477v_sub_u32 v5, exec_lo, v2 3478// CHECK: [0x7e,0x04,0x0a,0x6a] 3479 3480v_sub_u32 v5, exec_hi, v2 3481// CHECK: [0x7f,0x04,0x0a,0x6a] 3482 3483v_sub_u32 v5, 0, v2 3484// CHECK: [0x80,0x04,0x0a,0x6a] 3485 3486v_sub_u32 v5, -1, v2 3487// CHECK: [0xc1,0x04,0x0a,0x6a] 3488 3489v_sub_u32 v5, 0.5, v2 3490// CHECK: [0xf0,0x04,0x0a,0x6a] 3491 3492v_sub_u32 v5, -4.0, v2 3493// CHECK: [0xf7,0x04,0x0a,0x6a] 3494 3495v_sub_u32 v5, src_vccz, v2 3496// CHECK: [0xfb,0x04,0x0a,0x6a] 3497 3498v_sub_u32 v5, src_execz, v2 3499// CHECK: [0xfc,0x04,0x0a,0x6a] 3500 3501v_sub_u32 v5, src_scc, v2 3502// CHECK: [0xfd,0x04,0x0a,0x6a] 3503 3504v_sub_u32 v5, src_lds_direct, v2 3505// CHECK: [0xfe,0x04,0x0a,0x6a] 3506 3507v_sub_u32 v5, 0xaf123456, v2 3508// CHECK: [0xff,0x04,0x0a,0x6a,0x56,0x34,0x12,0xaf] 3509 3510v_sub_u32 v5, 0x3f717273, v2 3511// CHECK: [0xff,0x04,0x0a,0x6a,0x73,0x72,0x71,0x3f] 3512 3513v_sub_u32 v5, v1, v255 3514// CHECK: [0x01,0xff,0x0b,0x6a] 3515 3516v_subrev_u32 v5, v1, v2 3517// CHECK: [0x01,0x05,0x0a,0x6c] 3518 3519v_subrev_u32 v255, v1, v2 3520// CHECK: [0x01,0x05,0xfe,0x6d] 3521 3522v_subrev_u32 v5, v255, v2 3523// CHECK: [0xff,0x05,0x0a,0x6c] 3524 3525v_subrev_u32 v5, s1, v2 3526// CHECK: [0x01,0x04,0x0a,0x6c] 3527 3528v_subrev_u32 v5, s101, v2 3529// CHECK: [0x65,0x04,0x0a,0x6c] 3530 3531v_subrev_u32 v5, flat_scratch_lo, v2 3532// CHECK: [0x66,0x04,0x0a,0x6c] 3533 3534v_subrev_u32 v5, flat_scratch_hi, v2 3535// CHECK: [0x67,0x04,0x0a,0x6c] 3536 3537v_subrev_u32 v5, vcc_lo, v2 3538// CHECK: [0x6a,0x04,0x0a,0x6c] 3539 3540v_subrev_u32 v5, vcc_hi, v2 3541// CHECK: [0x6b,0x04,0x0a,0x6c] 3542 3543v_subrev_u32 v5, ttmp15, v2 3544// CHECK: [0x7b,0x04,0x0a,0x6c] 3545 3546v_subrev_u32 v5, m0, v2 3547// CHECK: [0x7c,0x04,0x0a,0x6c] 3548 3549v_subrev_u32 v5, exec_lo, v2 3550// CHECK: [0x7e,0x04,0x0a,0x6c] 3551 3552v_subrev_u32 v5, exec_hi, v2 3553// CHECK: [0x7f,0x04,0x0a,0x6c] 3554 3555v_subrev_u32 v5, 0, v2 3556// CHECK: [0x80,0x04,0x0a,0x6c] 3557 3558v_subrev_u32 v5, -1, v2 3559// CHECK: [0xc1,0x04,0x0a,0x6c] 3560 3561v_subrev_u32 v5, 0.5, v2 3562// CHECK: [0xf0,0x04,0x0a,0x6c] 3563 3564v_subrev_u32 v5, -4.0, v2 3565// CHECK: [0xf7,0x04,0x0a,0x6c] 3566 3567v_subrev_u32 v5, src_vccz, v2 3568// CHECK: [0xfb,0x04,0x0a,0x6c] 3569 3570v_subrev_u32 v5, src_execz, v2 3571// CHECK: [0xfc,0x04,0x0a,0x6c] 3572 3573v_subrev_u32 v5, src_scc, v2 3574// CHECK: [0xfd,0x04,0x0a,0x6c] 3575 3576v_subrev_u32 v5, 0xaf123456, v2 3577// CHECK: [0xff,0x04,0x0a,0x6c,0x56,0x34,0x12,0xaf] 3578 3579v_subrev_u32 v5, 0x3f717273, v2 3580// CHECK: [0xff,0x04,0x0a,0x6c,0x73,0x72,0x71,0x3f] 3581 3582v_subrev_u32 v5, v1, v255 3583// CHECK: [0x01,0xff,0x0b,0x6c] 3584 3585v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3586// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x06] 3587 3588v_cndmask_b32_sdwa v255, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3589// CHECK: [0xf9,0x04,0xfe,0x01,0x01,0x06,0x06,0x06] 3590 3591v_cndmask_b32_sdwa v5, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3592// CHECK: [0xf9,0x04,0x0a,0x00,0xff,0x06,0x06,0x06] 3593 3594v_cndmask_b32_sdwa v5, 0, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3595// CHECK: [0xf9,0x04,0x0a,0x00,0x80,0x06,0x86,0x06] 3596 3597v_cndmask_b32_sdwa v5, -1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3598// CHECK: [0xf9,0x04,0x0a,0x00,0xc1,0x06,0x86,0x06] 3599 3600v_cndmask_b32_sdwa v5, 0.5, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3601// CHECK: [0xf9,0x04,0x0a,0x00,0xf0,0x06,0x86,0x06] 3602 3603v_cndmask_b32_sdwa v5, -4.0, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3604// CHECK: [0xf9,0x04,0x0a,0x00,0xf7,0x06,0x86,0x06] 3605 3606v_cndmask_b32_sdwa v5, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3607// CHECK: [0xf9,0xfe,0x0b,0x00,0x01,0x06,0x06,0x06] 3608 3609v_cndmask_b32_sdwa v5, v1, v2, vcc dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3610// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x06] 3611 3612v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3613// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x00,0x06,0x06] 3614 3615v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3616// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x01,0x06,0x06] 3617 3618v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3619// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x02,0x06,0x06] 3620 3621v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3622// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x03,0x06,0x06] 3623 3624v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3625// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x04,0x06,0x06] 3626 3627v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3628// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x05,0x06,0x06] 3629 3630v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 3631// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x0e,0x06,0x06] 3632 3633v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 3634// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x16,0x06,0x06] 3635 3636v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 3637// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x16,0x06,0x06] 3638 3639v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 3640// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x06] 3641 3642v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 3643// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x00,0x06] 3644 3645v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 3646// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x01,0x06] 3647 3648v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 3649// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x02,0x06] 3650 3651v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 3652// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x03,0x06] 3653 3654v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 3655// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x04,0x06] 3656 3657v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 3658// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x05,0x06] 3659 3660v_cndmask_b32_sdwa v5, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3661// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x0e,0x06] 3662 3663v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 3664// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x06] 3665 3666v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 3667// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x00] 3668 3669v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 3670// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x01] 3671 3672v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 3673// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x02] 3674 3675v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 3676// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x03] 3677 3678v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 3679// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x04] 3680 3681v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 3682// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x05] 3683 3684v_cndmask_b32_sdwa v5, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3685// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x0e] 3686 3687v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 3688// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0xe4,0x00,0x00] 3689 3690v_cndmask_b32_dpp v255, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 3691// CHECK: [0xfa,0x04,0xfe,0x01,0x01,0xe4,0x00,0x00] 3692 3693v_cndmask_b32_dpp v5, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 3694// CHECK: [0xfa,0x04,0x0a,0x00,0xff,0xe4,0x00,0x00] 3695 3696v_cndmask_b32_dpp v5, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 3697// CHECK: [0xfa,0xfe,0x0b,0x00,0x01,0xe4,0x00,0x00] 3698 3699v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 3700// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x1b,0x00,0x00] 3701 3702v_cndmask_b32_dpp v5, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0 3703// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x40,0x01,0x00] 3704 3705v_cndmask_b32_dpp v5, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0 3706// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x41,0x01,0x00] 3707 3708v_cndmask_b32_dpp v5, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0 3709// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x42,0x01,0x00] 3710 3711v_cndmask_b32_dpp v5, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0 3712// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x43,0x01,0x00] 3713 3714v_cndmask_b32_dpp v5, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0 3715// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x30,0x01,0x00] 3716 3717v_cndmask_b32_dpp v5, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0 3718// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x34,0x01,0x00] 3719 3720v_cndmask_b32_dpp v5, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0 3721// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x38,0x01,0x00] 3722 3723v_cndmask_b32_dpp v5, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0 3724// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x3c,0x01,0x00] 3725 3726v_cndmask_b32_dpp v5, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0 3727// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x01,0x01,0x00] 3728 3729v_cndmask_b32_dpp v5, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0 3730// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x0f,0x01,0x00] 3731 3732v_cndmask_b32_dpp v5, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0 3733// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x11,0x01,0x00] 3734 3735v_cndmask_b32_dpp v5, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0 3736// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x1f,0x01,0x00] 3737 3738v_cndmask_b32_dpp v5, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0 3739// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x21,0x01,0x00] 3740 3741v_cndmask_b32_dpp v5, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0 3742// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x2f,0x01,0x00] 3743 3744v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 3745// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0xe4,0x00,0x10] 3746 3747v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 3748// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0xe4,0x00,0x30] 3749 3750v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 3751// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0xe4,0x00,0xf0] 3752 3753v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[0,1,2,3] bank_mask:0x0 3754// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0xe4,0x00,0xf0] 3755 3756v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 3757// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0xe4,0x00,0x01] 3758 3759v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 3760// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0xe4,0x00,0x03] 3761 3762v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 3763// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0xe4,0x00,0x0f] 3764 3765v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 3766// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0xe4,0x00,0x0f] 3767 3768v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 3769// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0xe4,0x08,0x00] 3770 3771v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3772// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x06] 3773 3774v_add_f32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3775// CHECK: [0xf9,0x04,0xfe,0x03,0x01,0x06,0x06,0x06] 3776 3777v_add_f32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3778// CHECK: [0xf9,0x04,0x0a,0x02,0xff,0x06,0x06,0x06] 3779 3780v_add_f32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3781// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x86,0x06] 3782 3783v_add_f32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3784// CHECK: [0xf9,0x04,0x0a,0x02,0x65,0x06,0x86,0x06] 3785 3786v_add_f32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3787// CHECK: [0xf9,0x04,0x0a,0x02,0x66,0x06,0x86,0x06] 3788 3789v_add_f32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3790// CHECK: [0xf9,0x04,0x0a,0x02,0x67,0x06,0x86,0x06] 3791 3792v_add_f32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3793// CHECK: [0xf9,0x04,0x0a,0x02,0x6a,0x06,0x86,0x06] 3794 3795v_add_f32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3796// CHECK: [0xf9,0x04,0x0a,0x02,0x6b,0x06,0x86,0x06] 3797 3798v_add_f32_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3799// CHECK: [0xf9,0x04,0x0a,0x02,0x7b,0x06,0x86,0x06] 3800 3801v_add_f32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3802// CHECK: [0xf9,0x04,0x0a,0x02,0x7c,0x06,0x86,0x06] 3803 3804v_add_f32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3805// CHECK: [0xf9,0x04,0x0a,0x02,0x7e,0x06,0x86,0x06] 3806 3807v_add_f32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3808// CHECK: [0xf9,0x04,0x0a,0x02,0x7f,0x06,0x86,0x06] 3809 3810v_add_f32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3811// CHECK: [0xf9,0x04,0x0a,0x02,0x80,0x06,0x86,0x06] 3812 3813v_add_f32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3814// CHECK: [0xf9,0x04,0x0a,0x02,0xc1,0x06,0x86,0x06] 3815 3816v_add_f32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3817// CHECK: [0xf9,0x04,0x0a,0x02,0xf0,0x06,0x86,0x06] 3818 3819v_add_f32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3820// CHECK: [0xf9,0x04,0x0a,0x02,0xf7,0x06,0x86,0x06] 3821 3822v_add_f32_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3823// CHECK: [0xf9,0x04,0x0a,0x02,0xfb,0x06,0x86,0x06] 3824 3825v_add_f32_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3826// CHECK: [0xf9,0x04,0x0a,0x02,0xfc,0x06,0x86,0x06] 3827 3828v_add_f32_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3829// CHECK: [0xf9,0x04,0x0a,0x02,0xfd,0x06,0x86,0x06] 3830 3831v_add_f32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3832// CHECK: [0xf9,0xfe,0x0b,0x02,0x01,0x06,0x06,0x06] 3833 3834v_add_f32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3835// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x26,0x06,0x06] 3836 3837v_add_f32_sdwa v5, v1, v2 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3838// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x46,0x06,0x06] 3839 3840v_add_f32_sdwa v5, v1, v2 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3841// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x86,0x06,0x06] 3842 3843v_add_f32_sdwa v5, v1, v2 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3844// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0xc6,0x06,0x06] 3845 3846v_add_f32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3847// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x06] 3848 3849v_add_f32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3850// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x00,0x06,0x06] 3851 3852v_add_f32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3853// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x01,0x06,0x06] 3854 3855v_add_f32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3856// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x02,0x06,0x06] 3857 3858v_add_f32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3859// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x03,0x06,0x06] 3860 3861v_add_f32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3862// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x04,0x06,0x06] 3863 3864v_add_f32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3865// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x05,0x06,0x06] 3866 3867v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 3868// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x0e,0x06,0x06] 3869 3870v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 3871// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x16,0x06,0x06] 3872 3873v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 3874// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x16,0x06,0x06] 3875 3876v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 3877// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x06] 3878 3879v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 3880// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x00,0x06] 3881 3882v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 3883// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x01,0x06] 3884 3885v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 3886// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x02,0x06] 3887 3888v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 3889// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x03,0x06] 3890 3891v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 3892// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x04,0x06] 3893 3894v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 3895// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x05,0x06] 3896 3897v_add_f32_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3898// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x16,0x06] 3899 3900v_add_f32_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3901// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x26,0x06] 3902 3903v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 3904// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x06] 3905 3906v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 3907// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x00] 3908 3909v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 3910// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x01] 3911 3912v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 3913// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x02] 3914 3915v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 3916// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x03] 3917 3918v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 3919// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x04] 3920 3921v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 3922// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x05] 3923 3924v_add_f32_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3925// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x16] 3926 3927v_add_f32_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3928// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x26] 3929 3930v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 3931// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x00] 3932 3933v_add_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 3934// CHECK: [0xfa,0x04,0xfe,0x03,0x01,0xe4,0x00,0x00] 3935 3936v_add_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 3937// CHECK: [0xfa,0x04,0x0a,0x02,0xff,0xe4,0x00,0x00] 3938 3939v_add_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 3940// CHECK: [0xfa,0xfe,0x0b,0x02,0x01,0xe4,0x00,0x00] 3941 3942v_add_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 3943// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x1b,0x00,0x00] 3944 3945v_add_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 3946// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x40,0x01,0x00] 3947 3948v_add_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 3949// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x41,0x01,0x00] 3950 3951v_add_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 3952// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x42,0x01,0x00] 3953 3954v_add_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 3955// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x43,0x01,0x00] 3956 3957v_add_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 3958// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x30,0x01,0x00] 3959 3960v_add_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 3961// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x34,0x01,0x00] 3962 3963v_add_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 3964// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x38,0x01,0x00] 3965 3966v_add_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 3967// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x3c,0x01,0x00] 3968 3969v_add_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 3970// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x01,0x01,0x00] 3971 3972v_add_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 3973// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x0f,0x01,0x00] 3974 3975v_add_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 3976// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x11,0x01,0x00] 3977 3978v_add_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 3979// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x1f,0x01,0x00] 3980 3981v_add_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 3982// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x21,0x01,0x00] 3983 3984v_add_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 3985// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x2f,0x01,0x00] 3986 3987v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 3988// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x10] 3989 3990v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 3991// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x30] 3992 3993v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 3994// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0xf0] 3995 3996v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 3997// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0xf0] 3998 3999v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 4000// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x01] 4001 4002v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 4003// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x03] 4004 4005v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 4006// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x0f] 4007 4008v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 4009// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x0f] 4010 4011v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 4012// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x08,0x00] 4013 4014v_add_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4015// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x10,0x00] 4016 4017v_add_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4018// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x20,0x00] 4019 4020v_add_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4021// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x40,0x00] 4022 4023v_add_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4024// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x80,0x00] 4025 4026v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4027// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x06] 4028 4029v_sub_f32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4030// CHECK: [0xf9,0x04,0xfe,0x05,0x01,0x06,0x06,0x06] 4031 4032v_sub_f32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4033// CHECK: [0xf9,0x04,0x0a,0x04,0xff,0x06,0x06,0x06] 4034 4035v_sub_f32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4036// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x86,0x06] 4037 4038v_sub_f32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4039// CHECK: [0xf9,0x04,0x0a,0x04,0x65,0x06,0x86,0x06] 4040 4041v_sub_f32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4042// CHECK: [0xf9,0x04,0x0a,0x04,0x66,0x06,0x86,0x06] 4043 4044v_sub_f32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4045// CHECK: [0xf9,0x04,0x0a,0x04,0x67,0x06,0x86,0x06] 4046 4047v_sub_f32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4048// CHECK: [0xf9,0x04,0x0a,0x04,0x6a,0x06,0x86,0x06] 4049 4050v_sub_f32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4051// CHECK: [0xf9,0x04,0x0a,0x04,0x6b,0x06,0x86,0x06] 4052 4053v_sub_f32_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4054// CHECK: [0xf9,0x04,0x0a,0x04,0x7b,0x06,0x86,0x06] 4055 4056v_sub_f32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4057// CHECK: [0xf9,0x04,0x0a,0x04,0x7c,0x06,0x86,0x06] 4058 4059v_sub_f32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4060// CHECK: [0xf9,0x04,0x0a,0x04,0x7e,0x06,0x86,0x06] 4061 4062v_sub_f32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4063// CHECK: [0xf9,0x04,0x0a,0x04,0x7f,0x06,0x86,0x06] 4064 4065v_sub_f32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4066// CHECK: [0xf9,0x04,0x0a,0x04,0x80,0x06,0x86,0x06] 4067 4068v_sub_f32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4069// CHECK: [0xf9,0x04,0x0a,0x04,0xc1,0x06,0x86,0x06] 4070 4071v_sub_f32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4072// CHECK: [0xf9,0x04,0x0a,0x04,0xf0,0x06,0x86,0x06] 4073 4074v_sub_f32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4075// CHECK: [0xf9,0x04,0x0a,0x04,0xf7,0x06,0x86,0x06] 4076 4077v_sub_f32_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4078// CHECK: [0xf9,0x04,0x0a,0x04,0xfb,0x06,0x86,0x06] 4079 4080v_sub_f32_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4081// CHECK: [0xf9,0x04,0x0a,0x04,0xfc,0x06,0x86,0x06] 4082 4083v_sub_f32_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4084// CHECK: [0xf9,0x04,0x0a,0x04,0xfd,0x06,0x86,0x06] 4085 4086v_sub_f32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4087// CHECK: [0xf9,0xfe,0x0b,0x04,0x01,0x06,0x06,0x06] 4088 4089v_sub_f32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4090// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x26,0x06,0x06] 4091 4092v_sub_f32_sdwa v5, v1, v2 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4093// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x46,0x06,0x06] 4094 4095v_sub_f32_sdwa v5, v1, v2 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4096// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x86,0x06,0x06] 4097 4098v_sub_f32_sdwa v5, v1, v2 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4099// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0xc6,0x06,0x06] 4100 4101v_sub_f32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4102// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x06] 4103 4104v_sub_f32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4105// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x00,0x06,0x06] 4106 4107v_sub_f32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4108// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x01,0x06,0x06] 4109 4110v_sub_f32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4111// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x02,0x06,0x06] 4112 4113v_sub_f32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4114// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x03,0x06,0x06] 4115 4116v_sub_f32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4117// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x04,0x06,0x06] 4118 4119v_sub_f32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4120// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x05,0x06,0x06] 4121 4122v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 4123// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x0e,0x06,0x06] 4124 4125v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 4126// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x16,0x06,0x06] 4127 4128v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 4129// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x16,0x06,0x06] 4130 4131v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 4132// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x06] 4133 4134v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 4135// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x00,0x06] 4136 4137v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 4138// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x01,0x06] 4139 4140v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 4141// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x02,0x06] 4142 4143v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 4144// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x03,0x06] 4145 4146v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 4147// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x04,0x06] 4148 4149v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 4150// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x05,0x06] 4151 4152v_sub_f32_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4153// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x16,0x06] 4154 4155v_sub_f32_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4156// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x26,0x06] 4157 4158v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 4159// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x06] 4160 4161v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 4162// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x00] 4163 4164v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 4165// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x01] 4166 4167v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 4168// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x02] 4169 4170v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 4171// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x03] 4172 4173v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 4174// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x04] 4175 4176v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 4177// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x05] 4178 4179v_sub_f32_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4180// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x16] 4181 4182v_sub_f32_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4183// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x26] 4184 4185v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4186// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x00] 4187 4188v_sub_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4189// CHECK: [0xfa,0x04,0xfe,0x05,0x01,0xe4,0x00,0x00] 4190 4191v_sub_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4192// CHECK: [0xfa,0x04,0x0a,0x04,0xff,0xe4,0x00,0x00] 4193 4194v_sub_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4195// CHECK: [0xfa,0xfe,0x0b,0x04,0x01,0xe4,0x00,0x00] 4196 4197v_sub_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 4198// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x1b,0x00,0x00] 4199 4200v_sub_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 4201// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x40,0x01,0x00] 4202 4203v_sub_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 4204// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x41,0x01,0x00] 4205 4206v_sub_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 4207// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x42,0x01,0x00] 4208 4209v_sub_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 4210// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x43,0x01,0x00] 4211 4212v_sub_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 4213// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x30,0x01,0x00] 4214 4215v_sub_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 4216// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x34,0x01,0x00] 4217 4218v_sub_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 4219// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x38,0x01,0x00] 4220 4221v_sub_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 4222// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x3c,0x01,0x00] 4223 4224v_sub_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 4225// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x01,0x01,0x00] 4226 4227v_sub_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 4228// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x0f,0x01,0x00] 4229 4230v_sub_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 4231// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x11,0x01,0x00] 4232 4233v_sub_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 4234// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x1f,0x01,0x00] 4235 4236v_sub_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 4237// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x21,0x01,0x00] 4238 4239v_sub_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 4240// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x2f,0x01,0x00] 4241 4242v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 4243// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x10] 4244 4245v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 4246// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x30] 4247 4248v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 4249// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0xf0] 4250 4251v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 4252// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0xf0] 4253 4254v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 4255// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x01] 4256 4257v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 4258// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x03] 4259 4260v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 4261// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x0f] 4262 4263v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 4264// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x0f] 4265 4266v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 4267// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x08,0x00] 4268 4269v_sub_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4270// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x10,0x00] 4271 4272v_sub_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4273// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x20,0x00] 4274 4275v_sub_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4276// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x40,0x00] 4277 4278v_sub_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4279// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x80,0x00] 4280 4281v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4282// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x06] 4283 4284v_subrev_f32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4285// CHECK: [0xf9,0x04,0xfe,0x07,0x01,0x06,0x06,0x06] 4286 4287v_subrev_f32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4288// CHECK: [0xf9,0x04,0x0a,0x06,0xff,0x06,0x06,0x06] 4289 4290v_subrev_f32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4291// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x86,0x06] 4292 4293v_subrev_f32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4294// CHECK: [0xf9,0x04,0x0a,0x06,0x65,0x06,0x86,0x06] 4295 4296v_subrev_f32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4297// CHECK: [0xf9,0x04,0x0a,0x06,0x66,0x06,0x86,0x06] 4298 4299v_subrev_f32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4300// CHECK: [0xf9,0x04,0x0a,0x06,0x67,0x06,0x86,0x06] 4301 4302v_subrev_f32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4303// CHECK: [0xf9,0x04,0x0a,0x06,0x6a,0x06,0x86,0x06] 4304 4305v_subrev_f32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4306// CHECK: [0xf9,0x04,0x0a,0x06,0x6b,0x06,0x86,0x06] 4307 4308v_subrev_f32_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4309// CHECK: [0xf9,0x04,0x0a,0x06,0x7b,0x06,0x86,0x06] 4310 4311v_subrev_f32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4312// CHECK: [0xf9,0x04,0x0a,0x06,0x7c,0x06,0x86,0x06] 4313 4314v_subrev_f32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4315// CHECK: [0xf9,0x04,0x0a,0x06,0x7e,0x06,0x86,0x06] 4316 4317v_subrev_f32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4318// CHECK: [0xf9,0x04,0x0a,0x06,0x7f,0x06,0x86,0x06] 4319 4320v_subrev_f32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4321// CHECK: [0xf9,0x04,0x0a,0x06,0x80,0x06,0x86,0x06] 4322 4323v_subrev_f32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4324// CHECK: [0xf9,0x04,0x0a,0x06,0xc1,0x06,0x86,0x06] 4325 4326v_subrev_f32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4327// CHECK: [0xf9,0x04,0x0a,0x06,0xf0,0x06,0x86,0x06] 4328 4329v_subrev_f32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4330// CHECK: [0xf9,0x04,0x0a,0x06,0xf7,0x06,0x86,0x06] 4331 4332v_subrev_f32_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4333// CHECK: [0xf9,0x04,0x0a,0x06,0xfb,0x06,0x86,0x06] 4334 4335v_subrev_f32_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4336// CHECK: [0xf9,0x04,0x0a,0x06,0xfc,0x06,0x86,0x06] 4337 4338v_subrev_f32_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4339// CHECK: [0xf9,0x04,0x0a,0x06,0xfd,0x06,0x86,0x06] 4340 4341v_subrev_f32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4342// CHECK: [0xf9,0xfe,0x0b,0x06,0x01,0x06,0x06,0x06] 4343 4344v_subrev_f32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4345// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x26,0x06,0x06] 4346 4347v_subrev_f32_sdwa v5, v1, v2 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4348// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x46,0x06,0x06] 4349 4350v_subrev_f32_sdwa v5, v1, v2 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4351// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x86,0x06,0x06] 4352 4353v_subrev_f32_sdwa v5, v1, v2 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4354// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0xc6,0x06,0x06] 4355 4356v_subrev_f32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4357// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x06] 4358 4359v_subrev_f32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4360// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x00,0x06,0x06] 4361 4362v_subrev_f32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4363// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x01,0x06,0x06] 4364 4365v_subrev_f32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4366// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x02,0x06,0x06] 4367 4368v_subrev_f32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4369// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x03,0x06,0x06] 4370 4371v_subrev_f32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4372// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x04,0x06,0x06] 4373 4374v_subrev_f32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4375// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x05,0x06,0x06] 4376 4377v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 4378// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x0e,0x06,0x06] 4379 4380v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 4381// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x16,0x06,0x06] 4382 4383v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 4384// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x16,0x06,0x06] 4385 4386v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 4387// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x06] 4388 4389v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 4390// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x00,0x06] 4391 4392v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 4393// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x01,0x06] 4394 4395v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 4396// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x02,0x06] 4397 4398v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 4399// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x03,0x06] 4400 4401v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 4402// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x04,0x06] 4403 4404v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 4405// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x05,0x06] 4406 4407v_subrev_f32_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4408// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x16,0x06] 4409 4410v_subrev_f32_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4411// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x26,0x06] 4412 4413v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 4414// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x06] 4415 4416v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 4417// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x00] 4418 4419v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 4420// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x01] 4421 4422v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 4423// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x02] 4424 4425v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 4426// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x03] 4427 4428v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 4429// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x04] 4430 4431v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 4432// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x05] 4433 4434v_subrev_f32_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4435// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x16] 4436 4437v_subrev_f32_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4438// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x26] 4439 4440v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4441// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x00] 4442 4443v_subrev_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4444// CHECK: [0xfa,0x04,0xfe,0x07,0x01,0xe4,0x00,0x00] 4445 4446v_subrev_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4447// CHECK: [0xfa,0x04,0x0a,0x06,0xff,0xe4,0x00,0x00] 4448 4449v_subrev_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4450// CHECK: [0xfa,0xfe,0x0b,0x06,0x01,0xe4,0x00,0x00] 4451 4452v_subrev_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 4453// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x00,0x00] 4454 4455v_subrev_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 4456// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x40,0x01,0x00] 4457 4458v_subrev_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 4459// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x41,0x01,0x00] 4460 4461v_subrev_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 4462// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x42,0x01,0x00] 4463 4464v_subrev_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 4465// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x43,0x01,0x00] 4466 4467v_subrev_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 4468// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x30,0x01,0x00] 4469 4470v_subrev_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 4471// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x34,0x01,0x00] 4472 4473v_subrev_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 4474// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x38,0x01,0x00] 4475 4476v_subrev_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 4477// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x3c,0x01,0x00] 4478 4479v_subrev_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 4480// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x01,0x01,0x00] 4481 4482v_subrev_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 4483// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x0f,0x01,0x00] 4484 4485v_subrev_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 4486// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x11,0x01,0x00] 4487 4488v_subrev_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 4489// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x1f,0x01,0x00] 4490 4491v_subrev_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 4492// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x21,0x01,0x00] 4493 4494v_subrev_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 4495// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x2f,0x01,0x00] 4496 4497v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 4498// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x10] 4499 4500v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 4501// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x30] 4502 4503v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 4504// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0xf0] 4505 4506v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 4507// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0xf0] 4508 4509v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 4510// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x01] 4511 4512v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 4513// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x03] 4514 4515v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 4516// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x0f] 4517 4518v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 4519// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x0f] 4520 4521v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 4522// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x08,0x00] 4523 4524v_subrev_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4525// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x10,0x00] 4526 4527v_subrev_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4528// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x20,0x00] 4529 4530v_subrev_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4531// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x40,0x00] 4532 4533v_subrev_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4534// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x80,0x00] 4535 4536v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4537// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x06] 4538 4539v_mul_legacy_f32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4540// CHECK: [0xf9,0x04,0xfe,0x09,0x01,0x06,0x06,0x06] 4541 4542v_mul_legacy_f32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4543// CHECK: [0xf9,0x04,0x0a,0x08,0xff,0x06,0x06,0x06] 4544 4545v_mul_legacy_f32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4546// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x86,0x06] 4547 4548v_mul_legacy_f32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4549// CHECK: [0xf9,0x04,0x0a,0x08,0x65,0x06,0x86,0x06] 4550 4551v_mul_legacy_f32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4552// CHECK: [0xf9,0x04,0x0a,0x08,0x66,0x06,0x86,0x06] 4553 4554v_mul_legacy_f32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4555// CHECK: [0xf9,0x04,0x0a,0x08,0x67,0x06,0x86,0x06] 4556 4557v_mul_legacy_f32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4558// CHECK: [0xf9,0x04,0x0a,0x08,0x6a,0x06,0x86,0x06] 4559 4560v_mul_legacy_f32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4561// CHECK: [0xf9,0x04,0x0a,0x08,0x6b,0x06,0x86,0x06] 4562 4563v_mul_legacy_f32_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4564// CHECK: [0xf9,0x04,0x0a,0x08,0x7b,0x06,0x86,0x06] 4565 4566v_mul_legacy_f32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4567// CHECK: [0xf9,0x04,0x0a,0x08,0x7c,0x06,0x86,0x06] 4568 4569v_mul_legacy_f32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4570// CHECK: [0xf9,0x04,0x0a,0x08,0x7e,0x06,0x86,0x06] 4571 4572v_mul_legacy_f32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4573// CHECK: [0xf9,0x04,0x0a,0x08,0x7f,0x06,0x86,0x06] 4574 4575v_mul_legacy_f32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4576// CHECK: [0xf9,0x04,0x0a,0x08,0x80,0x06,0x86,0x06] 4577 4578v_mul_legacy_f32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4579// CHECK: [0xf9,0x04,0x0a,0x08,0xc1,0x06,0x86,0x06] 4580 4581v_mul_legacy_f32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4582// CHECK: [0xf9,0x04,0x0a,0x08,0xf0,0x06,0x86,0x06] 4583 4584v_mul_legacy_f32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4585// CHECK: [0xf9,0x04,0x0a,0x08,0xf7,0x06,0x86,0x06] 4586 4587v_mul_legacy_f32_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4588// CHECK: [0xf9,0x04,0x0a,0x08,0xfb,0x06,0x86,0x06] 4589 4590v_mul_legacy_f32_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4591// CHECK: [0xf9,0x04,0x0a,0x08,0xfc,0x06,0x86,0x06] 4592 4593v_mul_legacy_f32_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4594// CHECK: [0xf9,0x04,0x0a,0x08,0xfd,0x06,0x86,0x06] 4595 4596v_mul_legacy_f32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4597// CHECK: [0xf9,0xfe,0x0b,0x08,0x01,0x06,0x06,0x06] 4598 4599v_mul_legacy_f32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4600// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x26,0x06,0x06] 4601 4602v_mul_legacy_f32_sdwa v5, v1, v2 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4603// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x46,0x06,0x06] 4604 4605v_mul_legacy_f32_sdwa v5, v1, v2 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4606// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x86,0x06,0x06] 4607 4608v_mul_legacy_f32_sdwa v5, v1, v2 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4609// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0xc6,0x06,0x06] 4610 4611v_mul_legacy_f32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4612// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x06] 4613 4614v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4615// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x00,0x06,0x06] 4616 4617v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4618// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x01,0x06,0x06] 4619 4620v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4621// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x02,0x06,0x06] 4622 4623v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4624// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x03,0x06,0x06] 4625 4626v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4627// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x04,0x06,0x06] 4628 4629v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4630// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x05,0x06,0x06] 4631 4632v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 4633// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x0e,0x06,0x06] 4634 4635v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 4636// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x16,0x06,0x06] 4637 4638v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 4639// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x16,0x06,0x06] 4640 4641v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 4642// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x06] 4643 4644v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 4645// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x00,0x06] 4646 4647v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 4648// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x01,0x06] 4649 4650v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 4651// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x02,0x06] 4652 4653v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 4654// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x03,0x06] 4655 4656v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 4657// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x04,0x06] 4658 4659v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 4660// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x05,0x06] 4661 4662v_mul_legacy_f32_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4663// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x16,0x06] 4664 4665v_mul_legacy_f32_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4666// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x26,0x06] 4667 4668v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 4669// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x06] 4670 4671v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 4672// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x00] 4673 4674v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 4675// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x01] 4676 4677v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 4678// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x02] 4679 4680v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 4681// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x03] 4682 4683v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 4684// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x04] 4685 4686v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 4687// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x05] 4688 4689v_mul_legacy_f32_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4690// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x16] 4691 4692v_mul_legacy_f32_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4693// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x26] 4694 4695v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4696// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x00] 4697 4698v_mul_legacy_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4699// CHECK: [0xfa,0x04,0xfe,0x09,0x01,0xe4,0x00,0x00] 4700 4701v_mul_legacy_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4702// CHECK: [0xfa,0x04,0x0a,0x08,0xff,0xe4,0x00,0x00] 4703 4704v_mul_legacy_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4705// CHECK: [0xfa,0xfe,0x0b,0x08,0x01,0xe4,0x00,0x00] 4706 4707v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 4708// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x1b,0x00,0x00] 4709 4710v_mul_legacy_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 4711// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x40,0x01,0x00] 4712 4713v_mul_legacy_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 4714// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x41,0x01,0x00] 4715 4716v_mul_legacy_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 4717// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x42,0x01,0x00] 4718 4719v_mul_legacy_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 4720// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x43,0x01,0x00] 4721 4722v_mul_legacy_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 4723// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x30,0x01,0x00] 4724 4725v_mul_legacy_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 4726// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x34,0x01,0x00] 4727 4728v_mul_legacy_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 4729// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x38,0x01,0x00] 4730 4731v_mul_legacy_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 4732// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x3c,0x01,0x00] 4733 4734v_mul_legacy_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 4735// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x01,0x01,0x00] 4736 4737v_mul_legacy_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 4738// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x0f,0x01,0x00] 4739 4740v_mul_legacy_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 4741// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x11,0x01,0x00] 4742 4743v_mul_legacy_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 4744// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x1f,0x01,0x00] 4745 4746v_mul_legacy_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 4747// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x21,0x01,0x00] 4748 4749v_mul_legacy_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 4750// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x2f,0x01,0x00] 4751 4752v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 4753// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x10] 4754 4755v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 4756// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x30] 4757 4758v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 4759// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0xf0] 4760 4761v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 4762// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0xf0] 4763 4764v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 4765// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x01] 4766 4767v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 4768// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x03] 4769 4770v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 4771// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x0f] 4772 4773v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 4774// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x0f] 4775 4776v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 4777// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x08,0x00] 4778 4779v_mul_legacy_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4780// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x10,0x00] 4781 4782v_mul_legacy_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4783// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x20,0x00] 4784 4785v_mul_legacy_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4786// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x40,0x00] 4787 4788v_mul_legacy_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4789// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x80,0x00] 4790 4791v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4792// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x06] 4793 4794v_mul_f32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4795// CHECK: [0xf9,0x04,0xfe,0x0b,0x01,0x06,0x06,0x06] 4796 4797v_mul_f32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4798// CHECK: [0xf9,0x04,0x0a,0x0a,0xff,0x06,0x06,0x06] 4799 4800v_mul_f32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4801// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x86,0x06] 4802 4803v_mul_f32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4804// CHECK: [0xf9,0x04,0x0a,0x0a,0x65,0x06,0x86,0x06] 4805 4806v_mul_f32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4807// CHECK: [0xf9,0x04,0x0a,0x0a,0x66,0x06,0x86,0x06] 4808 4809v_mul_f32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4810// CHECK: [0xf9,0x04,0x0a,0x0a,0x67,0x06,0x86,0x06] 4811 4812v_mul_f32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4813// CHECK: [0xf9,0x04,0x0a,0x0a,0x6a,0x06,0x86,0x06] 4814 4815v_mul_f32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4816// CHECK: [0xf9,0x04,0x0a,0x0a,0x6b,0x06,0x86,0x06] 4817 4818v_mul_f32_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4819// CHECK: [0xf9,0x04,0x0a,0x0a,0x7b,0x06,0x86,0x06] 4820 4821v_mul_f32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4822// CHECK: [0xf9,0x04,0x0a,0x0a,0x7c,0x06,0x86,0x06] 4823 4824v_mul_f32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4825// CHECK: [0xf9,0x04,0x0a,0x0a,0x7e,0x06,0x86,0x06] 4826 4827v_mul_f32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4828// CHECK: [0xf9,0x04,0x0a,0x0a,0x7f,0x06,0x86,0x06] 4829 4830v_mul_f32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4831// CHECK: [0xf9,0x04,0x0a,0x0a,0x80,0x06,0x86,0x06] 4832 4833v_mul_f32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4834// CHECK: [0xf9,0x04,0x0a,0x0a,0xc1,0x06,0x86,0x06] 4835 4836v_mul_f32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4837// CHECK: [0xf9,0x04,0x0a,0x0a,0xf0,0x06,0x86,0x06] 4838 4839v_mul_f32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4840// CHECK: [0xf9,0x04,0x0a,0x0a,0xf7,0x06,0x86,0x06] 4841 4842v_mul_f32_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4843// CHECK: [0xf9,0x04,0x0a,0x0a,0xfb,0x06,0x86,0x06] 4844 4845v_mul_f32_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4846// CHECK: [0xf9,0x04,0x0a,0x0a,0xfc,0x06,0x86,0x06] 4847 4848v_mul_f32_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4849// CHECK: [0xf9,0x04,0x0a,0x0a,0xfd,0x06,0x86,0x06] 4850 4851v_mul_f32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4852// CHECK: [0xf9,0xfe,0x0b,0x0a,0x01,0x06,0x06,0x06] 4853 4854v_mul_f32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4855// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x26,0x06,0x06] 4856 4857v_mul_f32_sdwa v5, v1, v2 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4858// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x46,0x06,0x06] 4859 4860v_mul_f32_sdwa v5, v1, v2 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4861// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x86,0x06,0x06] 4862 4863v_mul_f32_sdwa v5, v1, v2 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4864// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0xc6,0x06,0x06] 4865 4866v_mul_f32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4867// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x06] 4868 4869v_mul_f32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4870// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x00,0x06,0x06] 4871 4872v_mul_f32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4873// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x01,0x06,0x06] 4874 4875v_mul_f32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4876// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x02,0x06,0x06] 4877 4878v_mul_f32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4879// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x03,0x06,0x06] 4880 4881v_mul_f32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4882// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x04,0x06,0x06] 4883 4884v_mul_f32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4885// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x05,0x06,0x06] 4886 4887v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 4888// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x0e,0x06,0x06] 4889 4890v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 4891// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x16,0x06,0x06] 4892 4893v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 4894// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x16,0x06,0x06] 4895 4896v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 4897// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x06] 4898 4899v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 4900// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x00,0x06] 4901 4902v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 4903// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x01,0x06] 4904 4905v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 4906// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x02,0x06] 4907 4908v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 4909// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x03,0x06] 4910 4911v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 4912// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x04,0x06] 4913 4914v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 4915// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x05,0x06] 4916 4917v_mul_f32_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4918// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x16,0x06] 4919 4920v_mul_f32_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4921// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x26,0x06] 4922 4923v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 4924// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x06] 4925 4926v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 4927// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x00] 4928 4929v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 4930// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x01] 4931 4932v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 4933// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x02] 4934 4935v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 4936// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x03] 4937 4938v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 4939// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x04] 4940 4941v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 4942// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x05] 4943 4944v_mul_f32_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4945// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x16] 4946 4947v_mul_f32_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 4948// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x26] 4949 4950v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4951// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x00] 4952 4953v_mul_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4954// CHECK: [0xfa,0x04,0xfe,0x0b,0x01,0xe4,0x00,0x00] 4955 4956v_mul_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4957// CHECK: [0xfa,0x04,0x0a,0x0a,0xff,0xe4,0x00,0x00] 4958 4959v_mul_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 4960// CHECK: [0xfa,0xfe,0x0b,0x0a,0x01,0xe4,0x00,0x00] 4961 4962v_mul_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 4963// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x1b,0x00,0x00] 4964 4965v_mul_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 4966// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x40,0x01,0x00] 4967 4968v_mul_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 4969// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x41,0x01,0x00] 4970 4971v_mul_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 4972// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x42,0x01,0x00] 4973 4974v_mul_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 4975// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x43,0x01,0x00] 4976 4977v_mul_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 4978// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x30,0x01,0x00] 4979 4980v_mul_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 4981// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x34,0x01,0x00] 4982 4983v_mul_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 4984// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x38,0x01,0x00] 4985 4986v_mul_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 4987// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x3c,0x01,0x00] 4988 4989v_mul_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 4990// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x01,0x01,0x00] 4991 4992v_mul_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 4993// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x0f,0x01,0x00] 4994 4995v_mul_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 4996// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x11,0x01,0x00] 4997 4998v_mul_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 4999// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x1f,0x01,0x00] 5000 5001v_mul_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 5002// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x21,0x01,0x00] 5003 5004v_mul_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 5005// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x2f,0x01,0x00] 5006 5007v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 5008// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x10] 5009 5010v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 5011// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x30] 5012 5013v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 5014// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0xf0] 5015 5016v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 5017// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0xf0] 5018 5019v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 5020// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x01] 5021 5022v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 5023// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x03] 5024 5025v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 5026// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x0f] 5027 5028v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 5029// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x0f] 5030 5031v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 5032// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x08,0x00] 5033 5034v_mul_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 5035// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x10,0x00] 5036 5037v_mul_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 5038// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x20,0x00] 5039 5040v_mul_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 5041// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x40,0x00] 5042 5043v_mul_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 5044// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x80,0x00] 5045 5046v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5047// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x06] 5048 5049v_mul_i32_i24_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5050// CHECK: [0xf9,0x04,0xfe,0x0d,0x01,0x06,0x06,0x06] 5051 5052v_mul_i32_i24_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5053// CHECK: [0xf9,0x04,0x0a,0x0c,0xff,0x06,0x06,0x06] 5054 5055v_mul_i32_i24_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5056// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x86,0x06] 5057 5058v_mul_i32_i24_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5059// CHECK: [0xf9,0x04,0x0a,0x0c,0x65,0x06,0x86,0x06] 5060 5061v_mul_i32_i24_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5062// CHECK: [0xf9,0x04,0x0a,0x0c,0x66,0x06,0x86,0x06] 5063 5064v_mul_i32_i24_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5065// CHECK: [0xf9,0x04,0x0a,0x0c,0x67,0x06,0x86,0x06] 5066 5067v_mul_i32_i24_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5068// CHECK: [0xf9,0x04,0x0a,0x0c,0x6a,0x06,0x86,0x06] 5069 5070v_mul_i32_i24_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5071// CHECK: [0xf9,0x04,0x0a,0x0c,0x6b,0x06,0x86,0x06] 5072 5073v_mul_i32_i24_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5074// CHECK: [0xf9,0x04,0x0a,0x0c,0x7b,0x06,0x86,0x06] 5075 5076v_mul_i32_i24_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5077// CHECK: [0xf9,0x04,0x0a,0x0c,0x7c,0x06,0x86,0x06] 5078 5079v_mul_i32_i24_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5080// CHECK: [0xf9,0x04,0x0a,0x0c,0x7e,0x06,0x86,0x06] 5081 5082v_mul_i32_i24_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5083// CHECK: [0xf9,0x04,0x0a,0x0c,0x7f,0x06,0x86,0x06] 5084 5085v_mul_i32_i24_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5086// CHECK: [0xf9,0x04,0x0a,0x0c,0x80,0x06,0x86,0x06] 5087 5088v_mul_i32_i24_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5089// CHECK: [0xf9,0x04,0x0a,0x0c,0xc1,0x06,0x86,0x06] 5090 5091v_mul_i32_i24_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5092// CHECK: [0xf9,0x04,0x0a,0x0c,0xf0,0x06,0x86,0x06] 5093 5094v_mul_i32_i24_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5095// CHECK: [0xf9,0x04,0x0a,0x0c,0xf7,0x06,0x86,0x06] 5096 5097v_mul_i32_i24_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5098// CHECK: [0xf9,0x04,0x0a,0x0c,0xfb,0x06,0x86,0x06] 5099 5100v_mul_i32_i24_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5101// CHECK: [0xf9,0x04,0x0a,0x0c,0xfc,0x06,0x86,0x06] 5102 5103v_mul_i32_i24_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5104// CHECK: [0xf9,0x04,0x0a,0x0c,0xfd,0x06,0x86,0x06] 5105 5106v_mul_i32_i24_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5107// CHECK: [0xf9,0xfe,0x0b,0x0c,0x01,0x06,0x06,0x06] 5108 5109v_mul_i32_i24_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5110// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x26,0x06,0x06] 5111 5112v_mul_i32_i24_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5113// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x06] 5114 5115v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5116// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x00,0x06,0x06] 5117 5118v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5119// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x01,0x06,0x06] 5120 5121v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5122// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x02,0x06,0x06] 5123 5124v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5125// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x03,0x06,0x06] 5126 5127v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5128// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x04,0x06,0x06] 5129 5130v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5131// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x05,0x06,0x06] 5132 5133v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 5134// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x0e,0x06,0x06] 5135 5136v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 5137// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x16,0x06,0x06] 5138 5139v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 5140// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x16,0x06,0x06] 5141 5142v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 5143// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x06] 5144 5145v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 5146// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x00,0x06] 5147 5148v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 5149// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x01,0x06] 5150 5151v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 5152// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x02,0x06] 5153 5154v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 5155// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x03,0x06] 5156 5157v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 5158// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x04,0x06] 5159 5160v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 5161// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x05,0x06] 5162 5163v_mul_i32_i24_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5164// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x0e,0x06] 5165 5166v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 5167// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x06] 5168 5169v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 5170// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x00] 5171 5172v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 5173// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x01] 5174 5175v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 5176// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x02] 5177 5178v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 5179// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x03] 5180 5181v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 5182// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x04] 5183 5184v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 5185// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x05] 5186 5187v_mul_i32_i24_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5188// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x0e] 5189 5190v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 5191// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x00] 5192 5193v_mul_i32_i24_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 5194// CHECK: [0xfa,0x04,0xfe,0x0d,0x01,0xe4,0x00,0x00] 5195 5196v_mul_i32_i24_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 5197// CHECK: [0xfa,0x04,0x0a,0x0c,0xff,0xe4,0x00,0x00] 5198 5199v_mul_i32_i24_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 5200// CHECK: [0xfa,0xfe,0x0b,0x0c,0x01,0xe4,0x00,0x00] 5201 5202v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 5203// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x1b,0x00,0x00] 5204 5205v_mul_i32_i24_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 5206// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x40,0x01,0x00] 5207 5208v_mul_i32_i24_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 5209// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x41,0x01,0x00] 5210 5211v_mul_i32_i24_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 5212// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x42,0x01,0x00] 5213 5214v_mul_i32_i24_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 5215// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x43,0x01,0x00] 5216 5217v_mul_i32_i24_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 5218// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x30,0x01,0x00] 5219 5220v_mul_i32_i24_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 5221// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x34,0x01,0x00] 5222 5223v_mul_i32_i24_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 5224// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x38,0x01,0x00] 5225 5226v_mul_i32_i24_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 5227// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x3c,0x01,0x00] 5228 5229v_mul_i32_i24_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 5230// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x01,0x01,0x00] 5231 5232v_mul_i32_i24_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 5233// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x0f,0x01,0x00] 5234 5235v_mul_i32_i24_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 5236// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x11,0x01,0x00] 5237 5238v_mul_i32_i24_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 5239// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x1f,0x01,0x00] 5240 5241v_mul_i32_i24_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 5242// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x21,0x01,0x00] 5243 5244v_mul_i32_i24_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 5245// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x2f,0x01,0x00] 5246 5247v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 5248// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x10] 5249 5250v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 5251// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x30] 5252 5253v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 5254// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0xf0] 5255 5256v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 5257// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0xf0] 5258 5259v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 5260// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x01] 5261 5262v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 5263// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x03] 5264 5265v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 5266// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x0f] 5267 5268v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 5269// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x0f] 5270 5271v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 5272// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x08,0x00] 5273 5274v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5275// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x06] 5276 5277v_mul_hi_i32_i24_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5278// CHECK: [0xf9,0x04,0xfe,0x0f,0x01,0x06,0x06,0x06] 5279 5280v_mul_hi_i32_i24_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5281// CHECK: [0xf9,0x04,0x0a,0x0e,0xff,0x06,0x06,0x06] 5282 5283v_mul_hi_i32_i24_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5284// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x86,0x06] 5285 5286v_mul_hi_i32_i24_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5287// CHECK: [0xf9,0x04,0x0a,0x0e,0x65,0x06,0x86,0x06] 5288 5289v_mul_hi_i32_i24_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5290// CHECK: [0xf9,0x04,0x0a,0x0e,0x66,0x06,0x86,0x06] 5291 5292v_mul_hi_i32_i24_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5293// CHECK: [0xf9,0x04,0x0a,0x0e,0x67,0x06,0x86,0x06] 5294 5295v_mul_hi_i32_i24_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5296// CHECK: [0xf9,0x04,0x0a,0x0e,0x6a,0x06,0x86,0x06] 5297 5298v_mul_hi_i32_i24_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5299// CHECK: [0xf9,0x04,0x0a,0x0e,0x6b,0x06,0x86,0x06] 5300 5301v_mul_hi_i32_i24_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5302// CHECK: [0xf9,0x04,0x0a,0x0e,0x7b,0x06,0x86,0x06] 5303 5304v_mul_hi_i32_i24_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5305// CHECK: [0xf9,0x04,0x0a,0x0e,0x7c,0x06,0x86,0x06] 5306 5307v_mul_hi_i32_i24_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5308// CHECK: [0xf9,0x04,0x0a,0x0e,0x7e,0x06,0x86,0x06] 5309 5310v_mul_hi_i32_i24_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5311// CHECK: [0xf9,0x04,0x0a,0x0e,0x7f,0x06,0x86,0x06] 5312 5313v_mul_hi_i32_i24_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5314// CHECK: [0xf9,0x04,0x0a,0x0e,0x80,0x06,0x86,0x06] 5315 5316v_mul_hi_i32_i24_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5317// CHECK: [0xf9,0x04,0x0a,0x0e,0xc1,0x06,0x86,0x06] 5318 5319v_mul_hi_i32_i24_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5320// CHECK: [0xf9,0x04,0x0a,0x0e,0xf0,0x06,0x86,0x06] 5321 5322v_mul_hi_i32_i24_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5323// CHECK: [0xf9,0x04,0x0a,0x0e,0xf7,0x06,0x86,0x06] 5324 5325v_mul_hi_i32_i24_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5326// CHECK: [0xf9,0x04,0x0a,0x0e,0xfb,0x06,0x86,0x06] 5327 5328v_mul_hi_i32_i24_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5329// CHECK: [0xf9,0x04,0x0a,0x0e,0xfc,0x06,0x86,0x06] 5330 5331v_mul_hi_i32_i24_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5332// CHECK: [0xf9,0x04,0x0a,0x0e,0xfd,0x06,0x86,0x06] 5333 5334v_mul_hi_i32_i24_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5335// CHECK: [0xf9,0xfe,0x0b,0x0e,0x01,0x06,0x06,0x06] 5336 5337v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5338// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x06] 5339 5340v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5341// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x00,0x06,0x06] 5342 5343v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5344// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x01,0x06,0x06] 5345 5346v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5347// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x02,0x06,0x06] 5348 5349v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5350// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x03,0x06,0x06] 5351 5352v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5353// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x04,0x06,0x06] 5354 5355v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5356// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x05,0x06,0x06] 5357 5358v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 5359// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x0e,0x06,0x06] 5360 5361v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 5362// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x16,0x06,0x06] 5363 5364v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 5365// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x16,0x06,0x06] 5366 5367v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 5368// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x06] 5369 5370v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 5371// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x00,0x06] 5372 5373v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 5374// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x01,0x06] 5375 5376v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 5377// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x02,0x06] 5378 5379v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 5380// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x03,0x06] 5381 5382v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 5383// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x04,0x06] 5384 5385v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 5386// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x05,0x06] 5387 5388v_mul_hi_i32_i24_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5389// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x0e,0x06] 5390 5391v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 5392// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x06] 5393 5394v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 5395// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x00] 5396 5397v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 5398// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x01] 5399 5400v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 5401// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x02] 5402 5403v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 5404// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x03] 5405 5406v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 5407// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x04] 5408 5409v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 5410// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x05] 5411 5412v_mul_hi_i32_i24_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5413// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x0e] 5414 5415v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 5416// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x00] 5417 5418v_mul_hi_i32_i24_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 5419// CHECK: [0xfa,0x04,0xfe,0x0f,0x01,0xe4,0x00,0x00] 5420 5421v_mul_hi_i32_i24_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 5422// CHECK: [0xfa,0x04,0x0a,0x0e,0xff,0xe4,0x00,0x00] 5423 5424v_mul_hi_i32_i24_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 5425// CHECK: [0xfa,0xfe,0x0b,0x0e,0x01,0xe4,0x00,0x00] 5426 5427v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 5428// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x1b,0x00,0x00] 5429 5430v_mul_hi_i32_i24_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 5431// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x40,0x01,0x00] 5432 5433v_mul_hi_i32_i24_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 5434// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x41,0x01,0x00] 5435 5436v_mul_hi_i32_i24_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 5437// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x42,0x01,0x00] 5438 5439v_mul_hi_i32_i24_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 5440// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x43,0x01,0x00] 5441 5442v_mul_hi_i32_i24_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 5443// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x30,0x01,0x00] 5444 5445v_mul_hi_i32_i24_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 5446// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x34,0x01,0x00] 5447 5448v_mul_hi_i32_i24_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 5449// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x38,0x01,0x00] 5450 5451v_mul_hi_i32_i24_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 5452// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x3c,0x01,0x00] 5453 5454v_mul_hi_i32_i24_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 5455// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x01,0x01,0x00] 5456 5457v_mul_hi_i32_i24_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 5458// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x0f,0x01,0x00] 5459 5460v_mul_hi_i32_i24_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 5461// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x11,0x01,0x00] 5462 5463v_mul_hi_i32_i24_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 5464// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x1f,0x01,0x00] 5465 5466v_mul_hi_i32_i24_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 5467// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x21,0x01,0x00] 5468 5469v_mul_hi_i32_i24_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 5470// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x2f,0x01,0x00] 5471 5472v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 5473// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x10] 5474 5475v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 5476// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x30] 5477 5478v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 5479// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0xf0] 5480 5481v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 5482// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0xf0] 5483 5484v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 5485// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x01] 5486 5487v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 5488// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x03] 5489 5490v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 5491// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x0f] 5492 5493v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 5494// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x0f] 5495 5496v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 5497// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x08,0x00] 5498 5499v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5500// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x06] 5501 5502v_mul_u32_u24_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5503// CHECK: [0xf9,0x04,0xfe,0x11,0x01,0x06,0x06,0x06] 5504 5505v_mul_u32_u24_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5506// CHECK: [0xf9,0x04,0x0a,0x10,0xff,0x06,0x06,0x06] 5507 5508v_mul_u32_u24_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5509// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x86,0x06] 5510 5511v_mul_u32_u24_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5512// CHECK: [0xf9,0x04,0x0a,0x10,0x65,0x06,0x86,0x06] 5513 5514v_mul_u32_u24_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5515// CHECK: [0xf9,0x04,0x0a,0x10,0x66,0x06,0x86,0x06] 5516 5517v_mul_u32_u24_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5518// CHECK: [0xf9,0x04,0x0a,0x10,0x67,0x06,0x86,0x06] 5519 5520v_mul_u32_u24_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5521// CHECK: [0xf9,0x04,0x0a,0x10,0x6a,0x06,0x86,0x06] 5522 5523v_mul_u32_u24_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5524// CHECK: [0xf9,0x04,0x0a,0x10,0x6b,0x06,0x86,0x06] 5525 5526v_mul_u32_u24_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5527// CHECK: [0xf9,0x04,0x0a,0x10,0x7b,0x06,0x86,0x06] 5528 5529v_mul_u32_u24_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5530// CHECK: [0xf9,0x04,0x0a,0x10,0x7c,0x06,0x86,0x06] 5531 5532v_mul_u32_u24_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5533// CHECK: [0xf9,0x04,0x0a,0x10,0x7e,0x06,0x86,0x06] 5534 5535v_mul_u32_u24_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5536// CHECK: [0xf9,0x04,0x0a,0x10,0x7f,0x06,0x86,0x06] 5537 5538v_mul_u32_u24_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5539// CHECK: [0xf9,0x04,0x0a,0x10,0x80,0x06,0x86,0x06] 5540 5541v_mul_u32_u24_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5542// CHECK: [0xf9,0x04,0x0a,0x10,0xc1,0x06,0x86,0x06] 5543 5544v_mul_u32_u24_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5545// CHECK: [0xf9,0x04,0x0a,0x10,0xf0,0x06,0x86,0x06] 5546 5547v_mul_u32_u24_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5548// CHECK: [0xf9,0x04,0x0a,0x10,0xf7,0x06,0x86,0x06] 5549 5550v_mul_u32_u24_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5551// CHECK: [0xf9,0x04,0x0a,0x10,0xfb,0x06,0x86,0x06] 5552 5553v_mul_u32_u24_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5554// CHECK: [0xf9,0x04,0x0a,0x10,0xfc,0x06,0x86,0x06] 5555 5556v_mul_u32_u24_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5557// CHECK: [0xf9,0x04,0x0a,0x10,0xfd,0x06,0x86,0x06] 5558 5559v_mul_u32_u24_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5560// CHECK: [0xf9,0xfe,0x0b,0x10,0x01,0x06,0x06,0x06] 5561 5562v_mul_u32_u24_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5563// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x26,0x06,0x06] 5564 5565v_mul_u32_u24_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5566// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x06] 5567 5568v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5569// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x00,0x06,0x06] 5570 5571v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5572// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x01,0x06,0x06] 5573 5574v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5575// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x02,0x06,0x06] 5576 5577v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5578// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x03,0x06,0x06] 5579 5580v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5581// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x04,0x06,0x06] 5582 5583v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5584// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x05,0x06,0x06] 5585 5586v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 5587// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x0e,0x06,0x06] 5588 5589v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 5590// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x16,0x06,0x06] 5591 5592v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 5593// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x16,0x06,0x06] 5594 5595v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 5596// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x06] 5597 5598v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 5599// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x00,0x06] 5600 5601v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 5602// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x01,0x06] 5603 5604v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 5605// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x02,0x06] 5606 5607v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 5608// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x03,0x06] 5609 5610v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 5611// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x04,0x06] 5612 5613v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 5614// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x05,0x06] 5615 5616v_mul_u32_u24_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5617// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x0e,0x06] 5618 5619v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 5620// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x06] 5621 5622v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 5623// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x00] 5624 5625v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 5626// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x01] 5627 5628v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 5629// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x02] 5630 5631v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 5632// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x03] 5633 5634v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 5635// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x04] 5636 5637v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 5638// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x05] 5639 5640v_mul_u32_u24_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5641// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x0e] 5642 5643v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 5644// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x00] 5645 5646v_mul_u32_u24_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 5647// CHECK: [0xfa,0x04,0xfe,0x11,0x01,0xe4,0x00,0x00] 5648 5649v_mul_u32_u24_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 5650// CHECK: [0xfa,0x04,0x0a,0x10,0xff,0xe4,0x00,0x00] 5651 5652v_mul_u32_u24_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 5653// CHECK: [0xfa,0xfe,0x0b,0x10,0x01,0xe4,0x00,0x00] 5654 5655v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 5656// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x1b,0x00,0x00] 5657 5658v_mul_u32_u24_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 5659// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x40,0x01,0x00] 5660 5661v_mul_u32_u24_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 5662// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x41,0x01,0x00] 5663 5664v_mul_u32_u24_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 5665// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x42,0x01,0x00] 5666 5667v_mul_u32_u24_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 5668// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x43,0x01,0x00] 5669 5670v_mul_u32_u24_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 5671// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x30,0x01,0x00] 5672 5673v_mul_u32_u24_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 5674// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x34,0x01,0x00] 5675 5676v_mul_u32_u24_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 5677// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x38,0x01,0x00] 5678 5679v_mul_u32_u24_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 5680// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x3c,0x01,0x00] 5681 5682v_mul_u32_u24_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 5683// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x01,0x01,0x00] 5684 5685v_mul_u32_u24_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 5686// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x0f,0x01,0x00] 5687 5688v_mul_u32_u24_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 5689// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x11,0x01,0x00] 5690 5691v_mul_u32_u24_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 5692// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x1f,0x01,0x00] 5693 5694v_mul_u32_u24_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 5695// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x21,0x01,0x00] 5696 5697v_mul_u32_u24_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 5698// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x2f,0x01,0x00] 5699 5700v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 5701// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x10] 5702 5703v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 5704// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x30] 5705 5706v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 5707// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0xf0] 5708 5709v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 5710// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0xf0] 5711 5712v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 5713// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x01] 5714 5715v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 5716// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x03] 5717 5718v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 5719// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x0f] 5720 5721v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 5722// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x0f] 5723 5724v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 5725// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x08,0x00] 5726 5727v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5728// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x06] 5729 5730v_mul_hi_u32_u24_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5731// CHECK: [0xf9,0x04,0xfe,0x13,0x01,0x06,0x06,0x06] 5732 5733v_mul_hi_u32_u24_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5734// CHECK: [0xf9,0x04,0x0a,0x12,0xff,0x06,0x06,0x06] 5735 5736v_mul_hi_u32_u24_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5737// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x86,0x06] 5738 5739v_mul_hi_u32_u24_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5740// CHECK: [0xf9,0x04,0x0a,0x12,0x65,0x06,0x86,0x06] 5741 5742v_mul_hi_u32_u24_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5743// CHECK: [0xf9,0x04,0x0a,0x12,0x66,0x06,0x86,0x06] 5744 5745v_mul_hi_u32_u24_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5746// CHECK: [0xf9,0x04,0x0a,0x12,0x67,0x06,0x86,0x06] 5747 5748v_mul_hi_u32_u24_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5749// CHECK: [0xf9,0x04,0x0a,0x12,0x6a,0x06,0x86,0x06] 5750 5751v_mul_hi_u32_u24_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5752// CHECK: [0xf9,0x04,0x0a,0x12,0x6b,0x06,0x86,0x06] 5753 5754v_mul_hi_u32_u24_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5755// CHECK: [0xf9,0x04,0x0a,0x12,0x7b,0x06,0x86,0x06] 5756 5757v_mul_hi_u32_u24_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5758// CHECK: [0xf9,0x04,0x0a,0x12,0x7c,0x06,0x86,0x06] 5759 5760v_mul_hi_u32_u24_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5761// CHECK: [0xf9,0x04,0x0a,0x12,0x7e,0x06,0x86,0x06] 5762 5763v_mul_hi_u32_u24_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5764// CHECK: [0xf9,0x04,0x0a,0x12,0x7f,0x06,0x86,0x06] 5765 5766v_mul_hi_u32_u24_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5767// CHECK: [0xf9,0x04,0x0a,0x12,0x80,0x06,0x86,0x06] 5768 5769v_mul_hi_u32_u24_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5770// CHECK: [0xf9,0x04,0x0a,0x12,0xc1,0x06,0x86,0x06] 5771 5772v_mul_hi_u32_u24_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5773// CHECK: [0xf9,0x04,0x0a,0x12,0xf0,0x06,0x86,0x06] 5774 5775v_mul_hi_u32_u24_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5776// CHECK: [0xf9,0x04,0x0a,0x12,0xf7,0x06,0x86,0x06] 5777 5778v_mul_hi_u32_u24_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5779// CHECK: [0xf9,0x04,0x0a,0x12,0xfb,0x06,0x86,0x06] 5780 5781v_mul_hi_u32_u24_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5782// CHECK: [0xf9,0x04,0x0a,0x12,0xfc,0x06,0x86,0x06] 5783 5784v_mul_hi_u32_u24_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5785// CHECK: [0xf9,0x04,0x0a,0x12,0xfd,0x06,0x86,0x06] 5786 5787v_mul_hi_u32_u24_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5788// CHECK: [0xf9,0xfe,0x0b,0x12,0x01,0x06,0x06,0x06] 5789 5790v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5791// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x06] 5792 5793v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5794// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x00,0x06,0x06] 5795 5796v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5797// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x01,0x06,0x06] 5798 5799v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5800// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x02,0x06,0x06] 5801 5802v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5803// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x03,0x06,0x06] 5804 5805v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5806// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x04,0x06,0x06] 5807 5808v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5809// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x05,0x06,0x06] 5810 5811v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 5812// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x0e,0x06,0x06] 5813 5814v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 5815// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x16,0x06,0x06] 5816 5817v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 5818// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x16,0x06,0x06] 5819 5820v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 5821// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x06] 5822 5823v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 5824// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x00,0x06] 5825 5826v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 5827// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x01,0x06] 5828 5829v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 5830// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x02,0x06] 5831 5832v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 5833// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x03,0x06] 5834 5835v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 5836// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x04,0x06] 5837 5838v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 5839// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x05,0x06] 5840 5841v_mul_hi_u32_u24_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5842// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x0e,0x06] 5843 5844v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 5845// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x06] 5846 5847v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 5848// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x00] 5849 5850v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 5851// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x01] 5852 5853v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 5854// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x02] 5855 5856v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 5857// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x03] 5858 5859v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 5860// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x04] 5861 5862v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 5863// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x05] 5864 5865v_mul_hi_u32_u24_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5866// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x0e] 5867 5868v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 5869// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x00] 5870 5871v_mul_hi_u32_u24_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 5872// CHECK: [0xfa,0x04,0xfe,0x13,0x01,0xe4,0x00,0x00] 5873 5874v_mul_hi_u32_u24_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 5875// CHECK: [0xfa,0x04,0x0a,0x12,0xff,0xe4,0x00,0x00] 5876 5877v_mul_hi_u32_u24_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 5878// CHECK: [0xfa,0xfe,0x0b,0x12,0x01,0xe4,0x00,0x00] 5879 5880v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 5881// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x1b,0x00,0x00] 5882 5883v_mul_hi_u32_u24_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 5884// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x40,0x01,0x00] 5885 5886v_mul_hi_u32_u24_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 5887// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x41,0x01,0x00] 5888 5889v_mul_hi_u32_u24_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 5890// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x42,0x01,0x00] 5891 5892v_mul_hi_u32_u24_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 5893// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x43,0x01,0x00] 5894 5895v_mul_hi_u32_u24_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 5896// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x30,0x01,0x00] 5897 5898v_mul_hi_u32_u24_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 5899// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x34,0x01,0x00] 5900 5901v_mul_hi_u32_u24_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 5902// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x38,0x01,0x00] 5903 5904v_mul_hi_u32_u24_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 5905// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x3c,0x01,0x00] 5906 5907v_mul_hi_u32_u24_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 5908// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x01,0x01,0x00] 5909 5910v_mul_hi_u32_u24_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 5911// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x0f,0x01,0x00] 5912 5913v_mul_hi_u32_u24_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 5914// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x11,0x01,0x00] 5915 5916v_mul_hi_u32_u24_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 5917// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x1f,0x01,0x00] 5918 5919v_mul_hi_u32_u24_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 5920// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x21,0x01,0x00] 5921 5922v_mul_hi_u32_u24_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 5923// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x2f,0x01,0x00] 5924 5925v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 5926// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x10] 5927 5928v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 5929// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x30] 5930 5931v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 5932// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0xf0] 5933 5934v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 5935// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0xf0] 5936 5937v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 5938// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x01] 5939 5940v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 5941// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x03] 5942 5943v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 5944// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x0f] 5945 5946v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 5947// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x0f] 5948 5949v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 5950// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x08,0x00] 5951 5952v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5953// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x06] 5954 5955v_min_f32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5956// CHECK: [0xf9,0x04,0xfe,0x15,0x01,0x06,0x06,0x06] 5957 5958v_min_f32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5959// CHECK: [0xf9,0x04,0x0a,0x14,0xff,0x06,0x06,0x06] 5960 5961v_min_f32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5962// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x86,0x06] 5963 5964v_min_f32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5965// CHECK: [0xf9,0x04,0x0a,0x14,0x65,0x06,0x86,0x06] 5966 5967v_min_f32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5968// CHECK: [0xf9,0x04,0x0a,0x14,0x66,0x06,0x86,0x06] 5969 5970v_min_f32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5971// CHECK: [0xf9,0x04,0x0a,0x14,0x67,0x06,0x86,0x06] 5972 5973v_min_f32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5974// CHECK: [0xf9,0x04,0x0a,0x14,0x6a,0x06,0x86,0x06] 5975 5976v_min_f32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5977// CHECK: [0xf9,0x04,0x0a,0x14,0x6b,0x06,0x86,0x06] 5978 5979v_min_f32_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5980// CHECK: [0xf9,0x04,0x0a,0x14,0x7b,0x06,0x86,0x06] 5981 5982v_min_f32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5983// CHECK: [0xf9,0x04,0x0a,0x14,0x7c,0x06,0x86,0x06] 5984 5985v_min_f32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5986// CHECK: [0xf9,0x04,0x0a,0x14,0x7e,0x06,0x86,0x06] 5987 5988v_min_f32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5989// CHECK: [0xf9,0x04,0x0a,0x14,0x7f,0x06,0x86,0x06] 5990 5991v_min_f32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5992// CHECK: [0xf9,0x04,0x0a,0x14,0x80,0x06,0x86,0x06] 5993 5994v_min_f32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5995// CHECK: [0xf9,0x04,0x0a,0x14,0xc1,0x06,0x86,0x06] 5996 5997v_min_f32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 5998// CHECK: [0xf9,0x04,0x0a,0x14,0xf0,0x06,0x86,0x06] 5999 6000v_min_f32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6001// CHECK: [0xf9,0x04,0x0a,0x14,0xf7,0x06,0x86,0x06] 6002 6003v_min_f32_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6004// CHECK: [0xf9,0x04,0x0a,0x14,0xfb,0x06,0x86,0x06] 6005 6006v_min_f32_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6007// CHECK: [0xf9,0x04,0x0a,0x14,0xfc,0x06,0x86,0x06] 6008 6009v_min_f32_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6010// CHECK: [0xf9,0x04,0x0a,0x14,0xfd,0x06,0x86,0x06] 6011 6012v_min_f32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6013// CHECK: [0xf9,0xfe,0x0b,0x14,0x01,0x06,0x06,0x06] 6014 6015v_min_f32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6016// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x26,0x06,0x06] 6017 6018v_min_f32_sdwa v5, v1, v2 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6019// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x46,0x06,0x06] 6020 6021v_min_f32_sdwa v5, v1, v2 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6022// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x86,0x06,0x06] 6023 6024v_min_f32_sdwa v5, v1, v2 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6025// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0xc6,0x06,0x06] 6026 6027v_min_f32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6028// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x06] 6029 6030v_min_f32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6031// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x00,0x06,0x06] 6032 6033v_min_f32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6034// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x01,0x06,0x06] 6035 6036v_min_f32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6037// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x02,0x06,0x06] 6038 6039v_min_f32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6040// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x03,0x06,0x06] 6041 6042v_min_f32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6043// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x04,0x06,0x06] 6044 6045v_min_f32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6046// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x05,0x06,0x06] 6047 6048v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 6049// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x0e,0x06,0x06] 6050 6051v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 6052// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x16,0x06,0x06] 6053 6054v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 6055// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x16,0x06,0x06] 6056 6057v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 6058// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x06] 6059 6060v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 6061// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x00,0x06] 6062 6063v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 6064// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x01,0x06] 6065 6066v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 6067// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x02,0x06] 6068 6069v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 6070// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x03,0x06] 6071 6072v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 6073// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x04,0x06] 6074 6075v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 6076// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x05,0x06] 6077 6078v_min_f32_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6079// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x16,0x06] 6080 6081v_min_f32_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6082// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x26,0x06] 6083 6084v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 6085// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x06] 6086 6087v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 6088// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x00] 6089 6090v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 6091// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x01] 6092 6093v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 6094// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x02] 6095 6096v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 6097// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x03] 6098 6099v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 6100// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x04] 6101 6102v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 6103// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x05] 6104 6105v_min_f32_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6106// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x16] 6107 6108v_min_f32_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6109// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x26] 6110 6111v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6112// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x00] 6113 6114v_min_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6115// CHECK: [0xfa,0x04,0xfe,0x15,0x01,0xe4,0x00,0x00] 6116 6117v_min_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6118// CHECK: [0xfa,0x04,0x0a,0x14,0xff,0xe4,0x00,0x00] 6119 6120v_min_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6121// CHECK: [0xfa,0xfe,0x0b,0x14,0x01,0xe4,0x00,0x00] 6122 6123v_min_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 6124// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x1b,0x00,0x00] 6125 6126v_min_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 6127// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x40,0x01,0x00] 6128 6129v_min_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 6130// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x41,0x01,0x00] 6131 6132v_min_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 6133// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x42,0x01,0x00] 6134 6135v_min_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 6136// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x43,0x01,0x00] 6137 6138v_min_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 6139// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x30,0x01,0x00] 6140 6141v_min_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 6142// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x34,0x01,0x00] 6143 6144v_min_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 6145// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x38,0x01,0x00] 6146 6147v_min_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 6148// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x3c,0x01,0x00] 6149 6150v_min_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 6151// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x01,0x01,0x00] 6152 6153v_min_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 6154// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x0f,0x01,0x00] 6155 6156v_min_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 6157// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x11,0x01,0x00] 6158 6159v_min_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 6160// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x1f,0x01,0x00] 6161 6162v_min_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 6163// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x21,0x01,0x00] 6164 6165v_min_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 6166// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x2f,0x01,0x00] 6167 6168v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 6169// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x10] 6170 6171v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 6172// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x30] 6173 6174v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 6175// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0xf0] 6176 6177v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 6178// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0xf0] 6179 6180v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 6181// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x01] 6182 6183v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 6184// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x03] 6185 6186v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 6187// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x0f] 6188 6189v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 6190// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x0f] 6191 6192v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 6193// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x08,0x00] 6194 6195v_min_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6196// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x10,0x00] 6197 6198v_min_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6199// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x20,0x00] 6200 6201v_min_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6202// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x40,0x00] 6203 6204v_min_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6205// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x80,0x00] 6206 6207v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6208// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x06] 6209 6210v_max_f32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6211// CHECK: [0xf9,0x04,0xfe,0x17,0x01,0x06,0x06,0x06] 6212 6213v_max_f32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6214// CHECK: [0xf9,0x04,0x0a,0x16,0xff,0x06,0x06,0x06] 6215 6216v_max_f32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6217// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x86,0x06] 6218 6219v_max_f32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6220// CHECK: [0xf9,0x04,0x0a,0x16,0x65,0x06,0x86,0x06] 6221 6222v_max_f32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6223// CHECK: [0xf9,0x04,0x0a,0x16,0x66,0x06,0x86,0x06] 6224 6225v_max_f32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6226// CHECK: [0xf9,0x04,0x0a,0x16,0x67,0x06,0x86,0x06] 6227 6228v_max_f32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6229// CHECK: [0xf9,0x04,0x0a,0x16,0x6a,0x06,0x86,0x06] 6230 6231v_max_f32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6232// CHECK: [0xf9,0x04,0x0a,0x16,0x6b,0x06,0x86,0x06] 6233 6234v_max_f32_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6235// CHECK: [0xf9,0x04,0x0a,0x16,0x7b,0x06,0x86,0x06] 6236 6237v_max_f32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6238// CHECK: [0xf9,0x04,0x0a,0x16,0x7c,0x06,0x86,0x06] 6239 6240v_max_f32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6241// CHECK: [0xf9,0x04,0x0a,0x16,0x7e,0x06,0x86,0x06] 6242 6243v_max_f32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6244// CHECK: [0xf9,0x04,0x0a,0x16,0x7f,0x06,0x86,0x06] 6245 6246v_max_f32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6247// CHECK: [0xf9,0x04,0x0a,0x16,0x80,0x06,0x86,0x06] 6248 6249v_max_f32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6250// CHECK: [0xf9,0x04,0x0a,0x16,0xc1,0x06,0x86,0x06] 6251 6252v_max_f32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6253// CHECK: [0xf9,0x04,0x0a,0x16,0xf0,0x06,0x86,0x06] 6254 6255v_max_f32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6256// CHECK: [0xf9,0x04,0x0a,0x16,0xf7,0x06,0x86,0x06] 6257 6258v_max_f32_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6259// CHECK: [0xf9,0x04,0x0a,0x16,0xfb,0x06,0x86,0x06] 6260 6261v_max_f32_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6262// CHECK: [0xf9,0x04,0x0a,0x16,0xfc,0x06,0x86,0x06] 6263 6264v_max_f32_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6265// CHECK: [0xf9,0x04,0x0a,0x16,0xfd,0x06,0x86,0x06] 6266 6267v_max_f32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6268// CHECK: [0xf9,0xfe,0x0b,0x16,0x01,0x06,0x06,0x06] 6269 6270v_max_f32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6271// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x26,0x06,0x06] 6272 6273v_max_f32_sdwa v5, v1, v2 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6274// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x46,0x06,0x06] 6275 6276v_max_f32_sdwa v5, v1, v2 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6277// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x86,0x06,0x06] 6278 6279v_max_f32_sdwa v5, v1, v2 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6280// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0xc6,0x06,0x06] 6281 6282v_max_f32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6283// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x06] 6284 6285v_max_f32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6286// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x00,0x06,0x06] 6287 6288v_max_f32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6289// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x01,0x06,0x06] 6290 6291v_max_f32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6292// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x02,0x06,0x06] 6293 6294v_max_f32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6295// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x03,0x06,0x06] 6296 6297v_max_f32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6298// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x04,0x06,0x06] 6299 6300v_max_f32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6301// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x05,0x06,0x06] 6302 6303v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 6304// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x0e,0x06,0x06] 6305 6306v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 6307// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x16,0x06,0x06] 6308 6309v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 6310// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x16,0x06,0x06] 6311 6312v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 6313// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x06] 6314 6315v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 6316// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x00,0x06] 6317 6318v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 6319// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x01,0x06] 6320 6321v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 6322// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x02,0x06] 6323 6324v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 6325// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x03,0x06] 6326 6327v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 6328// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x04,0x06] 6329 6330v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 6331// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x05,0x06] 6332 6333v_max_f32_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6334// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x16,0x06] 6335 6336v_max_f32_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6337// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x26,0x06] 6338 6339v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 6340// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x06] 6341 6342v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 6343// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x00] 6344 6345v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 6346// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x01] 6347 6348v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 6349// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x02] 6350 6351v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 6352// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x03] 6353 6354v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 6355// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x04] 6356 6357v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 6358// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x05] 6359 6360v_max_f32_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6361// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x16] 6362 6363v_max_f32_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6364// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x26] 6365 6366v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6367// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x00] 6368 6369v_max_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6370// CHECK: [0xfa,0x04,0xfe,0x17,0x01,0xe4,0x00,0x00] 6371 6372v_max_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6373// CHECK: [0xfa,0x04,0x0a,0x16,0xff,0xe4,0x00,0x00] 6374 6375v_max_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6376// CHECK: [0xfa,0xfe,0x0b,0x16,0x01,0xe4,0x00,0x00] 6377 6378v_max_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 6379// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x1b,0x00,0x00] 6380 6381v_max_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 6382// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x40,0x01,0x00] 6383 6384v_max_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 6385// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x41,0x01,0x00] 6386 6387v_max_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 6388// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x42,0x01,0x00] 6389 6390v_max_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 6391// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x43,0x01,0x00] 6392 6393v_max_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 6394// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x30,0x01,0x00] 6395 6396v_max_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 6397// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x34,0x01,0x00] 6398 6399v_max_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 6400// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x38,0x01,0x00] 6401 6402v_max_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 6403// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x3c,0x01,0x00] 6404 6405v_max_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 6406// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x01,0x01,0x00] 6407 6408v_max_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 6409// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x0f,0x01,0x00] 6410 6411v_max_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 6412// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x11,0x01,0x00] 6413 6414v_max_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 6415// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x1f,0x01,0x00] 6416 6417v_max_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 6418// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x21,0x01,0x00] 6419 6420v_max_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 6421// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x2f,0x01,0x00] 6422 6423v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 6424// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x10] 6425 6426v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 6427// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x30] 6428 6429v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 6430// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0xf0] 6431 6432v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 6433// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0xf0] 6434 6435v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 6436// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x01] 6437 6438v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 6439// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x03] 6440 6441v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 6442// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x0f] 6443 6444v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 6445// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x0f] 6446 6447v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 6448// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x08,0x00] 6449 6450v_max_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6451// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x10,0x00] 6452 6453v_max_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6454// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x20,0x00] 6455 6456v_max_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6457// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x40,0x00] 6458 6459v_max_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6460// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x80,0x00] 6461 6462v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6463// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x06] 6464 6465v_min_i32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6466// CHECK: [0xf9,0x04,0xfe,0x19,0x01,0x06,0x06,0x06] 6467 6468v_min_i32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6469// CHECK: [0xf9,0x04,0x0a,0x18,0xff,0x06,0x06,0x06] 6470 6471v_min_i32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6472// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x86,0x06] 6473 6474v_min_i32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6475// CHECK: [0xf9,0x04,0x0a,0x18,0x65,0x06,0x86,0x06] 6476 6477v_min_i32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6478// CHECK: [0xf9,0x04,0x0a,0x18,0x66,0x06,0x86,0x06] 6479 6480v_min_i32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6481// CHECK: [0xf9,0x04,0x0a,0x18,0x67,0x06,0x86,0x06] 6482 6483v_min_i32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6484// CHECK: [0xf9,0x04,0x0a,0x18,0x6a,0x06,0x86,0x06] 6485 6486v_min_i32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6487// CHECK: [0xf9,0x04,0x0a,0x18,0x6b,0x06,0x86,0x06] 6488 6489v_min_i32_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6490// CHECK: [0xf9,0x04,0x0a,0x18,0x7b,0x06,0x86,0x06] 6491 6492v_min_i32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6493// CHECK: [0xf9,0x04,0x0a,0x18,0x7c,0x06,0x86,0x06] 6494 6495v_min_i32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6496// CHECK: [0xf9,0x04,0x0a,0x18,0x7e,0x06,0x86,0x06] 6497 6498v_min_i32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6499// CHECK: [0xf9,0x04,0x0a,0x18,0x7f,0x06,0x86,0x06] 6500 6501v_min_i32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6502// CHECK: [0xf9,0x04,0x0a,0x18,0x80,0x06,0x86,0x06] 6503 6504v_min_i32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6505// CHECK: [0xf9,0x04,0x0a,0x18,0xc1,0x06,0x86,0x06] 6506 6507v_min_i32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6508// CHECK: [0xf9,0x04,0x0a,0x18,0xf0,0x06,0x86,0x06] 6509 6510v_min_i32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6511// CHECK: [0xf9,0x04,0x0a,0x18,0xf7,0x06,0x86,0x06] 6512 6513v_min_i32_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6514// CHECK: [0xf9,0x04,0x0a,0x18,0xfb,0x06,0x86,0x06] 6515 6516v_min_i32_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6517// CHECK: [0xf9,0x04,0x0a,0x18,0xfc,0x06,0x86,0x06] 6518 6519v_min_i32_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6520// CHECK: [0xf9,0x04,0x0a,0x18,0xfd,0x06,0x86,0x06] 6521 6522v_min_i32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6523// CHECK: [0xf9,0xfe,0x0b,0x18,0x01,0x06,0x06,0x06] 6524 6525v_min_i32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6526// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x06] 6527 6528v_min_i32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6529// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x00,0x06,0x06] 6530 6531v_min_i32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6532// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x01,0x06,0x06] 6533 6534v_min_i32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6535// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x02,0x06,0x06] 6536 6537v_min_i32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6538// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x03,0x06,0x06] 6539 6540v_min_i32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6541// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x04,0x06,0x06] 6542 6543v_min_i32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6544// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x05,0x06,0x06] 6545 6546v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 6547// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x0e,0x06,0x06] 6548 6549v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 6550// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x16,0x06,0x06] 6551 6552v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 6553// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x16,0x06,0x06] 6554 6555v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 6556// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x06] 6557 6558v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 6559// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x00,0x06] 6560 6561v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 6562// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x01,0x06] 6563 6564v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 6565// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x02,0x06] 6566 6567v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 6568// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x03,0x06] 6569 6570v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 6571// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x04,0x06] 6572 6573v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 6574// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x05,0x06] 6575 6576v_min_i32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6577// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x0e,0x06] 6578 6579v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 6580// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x06] 6581 6582v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 6583// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x00] 6584 6585v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 6586// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x01] 6587 6588v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 6589// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x02] 6590 6591v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 6592// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x03] 6593 6594v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 6595// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x04] 6596 6597v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 6598// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x05] 6599 6600v_min_i32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6601// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x0e] 6602 6603v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6604// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x00] 6605 6606v_min_i32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6607// CHECK: [0xfa,0x04,0xfe,0x19,0x01,0xe4,0x00,0x00] 6608 6609v_min_i32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6610// CHECK: [0xfa,0x04,0x0a,0x18,0xff,0xe4,0x00,0x00] 6611 6612v_min_i32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6613// CHECK: [0xfa,0xfe,0x0b,0x18,0x01,0xe4,0x00,0x00] 6614 6615v_min_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 6616// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x1b,0x00,0x00] 6617 6618v_min_i32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 6619// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x40,0x01,0x00] 6620 6621v_min_i32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 6622// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x41,0x01,0x00] 6623 6624v_min_i32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 6625// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x42,0x01,0x00] 6626 6627v_min_i32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 6628// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x43,0x01,0x00] 6629 6630v_min_i32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 6631// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x30,0x01,0x00] 6632 6633v_min_i32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 6634// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x34,0x01,0x00] 6635 6636v_min_i32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 6637// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x38,0x01,0x00] 6638 6639v_min_i32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 6640// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x3c,0x01,0x00] 6641 6642v_min_i32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 6643// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x01,0x01,0x00] 6644 6645v_min_i32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 6646// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x0f,0x01,0x00] 6647 6648v_min_i32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 6649// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x11,0x01,0x00] 6650 6651v_min_i32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 6652// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x1f,0x01,0x00] 6653 6654v_min_i32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 6655// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x21,0x01,0x00] 6656 6657v_min_i32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 6658// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x2f,0x01,0x00] 6659 6660v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 6661// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x10] 6662 6663v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 6664// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x30] 6665 6666v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 6667// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0xf0] 6668 6669v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 6670// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0xf0] 6671 6672v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 6673// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x01] 6674 6675v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 6676// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x03] 6677 6678v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 6679// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x0f] 6680 6681v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 6682// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x0f] 6683 6684v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 6685// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x08,0x00] 6686 6687v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6688// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x06] 6689 6690v_max_i32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6691// CHECK: [0xf9,0x04,0xfe,0x1b,0x01,0x06,0x06,0x06] 6692 6693v_max_i32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6694// CHECK: [0xf9,0x04,0x0a,0x1a,0xff,0x06,0x06,0x06] 6695 6696v_max_i32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6697// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x86,0x06] 6698 6699v_max_i32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6700// CHECK: [0xf9,0x04,0x0a,0x1a,0x65,0x06,0x86,0x06] 6701 6702v_max_i32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6703// CHECK: [0xf9,0x04,0x0a,0x1a,0x66,0x06,0x86,0x06] 6704 6705v_max_i32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6706// CHECK: [0xf9,0x04,0x0a,0x1a,0x67,0x06,0x86,0x06] 6707 6708v_max_i32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6709// CHECK: [0xf9,0x04,0x0a,0x1a,0x6a,0x06,0x86,0x06] 6710 6711v_max_i32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6712// CHECK: [0xf9,0x04,0x0a,0x1a,0x6b,0x06,0x86,0x06] 6713 6714v_max_i32_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6715// CHECK: [0xf9,0x04,0x0a,0x1a,0x7b,0x06,0x86,0x06] 6716 6717v_max_i32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6718// CHECK: [0xf9,0x04,0x0a,0x1a,0x7c,0x06,0x86,0x06] 6719 6720v_max_i32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6721// CHECK: [0xf9,0x04,0x0a,0x1a,0x7e,0x06,0x86,0x06] 6722 6723v_max_i32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6724// CHECK: [0xf9,0x04,0x0a,0x1a,0x7f,0x06,0x86,0x06] 6725 6726v_max_i32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6727// CHECK: [0xf9,0x04,0x0a,0x1a,0x80,0x06,0x86,0x06] 6728 6729v_max_i32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6730// CHECK: [0xf9,0x04,0x0a,0x1a,0xc1,0x06,0x86,0x06] 6731 6732v_max_i32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6733// CHECK: [0xf9,0x04,0x0a,0x1a,0xf0,0x06,0x86,0x06] 6734 6735v_max_i32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6736// CHECK: [0xf9,0x04,0x0a,0x1a,0xf7,0x06,0x86,0x06] 6737 6738v_max_i32_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6739// CHECK: [0xf9,0x04,0x0a,0x1a,0xfb,0x06,0x86,0x06] 6740 6741v_max_i32_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6742// CHECK: [0xf9,0x04,0x0a,0x1a,0xfc,0x06,0x86,0x06] 6743 6744v_max_i32_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6745// CHECK: [0xf9,0x04,0x0a,0x1a,0xfd,0x06,0x86,0x06] 6746 6747v_max_i32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6748// CHECK: [0xf9,0xfe,0x0b,0x1a,0x01,0x06,0x06,0x06] 6749 6750v_max_i32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6751// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x06] 6752 6753v_max_i32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6754// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x00,0x06,0x06] 6755 6756v_max_i32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6757// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x01,0x06,0x06] 6758 6759v_max_i32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6760// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x02,0x06,0x06] 6761 6762v_max_i32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6763// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x03,0x06,0x06] 6764 6765v_max_i32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6766// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x04,0x06,0x06] 6767 6768v_max_i32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6769// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x05,0x06,0x06] 6770 6771v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 6772// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x0e,0x06,0x06] 6773 6774v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 6775// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x16,0x06,0x06] 6776 6777v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 6778// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x16,0x06,0x06] 6779 6780v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 6781// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x06] 6782 6783v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 6784// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x00,0x06] 6785 6786v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 6787// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x01,0x06] 6788 6789v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 6790// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x02,0x06] 6791 6792v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 6793// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x03,0x06] 6794 6795v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 6796// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x04,0x06] 6797 6798v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 6799// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x05,0x06] 6800 6801v_max_i32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6802// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x0e,0x06] 6803 6804v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 6805// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x06] 6806 6807v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 6808// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x00] 6809 6810v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 6811// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x01] 6812 6813v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 6814// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x02] 6815 6816v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 6817// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x03] 6818 6819v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 6820// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x04] 6821 6822v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 6823// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x05] 6824 6825v_max_i32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6826// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x0e] 6827 6828v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6829// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x00] 6830 6831v_max_i32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6832// CHECK: [0xfa,0x04,0xfe,0x1b,0x01,0xe4,0x00,0x00] 6833 6834v_max_i32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6835// CHECK: [0xfa,0x04,0x0a,0x1a,0xff,0xe4,0x00,0x00] 6836 6837v_max_i32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 6838// CHECK: [0xfa,0xfe,0x0b,0x1a,0x01,0xe4,0x00,0x00] 6839 6840v_max_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 6841// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x1b,0x00,0x00] 6842 6843v_max_i32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 6844// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x40,0x01,0x00] 6845 6846v_max_i32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 6847// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x41,0x01,0x00] 6848 6849v_max_i32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 6850// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x42,0x01,0x00] 6851 6852v_max_i32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 6853// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x43,0x01,0x00] 6854 6855v_max_i32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 6856// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x30,0x01,0x00] 6857 6858v_max_i32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 6859// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x34,0x01,0x00] 6860 6861v_max_i32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 6862// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x38,0x01,0x00] 6863 6864v_max_i32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 6865// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x3c,0x01,0x00] 6866 6867v_max_i32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 6868// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x01,0x01,0x00] 6869 6870v_max_i32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 6871// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x0f,0x01,0x00] 6872 6873v_max_i32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 6874// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x11,0x01,0x00] 6875 6876v_max_i32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 6877// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x1f,0x01,0x00] 6878 6879v_max_i32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 6880// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x21,0x01,0x00] 6881 6882v_max_i32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 6883// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x2f,0x01,0x00] 6884 6885v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 6886// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x10] 6887 6888v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 6889// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x30] 6890 6891v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 6892// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0xf0] 6893 6894v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 6895// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0xf0] 6896 6897v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 6898// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x01] 6899 6900v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 6901// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x03] 6902 6903v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 6904// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x0f] 6905 6906v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 6907// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x0f] 6908 6909v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 6910// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x08,0x00] 6911 6912v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6913// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x06] 6914 6915v_min_u32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6916// CHECK: [0xf9,0x04,0xfe,0x1d,0x01,0x06,0x06,0x06] 6917 6918v_min_u32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6919// CHECK: [0xf9,0x04,0x0a,0x1c,0xff,0x06,0x06,0x06] 6920 6921v_min_u32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6922// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x86,0x06] 6923 6924v_min_u32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6925// CHECK: [0xf9,0x04,0x0a,0x1c,0x65,0x06,0x86,0x06] 6926 6927v_min_u32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6928// CHECK: [0xf9,0x04,0x0a,0x1c,0x66,0x06,0x86,0x06] 6929 6930v_min_u32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6931// CHECK: [0xf9,0x04,0x0a,0x1c,0x67,0x06,0x86,0x06] 6932 6933v_min_u32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6934// CHECK: [0xf9,0x04,0x0a,0x1c,0x6a,0x06,0x86,0x06] 6935 6936v_min_u32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6937// CHECK: [0xf9,0x04,0x0a,0x1c,0x6b,0x06,0x86,0x06] 6938 6939v_min_u32_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6940// CHECK: [0xf9,0x04,0x0a,0x1c,0x7b,0x06,0x86,0x06] 6941 6942v_min_u32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6943// CHECK: [0xf9,0x04,0x0a,0x1c,0x7c,0x06,0x86,0x06] 6944 6945v_min_u32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6946// CHECK: [0xf9,0x04,0x0a,0x1c,0x7e,0x06,0x86,0x06] 6947 6948v_min_u32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6949// CHECK: [0xf9,0x04,0x0a,0x1c,0x7f,0x06,0x86,0x06] 6950 6951v_min_u32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6952// CHECK: [0xf9,0x04,0x0a,0x1c,0x80,0x06,0x86,0x06] 6953 6954v_min_u32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6955// CHECK: [0xf9,0x04,0x0a,0x1c,0xc1,0x06,0x86,0x06] 6956 6957v_min_u32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6958// CHECK: [0xf9,0x04,0x0a,0x1c,0xf0,0x06,0x86,0x06] 6959 6960v_min_u32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6961// CHECK: [0xf9,0x04,0x0a,0x1c,0xf7,0x06,0x86,0x06] 6962 6963v_min_u32_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6964// CHECK: [0xf9,0x04,0x0a,0x1c,0xfb,0x06,0x86,0x06] 6965 6966v_min_u32_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6967// CHECK: [0xf9,0x04,0x0a,0x1c,0xfc,0x06,0x86,0x06] 6968 6969v_min_u32_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6970// CHECK: [0xf9,0x04,0x0a,0x1c,0xfd,0x06,0x86,0x06] 6971 6972v_min_u32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6973// CHECK: [0xf9,0xfe,0x0b,0x1c,0x01,0x06,0x06,0x06] 6974 6975v_min_u32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6976// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x06] 6977 6978v_min_u32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6979// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x00,0x06,0x06] 6980 6981v_min_u32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6982// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x01,0x06,0x06] 6983 6984v_min_u32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6985// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x02,0x06,0x06] 6986 6987v_min_u32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6988// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x03,0x06,0x06] 6989 6990v_min_u32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6991// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x04,0x06,0x06] 6992 6993v_min_u32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 6994// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x05,0x06,0x06] 6995 6996v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 6997// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x0e,0x06,0x06] 6998 6999v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 7000// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x16,0x06,0x06] 7001 7002v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 7003// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x16,0x06,0x06] 7004 7005v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 7006// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x06] 7007 7008v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 7009// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x00,0x06] 7010 7011v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 7012// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x01,0x06] 7013 7014v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 7015// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x02,0x06] 7016 7017v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 7018// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x03,0x06] 7019 7020v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 7021// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x04,0x06] 7022 7023v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 7024// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x05,0x06] 7025 7026v_min_u32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7027// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x0e,0x06] 7028 7029v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 7030// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x06] 7031 7032v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 7033// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x00] 7034 7035v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 7036// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x01] 7037 7038v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 7039// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x02] 7040 7041v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 7042// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x03] 7043 7044v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 7045// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x04] 7046 7047v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 7048// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x05] 7049 7050v_min_u32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7051// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x0e] 7052 7053v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 7054// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x00] 7055 7056v_min_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 7057// CHECK: [0xfa,0x04,0xfe,0x1d,0x01,0xe4,0x00,0x00] 7058 7059v_min_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 7060// CHECK: [0xfa,0x04,0x0a,0x1c,0xff,0xe4,0x00,0x00] 7061 7062v_min_u32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 7063// CHECK: [0xfa,0xfe,0x0b,0x1c,0x01,0xe4,0x00,0x00] 7064 7065v_min_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 7066// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x1b,0x00,0x00] 7067 7068v_min_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 7069// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x40,0x01,0x00] 7070 7071v_min_u32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 7072// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x41,0x01,0x00] 7073 7074v_min_u32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 7075// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x42,0x01,0x00] 7076 7077v_min_u32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 7078// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x43,0x01,0x00] 7079 7080v_min_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 7081// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x30,0x01,0x00] 7082 7083v_min_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 7084// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x34,0x01,0x00] 7085 7086v_min_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 7087// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x38,0x01,0x00] 7088 7089v_min_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 7090// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x3c,0x01,0x00] 7091 7092v_min_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 7093// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x01,0x01,0x00] 7094 7095v_min_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 7096// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x0f,0x01,0x00] 7097 7098v_min_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 7099// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x11,0x01,0x00] 7100 7101v_min_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 7102// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x1f,0x01,0x00] 7103 7104v_min_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 7105// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x21,0x01,0x00] 7106 7107v_min_u32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 7108// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x2f,0x01,0x00] 7109 7110v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 7111// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x10] 7112 7113v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 7114// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x30] 7115 7116v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 7117// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0xf0] 7118 7119v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 7120// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0xf0] 7121 7122v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 7123// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x01] 7124 7125v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 7126// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x03] 7127 7128v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 7129// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x0f] 7130 7131v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 7132// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x0f] 7133 7134v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 7135// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x08,0x00] 7136 7137v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7138// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x06] 7139 7140v_max_u32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7141// CHECK: [0xf9,0x04,0xfe,0x1f,0x01,0x06,0x06,0x06] 7142 7143v_max_u32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7144// CHECK: [0xf9,0x04,0x0a,0x1e,0xff,0x06,0x06,0x06] 7145 7146v_max_u32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7147// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x86,0x06] 7148 7149v_max_u32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7150// CHECK: [0xf9,0x04,0x0a,0x1e,0x65,0x06,0x86,0x06] 7151 7152v_max_u32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7153// CHECK: [0xf9,0x04,0x0a,0x1e,0x66,0x06,0x86,0x06] 7154 7155v_max_u32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7156// CHECK: [0xf9,0x04,0x0a,0x1e,0x67,0x06,0x86,0x06] 7157 7158v_max_u32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7159// CHECK: [0xf9,0x04,0x0a,0x1e,0x6a,0x06,0x86,0x06] 7160 7161v_max_u32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7162// CHECK: [0xf9,0x04,0x0a,0x1e,0x6b,0x06,0x86,0x06] 7163 7164v_max_u32_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7165// CHECK: [0xf9,0x04,0x0a,0x1e,0x7b,0x06,0x86,0x06] 7166 7167v_max_u32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7168// CHECK: [0xf9,0x04,0x0a,0x1e,0x7c,0x06,0x86,0x06] 7169 7170v_max_u32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7171// CHECK: [0xf9,0x04,0x0a,0x1e,0x7e,0x06,0x86,0x06] 7172 7173v_max_u32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7174// CHECK: [0xf9,0x04,0x0a,0x1e,0x7f,0x06,0x86,0x06] 7175 7176v_max_u32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7177// CHECK: [0xf9,0x04,0x0a,0x1e,0x80,0x06,0x86,0x06] 7178 7179v_max_u32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7180// CHECK: [0xf9,0x04,0x0a,0x1e,0xc1,0x06,0x86,0x06] 7181 7182v_max_u32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7183// CHECK: [0xf9,0x04,0x0a,0x1e,0xf0,0x06,0x86,0x06] 7184 7185v_max_u32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7186// CHECK: [0xf9,0x04,0x0a,0x1e,0xf7,0x06,0x86,0x06] 7187 7188v_max_u32_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7189// CHECK: [0xf9,0x04,0x0a,0x1e,0xfb,0x06,0x86,0x06] 7190 7191v_max_u32_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7192// CHECK: [0xf9,0x04,0x0a,0x1e,0xfc,0x06,0x86,0x06] 7193 7194v_max_u32_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7195// CHECK: [0xf9,0x04,0x0a,0x1e,0xfd,0x06,0x86,0x06] 7196 7197v_max_u32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7198// CHECK: [0xf9,0xfe,0x0b,0x1e,0x01,0x06,0x06,0x06] 7199 7200v_max_u32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7201// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x06] 7202 7203v_max_u32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7204// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x00,0x06,0x06] 7205 7206v_max_u32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7207// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x01,0x06,0x06] 7208 7209v_max_u32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7210// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x02,0x06,0x06] 7211 7212v_max_u32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7213// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x03,0x06,0x06] 7214 7215v_max_u32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7216// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x04,0x06,0x06] 7217 7218v_max_u32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7219// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x05,0x06,0x06] 7220 7221v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 7222// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x0e,0x06,0x06] 7223 7224v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 7225// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x16,0x06,0x06] 7226 7227v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 7228// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x16,0x06,0x06] 7229 7230v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 7231// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x06] 7232 7233v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 7234// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x00,0x06] 7235 7236v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 7237// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x01,0x06] 7238 7239v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 7240// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x02,0x06] 7241 7242v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 7243// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x03,0x06] 7244 7245v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 7246// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x04,0x06] 7247 7248v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 7249// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x05,0x06] 7250 7251v_max_u32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7252// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x0e,0x06] 7253 7254v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 7255// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x06] 7256 7257v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 7258// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x00] 7259 7260v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 7261// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x01] 7262 7263v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 7264// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x02] 7265 7266v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 7267// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x03] 7268 7269v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 7270// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x04] 7271 7272v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 7273// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x05] 7274 7275v_max_u32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7276// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x0e] 7277 7278v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 7279// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x00] 7280 7281v_max_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 7282// CHECK: [0xfa,0x04,0xfe,0x1f,0x01,0xe4,0x00,0x00] 7283 7284v_max_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 7285// CHECK: [0xfa,0x04,0x0a,0x1e,0xff,0xe4,0x00,0x00] 7286 7287v_max_u32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 7288// CHECK: [0xfa,0xfe,0x0b,0x1e,0x01,0xe4,0x00,0x00] 7289 7290v_max_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 7291// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x1b,0x00,0x00] 7292 7293v_max_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 7294// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x40,0x01,0x00] 7295 7296v_max_u32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 7297// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x41,0x01,0x00] 7298 7299v_max_u32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 7300// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x42,0x01,0x00] 7301 7302v_max_u32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 7303// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x43,0x01,0x00] 7304 7305v_max_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 7306// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x30,0x01,0x00] 7307 7308v_max_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 7309// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x34,0x01,0x00] 7310 7311v_max_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 7312// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x38,0x01,0x00] 7313 7314v_max_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 7315// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x3c,0x01,0x00] 7316 7317v_max_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 7318// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x01,0x01,0x00] 7319 7320v_max_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 7321// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x0f,0x01,0x00] 7322 7323v_max_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 7324// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x11,0x01,0x00] 7325 7326v_max_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 7327// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x1f,0x01,0x00] 7328 7329v_max_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 7330// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x21,0x01,0x00] 7331 7332v_max_u32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 7333// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x2f,0x01,0x00] 7334 7335v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 7336// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x10] 7337 7338v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 7339// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x30] 7340 7341v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 7342// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0xf0] 7343 7344v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 7345// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0xf0] 7346 7347v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 7348// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x01] 7349 7350v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 7351// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x03] 7352 7353v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 7354// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x0f] 7355 7356v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 7357// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x0f] 7358 7359v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 7360// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x08,0x00] 7361 7362v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7363// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x06] 7364 7365v_lshrrev_b32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7366// CHECK: [0xf9,0x04,0xfe,0x21,0x01,0x06,0x06,0x06] 7367 7368v_lshrrev_b32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7369// CHECK: [0xf9,0x04,0x0a,0x20,0xff,0x06,0x06,0x06] 7370 7371v_lshrrev_b32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7372// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x86,0x06] 7373 7374v_lshrrev_b32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7375// CHECK: [0xf9,0x04,0x0a,0x20,0x65,0x06,0x86,0x06] 7376 7377v_lshrrev_b32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7378// CHECK: [0xf9,0x04,0x0a,0x20,0x66,0x06,0x86,0x06] 7379 7380v_lshrrev_b32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7381// CHECK: [0xf9,0x04,0x0a,0x20,0x67,0x06,0x86,0x06] 7382 7383v_lshrrev_b32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7384// CHECK: [0xf9,0x04,0x0a,0x20,0x6a,0x06,0x86,0x06] 7385 7386v_lshrrev_b32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7387// CHECK: [0xf9,0x04,0x0a,0x20,0x6b,0x06,0x86,0x06] 7388 7389v_lshrrev_b32_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7390// CHECK: [0xf9,0x04,0x0a,0x20,0x7b,0x06,0x86,0x06] 7391 7392v_lshrrev_b32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7393// CHECK: [0xf9,0x04,0x0a,0x20,0x7c,0x06,0x86,0x06] 7394 7395v_lshrrev_b32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7396// CHECK: [0xf9,0x04,0x0a,0x20,0x7e,0x06,0x86,0x06] 7397 7398v_lshrrev_b32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7399// CHECK: [0xf9,0x04,0x0a,0x20,0x7f,0x06,0x86,0x06] 7400 7401v_lshrrev_b32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7402// CHECK: [0xf9,0x04,0x0a,0x20,0x80,0x06,0x86,0x06] 7403 7404v_lshrrev_b32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7405// CHECK: [0xf9,0x04,0x0a,0x20,0xc1,0x06,0x86,0x06] 7406 7407v_lshrrev_b32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7408// CHECK: [0xf9,0x04,0x0a,0x20,0xf0,0x06,0x86,0x06] 7409 7410v_lshrrev_b32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7411// CHECK: [0xf9,0x04,0x0a,0x20,0xf7,0x06,0x86,0x06] 7412 7413v_lshrrev_b32_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7414// CHECK: [0xf9,0x04,0x0a,0x20,0xfb,0x06,0x86,0x06] 7415 7416v_lshrrev_b32_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7417// CHECK: [0xf9,0x04,0x0a,0x20,0xfc,0x06,0x86,0x06] 7418 7419v_lshrrev_b32_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7420// CHECK: [0xf9,0x04,0x0a,0x20,0xfd,0x06,0x86,0x06] 7421 7422v_lshrrev_b32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7423// CHECK: [0xf9,0xfe,0x0b,0x20,0x01,0x06,0x06,0x06] 7424 7425v_lshrrev_b32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7426// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x06] 7427 7428v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7429// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x00,0x06,0x06] 7430 7431v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7432// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x01,0x06,0x06] 7433 7434v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7435// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x02,0x06,0x06] 7436 7437v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7438// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x03,0x06,0x06] 7439 7440v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7441// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x04,0x06,0x06] 7442 7443v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7444// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x05,0x06,0x06] 7445 7446v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 7447// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x0e,0x06,0x06] 7448 7449v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 7450// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x16,0x06,0x06] 7451 7452v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 7453// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x16,0x06,0x06] 7454 7455v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 7456// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x06] 7457 7458v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 7459// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x00,0x06] 7460 7461v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 7462// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x01,0x06] 7463 7464v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 7465// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x02,0x06] 7466 7467v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 7468// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x03,0x06] 7469 7470v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 7471// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x04,0x06] 7472 7473v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 7474// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x05,0x06] 7475 7476v_lshrrev_b32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7477// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x0e,0x06] 7478 7479v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 7480// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x06] 7481 7482v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 7483// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x00] 7484 7485v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 7486// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x01] 7487 7488v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 7489// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x02] 7490 7491v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 7492// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x03] 7493 7494v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 7495// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x04] 7496 7497v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 7498// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x05] 7499 7500v_lshrrev_b32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7501// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x0e] 7502 7503v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 7504// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x00] 7505 7506v_lshrrev_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 7507// CHECK: [0xfa,0x04,0xfe,0x21,0x01,0xe4,0x00,0x00] 7508 7509v_lshrrev_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 7510// CHECK: [0xfa,0x04,0x0a,0x20,0xff,0xe4,0x00,0x00] 7511 7512v_lshrrev_b32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 7513// CHECK: [0xfa,0xfe,0x0b,0x20,0x01,0xe4,0x00,0x00] 7514 7515v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 7516// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x1b,0x00,0x00] 7517 7518v_lshrrev_b32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 7519// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x40,0x01,0x00] 7520 7521v_lshrrev_b32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 7522// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x41,0x01,0x00] 7523 7524v_lshrrev_b32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 7525// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x42,0x01,0x00] 7526 7527v_lshrrev_b32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 7528// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x43,0x01,0x00] 7529 7530v_lshrrev_b32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 7531// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x30,0x01,0x00] 7532 7533v_lshrrev_b32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 7534// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x34,0x01,0x00] 7535 7536v_lshrrev_b32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 7537// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x38,0x01,0x00] 7538 7539v_lshrrev_b32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 7540// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x3c,0x01,0x00] 7541 7542v_lshrrev_b32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 7543// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x01,0x01,0x00] 7544 7545v_lshrrev_b32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 7546// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x0f,0x01,0x00] 7547 7548v_lshrrev_b32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 7549// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x11,0x01,0x00] 7550 7551v_lshrrev_b32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 7552// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x1f,0x01,0x00] 7553 7554v_lshrrev_b32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 7555// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x21,0x01,0x00] 7556 7557v_lshrrev_b32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 7558// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x2f,0x01,0x00] 7559 7560v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 7561// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x10] 7562 7563v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 7564// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x30] 7565 7566v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 7567// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0xf0] 7568 7569v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 7570// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0xf0] 7571 7572v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 7573// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x01] 7574 7575v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 7576// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x03] 7577 7578v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 7579// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x0f] 7580 7581v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 7582// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x0f] 7583 7584v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 7585// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x08,0x00] 7586 7587v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7588// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x06] 7589 7590v_ashrrev_i32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7591// CHECK: [0xf9,0x04,0xfe,0x23,0x01,0x06,0x06,0x06] 7592 7593v_ashrrev_i32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7594// CHECK: [0xf9,0x04,0x0a,0x22,0xff,0x06,0x06,0x06] 7595 7596v_ashrrev_i32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7597// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x86,0x06] 7598 7599v_ashrrev_i32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7600// CHECK: [0xf9,0x04,0x0a,0x22,0x65,0x06,0x86,0x06] 7601 7602v_ashrrev_i32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7603// CHECK: [0xf9,0x04,0x0a,0x22,0x66,0x06,0x86,0x06] 7604 7605v_ashrrev_i32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7606// CHECK: [0xf9,0x04,0x0a,0x22,0x67,0x06,0x86,0x06] 7607 7608v_ashrrev_i32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7609// CHECK: [0xf9,0x04,0x0a,0x22,0x6a,0x06,0x86,0x06] 7610 7611v_ashrrev_i32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7612// CHECK: [0xf9,0x04,0x0a,0x22,0x6b,0x06,0x86,0x06] 7613 7614v_ashrrev_i32_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7615// CHECK: [0xf9,0x04,0x0a,0x22,0x7b,0x06,0x86,0x06] 7616 7617v_ashrrev_i32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7618// CHECK: [0xf9,0x04,0x0a,0x22,0x7c,0x06,0x86,0x06] 7619 7620v_ashrrev_i32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7621// CHECK: [0xf9,0x04,0x0a,0x22,0x7e,0x06,0x86,0x06] 7622 7623v_ashrrev_i32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7624// CHECK: [0xf9,0x04,0x0a,0x22,0x7f,0x06,0x86,0x06] 7625 7626v_ashrrev_i32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7627// CHECK: [0xf9,0x04,0x0a,0x22,0x80,0x06,0x86,0x06] 7628 7629v_ashrrev_i32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7630// CHECK: [0xf9,0x04,0x0a,0x22,0xc1,0x06,0x86,0x06] 7631 7632v_ashrrev_i32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7633// CHECK: [0xf9,0x04,0x0a,0x22,0xf0,0x06,0x86,0x06] 7634 7635v_ashrrev_i32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7636// CHECK: [0xf9,0x04,0x0a,0x22,0xf7,0x06,0x86,0x06] 7637 7638v_ashrrev_i32_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7639// CHECK: [0xf9,0x04,0x0a,0x22,0xfb,0x06,0x86,0x06] 7640 7641v_ashrrev_i32_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7642// CHECK: [0xf9,0x04,0x0a,0x22,0xfc,0x06,0x86,0x06] 7643 7644v_ashrrev_i32_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7645// CHECK: [0xf9,0x04,0x0a,0x22,0xfd,0x06,0x86,0x06] 7646 7647v_ashrrev_i32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7648// CHECK: [0xf9,0xfe,0x0b,0x22,0x01,0x06,0x06,0x06] 7649 7650v_ashrrev_i32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7651// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x06] 7652 7653v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7654// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x00,0x06,0x06] 7655 7656v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7657// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x01,0x06,0x06] 7658 7659v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7660// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x02,0x06,0x06] 7661 7662v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7663// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x03,0x06,0x06] 7664 7665v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7666// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x04,0x06,0x06] 7667 7668v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7669// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x05,0x06,0x06] 7670 7671v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 7672// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x0e,0x06,0x06] 7673 7674v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 7675// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x16,0x06,0x06] 7676 7677v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 7678// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x16,0x06,0x06] 7679 7680v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 7681// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x06] 7682 7683v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 7684// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x00,0x06] 7685 7686v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 7687// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x01,0x06] 7688 7689v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 7690// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x02,0x06] 7691 7692v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 7693// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x03,0x06] 7694 7695v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 7696// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x04,0x06] 7697 7698v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 7699// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x05,0x06] 7700 7701v_ashrrev_i32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7702// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x0e,0x06] 7703 7704v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 7705// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x06] 7706 7707v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 7708// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x00] 7709 7710v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 7711// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x01] 7712 7713v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 7714// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x02] 7715 7716v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 7717// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x03] 7718 7719v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 7720// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x04] 7721 7722v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 7723// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x05] 7724 7725v_ashrrev_i32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7726// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x0e] 7727 7728v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 7729// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x00] 7730 7731v_ashrrev_i32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 7732// CHECK: [0xfa,0x04,0xfe,0x23,0x01,0xe4,0x00,0x00] 7733 7734v_ashrrev_i32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 7735// CHECK: [0xfa,0x04,0x0a,0x22,0xff,0xe4,0x00,0x00] 7736 7737v_ashrrev_i32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 7738// CHECK: [0xfa,0xfe,0x0b,0x22,0x01,0xe4,0x00,0x00] 7739 7740v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 7741// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x1b,0x00,0x00] 7742 7743v_ashrrev_i32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 7744// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x40,0x01,0x00] 7745 7746v_ashrrev_i32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 7747// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x41,0x01,0x00] 7748 7749v_ashrrev_i32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 7750// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x42,0x01,0x00] 7751 7752v_ashrrev_i32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 7753// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x43,0x01,0x00] 7754 7755v_ashrrev_i32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 7756// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x30,0x01,0x00] 7757 7758v_ashrrev_i32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 7759// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x34,0x01,0x00] 7760 7761v_ashrrev_i32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 7762// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x38,0x01,0x00] 7763 7764v_ashrrev_i32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 7765// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x3c,0x01,0x00] 7766 7767v_ashrrev_i32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 7768// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x01,0x01,0x00] 7769 7770v_ashrrev_i32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 7771// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x0f,0x01,0x00] 7772 7773v_ashrrev_i32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 7774// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x11,0x01,0x00] 7775 7776v_ashrrev_i32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 7777// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x1f,0x01,0x00] 7778 7779v_ashrrev_i32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 7780// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x21,0x01,0x00] 7781 7782v_ashrrev_i32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 7783// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x2f,0x01,0x00] 7784 7785v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 7786// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x10] 7787 7788v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 7789// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x30] 7790 7791v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 7792// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0xf0] 7793 7794v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 7795// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0xf0] 7796 7797v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 7798// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x01] 7799 7800v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 7801// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x03] 7802 7803v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 7804// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x0f] 7805 7806v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 7807// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x0f] 7808 7809v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 7810// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x08,0x00] 7811 7812v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7813// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x06] 7814 7815v_lshlrev_b32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7816// CHECK: [0xf9,0x04,0xfe,0x25,0x01,0x06,0x06,0x06] 7817 7818v_lshlrev_b32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7819// CHECK: [0xf9,0x04,0x0a,0x24,0xff,0x06,0x06,0x06] 7820 7821v_lshlrev_b32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7822// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x86,0x06] 7823 7824v_lshlrev_b32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7825// CHECK: [0xf9,0x04,0x0a,0x24,0x65,0x06,0x86,0x06] 7826 7827v_lshlrev_b32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7828// CHECK: [0xf9,0x04,0x0a,0x24,0x66,0x06,0x86,0x06] 7829 7830v_lshlrev_b32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7831// CHECK: [0xf9,0x04,0x0a,0x24,0x67,0x06,0x86,0x06] 7832 7833v_lshlrev_b32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7834// CHECK: [0xf9,0x04,0x0a,0x24,0x6a,0x06,0x86,0x06] 7835 7836v_lshlrev_b32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7837// CHECK: [0xf9,0x04,0x0a,0x24,0x6b,0x06,0x86,0x06] 7838 7839v_lshlrev_b32_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7840// CHECK: [0xf9,0x04,0x0a,0x24,0x7b,0x06,0x86,0x06] 7841 7842v_lshlrev_b32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7843// CHECK: [0xf9,0x04,0x0a,0x24,0x7c,0x06,0x86,0x06] 7844 7845v_lshlrev_b32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7846// CHECK: [0xf9,0x04,0x0a,0x24,0x7e,0x06,0x86,0x06] 7847 7848v_lshlrev_b32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7849// CHECK: [0xf9,0x04,0x0a,0x24,0x7f,0x06,0x86,0x06] 7850 7851v_lshlrev_b32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7852// CHECK: [0xf9,0x04,0x0a,0x24,0x80,0x06,0x86,0x06] 7853 7854v_lshlrev_b32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7855// CHECK: [0xf9,0x04,0x0a,0x24,0xc1,0x06,0x86,0x06] 7856 7857v_lshlrev_b32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7858// CHECK: [0xf9,0x04,0x0a,0x24,0xf0,0x06,0x86,0x06] 7859 7860v_lshlrev_b32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7861// CHECK: [0xf9,0x04,0x0a,0x24,0xf7,0x06,0x86,0x06] 7862 7863v_lshlrev_b32_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7864// CHECK: [0xf9,0x04,0x0a,0x24,0xfb,0x06,0x86,0x06] 7865 7866v_lshlrev_b32_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7867// CHECK: [0xf9,0x04,0x0a,0x24,0xfc,0x06,0x86,0x06] 7868 7869v_lshlrev_b32_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7870// CHECK: [0xf9,0x04,0x0a,0x24,0xfd,0x06,0x86,0x06] 7871 7872v_lshlrev_b32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7873// CHECK: [0xf9,0xfe,0x0b,0x24,0x01,0x06,0x06,0x06] 7874 7875v_lshlrev_b32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7876// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x06] 7877 7878v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7879// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x00,0x06,0x06] 7880 7881v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7882// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x01,0x06,0x06] 7883 7884v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7885// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x02,0x06,0x06] 7886 7887v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7888// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x03,0x06,0x06] 7889 7890v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7891// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x04,0x06,0x06] 7892 7893v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7894// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x05,0x06,0x06] 7895 7896v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 7897// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x0e,0x06,0x06] 7898 7899v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 7900// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x16,0x06,0x06] 7901 7902v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 7903// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x16,0x06,0x06] 7904 7905v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 7906// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x06] 7907 7908v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 7909// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x00,0x06] 7910 7911v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 7912// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x01,0x06] 7913 7914v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 7915// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x02,0x06] 7916 7917v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 7918// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x03,0x06] 7919 7920v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 7921// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x04,0x06] 7922 7923v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 7924// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x05,0x06] 7925 7926v_lshlrev_b32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7927// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x0e,0x06] 7928 7929v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 7930// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x06] 7931 7932v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 7933// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x00] 7934 7935v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 7936// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x01] 7937 7938v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 7939// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x02] 7940 7941v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 7942// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x03] 7943 7944v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 7945// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x04] 7946 7947v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 7948// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x05] 7949 7950v_lshlrev_b32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 7951// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x0e] 7952 7953v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 7954// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x00] 7955 7956v_lshlrev_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 7957// CHECK: [0xfa,0x04,0xfe,0x25,0x01,0xe4,0x00,0x00] 7958 7959v_lshlrev_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 7960// CHECK: [0xfa,0x04,0x0a,0x24,0xff,0xe4,0x00,0x00] 7961 7962v_lshlrev_b32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 7963// CHECK: [0xfa,0xfe,0x0b,0x24,0x01,0xe4,0x00,0x00] 7964 7965v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 7966// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x1b,0x00,0x00] 7967 7968v_lshlrev_b32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 7969// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x40,0x01,0x00] 7970 7971v_lshlrev_b32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 7972// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x41,0x01,0x00] 7973 7974v_lshlrev_b32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 7975// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x42,0x01,0x00] 7976 7977v_lshlrev_b32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 7978// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x43,0x01,0x00] 7979 7980v_lshlrev_b32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 7981// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x30,0x01,0x00] 7982 7983v_lshlrev_b32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 7984// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x34,0x01,0x00] 7985 7986v_lshlrev_b32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 7987// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x38,0x01,0x00] 7988 7989v_lshlrev_b32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 7990// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x3c,0x01,0x00] 7991 7992v_lshlrev_b32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 7993// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x01,0x01,0x00] 7994 7995v_lshlrev_b32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 7996// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x0f,0x01,0x00] 7997 7998v_lshlrev_b32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 7999// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x11,0x01,0x00] 8000 8001v_lshlrev_b32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 8002// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x1f,0x01,0x00] 8003 8004v_lshlrev_b32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 8005// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x21,0x01,0x00] 8006 8007v_lshlrev_b32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 8008// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x2f,0x01,0x00] 8009 8010v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 8011// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x10] 8012 8013v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 8014// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x30] 8015 8016v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 8017// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0xf0] 8018 8019v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 8020// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0xf0] 8021 8022v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 8023// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x01] 8024 8025v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 8026// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x03] 8027 8028v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 8029// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x0f] 8030 8031v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 8032// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x0f] 8033 8034v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 8035// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x08,0x00] 8036 8037v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8038// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x06] 8039 8040v_and_b32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8041// CHECK: [0xf9,0x04,0xfe,0x27,0x01,0x06,0x06,0x06] 8042 8043v_and_b32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8044// CHECK: [0xf9,0x04,0x0a,0x26,0xff,0x06,0x06,0x06] 8045 8046v_and_b32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8047// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x86,0x06] 8048 8049v_and_b32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8050// CHECK: [0xf9,0x04,0x0a,0x26,0x65,0x06,0x86,0x06] 8051 8052v_and_b32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8053// CHECK: [0xf9,0x04,0x0a,0x26,0x66,0x06,0x86,0x06] 8054 8055v_and_b32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8056// CHECK: [0xf9,0x04,0x0a,0x26,0x67,0x06,0x86,0x06] 8057 8058v_and_b32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8059// CHECK: [0xf9,0x04,0x0a,0x26,0x6a,0x06,0x86,0x06] 8060 8061v_and_b32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8062// CHECK: [0xf9,0x04,0x0a,0x26,0x6b,0x06,0x86,0x06] 8063 8064v_and_b32_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8065// CHECK: [0xf9,0x04,0x0a,0x26,0x7b,0x06,0x86,0x06] 8066 8067v_and_b32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8068// CHECK: [0xf9,0x04,0x0a,0x26,0x7c,0x06,0x86,0x06] 8069 8070v_and_b32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8071// CHECK: [0xf9,0x04,0x0a,0x26,0x7e,0x06,0x86,0x06] 8072 8073v_and_b32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8074// CHECK: [0xf9,0x04,0x0a,0x26,0x7f,0x06,0x86,0x06] 8075 8076v_and_b32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8077// CHECK: [0xf9,0x04,0x0a,0x26,0x80,0x06,0x86,0x06] 8078 8079v_and_b32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8080// CHECK: [0xf9,0x04,0x0a,0x26,0xc1,0x06,0x86,0x06] 8081 8082v_and_b32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8083// CHECK: [0xf9,0x04,0x0a,0x26,0xf0,0x06,0x86,0x06] 8084 8085v_and_b32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8086// CHECK: [0xf9,0x04,0x0a,0x26,0xf7,0x06,0x86,0x06] 8087 8088v_and_b32_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8089// CHECK: [0xf9,0x04,0x0a,0x26,0xfb,0x06,0x86,0x06] 8090 8091v_and_b32_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8092// CHECK: [0xf9,0x04,0x0a,0x26,0xfc,0x06,0x86,0x06] 8093 8094v_and_b32_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8095// CHECK: [0xf9,0x04,0x0a,0x26,0xfd,0x06,0x86,0x06] 8096 8097v_and_b32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8098// CHECK: [0xf9,0xfe,0x0b,0x26,0x01,0x06,0x06,0x06] 8099 8100v_and_b32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8101// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x06] 8102 8103v_and_b32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8104// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x00,0x06,0x06] 8105 8106v_and_b32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8107// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x01,0x06,0x06] 8108 8109v_and_b32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8110// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x02,0x06,0x06] 8111 8112v_and_b32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8113// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x03,0x06,0x06] 8114 8115v_and_b32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8116// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x04,0x06,0x06] 8117 8118v_and_b32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8119// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x05,0x06,0x06] 8120 8121v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 8122// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x0e,0x06,0x06] 8123 8124v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 8125// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x16,0x06,0x06] 8126 8127v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 8128// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x16,0x06,0x06] 8129 8130v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 8131// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x06] 8132 8133v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 8134// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x00,0x06] 8135 8136v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 8137// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x01,0x06] 8138 8139v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 8140// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x02,0x06] 8141 8142v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 8143// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x03,0x06] 8144 8145v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 8146// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x04,0x06] 8147 8148v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 8149// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x05,0x06] 8150 8151v_and_b32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8152// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x0e,0x06] 8153 8154v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 8155// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x06] 8156 8157v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 8158// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x00] 8159 8160v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 8161// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x01] 8162 8163v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 8164// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x02] 8165 8166v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 8167// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x03] 8168 8169v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 8170// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x04] 8171 8172v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 8173// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x05] 8174 8175v_and_b32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8176// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x0e] 8177 8178v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8179// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x00] 8180 8181v_and_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8182// CHECK: [0xfa,0x04,0xfe,0x27,0x01,0xe4,0x00,0x00] 8183 8184v_and_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8185// CHECK: [0xfa,0x04,0x0a,0x26,0xff,0xe4,0x00,0x00] 8186 8187v_and_b32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8188// CHECK: [0xfa,0xfe,0x0b,0x26,0x01,0xe4,0x00,0x00] 8189 8190v_and_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 8191// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x1b,0x00,0x00] 8192 8193v_and_b32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 8194// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x40,0x01,0x00] 8195 8196v_and_b32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 8197// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x41,0x01,0x00] 8198 8199v_and_b32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 8200// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x42,0x01,0x00] 8201 8202v_and_b32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 8203// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x43,0x01,0x00] 8204 8205v_and_b32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 8206// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x30,0x01,0x00] 8207 8208v_and_b32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 8209// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x34,0x01,0x00] 8210 8211v_and_b32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 8212// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x38,0x01,0x00] 8213 8214v_and_b32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 8215// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x3c,0x01,0x00] 8216 8217v_and_b32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 8218// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x01,0x01,0x00] 8219 8220v_and_b32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 8221// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x0f,0x01,0x00] 8222 8223v_and_b32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 8224// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x11,0x01,0x00] 8225 8226v_and_b32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 8227// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x1f,0x01,0x00] 8228 8229v_and_b32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 8230// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x21,0x01,0x00] 8231 8232v_and_b32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 8233// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x2f,0x01,0x00] 8234 8235v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 8236// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x10] 8237 8238v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 8239// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x30] 8240 8241v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 8242// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0xf0] 8243 8244v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 8245// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0xf0] 8246 8247v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 8248// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x01] 8249 8250v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 8251// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x03] 8252 8253v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 8254// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x0f] 8255 8256v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 8257// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x0f] 8258 8259v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 8260// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x08,0x00] 8261 8262v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8263// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x06] 8264 8265v_or_b32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8266// CHECK: [0xf9,0x04,0xfe,0x29,0x01,0x06,0x06,0x06] 8267 8268v_or_b32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8269// CHECK: [0xf9,0x04,0x0a,0x28,0xff,0x06,0x06,0x06] 8270 8271v_or_b32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8272// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x86,0x06] 8273 8274v_or_b32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8275// CHECK: [0xf9,0x04,0x0a,0x28,0x65,0x06,0x86,0x06] 8276 8277v_or_b32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8278// CHECK: [0xf9,0x04,0x0a,0x28,0x66,0x06,0x86,0x06] 8279 8280v_or_b32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8281// CHECK: [0xf9,0x04,0x0a,0x28,0x67,0x06,0x86,0x06] 8282 8283v_or_b32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8284// CHECK: [0xf9,0x04,0x0a,0x28,0x6a,0x06,0x86,0x06] 8285 8286v_or_b32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8287// CHECK: [0xf9,0x04,0x0a,0x28,0x6b,0x06,0x86,0x06] 8288 8289v_or_b32_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8290// CHECK: [0xf9,0x04,0x0a,0x28,0x7b,0x06,0x86,0x06] 8291 8292v_or_b32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8293// CHECK: [0xf9,0x04,0x0a,0x28,0x7c,0x06,0x86,0x06] 8294 8295v_or_b32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8296// CHECK: [0xf9,0x04,0x0a,0x28,0x7e,0x06,0x86,0x06] 8297 8298v_or_b32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8299// CHECK: [0xf9,0x04,0x0a,0x28,0x7f,0x06,0x86,0x06] 8300 8301v_or_b32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8302// CHECK: [0xf9,0x04,0x0a,0x28,0x80,0x06,0x86,0x06] 8303 8304v_or_b32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8305// CHECK: [0xf9,0x04,0x0a,0x28,0xc1,0x06,0x86,0x06] 8306 8307v_or_b32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8308// CHECK: [0xf9,0x04,0x0a,0x28,0xf0,0x06,0x86,0x06] 8309 8310v_or_b32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8311// CHECK: [0xf9,0x04,0x0a,0x28,0xf7,0x06,0x86,0x06] 8312 8313v_or_b32_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8314// CHECK: [0xf9,0x04,0x0a,0x28,0xfb,0x06,0x86,0x06] 8315 8316v_or_b32_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8317// CHECK: [0xf9,0x04,0x0a,0x28,0xfc,0x06,0x86,0x06] 8318 8319v_or_b32_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8320// CHECK: [0xf9,0x04,0x0a,0x28,0xfd,0x06,0x86,0x06] 8321 8322v_or_b32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8323// CHECK: [0xf9,0xfe,0x0b,0x28,0x01,0x06,0x06,0x06] 8324 8325v_or_b32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8326// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x06] 8327 8328v_or_b32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8329// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x00,0x06,0x06] 8330 8331v_or_b32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8332// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x01,0x06,0x06] 8333 8334v_or_b32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8335// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x02,0x06,0x06] 8336 8337v_or_b32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8338// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x03,0x06,0x06] 8339 8340v_or_b32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8341// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x04,0x06,0x06] 8342 8343v_or_b32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8344// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x05,0x06,0x06] 8345 8346v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 8347// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x0e,0x06,0x06] 8348 8349v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 8350// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x16,0x06,0x06] 8351 8352v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 8353// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x16,0x06,0x06] 8354 8355v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 8356// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x06] 8357 8358v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 8359// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x00,0x06] 8360 8361v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 8362// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x01,0x06] 8363 8364v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 8365// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x02,0x06] 8366 8367v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 8368// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x03,0x06] 8369 8370v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 8371// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x04,0x06] 8372 8373v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 8374// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x05,0x06] 8375 8376v_or_b32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8377// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x0e,0x06] 8378 8379v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 8380// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x06] 8381 8382v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 8383// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x00] 8384 8385v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 8386// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x01] 8387 8388v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 8389// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x02] 8390 8391v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 8392// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x03] 8393 8394v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 8395// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x04] 8396 8397v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 8398// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x05] 8399 8400v_or_b32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8401// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x0e] 8402 8403v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8404// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x00] 8405 8406v_or_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8407// CHECK: [0xfa,0x04,0xfe,0x29,0x01,0xe4,0x00,0x00] 8408 8409v_or_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8410// CHECK: [0xfa,0x04,0x0a,0x28,0xff,0xe4,0x00,0x00] 8411 8412v_or_b32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8413// CHECK: [0xfa,0xfe,0x0b,0x28,0x01,0xe4,0x00,0x00] 8414 8415v_or_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 8416// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x1b,0x00,0x00] 8417 8418v_or_b32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 8419// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x40,0x01,0x00] 8420 8421v_or_b32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 8422// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x41,0x01,0x00] 8423 8424v_or_b32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 8425// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x42,0x01,0x00] 8426 8427v_or_b32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 8428// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x43,0x01,0x00] 8429 8430v_or_b32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 8431// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x30,0x01,0x00] 8432 8433v_or_b32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 8434// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x34,0x01,0x00] 8435 8436v_or_b32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 8437// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x38,0x01,0x00] 8438 8439v_or_b32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 8440// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x3c,0x01,0x00] 8441 8442v_or_b32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 8443// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x01,0x01,0x00] 8444 8445v_or_b32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 8446// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x0f,0x01,0x00] 8447 8448v_or_b32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 8449// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x11,0x01,0x00] 8450 8451v_or_b32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 8452// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x1f,0x01,0x00] 8453 8454v_or_b32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 8455// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x21,0x01,0x00] 8456 8457v_or_b32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 8458// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x2f,0x01,0x00] 8459 8460v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 8461// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x10] 8462 8463v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 8464// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x30] 8465 8466v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 8467// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0xf0] 8468 8469v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 8470// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0xf0] 8471 8472v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 8473// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x01] 8474 8475v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 8476// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x03] 8477 8478v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 8479// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x0f] 8480 8481v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 8482// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x0f] 8483 8484v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 8485// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x08,0x00] 8486 8487v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8488// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x06] 8489 8490v_xor_b32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8491// CHECK: [0xf9,0x04,0xfe,0x2b,0x01,0x06,0x06,0x06] 8492 8493v_xor_b32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8494// CHECK: [0xf9,0x04,0x0a,0x2a,0xff,0x06,0x06,0x06] 8495 8496v_xor_b32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8497// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x86,0x06] 8498 8499v_xor_b32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8500// CHECK: [0xf9,0x04,0x0a,0x2a,0x65,0x06,0x86,0x06] 8501 8502v_xor_b32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8503// CHECK: [0xf9,0x04,0x0a,0x2a,0x66,0x06,0x86,0x06] 8504 8505v_xor_b32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8506// CHECK: [0xf9,0x04,0x0a,0x2a,0x67,0x06,0x86,0x06] 8507 8508v_xor_b32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8509// CHECK: [0xf9,0x04,0x0a,0x2a,0x6a,0x06,0x86,0x06] 8510 8511v_xor_b32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8512// CHECK: [0xf9,0x04,0x0a,0x2a,0x6b,0x06,0x86,0x06] 8513 8514v_xor_b32_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8515// CHECK: [0xf9,0x04,0x0a,0x2a,0x7b,0x06,0x86,0x06] 8516 8517v_xor_b32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8518// CHECK: [0xf9,0x04,0x0a,0x2a,0x7c,0x06,0x86,0x06] 8519 8520v_xor_b32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8521// CHECK: [0xf9,0x04,0x0a,0x2a,0x7e,0x06,0x86,0x06] 8522 8523v_xor_b32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8524// CHECK: [0xf9,0x04,0x0a,0x2a,0x7f,0x06,0x86,0x06] 8525 8526v_xor_b32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8527// CHECK: [0xf9,0x04,0x0a,0x2a,0x80,0x06,0x86,0x06] 8528 8529v_xor_b32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8530// CHECK: [0xf9,0x04,0x0a,0x2a,0xc1,0x06,0x86,0x06] 8531 8532v_xor_b32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8533// CHECK: [0xf9,0x04,0x0a,0x2a,0xf0,0x06,0x86,0x06] 8534 8535v_xor_b32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8536// CHECK: [0xf9,0x04,0x0a,0x2a,0xf7,0x06,0x86,0x06] 8537 8538v_xor_b32_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8539// CHECK: [0xf9,0x04,0x0a,0x2a,0xfb,0x06,0x86,0x06] 8540 8541v_xor_b32_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8542// CHECK: [0xf9,0x04,0x0a,0x2a,0xfc,0x06,0x86,0x06] 8543 8544v_xor_b32_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8545// CHECK: [0xf9,0x04,0x0a,0x2a,0xfd,0x06,0x86,0x06] 8546 8547v_xor_b32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8548// CHECK: [0xf9,0xfe,0x0b,0x2a,0x01,0x06,0x06,0x06] 8549 8550v_xor_b32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8551// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x06] 8552 8553v_xor_b32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8554// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x00,0x06,0x06] 8555 8556v_xor_b32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8557// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x01,0x06,0x06] 8558 8559v_xor_b32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8560// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x02,0x06,0x06] 8561 8562v_xor_b32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8563// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x03,0x06,0x06] 8564 8565v_xor_b32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8566// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x04,0x06,0x06] 8567 8568v_xor_b32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8569// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x05,0x06,0x06] 8570 8571v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 8572// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x0e,0x06,0x06] 8573 8574v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 8575// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x16,0x06,0x06] 8576 8577v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 8578// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x16,0x06,0x06] 8579 8580v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 8581// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x06] 8582 8583v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 8584// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x00,0x06] 8585 8586v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 8587// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x01,0x06] 8588 8589v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 8590// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x02,0x06] 8591 8592v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 8593// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x03,0x06] 8594 8595v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 8596// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x04,0x06] 8597 8598v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 8599// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x05,0x06] 8600 8601v_xor_b32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8602// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x0e,0x06] 8603 8604v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 8605// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x06] 8606 8607v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 8608// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x00] 8609 8610v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 8611// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x01] 8612 8613v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 8614// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x02] 8615 8616v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 8617// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x03] 8618 8619v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 8620// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x04] 8621 8622v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 8623// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x05] 8624 8625v_xor_b32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8626// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x0e] 8627 8628v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8629// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x00] 8630 8631v_xor_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8632// CHECK: [0xfa,0x04,0xfe,0x2b,0x01,0xe4,0x00,0x00] 8633 8634v_xor_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8635// CHECK: [0xfa,0x04,0x0a,0x2a,0xff,0xe4,0x00,0x00] 8636 8637v_xor_b32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8638// CHECK: [0xfa,0xfe,0x0b,0x2a,0x01,0xe4,0x00,0x00] 8639 8640v_xor_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 8641// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x1b,0x00,0x00] 8642 8643v_xor_b32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 8644// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x40,0x01,0x00] 8645 8646v_xor_b32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 8647// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x41,0x01,0x00] 8648 8649v_xor_b32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 8650// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x42,0x01,0x00] 8651 8652v_xor_b32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 8653// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x43,0x01,0x00] 8654 8655v_xor_b32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 8656// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x30,0x01,0x00] 8657 8658v_xor_b32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 8659// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x34,0x01,0x00] 8660 8661v_xor_b32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 8662// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x38,0x01,0x00] 8663 8664v_xor_b32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 8665// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x3c,0x01,0x00] 8666 8667v_xor_b32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 8668// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x01,0x01,0x00] 8669 8670v_xor_b32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 8671// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x0f,0x01,0x00] 8672 8673v_xor_b32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 8674// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x11,0x01,0x00] 8675 8676v_xor_b32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 8677// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x1f,0x01,0x00] 8678 8679v_xor_b32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 8680// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x21,0x01,0x00] 8681 8682v_xor_b32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 8683// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x2f,0x01,0x00] 8684 8685v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 8686// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x10] 8687 8688v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 8689// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x30] 8690 8691v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 8692// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0xf0] 8693 8694v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 8695// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0xf0] 8696 8697v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 8698// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x01] 8699 8700v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 8701// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x03] 8702 8703v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 8704// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x0f] 8705 8706v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 8707// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x0f] 8708 8709v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 8710// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x08,0x00] 8711 8712v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8713// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x00] 8714 8715v_mac_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8716// CHECK: [0xfa,0x04,0xfe,0x2d,0x01,0xe4,0x00,0x00] 8717 8718v_mac_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8719// CHECK: [0xfa,0x04,0x0a,0x2c,0xff,0xe4,0x00,0x00] 8720 8721v_mac_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8722// CHECK: [0xfa,0xfe,0x0b,0x2c,0x01,0xe4,0x00,0x00] 8723 8724v_mac_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 8725// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x1b,0x00,0x00] 8726 8727v_mac_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 8728// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x40,0x01,0x00] 8729 8730v_mac_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 8731// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x41,0x01,0x00] 8732 8733v_mac_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 8734// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x42,0x01,0x00] 8735 8736v_mac_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 8737// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x43,0x01,0x00] 8738 8739v_mac_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 8740// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x30,0x01,0x00] 8741 8742v_mac_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 8743// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x34,0x01,0x00] 8744 8745v_mac_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 8746// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x38,0x01,0x00] 8747 8748v_mac_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 8749// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x3c,0x01,0x00] 8750 8751v_mac_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 8752// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x01,0x01,0x00] 8753 8754v_mac_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 8755// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x0f,0x01,0x00] 8756 8757v_mac_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 8758// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x11,0x01,0x00] 8759 8760v_mac_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 8761// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x1f,0x01,0x00] 8762 8763v_mac_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 8764// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x21,0x01,0x00] 8765 8766v_mac_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 8767// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x2f,0x01,0x00] 8768 8769v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 8770// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x10] 8771 8772v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 8773// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x30] 8774 8775v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 8776// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0xf0] 8777 8778v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 8779// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0xf0] 8780 8781v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 8782// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x01] 8783 8784v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 8785// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x03] 8786 8787v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 8788// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x0f] 8789 8790v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 8791// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x0f] 8792 8793v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 8794// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x08,0x00] 8795 8796v_mac_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8797// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x10,0x00] 8798 8799v_mac_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8800// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x20,0x00] 8801 8802v_mac_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8803// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x40,0x00] 8804 8805v_mac_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8806// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x80,0x00] 8807 8808v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8809// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06] 8810 8811v_add_co_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8812// CHECK: [0xf9,0x04,0xfe,0x33,0x01,0x06,0x06,0x06] 8813 8814v_add_co_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8815// CHECK: [0xf9,0x04,0x0a,0x32,0xff,0x06,0x06,0x06] 8816 8817v_add_co_u32_sdwa v5, vcc, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8818// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x86,0x06] 8819 8820v_add_co_u32_sdwa v5, vcc, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8821// CHECK: [0xf9,0x04,0x0a,0x32,0x65,0x06,0x86,0x06] 8822 8823v_add_co_u32_sdwa v5, vcc, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8824// CHECK: [0xf9,0x04,0x0a,0x32,0x66,0x06,0x86,0x06] 8825 8826v_add_co_u32_sdwa v5, vcc, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8827// CHECK: [0xf9,0x04,0x0a,0x32,0x67,0x06,0x86,0x06] 8828 8829v_add_co_u32_sdwa v5, vcc, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8830// CHECK: [0xf9,0x04,0x0a,0x32,0x6a,0x06,0x86,0x06] 8831 8832v_add_co_u32_sdwa v5, vcc, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8833// CHECK: [0xf9,0x04,0x0a,0x32,0x6b,0x06,0x86,0x06] 8834 8835v_add_co_u32_sdwa v5, vcc, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8836// CHECK: [0xf9,0x04,0x0a,0x32,0x7b,0x06,0x86,0x06] 8837 8838v_add_co_u32_sdwa v5, vcc, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8839// CHECK: [0xf9,0x04,0x0a,0x32,0x7c,0x06,0x86,0x06] 8840 8841v_add_co_u32_sdwa v5, vcc, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8842// CHECK: [0xf9,0x04,0x0a,0x32,0x7e,0x06,0x86,0x06] 8843 8844v_add_co_u32_sdwa v5, vcc, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8845// CHECK: [0xf9,0x04,0x0a,0x32,0x7f,0x06,0x86,0x06] 8846 8847v_add_co_u32_sdwa v5, vcc, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8848// CHECK: [0xf9,0x04,0x0a,0x32,0x80,0x06,0x86,0x06] 8849 8850v_add_co_u32_sdwa v5, vcc, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8851// CHECK: [0xf9,0x04,0x0a,0x32,0xc1,0x06,0x86,0x06] 8852 8853v_add_co_u32_sdwa v5, vcc, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8854// CHECK: [0xf9,0x04,0x0a,0x32,0xf0,0x06,0x86,0x06] 8855 8856v_add_co_u32_sdwa v5, vcc, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8857// CHECK: [0xf9,0x04,0x0a,0x32,0xf7,0x06,0x86,0x06] 8858 8859v_add_co_u32_sdwa v5, vcc, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8860// CHECK: [0xf9,0x04,0x0a,0x32,0xfb,0x06,0x86,0x06] 8861 8862v_add_co_u32_sdwa v5, vcc, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8863// CHECK: [0xf9,0x04,0x0a,0x32,0xfc,0x06,0x86,0x06] 8864 8865v_add_co_u32_sdwa v5, vcc, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8866// CHECK: [0xf9,0x04,0x0a,0x32,0xfd,0x06,0x86,0x06] 8867 8868v_add_co_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8869// CHECK: [0xf9,0xfe,0x0b,0x32,0x01,0x06,0x06,0x06] 8870 8871v_add_co_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8872// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x26,0x06,0x06] 8873 8874v_add_co_u32_sdwa v5, vcc, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8875// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06] 8876 8877v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8878// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x00,0x06,0x06] 8879 8880v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8881// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x01,0x06,0x06] 8882 8883v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8884// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x02,0x06,0x06] 8885 8886v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8887// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x03,0x06,0x06] 8888 8889v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8890// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x04,0x06,0x06] 8891 8892v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8893// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x05,0x06,0x06] 8894 8895v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 8896// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x0e,0x06,0x06] 8897 8898v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 8899// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x16,0x06,0x06] 8900 8901v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 8902// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x16,0x06,0x06] 8903 8904v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 8905// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06] 8906 8907v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 8908// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x00,0x06] 8909 8910v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 8911// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x01,0x06] 8912 8913v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 8914// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x02,0x06] 8915 8916v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 8917// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x03,0x06] 8918 8919v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 8920// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x04,0x06] 8921 8922v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 8923// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x05,0x06] 8924 8925v_add_co_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8926// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x0e,0x06] 8927 8928v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 8929// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06] 8930 8931v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 8932// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x00] 8933 8934v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 8935// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x01] 8936 8937v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 8938// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x02] 8939 8940v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 8941// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x03] 8942 8943v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 8944// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x04] 8945 8946v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 8947// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x05] 8948 8949v_add_co_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 8950// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x0e] 8951 8952v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8953// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x00] 8954 8955v_add_co_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8956// CHECK: [0xfa,0x04,0xfe,0x33,0x01,0xe4,0x00,0x00] 8957 8958v_add_co_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8959// CHECK: [0xfa,0x04,0x0a,0x32,0xff,0xe4,0x00,0x00] 8960 8961v_add_co_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 8962// CHECK: [0xfa,0xfe,0x0b,0x32,0x01,0xe4,0x00,0x00] 8963 8964v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 8965// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x1b,0x00,0x00] 8966 8967v_add_co_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 8968// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x40,0x01,0x00] 8969 8970v_add_co_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 8971// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x41,0x01,0x00] 8972 8973v_add_co_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 8974// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x42,0x01,0x00] 8975 8976v_add_co_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 8977// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x43,0x01,0x00] 8978 8979v_add_co_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 8980// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x30,0x01,0x00] 8981 8982v_add_co_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 8983// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x34,0x01,0x00] 8984 8985v_add_co_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 8986// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x38,0x01,0x00] 8987 8988v_add_co_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 8989// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x3c,0x01,0x00] 8990 8991v_add_co_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 8992// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x01,0x01,0x00] 8993 8994v_add_co_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 8995// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x0f,0x01,0x00] 8996 8997v_add_co_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 8998// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x11,0x01,0x00] 8999 9000v_add_co_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 9001// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x1f,0x01,0x00] 9002 9003v_add_co_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 9004// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x21,0x01,0x00] 9005 9006v_add_co_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 9007// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x2f,0x01,0x00] 9008 9009v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 9010// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x10] 9011 9012v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 9013// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x30] 9014 9015v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 9016// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0xf0] 9017 9018v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 9019// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0xf0] 9020 9021v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 9022// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x01] 9023 9024v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 9025// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x03] 9026 9027v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 9028// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x0f] 9029 9030v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 9031// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x0f] 9032 9033v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 9034// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x08,0x00] 9035 9036v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9037// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06] 9038 9039v_sub_co_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9040// CHECK: [0xf9,0x04,0xfe,0x35,0x01,0x06,0x06,0x06] 9041 9042v_sub_co_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9043// CHECK: [0xf9,0x04,0x0a,0x34,0xff,0x06,0x06,0x06] 9044 9045v_sub_co_u32_sdwa v5, vcc, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9046// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x86,0x06] 9047 9048v_sub_co_u32_sdwa v5, vcc, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9049// CHECK: [0xf9,0x04,0x0a,0x34,0x65,0x06,0x86,0x06] 9050 9051v_sub_co_u32_sdwa v5, vcc, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9052// CHECK: [0xf9,0x04,0x0a,0x34,0x66,0x06,0x86,0x06] 9053 9054v_sub_co_u32_sdwa v5, vcc, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9055// CHECK: [0xf9,0x04,0x0a,0x34,0x67,0x06,0x86,0x06] 9056 9057v_sub_co_u32_sdwa v5, vcc, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9058// CHECK: [0xf9,0x04,0x0a,0x34,0x6a,0x06,0x86,0x06] 9059 9060v_sub_co_u32_sdwa v5, vcc, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9061// CHECK: [0xf9,0x04,0x0a,0x34,0x6b,0x06,0x86,0x06] 9062 9063v_sub_co_u32_sdwa v5, vcc, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9064// CHECK: [0xf9,0x04,0x0a,0x34,0x7b,0x06,0x86,0x06] 9065 9066v_sub_co_u32_sdwa v5, vcc, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9067// CHECK: [0xf9,0x04,0x0a,0x34,0x7c,0x06,0x86,0x06] 9068 9069v_sub_co_u32_sdwa v5, vcc, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9070// CHECK: [0xf9,0x04,0x0a,0x34,0x7e,0x06,0x86,0x06] 9071 9072v_sub_co_u32_sdwa v5, vcc, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9073// CHECK: [0xf9,0x04,0x0a,0x34,0x7f,0x06,0x86,0x06] 9074 9075v_sub_co_u32_sdwa v5, vcc, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9076// CHECK: [0xf9,0x04,0x0a,0x34,0x80,0x06,0x86,0x06] 9077 9078v_sub_co_u32_sdwa v5, vcc, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9079// CHECK: [0xf9,0x04,0x0a,0x34,0xc1,0x06,0x86,0x06] 9080 9081v_sub_co_u32_sdwa v5, vcc, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9082// CHECK: [0xf9,0x04,0x0a,0x34,0xf0,0x06,0x86,0x06] 9083 9084v_sub_co_u32_sdwa v5, vcc, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9085// CHECK: [0xf9,0x04,0x0a,0x34,0xf7,0x06,0x86,0x06] 9086 9087v_sub_co_u32_sdwa v5, vcc, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9088// CHECK: [0xf9,0x04,0x0a,0x34,0xfb,0x06,0x86,0x06] 9089 9090v_sub_co_u32_sdwa v5, vcc, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9091// CHECK: [0xf9,0x04,0x0a,0x34,0xfc,0x06,0x86,0x06] 9092 9093v_sub_co_u32_sdwa v5, vcc, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9094// CHECK: [0xf9,0x04,0x0a,0x34,0xfd,0x06,0x86,0x06] 9095 9096v_sub_co_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9097// CHECK: [0xf9,0xfe,0x0b,0x34,0x01,0x06,0x06,0x06] 9098 9099v_sub_co_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9100// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x26,0x06,0x06] 9101 9102v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9103// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06] 9104 9105v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9106// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x00,0x06,0x06] 9107 9108v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9109// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x01,0x06,0x06] 9110 9111v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9112// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x02,0x06,0x06] 9113 9114v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9115// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x03,0x06,0x06] 9116 9117v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9118// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x04,0x06,0x06] 9119 9120v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9121// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x05,0x06,0x06] 9122 9123v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 9124// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x0e,0x06,0x06] 9125 9126v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 9127// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x16,0x06,0x06] 9128 9129v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 9130// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x16,0x06,0x06] 9131 9132v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 9133// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06] 9134 9135v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 9136// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x00,0x06] 9137 9138v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 9139// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x01,0x06] 9140 9141v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 9142// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x02,0x06] 9143 9144v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 9145// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x03,0x06] 9146 9147v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 9148// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x04,0x06] 9149 9150v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 9151// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x05,0x06] 9152 9153v_sub_co_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9154// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x0e,0x06] 9155 9156v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 9157// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06] 9158 9159v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 9160// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x00] 9161 9162v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 9163// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x01] 9164 9165v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 9166// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x02] 9167 9168v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 9169// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x03] 9170 9171v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 9172// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x04] 9173 9174v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 9175// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x05] 9176 9177v_sub_co_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9178// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x0e] 9179 9180v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 9181// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x00] 9182 9183v_sub_co_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 9184// CHECK: [0xfa,0x04,0xfe,0x35,0x01,0xe4,0x00,0x00] 9185 9186v_sub_co_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 9187// CHECK: [0xfa,0x04,0x0a,0x34,0xff,0xe4,0x00,0x00] 9188 9189v_sub_co_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 9190// CHECK: [0xfa,0xfe,0x0b,0x34,0x01,0xe4,0x00,0x00] 9191 9192v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 9193// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x1b,0x00,0x00] 9194 9195v_sub_co_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 9196// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x40,0x01,0x00] 9197 9198v_sub_co_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 9199// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x41,0x01,0x00] 9200 9201v_sub_co_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 9202// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x42,0x01,0x00] 9203 9204v_sub_co_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 9205// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x43,0x01,0x00] 9206 9207v_sub_co_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 9208// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x30,0x01,0x00] 9209 9210v_sub_co_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 9211// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x34,0x01,0x00] 9212 9213v_sub_co_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 9214// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x38,0x01,0x00] 9215 9216v_sub_co_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 9217// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x3c,0x01,0x00] 9218 9219v_sub_co_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 9220// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x01,0x01,0x00] 9221 9222v_sub_co_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 9223// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x0f,0x01,0x00] 9224 9225v_sub_co_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 9226// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x11,0x01,0x00] 9227 9228v_sub_co_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 9229// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x1f,0x01,0x00] 9230 9231v_sub_co_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 9232// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x21,0x01,0x00] 9233 9234v_sub_co_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 9235// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x2f,0x01,0x00] 9236 9237v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 9238// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x10] 9239 9240v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 9241// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x30] 9242 9243v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 9244// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0xf0] 9245 9246v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 9247// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0xf0] 9248 9249v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 9250// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x01] 9251 9252v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 9253// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x03] 9254 9255v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 9256// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x0f] 9257 9258v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 9259// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x0f] 9260 9261v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 9262// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x08,0x00] 9263 9264v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9265// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06] 9266 9267v_subrev_co_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9268// CHECK: [0xf9,0x04,0xfe,0x37,0x01,0x06,0x06,0x06] 9269 9270v_subrev_co_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9271// CHECK: [0xf9,0x04,0x0a,0x36,0xff,0x06,0x06,0x06] 9272 9273v_subrev_co_u32_sdwa v5, vcc, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9274// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x86,0x06] 9275 9276v_subrev_co_u32_sdwa v5, vcc, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9277// CHECK: [0xf9,0x04,0x0a,0x36,0x65,0x06,0x86,0x06] 9278 9279v_subrev_co_u32_sdwa v5, vcc, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9280// CHECK: [0xf9,0x04,0x0a,0x36,0x66,0x06,0x86,0x06] 9281 9282v_subrev_co_u32_sdwa v5, vcc, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9283// CHECK: [0xf9,0x04,0x0a,0x36,0x67,0x06,0x86,0x06] 9284 9285v_subrev_co_u32_sdwa v5, vcc, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9286// CHECK: [0xf9,0x04,0x0a,0x36,0x6a,0x06,0x86,0x06] 9287 9288v_subrev_co_u32_sdwa v5, vcc, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9289// CHECK: [0xf9,0x04,0x0a,0x36,0x6b,0x06,0x86,0x06] 9290 9291v_subrev_co_u32_sdwa v5, vcc, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9292// CHECK: [0xf9,0x04,0x0a,0x36,0x7b,0x06,0x86,0x06] 9293 9294v_subrev_co_u32_sdwa v5, vcc, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9295// CHECK: [0xf9,0x04,0x0a,0x36,0x7c,0x06,0x86,0x06] 9296 9297v_subrev_co_u32_sdwa v5, vcc, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9298// CHECK: [0xf9,0x04,0x0a,0x36,0x7e,0x06,0x86,0x06] 9299 9300v_subrev_co_u32_sdwa v5, vcc, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9301// CHECK: [0xf9,0x04,0x0a,0x36,0x7f,0x06,0x86,0x06] 9302 9303v_subrev_co_u32_sdwa v5, vcc, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9304// CHECK: [0xf9,0x04,0x0a,0x36,0x80,0x06,0x86,0x06] 9305 9306v_subrev_co_u32_sdwa v5, vcc, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9307// CHECK: [0xf9,0x04,0x0a,0x36,0xc1,0x06,0x86,0x06] 9308 9309v_subrev_co_u32_sdwa v5, vcc, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9310// CHECK: [0xf9,0x04,0x0a,0x36,0xf0,0x06,0x86,0x06] 9311 9312v_subrev_co_u32_sdwa v5, vcc, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9313// CHECK: [0xf9,0x04,0x0a,0x36,0xf7,0x06,0x86,0x06] 9314 9315v_subrev_co_u32_sdwa v5, vcc, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9316// CHECK: [0xf9,0x04,0x0a,0x36,0xfb,0x06,0x86,0x06] 9317 9318v_subrev_co_u32_sdwa v5, vcc, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9319// CHECK: [0xf9,0x04,0x0a,0x36,0xfc,0x06,0x86,0x06] 9320 9321v_subrev_co_u32_sdwa v5, vcc, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9322// CHECK: [0xf9,0x04,0x0a,0x36,0xfd,0x06,0x86,0x06] 9323 9324v_subrev_co_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9325// CHECK: [0xf9,0xfe,0x0b,0x36,0x01,0x06,0x06,0x06] 9326 9327v_subrev_co_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9328// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x26,0x06,0x06] 9329 9330v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9331// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06] 9332 9333v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9334// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x00,0x06,0x06] 9335 9336v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9337// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x01,0x06,0x06] 9338 9339v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9340// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x02,0x06,0x06] 9341 9342v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9343// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x03,0x06,0x06] 9344 9345v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9346// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x04,0x06,0x06] 9347 9348v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9349// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x05,0x06,0x06] 9350 9351v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 9352// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x0e,0x06,0x06] 9353 9354v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 9355// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x16,0x06,0x06] 9356 9357v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 9358// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x16,0x06,0x06] 9359 9360v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 9361// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06] 9362 9363v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 9364// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x00,0x06] 9365 9366v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 9367// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x01,0x06] 9368 9369v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 9370// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x02,0x06] 9371 9372v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 9373// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x03,0x06] 9374 9375v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 9376// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x04,0x06] 9377 9378v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 9379// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x05,0x06] 9380 9381v_subrev_co_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9382// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x0e,0x06] 9383 9384v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 9385// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06] 9386 9387v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 9388// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x00] 9389 9390v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 9391// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x01] 9392 9393v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 9394// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x02] 9395 9396v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 9397// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x03] 9398 9399v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 9400// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x04] 9401 9402v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 9403// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x05] 9404 9405v_subrev_co_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9406// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x0e] 9407 9408v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 9409// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x00] 9410 9411v_subrev_co_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 9412// CHECK: [0xfa,0x04,0xfe,0x37,0x01,0xe4,0x00,0x00] 9413 9414v_subrev_co_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 9415// CHECK: [0xfa,0x04,0x0a,0x36,0xff,0xe4,0x00,0x00] 9416 9417v_subrev_co_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 9418// CHECK: [0xfa,0xfe,0x0b,0x36,0x01,0xe4,0x00,0x00] 9419 9420v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 9421// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x1b,0x00,0x00] 9422 9423v_subrev_co_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 9424// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x40,0x01,0x00] 9425 9426v_subrev_co_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 9427// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x41,0x01,0x00] 9428 9429v_subrev_co_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 9430// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x42,0x01,0x00] 9431 9432v_subrev_co_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 9433// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x43,0x01,0x00] 9434 9435v_subrev_co_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 9436// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x30,0x01,0x00] 9437 9438v_subrev_co_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 9439// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x34,0x01,0x00] 9440 9441v_subrev_co_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 9442// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x38,0x01,0x00] 9443 9444v_subrev_co_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 9445// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x3c,0x01,0x00] 9446 9447v_subrev_co_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 9448// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x01,0x01,0x00] 9449 9450v_subrev_co_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 9451// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x0f,0x01,0x00] 9452 9453v_subrev_co_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 9454// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x11,0x01,0x00] 9455 9456v_subrev_co_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 9457// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x1f,0x01,0x00] 9458 9459v_subrev_co_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 9460// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x21,0x01,0x00] 9461 9462v_subrev_co_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 9463// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x2f,0x01,0x00] 9464 9465v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 9466// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x10] 9467 9468v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 9469// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x30] 9470 9471v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 9472// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0xf0] 9473 9474v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 9475// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0xf0] 9476 9477v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 9478// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x01] 9479 9480v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 9481// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x03] 9482 9483v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 9484// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x0f] 9485 9486v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 9487// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x0f] 9488 9489v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 9490// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x08,0x00] 9491 9492v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9493// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06] 9494 9495v_addc_co_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9496// CHECK: [0xf9,0x04,0xfe,0x39,0x01,0x06,0x06,0x06] 9497 9498v_addc_co_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9499// CHECK: [0xf9,0x04,0x0a,0x38,0xff,0x06,0x06,0x06] 9500 9501v_addc_co_u32_sdwa v5, vcc, 0, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9502// CHECK: [0xf9,0x04,0x0a,0x38,0x80,0x06,0x86,0x06] 9503 9504v_addc_co_u32_sdwa v5, vcc, -1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9505// CHECK: [0xf9,0x04,0x0a,0x38,0xc1,0x06,0x86,0x06] 9506 9507v_addc_co_u32_sdwa v5, vcc, 0.5, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9508// CHECK: [0xf9,0x04,0x0a,0x38,0xf0,0x06,0x86,0x06] 9509 9510v_addc_co_u32_sdwa v5, vcc, -4.0, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9511// CHECK: [0xf9,0x04,0x0a,0x38,0xf7,0x06,0x86,0x06] 9512 9513v_addc_co_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9514// CHECK: [0xf9,0xfe,0x0b,0x38,0x01,0x06,0x06,0x06] 9515 9516v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9517// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x26,0x06,0x06] 9518 9519v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9520// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06] 9521 9522v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9523// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x00,0x06,0x06] 9524 9525v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9526// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x01,0x06,0x06] 9527 9528v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9529// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x02,0x06,0x06] 9530 9531v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9532// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x03,0x06,0x06] 9533 9534v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9535// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x04,0x06,0x06] 9536 9537v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9538// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x05,0x06,0x06] 9539 9540v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 9541// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x0e,0x06,0x06] 9542 9543v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 9544// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x16,0x06,0x06] 9545 9546v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 9547// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x16,0x06,0x06] 9548 9549v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 9550// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06] 9551 9552v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 9553// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x00,0x06] 9554 9555v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 9556// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x01,0x06] 9557 9558v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 9559// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x02,0x06] 9560 9561v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 9562// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x03,0x06] 9563 9564v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 9565// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x04,0x06] 9566 9567v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 9568// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x05,0x06] 9569 9570v_addc_co_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9571// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x0e,0x06] 9572 9573v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 9574// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06] 9575 9576v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 9577// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x00] 9578 9579v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 9580// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x01] 9581 9582v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 9583// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x02] 9584 9585v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 9586// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x03] 9587 9588v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 9589// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x04] 9590 9591v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 9592// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x05] 9593 9594v_addc_co_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9595// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x0e] 9596 9597v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 9598// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x00] 9599 9600v_addc_co_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 9601// CHECK: [0xfa,0x04,0xfe,0x39,0x01,0xe4,0x00,0x00] 9602 9603v_addc_co_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 9604// CHECK: [0xfa,0x04,0x0a,0x38,0xff,0xe4,0x00,0x00] 9605 9606v_addc_co_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 9607// CHECK: [0xfa,0xfe,0x0b,0x38,0x01,0xe4,0x00,0x00] 9608 9609v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 9610// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x1b,0x00,0x00] 9611 9612v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0 9613// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x40,0x01,0x00] 9614 9615v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0 9616// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x41,0x01,0x00] 9617 9618v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0 9619// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x42,0x01,0x00] 9620 9621v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0 9622// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x43,0x01,0x00] 9623 9624v_addc_co_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0 9625// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x30,0x01,0x00] 9626 9627v_addc_co_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0 9628// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x34,0x01,0x00] 9629 9630v_addc_co_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0 9631// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x38,0x01,0x00] 9632 9633v_addc_co_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0 9634// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x3c,0x01,0x00] 9635 9636v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0 9637// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x01,0x01,0x00] 9638 9639v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0 9640// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x0f,0x01,0x00] 9641 9642v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0 9643// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x11,0x01,0x00] 9644 9645v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0 9646// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x1f,0x01,0x00] 9647 9648v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0 9649// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x21,0x01,0x00] 9650 9651v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0 9652// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x2f,0x01,0x00] 9653 9654v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 9655// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x10] 9656 9657v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 9658// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x30] 9659 9660v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 9661// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0xf0] 9662 9663v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] bank_mask:0x0 9664// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0xf0] 9665 9666v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 9667// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x01] 9668 9669v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 9670// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x03] 9671 9672v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 9673// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x0f] 9674 9675v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 9676// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x0f] 9677 9678v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 9679// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x08,0x00] 9680 9681v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9682// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06] 9683 9684v_subb_co_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9685// CHECK: [0xf9,0x04,0xfe,0x3b,0x01,0x06,0x06,0x06] 9686 9687v_subb_co_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9688// CHECK: [0xf9,0x04,0x0a,0x3a,0xff,0x06,0x06,0x06] 9689 9690v_subb_co_u32_sdwa v5, vcc, 0, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9691// CHECK: [0xf9,0x04,0x0a,0x3a,0x80,0x06,0x86,0x06] 9692 9693v_subb_co_u32_sdwa v5, vcc, -1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9694// CHECK: [0xf9,0x04,0x0a,0x3a,0xc1,0x06,0x86,0x06] 9695 9696v_subb_co_u32_sdwa v5, vcc, 0.5, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9697// CHECK: [0xf9,0x04,0x0a,0x3a,0xf0,0x06,0x86,0x06] 9698 9699v_subb_co_u32_sdwa v5, vcc, -4.0, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9700// CHECK: [0xf9,0x04,0x0a,0x3a,0xf7,0x06,0x86,0x06] 9701 9702v_subb_co_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9703// CHECK: [0xf9,0xfe,0x0b,0x3a,0x01,0x06,0x06,0x06] 9704 9705v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9706// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x26,0x06,0x06] 9707 9708v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9709// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06] 9710 9711v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9712// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x00,0x06,0x06] 9713 9714v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9715// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x01,0x06,0x06] 9716 9717v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9718// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x02,0x06,0x06] 9719 9720v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9721// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x03,0x06,0x06] 9722 9723v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9724// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x04,0x06,0x06] 9725 9726v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9727// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x05,0x06,0x06] 9728 9729v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 9730// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x0e,0x06,0x06] 9731 9732v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 9733// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x16,0x06,0x06] 9734 9735v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 9736// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x16,0x06,0x06] 9737 9738v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 9739// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06] 9740 9741v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 9742// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x00,0x06] 9743 9744v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 9745// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x01,0x06] 9746 9747v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 9748// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x02,0x06] 9749 9750v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 9751// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x03,0x06] 9752 9753v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 9754// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x04,0x06] 9755 9756v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 9757// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x05,0x06] 9758 9759v_subb_co_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9760// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x0e,0x06] 9761 9762v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 9763// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06] 9764 9765v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 9766// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x00] 9767 9768v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 9769// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x01] 9770 9771v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 9772// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x02] 9773 9774v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 9775// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x03] 9776 9777v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 9778// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x04] 9779 9780v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 9781// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x05] 9782 9783v_subb_co_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9784// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x0e] 9785 9786v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 9787// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x00] 9788 9789v_subb_co_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 9790// CHECK: [0xfa,0x04,0xfe,0x3b,0x01,0xe4,0x00,0x00] 9791 9792v_subb_co_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 9793// CHECK: [0xfa,0x04,0x0a,0x3a,0xff,0xe4,0x00,0x00] 9794 9795v_subb_co_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 9796// CHECK: [0xfa,0xfe,0x0b,0x3a,0x01,0xe4,0x00,0x00] 9797 9798v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 9799// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x00,0x00] 9800 9801v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0 9802// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x40,0x01,0x00] 9803 9804v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0 9805// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x41,0x01,0x00] 9806 9807v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0 9808// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x42,0x01,0x00] 9809 9810v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0 9811// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x43,0x01,0x00] 9812 9813v_subb_co_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0 9814// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x30,0x01,0x00] 9815 9816v_subb_co_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0 9817// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x34,0x01,0x00] 9818 9819v_subb_co_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0 9820// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x38,0x01,0x00] 9821 9822v_subb_co_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0 9823// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x3c,0x01,0x00] 9824 9825v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0 9826// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x01,0x01,0x00] 9827 9828v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0 9829// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x0f,0x01,0x00] 9830 9831v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0 9832// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x11,0x01,0x00] 9833 9834v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0 9835// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x1f,0x01,0x00] 9836 9837v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0 9838// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x21,0x01,0x00] 9839 9840v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0 9841// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x2f,0x01,0x00] 9842 9843v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 9844// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x10] 9845 9846v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 9847// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x30] 9848 9849v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 9850// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0xf0] 9851 9852v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] bank_mask:0x0 9853// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0xf0] 9854 9855v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 9856// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x01] 9857 9858v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 9859// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x03] 9860 9861v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 9862// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x0f] 9863 9864v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 9865// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x0f] 9866 9867v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 9868// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x08,0x00] 9869 9870v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9871// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06] 9872 9873v_subbrev_co_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9874// CHECK: [0xf9,0x04,0xfe,0x3d,0x01,0x06,0x06,0x06] 9875 9876v_subbrev_co_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9877// CHECK: [0xf9,0x04,0x0a,0x3c,0xff,0x06,0x06,0x06] 9878 9879v_subbrev_co_u32_sdwa v5, vcc, 0, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9880// CHECK: [0xf9,0x04,0x0a,0x3c,0x80,0x06,0x86,0x06] 9881 9882v_subbrev_co_u32_sdwa v5, vcc, -1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9883// CHECK: [0xf9,0x04,0x0a,0x3c,0xc1,0x06,0x86,0x06] 9884 9885v_subbrev_co_u32_sdwa v5, vcc, 0.5, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9886// CHECK: [0xf9,0x04,0x0a,0x3c,0xf0,0x06,0x86,0x06] 9887 9888v_subbrev_co_u32_sdwa v5, vcc, -4.0, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9889// CHECK: [0xf9,0x04,0x0a,0x3c,0xf7,0x06,0x86,0x06] 9890 9891v_subbrev_co_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9892// CHECK: [0xf9,0xfe,0x0b,0x3c,0x01,0x06,0x06,0x06] 9893 9894v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9895// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x26,0x06,0x06] 9896 9897v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9898// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06] 9899 9900v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9901// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x00,0x06,0x06] 9902 9903v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9904// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x01,0x06,0x06] 9905 9906v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9907// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x02,0x06,0x06] 9908 9909v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9910// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x03,0x06,0x06] 9911 9912v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9913// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x04,0x06,0x06] 9914 9915v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9916// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x05,0x06,0x06] 9917 9918v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 9919// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x0e,0x06,0x06] 9920 9921v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 9922// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x16,0x06,0x06] 9923 9924v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 9925// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x16,0x06,0x06] 9926 9927v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 9928// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06] 9929 9930v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 9931// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x00,0x06] 9932 9933v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 9934// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x01,0x06] 9935 9936v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 9937// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x02,0x06] 9938 9939v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 9940// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x03,0x06] 9941 9942v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 9943// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x04,0x06] 9944 9945v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 9946// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x05,0x06] 9947 9948v_subbrev_co_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9949// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x0e,0x06] 9950 9951v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 9952// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06] 9953 9954v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 9955// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x00] 9956 9957v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 9958// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x01] 9959 9960v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 9961// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x02] 9962 9963v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 9964// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x03] 9965 9966v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 9967// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x04] 9968 9969v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 9970// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x05] 9971 9972v_subbrev_co_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 9973// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x0e] 9974 9975v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 9976// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x00] 9977 9978v_subbrev_co_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 9979// CHECK: [0xfa,0x04,0xfe,0x3d,0x01,0xe4,0x00,0x00] 9980 9981v_subbrev_co_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 9982// CHECK: [0xfa,0x04,0x0a,0x3c,0xff,0xe4,0x00,0x00] 9983 9984v_subbrev_co_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 9985// CHECK: [0xfa,0xfe,0x0b,0x3c,0x01,0xe4,0x00,0x00] 9986 9987v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 9988// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x00,0x00] 9989 9990v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0 9991// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x40,0x01,0x00] 9992 9993v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0 9994// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x41,0x01,0x00] 9995 9996v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0 9997// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x42,0x01,0x00] 9998 9999v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0 10000// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x43,0x01,0x00] 10001 10002v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0 10003// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x30,0x01,0x00] 10004 10005v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0 10006// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x34,0x01,0x00] 10007 10008v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0 10009// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x38,0x01,0x00] 10010 10011v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0 10012// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x3c,0x01,0x00] 10013 10014v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0 10015// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x01,0x01,0x00] 10016 10017v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0 10018// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x0f,0x01,0x00] 10019 10020v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0 10021// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x11,0x01,0x00] 10022 10023v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0 10024// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x1f,0x01,0x00] 10025 10026v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0 10027// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x21,0x01,0x00] 10028 10029v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0 10030// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x2f,0x01,0x00] 10031 10032v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 10033// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x10] 10034 10035v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 10036// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x30] 10037 10038v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 10039// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0xf0] 10040 10041v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] bank_mask:0x0 10042// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0xf0] 10043 10044v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 10045// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x01] 10046 10047v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 10048// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x03] 10049 10050v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 10051// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x0f] 10052 10053v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 10054// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x0f] 10055 10056v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 10057// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x08,0x00] 10058 10059v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10060// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x06] 10061 10062v_add_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10063// CHECK: [0xf9,0x04,0xfe,0x3f,0x01,0x06,0x06,0x06] 10064 10065v_add_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10066// CHECK: [0xf9,0x04,0x0a,0x3e,0xff,0x06,0x06,0x06] 10067 10068v_add_f16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10069// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x86,0x06] 10070 10071v_add_f16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10072// CHECK: [0xf9,0x04,0x0a,0x3e,0x65,0x06,0x86,0x06] 10073 10074v_add_f16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10075// CHECK: [0xf9,0x04,0x0a,0x3e,0x66,0x06,0x86,0x06] 10076 10077v_add_f16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10078// CHECK: [0xf9,0x04,0x0a,0x3e,0x67,0x06,0x86,0x06] 10079 10080v_add_f16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10081// CHECK: [0xf9,0x04,0x0a,0x3e,0x6a,0x06,0x86,0x06] 10082 10083v_add_f16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10084// CHECK: [0xf9,0x04,0x0a,0x3e,0x6b,0x06,0x86,0x06] 10085 10086v_add_f16_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10087// CHECK: [0xf9,0x04,0x0a,0x3e,0x7b,0x06,0x86,0x06] 10088 10089v_add_f16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10090// CHECK: [0xf9,0x04,0x0a,0x3e,0x7c,0x06,0x86,0x06] 10091 10092v_add_f16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10093// CHECK: [0xf9,0x04,0x0a,0x3e,0x7e,0x06,0x86,0x06] 10094 10095v_add_f16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10096// CHECK: [0xf9,0x04,0x0a,0x3e,0x7f,0x06,0x86,0x06] 10097 10098v_add_f16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10099// CHECK: [0xf9,0x04,0x0a,0x3e,0x80,0x06,0x86,0x06] 10100 10101v_add_f16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10102// CHECK: [0xf9,0x04,0x0a,0x3e,0xc1,0x06,0x86,0x06] 10103 10104v_add_f16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10105// CHECK: [0xf9,0x04,0x0a,0x3e,0xf0,0x06,0x86,0x06] 10106 10107v_add_f16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10108// CHECK: [0xf9,0x04,0x0a,0x3e,0xf7,0x06,0x86,0x06] 10109 10110v_add_f16_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10111// CHECK: [0xf9,0x04,0x0a,0x3e,0xfb,0x06,0x86,0x06] 10112 10113v_add_f16_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10114// CHECK: [0xf9,0x04,0x0a,0x3e,0xfc,0x06,0x86,0x06] 10115 10116v_add_f16_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10117// CHECK: [0xf9,0x04,0x0a,0x3e,0xfd,0x06,0x86,0x06] 10118 10119v_add_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10120// CHECK: [0xf9,0xfe,0x0b,0x3e,0x01,0x06,0x06,0x06] 10121 10122v_add_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10123// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x26,0x06,0x06] 10124 10125v_add_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10126// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x06] 10127 10128v_add_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10129// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x00,0x06,0x06] 10130 10131v_add_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10132// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x01,0x06,0x06] 10133 10134v_add_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10135// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x02,0x06,0x06] 10136 10137v_add_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10138// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x03,0x06,0x06] 10139 10140v_add_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10141// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x04,0x06,0x06] 10142 10143v_add_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10144// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x05,0x06,0x06] 10145 10146v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 10147// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x0e,0x06,0x06] 10148 10149v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 10150// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x16,0x06,0x06] 10151 10152v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 10153// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x16,0x06,0x06] 10154 10155v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 10156// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x06] 10157 10158v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 10159// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x00,0x06] 10160 10161v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 10162// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x01,0x06] 10163 10164v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 10165// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x02,0x06] 10166 10167v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 10168// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x03,0x06] 10169 10170v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 10171// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x04,0x06] 10172 10173v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 10174// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x05,0x06] 10175 10176v_add_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10177// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x16,0x06] 10178 10179v_add_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10180// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x26,0x06] 10181 10182v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 10183// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x06] 10184 10185v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 10186// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x00] 10187 10188v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 10189// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x01] 10190 10191v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 10192// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x02] 10193 10194v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 10195// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x03] 10196 10197v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 10198// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x04] 10199 10200v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 10201// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x05] 10202 10203v_add_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10204// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x16] 10205 10206v_add_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10207// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x26] 10208 10209v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10210// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x00] 10211 10212v_add_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10213// CHECK: [0xfa,0x04,0xfe,0x3f,0x01,0xe4,0x00,0x00] 10214 10215v_add_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10216// CHECK: [0xfa,0x04,0x0a,0x3e,0xff,0xe4,0x00,0x00] 10217 10218v_add_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10219// CHECK: [0xfa,0xfe,0x0b,0x3e,0x01,0xe4,0x00,0x00] 10220 10221v_add_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 10222// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x1b,0x00,0x00] 10223 10224v_add_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 10225// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x40,0x01,0x00] 10226 10227v_add_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 10228// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x41,0x01,0x00] 10229 10230v_add_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 10231// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x42,0x01,0x00] 10232 10233v_add_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 10234// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x43,0x01,0x00] 10235 10236v_add_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 10237// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x30,0x01,0x00] 10238 10239v_add_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 10240// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x34,0x01,0x00] 10241 10242v_add_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 10243// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x38,0x01,0x00] 10244 10245v_add_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 10246// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x3c,0x01,0x00] 10247 10248v_add_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 10249// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x01,0x01,0x00] 10250 10251v_add_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 10252// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x0f,0x01,0x00] 10253 10254v_add_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 10255// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x11,0x01,0x00] 10256 10257v_add_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 10258// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x1f,0x01,0x00] 10259 10260v_add_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 10261// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x21,0x01,0x00] 10262 10263v_add_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 10264// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x2f,0x01,0x00] 10265 10266v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 10267// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x10] 10268 10269v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 10270// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x30] 10271 10272v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 10273// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0xf0] 10274 10275v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 10276// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0xf0] 10277 10278v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 10279// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x01] 10280 10281v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 10282// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x03] 10283 10284v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 10285// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x0f] 10286 10287v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 10288// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x0f] 10289 10290v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 10291// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x08,0x00] 10292 10293v_add_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10294// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x10,0x00] 10295 10296v_add_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10297// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x20,0x00] 10298 10299v_add_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10300// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x40,0x00] 10301 10302v_add_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10303// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x80,0x00] 10304 10305v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10306// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x06] 10307 10308v_sub_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10309// CHECK: [0xf9,0x04,0xfe,0x41,0x01,0x06,0x06,0x06] 10310 10311v_sub_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10312// CHECK: [0xf9,0x04,0x0a,0x40,0xff,0x06,0x06,0x06] 10313 10314v_sub_f16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10315// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x86,0x06] 10316 10317v_sub_f16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10318// CHECK: [0xf9,0x04,0x0a,0x40,0x65,0x06,0x86,0x06] 10319 10320v_sub_f16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10321// CHECK: [0xf9,0x04,0x0a,0x40,0x66,0x06,0x86,0x06] 10322 10323v_sub_f16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10324// CHECK: [0xf9,0x04,0x0a,0x40,0x67,0x06,0x86,0x06] 10325 10326v_sub_f16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10327// CHECK: [0xf9,0x04,0x0a,0x40,0x6a,0x06,0x86,0x06] 10328 10329v_sub_f16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10330// CHECK: [0xf9,0x04,0x0a,0x40,0x6b,0x06,0x86,0x06] 10331 10332v_sub_f16_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10333// CHECK: [0xf9,0x04,0x0a,0x40,0x7b,0x06,0x86,0x06] 10334 10335v_sub_f16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10336// CHECK: [0xf9,0x04,0x0a,0x40,0x7c,0x06,0x86,0x06] 10337 10338v_sub_f16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10339// CHECK: [0xf9,0x04,0x0a,0x40,0x7e,0x06,0x86,0x06] 10340 10341v_sub_f16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10342// CHECK: [0xf9,0x04,0x0a,0x40,0x7f,0x06,0x86,0x06] 10343 10344v_sub_f16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10345// CHECK: [0xf9,0x04,0x0a,0x40,0x80,0x06,0x86,0x06] 10346 10347v_sub_f16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10348// CHECK: [0xf9,0x04,0x0a,0x40,0xc1,0x06,0x86,0x06] 10349 10350v_sub_f16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10351// CHECK: [0xf9,0x04,0x0a,0x40,0xf0,0x06,0x86,0x06] 10352 10353v_sub_f16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10354// CHECK: [0xf9,0x04,0x0a,0x40,0xf7,0x06,0x86,0x06] 10355 10356v_sub_f16_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10357// CHECK: [0xf9,0x04,0x0a,0x40,0xfb,0x06,0x86,0x06] 10358 10359v_sub_f16_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10360// CHECK: [0xf9,0x04,0x0a,0x40,0xfc,0x06,0x86,0x06] 10361 10362v_sub_f16_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10363// CHECK: [0xf9,0x04,0x0a,0x40,0xfd,0x06,0x86,0x06] 10364 10365v_sub_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10366// CHECK: [0xf9,0xfe,0x0b,0x40,0x01,0x06,0x06,0x06] 10367 10368v_sub_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10369// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x26,0x06,0x06] 10370 10371v_sub_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10372// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x06] 10373 10374v_sub_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10375// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x00,0x06,0x06] 10376 10377v_sub_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10378// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x01,0x06,0x06] 10379 10380v_sub_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10381// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x02,0x06,0x06] 10382 10383v_sub_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10384// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x03,0x06,0x06] 10385 10386v_sub_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10387// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x04,0x06,0x06] 10388 10389v_sub_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10390// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x05,0x06,0x06] 10391 10392v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 10393// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x0e,0x06,0x06] 10394 10395v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 10396// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x16,0x06,0x06] 10397 10398v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 10399// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x16,0x06,0x06] 10400 10401v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 10402// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x06] 10403 10404v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 10405// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x00,0x06] 10406 10407v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 10408// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x01,0x06] 10409 10410v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 10411// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x02,0x06] 10412 10413v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 10414// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x03,0x06] 10415 10416v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 10417// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x04,0x06] 10418 10419v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 10420// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x05,0x06] 10421 10422v_sub_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10423// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x16,0x06] 10424 10425v_sub_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10426// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x26,0x06] 10427 10428v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 10429// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x06] 10430 10431v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 10432// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x00] 10433 10434v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 10435// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x01] 10436 10437v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 10438// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x02] 10439 10440v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 10441// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x03] 10442 10443v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 10444// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x04] 10445 10446v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 10447// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x05] 10448 10449v_sub_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10450// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x16] 10451 10452v_sub_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10453// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x26] 10454 10455v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10456// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x00] 10457 10458v_sub_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10459// CHECK: [0xfa,0x04,0xfe,0x41,0x01,0xe4,0x00,0x00] 10460 10461v_sub_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10462// CHECK: [0xfa,0x04,0x0a,0x40,0xff,0xe4,0x00,0x00] 10463 10464v_sub_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10465// CHECK: [0xfa,0xfe,0x0b,0x40,0x01,0xe4,0x00,0x00] 10466 10467v_sub_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 10468// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x1b,0x00,0x00] 10469 10470v_sub_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 10471// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x40,0x01,0x00] 10472 10473v_sub_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 10474// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x41,0x01,0x00] 10475 10476v_sub_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 10477// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x42,0x01,0x00] 10478 10479v_sub_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 10480// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x43,0x01,0x00] 10481 10482v_sub_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 10483// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x30,0x01,0x00] 10484 10485v_sub_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 10486// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x34,0x01,0x00] 10487 10488v_sub_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 10489// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x38,0x01,0x00] 10490 10491v_sub_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 10492// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x3c,0x01,0x00] 10493 10494v_sub_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 10495// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x01,0x01,0x00] 10496 10497v_sub_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 10498// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x0f,0x01,0x00] 10499 10500v_sub_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 10501// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x11,0x01,0x00] 10502 10503v_sub_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 10504// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x1f,0x01,0x00] 10505 10506v_sub_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 10507// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x21,0x01,0x00] 10508 10509v_sub_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 10510// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x2f,0x01,0x00] 10511 10512v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 10513// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x10] 10514 10515v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 10516// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x30] 10517 10518v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 10519// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0xf0] 10520 10521v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 10522// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0xf0] 10523 10524v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 10525// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x01] 10526 10527v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 10528// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x03] 10529 10530v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 10531// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x0f] 10532 10533v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 10534// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x0f] 10535 10536v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 10537// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x08,0x00] 10538 10539v_sub_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10540// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x10,0x00] 10541 10542v_sub_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10543// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x20,0x00] 10544 10545v_sub_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10546// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x40,0x00] 10547 10548v_sub_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10549// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x80,0x00] 10550 10551v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10552// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x06] 10553 10554v_subrev_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10555// CHECK: [0xf9,0x04,0xfe,0x43,0x01,0x06,0x06,0x06] 10556 10557v_subrev_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10558// CHECK: [0xf9,0x04,0x0a,0x42,0xff,0x06,0x06,0x06] 10559 10560v_subrev_f16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10561// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x86,0x06] 10562 10563v_subrev_f16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10564// CHECK: [0xf9,0x04,0x0a,0x42,0x65,0x06,0x86,0x06] 10565 10566v_subrev_f16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10567// CHECK: [0xf9,0x04,0x0a,0x42,0x66,0x06,0x86,0x06] 10568 10569v_subrev_f16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10570// CHECK: [0xf9,0x04,0x0a,0x42,0x67,0x06,0x86,0x06] 10571 10572v_subrev_f16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10573// CHECK: [0xf9,0x04,0x0a,0x42,0x6a,0x06,0x86,0x06] 10574 10575v_subrev_f16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10576// CHECK: [0xf9,0x04,0x0a,0x42,0x6b,0x06,0x86,0x06] 10577 10578v_subrev_f16_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10579// CHECK: [0xf9,0x04,0x0a,0x42,0x7b,0x06,0x86,0x06] 10580 10581v_subrev_f16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10582// CHECK: [0xf9,0x04,0x0a,0x42,0x7c,0x06,0x86,0x06] 10583 10584v_subrev_f16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10585// CHECK: [0xf9,0x04,0x0a,0x42,0x7e,0x06,0x86,0x06] 10586 10587v_subrev_f16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10588// CHECK: [0xf9,0x04,0x0a,0x42,0x7f,0x06,0x86,0x06] 10589 10590v_subrev_f16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10591// CHECK: [0xf9,0x04,0x0a,0x42,0x80,0x06,0x86,0x06] 10592 10593v_subrev_f16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10594// CHECK: [0xf9,0x04,0x0a,0x42,0xc1,0x06,0x86,0x06] 10595 10596v_subrev_f16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10597// CHECK: [0xf9,0x04,0x0a,0x42,0xf0,0x06,0x86,0x06] 10598 10599v_subrev_f16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10600// CHECK: [0xf9,0x04,0x0a,0x42,0xf7,0x06,0x86,0x06] 10601 10602v_subrev_f16_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10603// CHECK: [0xf9,0x04,0x0a,0x42,0xfb,0x06,0x86,0x06] 10604 10605v_subrev_f16_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10606// CHECK: [0xf9,0x04,0x0a,0x42,0xfc,0x06,0x86,0x06] 10607 10608v_subrev_f16_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10609// CHECK: [0xf9,0x04,0x0a,0x42,0xfd,0x06,0x86,0x06] 10610 10611v_subrev_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10612// CHECK: [0xf9,0xfe,0x0b,0x42,0x01,0x06,0x06,0x06] 10613 10614v_subrev_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10615// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x26,0x06,0x06] 10616 10617v_subrev_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10618// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x06] 10619 10620v_subrev_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10621// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x00,0x06,0x06] 10622 10623v_subrev_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10624// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x01,0x06,0x06] 10625 10626v_subrev_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10627// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x02,0x06,0x06] 10628 10629v_subrev_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10630// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x03,0x06,0x06] 10631 10632v_subrev_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10633// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x04,0x06,0x06] 10634 10635v_subrev_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10636// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x05,0x06,0x06] 10637 10638v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 10639// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x0e,0x06,0x06] 10640 10641v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 10642// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x16,0x06,0x06] 10643 10644v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 10645// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x16,0x06,0x06] 10646 10647v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 10648// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x06] 10649 10650v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 10651// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x00,0x06] 10652 10653v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 10654// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x01,0x06] 10655 10656v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 10657// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x02,0x06] 10658 10659v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 10660// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x03,0x06] 10661 10662v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 10663// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x04,0x06] 10664 10665v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 10666// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x05,0x06] 10667 10668v_subrev_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10669// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x16,0x06] 10670 10671v_subrev_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10672// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x26,0x06] 10673 10674v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 10675// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x06] 10676 10677v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 10678// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x00] 10679 10680v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 10681// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x01] 10682 10683v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 10684// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x02] 10685 10686v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 10687// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x03] 10688 10689v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 10690// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x04] 10691 10692v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 10693// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x05] 10694 10695v_subrev_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10696// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x16] 10697 10698v_subrev_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10699// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x26] 10700 10701v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10702// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x00] 10703 10704v_subrev_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10705// CHECK: [0xfa,0x04,0xfe,0x43,0x01,0xe4,0x00,0x00] 10706 10707v_subrev_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10708// CHECK: [0xfa,0x04,0x0a,0x42,0xff,0xe4,0x00,0x00] 10709 10710v_subrev_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10711// CHECK: [0xfa,0xfe,0x0b,0x42,0x01,0xe4,0x00,0x00] 10712 10713v_subrev_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 10714// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x1b,0x00,0x00] 10715 10716v_subrev_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 10717// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x40,0x01,0x00] 10718 10719v_subrev_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 10720// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x41,0x01,0x00] 10721 10722v_subrev_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 10723// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x42,0x01,0x00] 10724 10725v_subrev_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 10726// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x43,0x01,0x00] 10727 10728v_subrev_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 10729// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x30,0x01,0x00] 10730 10731v_subrev_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 10732// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x34,0x01,0x00] 10733 10734v_subrev_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 10735// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x38,0x01,0x00] 10736 10737v_subrev_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 10738// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x3c,0x01,0x00] 10739 10740v_subrev_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 10741// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x01,0x01,0x00] 10742 10743v_subrev_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 10744// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x0f,0x01,0x00] 10745 10746v_subrev_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 10747// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x11,0x01,0x00] 10748 10749v_subrev_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 10750// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x1f,0x01,0x00] 10751 10752v_subrev_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 10753// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x21,0x01,0x00] 10754 10755v_subrev_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 10756// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x2f,0x01,0x00] 10757 10758v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 10759// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x10] 10760 10761v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 10762// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x30] 10763 10764v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 10765// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0xf0] 10766 10767v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 10768// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0xf0] 10769 10770v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 10771// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x01] 10772 10773v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 10774// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x03] 10775 10776v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 10777// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x0f] 10778 10779v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 10780// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x0f] 10781 10782v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 10783// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x08,0x00] 10784 10785v_subrev_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10786// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x10,0x00] 10787 10788v_subrev_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10789// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x20,0x00] 10790 10791v_subrev_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10792// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x40,0x00] 10793 10794v_subrev_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10795// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x80,0x00] 10796 10797v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10798// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x06] 10799 10800v_mul_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10801// CHECK: [0xf9,0x04,0xfe,0x45,0x01,0x06,0x06,0x06] 10802 10803v_mul_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10804// CHECK: [0xf9,0x04,0x0a,0x44,0xff,0x06,0x06,0x06] 10805 10806v_mul_f16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10807// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x86,0x06] 10808 10809v_mul_f16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10810// CHECK: [0xf9,0x04,0x0a,0x44,0x65,0x06,0x86,0x06] 10811 10812v_mul_f16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10813// CHECK: [0xf9,0x04,0x0a,0x44,0x66,0x06,0x86,0x06] 10814 10815v_mul_f16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10816// CHECK: [0xf9,0x04,0x0a,0x44,0x67,0x06,0x86,0x06] 10817 10818v_mul_f16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10819// CHECK: [0xf9,0x04,0x0a,0x44,0x6a,0x06,0x86,0x06] 10820 10821v_mul_f16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10822// CHECK: [0xf9,0x04,0x0a,0x44,0x6b,0x06,0x86,0x06] 10823 10824v_mul_f16_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10825// CHECK: [0xf9,0x04,0x0a,0x44,0x7b,0x06,0x86,0x06] 10826 10827v_mul_f16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10828// CHECK: [0xf9,0x04,0x0a,0x44,0x7c,0x06,0x86,0x06] 10829 10830v_mul_f16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10831// CHECK: [0xf9,0x04,0x0a,0x44,0x7e,0x06,0x86,0x06] 10832 10833v_mul_f16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10834// CHECK: [0xf9,0x04,0x0a,0x44,0x7f,0x06,0x86,0x06] 10835 10836v_mul_f16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10837// CHECK: [0xf9,0x04,0x0a,0x44,0x80,0x06,0x86,0x06] 10838 10839v_mul_f16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10840// CHECK: [0xf9,0x04,0x0a,0x44,0xc1,0x06,0x86,0x06] 10841 10842v_mul_f16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10843// CHECK: [0xf9,0x04,0x0a,0x44,0xf0,0x06,0x86,0x06] 10844 10845v_mul_f16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10846// CHECK: [0xf9,0x04,0x0a,0x44,0xf7,0x06,0x86,0x06] 10847 10848v_mul_f16_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10849// CHECK: [0xf9,0x04,0x0a,0x44,0xfb,0x06,0x86,0x06] 10850 10851v_mul_f16_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10852// CHECK: [0xf9,0x04,0x0a,0x44,0xfc,0x06,0x86,0x06] 10853 10854v_mul_f16_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10855// CHECK: [0xf9,0x04,0x0a,0x44,0xfd,0x06,0x86,0x06] 10856 10857v_mul_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10858// CHECK: [0xf9,0xfe,0x0b,0x44,0x01,0x06,0x06,0x06] 10859 10860v_mul_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10861// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x26,0x06,0x06] 10862 10863v_mul_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10864// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x06] 10865 10866v_mul_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10867// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x00,0x06,0x06] 10868 10869v_mul_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10870// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x01,0x06,0x06] 10871 10872v_mul_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10873// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x02,0x06,0x06] 10874 10875v_mul_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10876// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x03,0x06,0x06] 10877 10878v_mul_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10879// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x04,0x06,0x06] 10880 10881v_mul_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10882// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x05,0x06,0x06] 10883 10884v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 10885// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x0e,0x06,0x06] 10886 10887v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 10888// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x16,0x06,0x06] 10889 10890v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 10891// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x16,0x06,0x06] 10892 10893v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 10894// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x06] 10895 10896v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 10897// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x00,0x06] 10898 10899v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 10900// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x01,0x06] 10901 10902v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 10903// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x02,0x06] 10904 10905v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 10906// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x03,0x06] 10907 10908v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 10909// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x04,0x06] 10910 10911v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 10912// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x05,0x06] 10913 10914v_mul_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10915// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x16,0x06] 10916 10917v_mul_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10918// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x26,0x06] 10919 10920v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 10921// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x06] 10922 10923v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 10924// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x00] 10925 10926v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 10927// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x01] 10928 10929v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 10930// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x02] 10931 10932v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 10933// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x03] 10934 10935v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 10936// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x04] 10937 10938v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 10939// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x05] 10940 10941v_mul_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10942// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x16] 10943 10944v_mul_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 10945// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x26] 10946 10947v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10948// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x00] 10949 10950v_mul_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10951// CHECK: [0xfa,0x04,0xfe,0x45,0x01,0xe4,0x00,0x00] 10952 10953v_mul_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10954// CHECK: [0xfa,0x04,0x0a,0x44,0xff,0xe4,0x00,0x00] 10955 10956v_mul_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 10957// CHECK: [0xfa,0xfe,0x0b,0x44,0x01,0xe4,0x00,0x00] 10958 10959v_mul_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 10960// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x1b,0x00,0x00] 10961 10962v_mul_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 10963// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x40,0x01,0x00] 10964 10965v_mul_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 10966// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x41,0x01,0x00] 10967 10968v_mul_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 10969// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x42,0x01,0x00] 10970 10971v_mul_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 10972// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x43,0x01,0x00] 10973 10974v_mul_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 10975// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x30,0x01,0x00] 10976 10977v_mul_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 10978// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x34,0x01,0x00] 10979 10980v_mul_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 10981// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x38,0x01,0x00] 10982 10983v_mul_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 10984// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x3c,0x01,0x00] 10985 10986v_mul_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 10987// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x01,0x01,0x00] 10988 10989v_mul_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 10990// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x0f,0x01,0x00] 10991 10992v_mul_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 10993// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x11,0x01,0x00] 10994 10995v_mul_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 10996// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x1f,0x01,0x00] 10997 10998v_mul_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 10999// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x21,0x01,0x00] 11000 11001v_mul_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 11002// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x2f,0x01,0x00] 11003 11004v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 11005// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x10] 11006 11007v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 11008// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x30] 11009 11010v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 11011// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0xf0] 11012 11013v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 11014// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0xf0] 11015 11016v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 11017// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x01] 11018 11019v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 11020// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x03] 11021 11022v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 11023// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x0f] 11024 11025v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 11026// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x0f] 11027 11028v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 11029// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x08,0x00] 11030 11031v_mul_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11032// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x10,0x00] 11033 11034v_mul_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11035// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x20,0x00] 11036 11037v_mul_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11038// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x40,0x00] 11039 11040v_mul_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11041// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x80,0x00] 11042 11043v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11044// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x00] 11045 11046v_mac_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11047// CHECK: [0xfa,0x04,0xfe,0x47,0x01,0xe4,0x00,0x00] 11048 11049v_mac_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11050// CHECK: [0xfa,0x04,0x0a,0x46,0xff,0xe4,0x00,0x00] 11051 11052v_mac_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11053// CHECK: [0xfa,0xfe,0x0b,0x46,0x01,0xe4,0x00,0x00] 11054 11055v_mac_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 11056// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x1b,0x00,0x00] 11057 11058v_mac_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 11059// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x40,0x01,0x00] 11060 11061v_mac_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 11062// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x41,0x01,0x00] 11063 11064v_mac_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 11065// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x42,0x01,0x00] 11066 11067v_mac_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 11068// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x43,0x01,0x00] 11069 11070v_mac_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 11071// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x30,0x01,0x00] 11072 11073v_mac_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 11074// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x34,0x01,0x00] 11075 11076v_mac_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 11077// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x38,0x01,0x00] 11078 11079v_mac_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 11080// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x3c,0x01,0x00] 11081 11082v_mac_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 11083// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x01,0x01,0x00] 11084 11085v_mac_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 11086// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x0f,0x01,0x00] 11087 11088v_mac_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 11089// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x11,0x01,0x00] 11090 11091v_mac_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 11092// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x1f,0x01,0x00] 11093 11094v_mac_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 11095// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x21,0x01,0x00] 11096 11097v_mac_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 11098// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x2f,0x01,0x00] 11099 11100v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 11101// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x10] 11102 11103v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 11104// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x30] 11105 11106v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 11107// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0xf0] 11108 11109v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 11110// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0xf0] 11111 11112v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 11113// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x01] 11114 11115v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 11116// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x03] 11117 11118v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 11119// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x0f] 11120 11121v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 11122// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x0f] 11123 11124v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 11125// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x08,0x00] 11126 11127v_mac_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11128// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x10,0x00] 11129 11130v_mac_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11131// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x20,0x00] 11132 11133v_mac_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11134// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x40,0x00] 11135 11136v_mac_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11137// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x80,0x00] 11138 11139v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11140// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x06] 11141 11142v_add_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11143// CHECK: [0xf9,0x04,0xfe,0x4d,0x01,0x06,0x06,0x06] 11144 11145v_add_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11146// CHECK: [0xf9,0x04,0x0a,0x4c,0xff,0x06,0x06,0x06] 11147 11148v_add_u16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11149// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x86,0x06] 11150 11151v_add_u16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11152// CHECK: [0xf9,0x04,0x0a,0x4c,0x65,0x06,0x86,0x06] 11153 11154v_add_u16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11155// CHECK: [0xf9,0x04,0x0a,0x4c,0x66,0x06,0x86,0x06] 11156 11157v_add_u16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11158// CHECK: [0xf9,0x04,0x0a,0x4c,0x67,0x06,0x86,0x06] 11159 11160v_add_u16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11161// CHECK: [0xf9,0x04,0x0a,0x4c,0x6a,0x06,0x86,0x06] 11162 11163v_add_u16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11164// CHECK: [0xf9,0x04,0x0a,0x4c,0x6b,0x06,0x86,0x06] 11165 11166v_add_u16_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11167// CHECK: [0xf9,0x04,0x0a,0x4c,0x7b,0x06,0x86,0x06] 11168 11169v_add_u16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11170// CHECK: [0xf9,0x04,0x0a,0x4c,0x7c,0x06,0x86,0x06] 11171 11172v_add_u16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11173// CHECK: [0xf9,0x04,0x0a,0x4c,0x7e,0x06,0x86,0x06] 11174 11175v_add_u16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11176// CHECK: [0xf9,0x04,0x0a,0x4c,0x7f,0x06,0x86,0x06] 11177 11178v_add_u16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11179// CHECK: [0xf9,0x04,0x0a,0x4c,0x80,0x06,0x86,0x06] 11180 11181v_add_u16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11182// CHECK: [0xf9,0x04,0x0a,0x4c,0xc1,0x06,0x86,0x06] 11183 11184v_add_u16_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11185// CHECK: [0xf9,0x04,0x0a,0x4c,0xfb,0x06,0x86,0x06] 11186 11187v_add_u16_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11188// CHECK: [0xf9,0x04,0x0a,0x4c,0xfc,0x06,0x86,0x06] 11189 11190v_add_u16_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11191// CHECK: [0xf9,0x04,0x0a,0x4c,0xfd,0x06,0x86,0x06] 11192 11193v_add_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11194// CHECK: [0xf9,0xfe,0x0b,0x4c,0x01,0x06,0x06,0x06] 11195 11196v_add_u16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11197// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x26,0x06,0x06] 11198 11199v_add_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11200// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x06] 11201 11202v_add_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11203// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x00,0x06,0x06] 11204 11205v_add_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11206// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x01,0x06,0x06] 11207 11208v_add_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11209// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x02,0x06,0x06] 11210 11211v_add_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11212// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x03,0x06,0x06] 11213 11214v_add_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11215// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x04,0x06,0x06] 11216 11217v_add_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11218// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x05,0x06,0x06] 11219 11220v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 11221// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x0e,0x06,0x06] 11222 11223v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 11224// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x16,0x06,0x06] 11225 11226v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 11227// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x16,0x06,0x06] 11228 11229v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 11230// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x06] 11231 11232v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 11233// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x00,0x06] 11234 11235v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 11236// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x01,0x06] 11237 11238v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 11239// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x02,0x06] 11240 11241v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 11242// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x03,0x06] 11243 11244v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 11245// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x04,0x06] 11246 11247v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 11248// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x05,0x06] 11249 11250v_add_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11251// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x0e,0x06] 11252 11253v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 11254// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x06] 11255 11256v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 11257// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x00] 11258 11259v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 11260// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x01] 11261 11262v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 11263// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x02] 11264 11265v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 11266// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x03] 11267 11268v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 11269// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x04] 11270 11271v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 11272// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x05] 11273 11274v_add_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11275// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x0e] 11276 11277v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11278// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x00] 11279 11280v_add_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11281// CHECK: [0xfa,0x04,0xfe,0x4d,0x01,0xe4,0x00,0x00] 11282 11283v_add_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11284// CHECK: [0xfa,0x04,0x0a,0x4c,0xff,0xe4,0x00,0x00] 11285 11286v_add_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11287// CHECK: [0xfa,0xfe,0x0b,0x4c,0x01,0xe4,0x00,0x00] 11288 11289v_add_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 11290// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x1b,0x00,0x00] 11291 11292v_add_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 11293// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x40,0x01,0x00] 11294 11295v_add_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 11296// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x41,0x01,0x00] 11297 11298v_add_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 11299// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x42,0x01,0x00] 11300 11301v_add_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 11302// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x43,0x01,0x00] 11303 11304v_add_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 11305// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x30,0x01,0x00] 11306 11307v_add_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 11308// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x34,0x01,0x00] 11309 11310v_add_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 11311// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x38,0x01,0x00] 11312 11313v_add_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 11314// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x3c,0x01,0x00] 11315 11316v_add_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 11317// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x01,0x01,0x00] 11318 11319v_add_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 11320// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x0f,0x01,0x00] 11321 11322v_add_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 11323// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x11,0x01,0x00] 11324 11325v_add_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 11326// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x1f,0x01,0x00] 11327 11328v_add_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 11329// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x21,0x01,0x00] 11330 11331v_add_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 11332// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x2f,0x01,0x00] 11333 11334v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 11335// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x10] 11336 11337v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 11338// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x30] 11339 11340v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 11341// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0xf0] 11342 11343v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 11344// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0xf0] 11345 11346v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 11347// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x01] 11348 11349v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 11350// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x03] 11351 11352v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 11353// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x0f] 11354 11355v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 11356// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x0f] 11357 11358v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 11359// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x08,0x00] 11360 11361v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11362// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x06] 11363 11364v_sub_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11365// CHECK: [0xf9,0x04,0xfe,0x4f,0x01,0x06,0x06,0x06] 11366 11367v_sub_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11368// CHECK: [0xf9,0x04,0x0a,0x4e,0xff,0x06,0x06,0x06] 11369 11370v_sub_u16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11371// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x86,0x06] 11372 11373v_sub_u16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11374// CHECK: [0xf9,0x04,0x0a,0x4e,0x65,0x06,0x86,0x06] 11375 11376v_sub_u16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11377// CHECK: [0xf9,0x04,0x0a,0x4e,0x66,0x06,0x86,0x06] 11378 11379v_sub_u16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11380// CHECK: [0xf9,0x04,0x0a,0x4e,0x67,0x06,0x86,0x06] 11381 11382v_sub_u16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11383// CHECK: [0xf9,0x04,0x0a,0x4e,0x6a,0x06,0x86,0x06] 11384 11385v_sub_u16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11386// CHECK: [0xf9,0x04,0x0a,0x4e,0x6b,0x06,0x86,0x06] 11387 11388v_sub_u16_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11389// CHECK: [0xf9,0x04,0x0a,0x4e,0x7b,0x06,0x86,0x06] 11390 11391v_sub_u16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11392// CHECK: [0xf9,0x04,0x0a,0x4e,0x7c,0x06,0x86,0x06] 11393 11394v_sub_u16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11395// CHECK: [0xf9,0x04,0x0a,0x4e,0x7e,0x06,0x86,0x06] 11396 11397v_sub_u16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11398// CHECK: [0xf9,0x04,0x0a,0x4e,0x7f,0x06,0x86,0x06] 11399 11400v_sub_u16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11401// CHECK: [0xf9,0x04,0x0a,0x4e,0x80,0x06,0x86,0x06] 11402 11403v_sub_u16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11404// CHECK: [0xf9,0x04,0x0a,0x4e,0xc1,0x06,0x86,0x06] 11405 11406v_sub_u16_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11407// CHECK: [0xf9,0x04,0x0a,0x4e,0xfb,0x06,0x86,0x06] 11408 11409v_sub_u16_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11410// CHECK: [0xf9,0x04,0x0a,0x4e,0xfc,0x06,0x86,0x06] 11411 11412v_sub_u16_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11413// CHECK: [0xf9,0x04,0x0a,0x4e,0xfd,0x06,0x86,0x06] 11414 11415v_sub_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11416// CHECK: [0xf9,0xfe,0x0b,0x4e,0x01,0x06,0x06,0x06] 11417 11418v_sub_u16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11419// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x26,0x06,0x06] 11420 11421v_sub_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11422// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x06] 11423 11424v_sub_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11425// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x00,0x06,0x06] 11426 11427v_sub_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11428// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x01,0x06,0x06] 11429 11430v_sub_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11431// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x02,0x06,0x06] 11432 11433v_sub_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11434// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x03,0x06,0x06] 11435 11436v_sub_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11437// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x04,0x06,0x06] 11438 11439v_sub_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11440// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x05,0x06,0x06] 11441 11442v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 11443// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x0e,0x06,0x06] 11444 11445v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 11446// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x16,0x06,0x06] 11447 11448v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 11449// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x16,0x06,0x06] 11450 11451v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 11452// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x06] 11453 11454v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 11455// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x00,0x06] 11456 11457v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 11458// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x01,0x06] 11459 11460v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 11461// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x02,0x06] 11462 11463v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 11464// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x03,0x06] 11465 11466v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 11467// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x04,0x06] 11468 11469v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 11470// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x05,0x06] 11471 11472v_sub_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11473// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x0e,0x06] 11474 11475v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 11476// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x06] 11477 11478v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 11479// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x00] 11480 11481v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 11482// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x01] 11483 11484v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 11485// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x02] 11486 11487v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 11488// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x03] 11489 11490v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 11491// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x04] 11492 11493v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 11494// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x05] 11495 11496v_sub_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11497// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x0e] 11498 11499v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11500// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x00] 11501 11502v_sub_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11503// CHECK: [0xfa,0x04,0xfe,0x4f,0x01,0xe4,0x00,0x00] 11504 11505v_sub_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11506// CHECK: [0xfa,0x04,0x0a,0x4e,0xff,0xe4,0x00,0x00] 11507 11508v_sub_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11509// CHECK: [0xfa,0xfe,0x0b,0x4e,0x01,0xe4,0x00,0x00] 11510 11511v_sub_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 11512// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x1b,0x00,0x00] 11513 11514v_sub_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 11515// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x40,0x01,0x00] 11516 11517v_sub_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 11518// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x41,0x01,0x00] 11519 11520v_sub_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 11521// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x42,0x01,0x00] 11522 11523v_sub_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 11524// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x43,0x01,0x00] 11525 11526v_sub_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 11527// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x30,0x01,0x00] 11528 11529v_sub_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 11530// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x34,0x01,0x00] 11531 11532v_sub_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 11533// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x38,0x01,0x00] 11534 11535v_sub_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 11536// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x3c,0x01,0x00] 11537 11538v_sub_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 11539// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x01,0x01,0x00] 11540 11541v_sub_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 11542// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x0f,0x01,0x00] 11543 11544v_sub_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 11545// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x11,0x01,0x00] 11546 11547v_sub_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 11548// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x1f,0x01,0x00] 11549 11550v_sub_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 11551// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x21,0x01,0x00] 11552 11553v_sub_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 11554// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x2f,0x01,0x00] 11555 11556v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 11557// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x10] 11558 11559v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 11560// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x30] 11561 11562v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 11563// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0xf0] 11564 11565v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 11566// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0xf0] 11567 11568v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 11569// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x01] 11570 11571v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 11572// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x03] 11573 11574v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 11575// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x0f] 11576 11577v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 11578// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x0f] 11579 11580v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 11581// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x08,0x00] 11582 11583v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11584// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x06] 11585 11586v_subrev_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11587// CHECK: [0xf9,0x04,0xfe,0x51,0x01,0x06,0x06,0x06] 11588 11589v_subrev_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11590// CHECK: [0xf9,0x04,0x0a,0x50,0xff,0x06,0x06,0x06] 11591 11592v_subrev_u16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11593// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x86,0x06] 11594 11595v_subrev_u16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11596// CHECK: [0xf9,0x04,0x0a,0x50,0x65,0x06,0x86,0x06] 11597 11598v_subrev_u16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11599// CHECK: [0xf9,0x04,0x0a,0x50,0x66,0x06,0x86,0x06] 11600 11601v_subrev_u16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11602// CHECK: [0xf9,0x04,0x0a,0x50,0x67,0x06,0x86,0x06] 11603 11604v_subrev_u16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11605// CHECK: [0xf9,0x04,0x0a,0x50,0x6a,0x06,0x86,0x06] 11606 11607v_subrev_u16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11608// CHECK: [0xf9,0x04,0x0a,0x50,0x6b,0x06,0x86,0x06] 11609 11610v_subrev_u16_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11611// CHECK: [0xf9,0x04,0x0a,0x50,0x7b,0x06,0x86,0x06] 11612 11613v_subrev_u16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11614// CHECK: [0xf9,0x04,0x0a,0x50,0x7c,0x06,0x86,0x06] 11615 11616v_subrev_u16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11617// CHECK: [0xf9,0x04,0x0a,0x50,0x7e,0x06,0x86,0x06] 11618 11619v_subrev_u16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11620// CHECK: [0xf9,0x04,0x0a,0x50,0x7f,0x06,0x86,0x06] 11621 11622v_subrev_u16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11623// CHECK: [0xf9,0x04,0x0a,0x50,0x80,0x06,0x86,0x06] 11624 11625v_subrev_u16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11626// CHECK: [0xf9,0x04,0x0a,0x50,0xc1,0x06,0x86,0x06] 11627 11628v_subrev_u16_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11629// CHECK: [0xf9,0x04,0x0a,0x50,0xfb,0x06,0x86,0x06] 11630 11631v_subrev_u16_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11632// CHECK: [0xf9,0x04,0x0a,0x50,0xfc,0x06,0x86,0x06] 11633 11634v_subrev_u16_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11635// CHECK: [0xf9,0x04,0x0a,0x50,0xfd,0x06,0x86,0x06] 11636 11637v_subrev_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11638// CHECK: [0xf9,0xfe,0x0b,0x50,0x01,0x06,0x06,0x06] 11639 11640v_subrev_u16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11641// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x26,0x06,0x06] 11642 11643v_subrev_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11644// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x06] 11645 11646v_subrev_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11647// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x00,0x06,0x06] 11648 11649v_subrev_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11650// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x01,0x06,0x06] 11651 11652v_subrev_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11653// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x02,0x06,0x06] 11654 11655v_subrev_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11656// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x03,0x06,0x06] 11657 11658v_subrev_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11659// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x04,0x06,0x06] 11660 11661v_subrev_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11662// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x05,0x06,0x06] 11663 11664v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 11665// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x0e,0x06,0x06] 11666 11667v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 11668// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x16,0x06,0x06] 11669 11670v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 11671// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x16,0x06,0x06] 11672 11673v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 11674// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x06] 11675 11676v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 11677// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x00,0x06] 11678 11679v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 11680// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x01,0x06] 11681 11682v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 11683// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x02,0x06] 11684 11685v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 11686// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x03,0x06] 11687 11688v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 11689// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x04,0x06] 11690 11691v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 11692// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x05,0x06] 11693 11694v_subrev_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11695// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x0e,0x06] 11696 11697v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 11698// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x06] 11699 11700v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 11701// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x00] 11702 11703v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 11704// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x01] 11705 11706v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 11707// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x02] 11708 11709v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 11710// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x03] 11711 11712v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 11713// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x04] 11714 11715v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 11716// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x05] 11717 11718v_subrev_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11719// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x0e] 11720 11721v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11722// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x00] 11723 11724v_subrev_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11725// CHECK: [0xfa,0x04,0xfe,0x51,0x01,0xe4,0x00,0x00] 11726 11727v_subrev_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11728// CHECK: [0xfa,0x04,0x0a,0x50,0xff,0xe4,0x00,0x00] 11729 11730v_subrev_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11731// CHECK: [0xfa,0xfe,0x0b,0x50,0x01,0xe4,0x00,0x00] 11732 11733v_subrev_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 11734// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x1b,0x00,0x00] 11735 11736v_subrev_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 11737// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x40,0x01,0x00] 11738 11739v_subrev_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 11740// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x41,0x01,0x00] 11741 11742v_subrev_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 11743// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x42,0x01,0x00] 11744 11745v_subrev_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 11746// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x43,0x01,0x00] 11747 11748v_subrev_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 11749// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x30,0x01,0x00] 11750 11751v_subrev_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 11752// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x34,0x01,0x00] 11753 11754v_subrev_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 11755// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x38,0x01,0x00] 11756 11757v_subrev_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 11758// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x3c,0x01,0x00] 11759 11760v_subrev_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 11761// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x01,0x01,0x00] 11762 11763v_subrev_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 11764// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x0f,0x01,0x00] 11765 11766v_subrev_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 11767// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x11,0x01,0x00] 11768 11769v_subrev_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 11770// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x1f,0x01,0x00] 11771 11772v_subrev_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 11773// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x21,0x01,0x00] 11774 11775v_subrev_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 11776// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x2f,0x01,0x00] 11777 11778v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 11779// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x10] 11780 11781v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 11782// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x30] 11783 11784v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 11785// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0xf0] 11786 11787v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 11788// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0xf0] 11789 11790v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 11791// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x01] 11792 11793v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 11794// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x03] 11795 11796v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 11797// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x0f] 11798 11799v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 11800// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x0f] 11801 11802v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 11803// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x08,0x00] 11804 11805v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11806// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x06] 11807 11808v_mul_lo_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11809// CHECK: [0xf9,0x04,0xfe,0x53,0x01,0x06,0x06,0x06] 11810 11811v_mul_lo_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11812// CHECK: [0xf9,0x04,0x0a,0x52,0xff,0x06,0x06,0x06] 11813 11814v_mul_lo_u16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11815// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x86,0x06] 11816 11817v_mul_lo_u16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11818// CHECK: [0xf9,0x04,0x0a,0x52,0x65,0x06,0x86,0x06] 11819 11820v_mul_lo_u16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11821// CHECK: [0xf9,0x04,0x0a,0x52,0x66,0x06,0x86,0x06] 11822 11823v_mul_lo_u16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11824// CHECK: [0xf9,0x04,0x0a,0x52,0x67,0x06,0x86,0x06] 11825 11826v_mul_lo_u16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11827// CHECK: [0xf9,0x04,0x0a,0x52,0x6a,0x06,0x86,0x06] 11828 11829v_mul_lo_u16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11830// CHECK: [0xf9,0x04,0x0a,0x52,0x6b,0x06,0x86,0x06] 11831 11832v_mul_lo_u16_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11833// CHECK: [0xf9,0x04,0x0a,0x52,0x7b,0x06,0x86,0x06] 11834 11835v_mul_lo_u16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11836// CHECK: [0xf9,0x04,0x0a,0x52,0x7c,0x06,0x86,0x06] 11837 11838v_mul_lo_u16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11839// CHECK: [0xf9,0x04,0x0a,0x52,0x7e,0x06,0x86,0x06] 11840 11841v_mul_lo_u16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11842// CHECK: [0xf9,0x04,0x0a,0x52,0x7f,0x06,0x86,0x06] 11843 11844v_mul_lo_u16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11845// CHECK: [0xf9,0x04,0x0a,0x52,0x80,0x06,0x86,0x06] 11846 11847v_mul_lo_u16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11848// CHECK: [0xf9,0x04,0x0a,0x52,0xc1,0x06,0x86,0x06] 11849 11850v_mul_lo_u16_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11851// CHECK: [0xf9,0x04,0x0a,0x52,0xfb,0x06,0x86,0x06] 11852 11853v_mul_lo_u16_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11854// CHECK: [0xf9,0x04,0x0a,0x52,0xfc,0x06,0x86,0x06] 11855 11856v_mul_lo_u16_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11857// CHECK: [0xf9,0x04,0x0a,0x52,0xfd,0x06,0x86,0x06] 11858 11859v_mul_lo_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11860// CHECK: [0xf9,0xfe,0x0b,0x52,0x01,0x06,0x06,0x06] 11861 11862v_mul_lo_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11863// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x06] 11864 11865v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11866// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x00,0x06,0x06] 11867 11868v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11869// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x01,0x06,0x06] 11870 11871v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11872// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x02,0x06,0x06] 11873 11874v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11875// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x03,0x06,0x06] 11876 11877v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11878// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x04,0x06,0x06] 11879 11880v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11881// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x05,0x06,0x06] 11882 11883v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 11884// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x0e,0x06,0x06] 11885 11886v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 11887// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x16,0x06,0x06] 11888 11889v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 11890// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x16,0x06,0x06] 11891 11892v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 11893// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x06] 11894 11895v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 11896// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x00,0x06] 11897 11898v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 11899// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x01,0x06] 11900 11901v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 11902// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x02,0x06] 11903 11904v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 11905// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x03,0x06] 11906 11907v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 11908// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x04,0x06] 11909 11910v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 11911// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x05,0x06] 11912 11913v_mul_lo_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11914// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x0e,0x06] 11915 11916v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 11917// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x06] 11918 11919v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 11920// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x00] 11921 11922v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 11923// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x01] 11924 11925v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 11926// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x02] 11927 11928v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 11929// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x03] 11930 11931v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 11932// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x04] 11933 11934v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 11935// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x05] 11936 11937v_mul_lo_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 11938// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x0e] 11939 11940v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11941// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x00] 11942 11943v_mul_lo_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11944// CHECK: [0xfa,0x04,0xfe,0x53,0x01,0xe4,0x00,0x00] 11945 11946v_mul_lo_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11947// CHECK: [0xfa,0x04,0x0a,0x52,0xff,0xe4,0x00,0x00] 11948 11949v_mul_lo_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 11950// CHECK: [0xfa,0xfe,0x0b,0x52,0x01,0xe4,0x00,0x00] 11951 11952v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 11953// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x1b,0x00,0x00] 11954 11955v_mul_lo_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 11956// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x40,0x01,0x00] 11957 11958v_mul_lo_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 11959// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x41,0x01,0x00] 11960 11961v_mul_lo_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 11962// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x42,0x01,0x00] 11963 11964v_mul_lo_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 11965// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x43,0x01,0x00] 11966 11967v_mul_lo_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 11968// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x30,0x01,0x00] 11969 11970v_mul_lo_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 11971// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x34,0x01,0x00] 11972 11973v_mul_lo_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 11974// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x38,0x01,0x00] 11975 11976v_mul_lo_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 11977// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x3c,0x01,0x00] 11978 11979v_mul_lo_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 11980// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x01,0x01,0x00] 11981 11982v_mul_lo_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 11983// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x0f,0x01,0x00] 11984 11985v_mul_lo_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 11986// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x11,0x01,0x00] 11987 11988v_mul_lo_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 11989// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x1f,0x01,0x00] 11990 11991v_mul_lo_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 11992// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x21,0x01,0x00] 11993 11994v_mul_lo_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 11995// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x2f,0x01,0x00] 11996 11997v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 11998// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x10] 11999 12000v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 12001// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x30] 12002 12003v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 12004// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0xf0] 12005 12006v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 12007// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0xf0] 12008 12009v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 12010// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x01] 12011 12012v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 12013// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x03] 12014 12015v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 12016// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x0f] 12017 12018v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 12019// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x0f] 12020 12021v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 12022// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x08,0x00] 12023 12024v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12025// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x06] 12026 12027v_lshlrev_b16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12028// CHECK: [0xf9,0x04,0xfe,0x55,0x01,0x06,0x06,0x06] 12029 12030v_lshlrev_b16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12031// CHECK: [0xf9,0x04,0x0a,0x54,0xff,0x06,0x06,0x06] 12032 12033v_lshlrev_b16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12034// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x86,0x06] 12035 12036v_lshlrev_b16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12037// CHECK: [0xf9,0x04,0x0a,0x54,0x65,0x06,0x86,0x06] 12038 12039v_lshlrev_b16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12040// CHECK: [0xf9,0x04,0x0a,0x54,0x66,0x06,0x86,0x06] 12041 12042v_lshlrev_b16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12043// CHECK: [0xf9,0x04,0x0a,0x54,0x67,0x06,0x86,0x06] 12044 12045v_lshlrev_b16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12046// CHECK: [0xf9,0x04,0x0a,0x54,0x6a,0x06,0x86,0x06] 12047 12048v_lshlrev_b16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12049// CHECK: [0xf9,0x04,0x0a,0x54,0x6b,0x06,0x86,0x06] 12050 12051v_lshlrev_b16_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12052// CHECK: [0xf9,0x04,0x0a,0x54,0x7b,0x06,0x86,0x06] 12053 12054v_lshlrev_b16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12055// CHECK: [0xf9,0x04,0x0a,0x54,0x7c,0x06,0x86,0x06] 12056 12057v_lshlrev_b16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12058// CHECK: [0xf9,0x04,0x0a,0x54,0x7e,0x06,0x86,0x06] 12059 12060v_lshlrev_b16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12061// CHECK: [0xf9,0x04,0x0a,0x54,0x7f,0x06,0x86,0x06] 12062 12063v_lshlrev_b16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12064// CHECK: [0xf9,0x04,0x0a,0x54,0x80,0x06,0x86,0x06] 12065 12066v_lshlrev_b16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12067// CHECK: [0xf9,0x04,0x0a,0x54,0xc1,0x06,0x86,0x06] 12068 12069v_lshlrev_b16_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12070// CHECK: [0xf9,0x04,0x0a,0x54,0xfb,0x06,0x86,0x06] 12071 12072v_lshlrev_b16_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12073// CHECK: [0xf9,0x04,0x0a,0x54,0xfc,0x06,0x86,0x06] 12074 12075v_lshlrev_b16_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12076// CHECK: [0xf9,0x04,0x0a,0x54,0xfd,0x06,0x86,0x06] 12077 12078v_lshlrev_b16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12079// CHECK: [0xf9,0xfe,0x0b,0x54,0x01,0x06,0x06,0x06] 12080 12081v_lshlrev_b16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12082// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x06] 12083 12084v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12085// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x00,0x06,0x06] 12086 12087v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12088// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x01,0x06,0x06] 12089 12090v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12091// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x02,0x06,0x06] 12092 12093v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12094// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x03,0x06,0x06] 12095 12096v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12097// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x04,0x06,0x06] 12098 12099v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12100// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x05,0x06,0x06] 12101 12102v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 12103// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x0e,0x06,0x06] 12104 12105v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 12106// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x16,0x06,0x06] 12107 12108v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 12109// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x16,0x06,0x06] 12110 12111v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 12112// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x06] 12113 12114v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 12115// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x00,0x06] 12116 12117v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 12118// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x01,0x06] 12119 12120v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 12121// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x02,0x06] 12122 12123v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 12124// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x03,0x06] 12125 12126v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 12127// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x04,0x06] 12128 12129v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 12130// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x05,0x06] 12131 12132v_lshlrev_b16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12133// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x0e,0x06] 12134 12135v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 12136// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x06] 12137 12138v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 12139// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x00] 12140 12141v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 12142// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x01] 12143 12144v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 12145// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x02] 12146 12147v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 12148// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x03] 12149 12150v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 12151// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x04] 12152 12153v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 12154// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x05] 12155 12156v_lshlrev_b16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12157// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x0e] 12158 12159v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 12160// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x00] 12161 12162v_lshlrev_b16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 12163// CHECK: [0xfa,0x04,0xfe,0x55,0x01,0xe4,0x00,0x00] 12164 12165v_lshlrev_b16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 12166// CHECK: [0xfa,0x04,0x0a,0x54,0xff,0xe4,0x00,0x00] 12167 12168v_lshlrev_b16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 12169// CHECK: [0xfa,0xfe,0x0b,0x54,0x01,0xe4,0x00,0x00] 12170 12171v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 12172// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x1b,0x00,0x00] 12173 12174v_lshlrev_b16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 12175// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x40,0x01,0x00] 12176 12177v_lshlrev_b16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 12178// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x41,0x01,0x00] 12179 12180v_lshlrev_b16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 12181// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x42,0x01,0x00] 12182 12183v_lshlrev_b16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 12184// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x43,0x01,0x00] 12185 12186v_lshlrev_b16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 12187// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x30,0x01,0x00] 12188 12189v_lshlrev_b16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 12190// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x34,0x01,0x00] 12191 12192v_lshlrev_b16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 12193// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x38,0x01,0x00] 12194 12195v_lshlrev_b16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 12196// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x3c,0x01,0x00] 12197 12198v_lshlrev_b16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 12199// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x01,0x01,0x00] 12200 12201v_lshlrev_b16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 12202// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x0f,0x01,0x00] 12203 12204v_lshlrev_b16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 12205// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x11,0x01,0x00] 12206 12207v_lshlrev_b16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 12208// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x1f,0x01,0x00] 12209 12210v_lshlrev_b16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 12211// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x21,0x01,0x00] 12212 12213v_lshlrev_b16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 12214// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x2f,0x01,0x00] 12215 12216v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 12217// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x10] 12218 12219v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 12220// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x30] 12221 12222v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 12223// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0xf0] 12224 12225v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 12226// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0xf0] 12227 12228v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 12229// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x01] 12230 12231v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 12232// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x03] 12233 12234v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 12235// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x0f] 12236 12237v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 12238// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x0f] 12239 12240v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 12241// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x08,0x00] 12242 12243v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12244// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x06] 12245 12246v_lshrrev_b16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12247// CHECK: [0xf9,0x04,0xfe,0x57,0x01,0x06,0x06,0x06] 12248 12249v_lshrrev_b16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12250// CHECK: [0xf9,0x04,0x0a,0x56,0xff,0x06,0x06,0x06] 12251 12252v_lshrrev_b16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12253// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x86,0x06] 12254 12255v_lshrrev_b16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12256// CHECK: [0xf9,0x04,0x0a,0x56,0x65,0x06,0x86,0x06] 12257 12258v_lshrrev_b16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12259// CHECK: [0xf9,0x04,0x0a,0x56,0x66,0x06,0x86,0x06] 12260 12261v_lshrrev_b16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12262// CHECK: [0xf9,0x04,0x0a,0x56,0x67,0x06,0x86,0x06] 12263 12264v_lshrrev_b16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12265// CHECK: [0xf9,0x04,0x0a,0x56,0x6a,0x06,0x86,0x06] 12266 12267v_lshrrev_b16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12268// CHECK: [0xf9,0x04,0x0a,0x56,0x6b,0x06,0x86,0x06] 12269 12270v_lshrrev_b16_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12271// CHECK: [0xf9,0x04,0x0a,0x56,0x7b,0x06,0x86,0x06] 12272 12273v_lshrrev_b16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12274// CHECK: [0xf9,0x04,0x0a,0x56,0x7c,0x06,0x86,0x06] 12275 12276v_lshrrev_b16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12277// CHECK: [0xf9,0x04,0x0a,0x56,0x7e,0x06,0x86,0x06] 12278 12279v_lshrrev_b16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12280// CHECK: [0xf9,0x04,0x0a,0x56,0x7f,0x06,0x86,0x06] 12281 12282v_lshrrev_b16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12283// CHECK: [0xf9,0x04,0x0a,0x56,0x80,0x06,0x86,0x06] 12284 12285v_lshrrev_b16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12286// CHECK: [0xf9,0x04,0x0a,0x56,0xc1,0x06,0x86,0x06] 12287 12288v_lshrrev_b16_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12289// CHECK: [0xf9,0x04,0x0a,0x56,0xfb,0x06,0x86,0x06] 12290 12291v_lshrrev_b16_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12292// CHECK: [0xf9,0x04,0x0a,0x56,0xfc,0x06,0x86,0x06] 12293 12294v_lshrrev_b16_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12295// CHECK: [0xf9,0x04,0x0a,0x56,0xfd,0x06,0x86,0x06] 12296 12297v_lshrrev_b16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12298// CHECK: [0xf9,0xfe,0x0b,0x56,0x01,0x06,0x06,0x06] 12299 12300v_lshrrev_b16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12301// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x06] 12302 12303v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12304// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x00,0x06,0x06] 12305 12306v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12307// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x01,0x06,0x06] 12308 12309v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12310// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x02,0x06,0x06] 12311 12312v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12313// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x03,0x06,0x06] 12314 12315v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12316// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x04,0x06,0x06] 12317 12318v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12319// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x05,0x06,0x06] 12320 12321v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 12322// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x0e,0x06,0x06] 12323 12324v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 12325// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x16,0x06,0x06] 12326 12327v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 12328// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x16,0x06,0x06] 12329 12330v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 12331// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x06] 12332 12333v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 12334// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x00,0x06] 12335 12336v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 12337// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x01,0x06] 12338 12339v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 12340// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x02,0x06] 12341 12342v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 12343// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x03,0x06] 12344 12345v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 12346// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x04,0x06] 12347 12348v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 12349// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x05,0x06] 12350 12351v_lshrrev_b16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12352// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x0e,0x06] 12353 12354v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 12355// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x06] 12356 12357v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 12358// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x00] 12359 12360v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 12361// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x01] 12362 12363v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 12364// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x02] 12365 12366v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 12367// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x03] 12368 12369v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 12370// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x04] 12371 12372v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 12373// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x05] 12374 12375v_lshrrev_b16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12376// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x0e] 12377 12378v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 12379// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x00] 12380 12381v_lshrrev_b16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 12382// CHECK: [0xfa,0x04,0xfe,0x57,0x01,0xe4,0x00,0x00] 12383 12384v_lshrrev_b16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 12385// CHECK: [0xfa,0x04,0x0a,0x56,0xff,0xe4,0x00,0x00] 12386 12387v_lshrrev_b16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 12388// CHECK: [0xfa,0xfe,0x0b,0x56,0x01,0xe4,0x00,0x00] 12389 12390v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 12391// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x1b,0x00,0x00] 12392 12393v_lshrrev_b16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 12394// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x40,0x01,0x00] 12395 12396v_lshrrev_b16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 12397// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x41,0x01,0x00] 12398 12399v_lshrrev_b16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 12400// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x42,0x01,0x00] 12401 12402v_lshrrev_b16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 12403// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x43,0x01,0x00] 12404 12405v_lshrrev_b16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 12406// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x30,0x01,0x00] 12407 12408v_lshrrev_b16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 12409// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x34,0x01,0x00] 12410 12411v_lshrrev_b16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 12412// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x38,0x01,0x00] 12413 12414v_lshrrev_b16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 12415// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x3c,0x01,0x00] 12416 12417v_lshrrev_b16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 12418// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x01,0x01,0x00] 12419 12420v_lshrrev_b16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 12421// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x0f,0x01,0x00] 12422 12423v_lshrrev_b16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 12424// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x11,0x01,0x00] 12425 12426v_lshrrev_b16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 12427// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x1f,0x01,0x00] 12428 12429v_lshrrev_b16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 12430// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x21,0x01,0x00] 12431 12432v_lshrrev_b16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 12433// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x2f,0x01,0x00] 12434 12435v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 12436// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x10] 12437 12438v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 12439// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x30] 12440 12441v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 12442// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0xf0] 12443 12444v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 12445// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0xf0] 12446 12447v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 12448// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x01] 12449 12450v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 12451// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x03] 12452 12453v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 12454// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x0f] 12455 12456v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 12457// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x0f] 12458 12459v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 12460// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x08,0x00] 12461 12462v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12463// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x06] 12464 12465v_ashrrev_i16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12466// CHECK: [0xf9,0x04,0xfe,0x59,0x01,0x06,0x06,0x06] 12467 12468v_ashrrev_i16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12469// CHECK: [0xf9,0x04,0x0a,0x58,0xff,0x06,0x06,0x06] 12470 12471v_ashrrev_i16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12472// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x86,0x06] 12473 12474v_ashrrev_i16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12475// CHECK: [0xf9,0x04,0x0a,0x58,0x65,0x06,0x86,0x06] 12476 12477v_ashrrev_i16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12478// CHECK: [0xf9,0x04,0x0a,0x58,0x66,0x06,0x86,0x06] 12479 12480v_ashrrev_i16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12481// CHECK: [0xf9,0x04,0x0a,0x58,0x67,0x06,0x86,0x06] 12482 12483v_ashrrev_i16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12484// CHECK: [0xf9,0x04,0x0a,0x58,0x6a,0x06,0x86,0x06] 12485 12486v_ashrrev_i16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12487// CHECK: [0xf9,0x04,0x0a,0x58,0x6b,0x06,0x86,0x06] 12488 12489v_ashrrev_i16_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12490// CHECK: [0xf9,0x04,0x0a,0x58,0x7b,0x06,0x86,0x06] 12491 12492v_ashrrev_i16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12493// CHECK: [0xf9,0x04,0x0a,0x58,0x7c,0x06,0x86,0x06] 12494 12495v_ashrrev_i16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12496// CHECK: [0xf9,0x04,0x0a,0x58,0x7e,0x06,0x86,0x06] 12497 12498v_ashrrev_i16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12499// CHECK: [0xf9,0x04,0x0a,0x58,0x7f,0x06,0x86,0x06] 12500 12501v_ashrrev_i16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12502// CHECK: [0xf9,0x04,0x0a,0x58,0x80,0x06,0x86,0x06] 12503 12504v_ashrrev_i16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12505// CHECK: [0xf9,0x04,0x0a,0x58,0xc1,0x06,0x86,0x06] 12506 12507v_ashrrev_i16_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12508// CHECK: [0xf9,0x04,0x0a,0x58,0xfb,0x06,0x86,0x06] 12509 12510v_ashrrev_i16_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12511// CHECK: [0xf9,0x04,0x0a,0x58,0xfc,0x06,0x86,0x06] 12512 12513v_ashrrev_i16_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12514// CHECK: [0xf9,0x04,0x0a,0x58,0xfd,0x06,0x86,0x06] 12515 12516v_ashrrev_i16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12517// CHECK: [0xf9,0xfe,0x0b,0x58,0x01,0x06,0x06,0x06] 12518 12519v_ashrrev_i16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12520// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x06] 12521 12522v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12523// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x00,0x06,0x06] 12524 12525v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12526// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x01,0x06,0x06] 12527 12528v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12529// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x02,0x06,0x06] 12530 12531v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12532// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x03,0x06,0x06] 12533 12534v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12535// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x04,0x06,0x06] 12536 12537v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12538// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x05,0x06,0x06] 12539 12540v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 12541// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x0e,0x06,0x06] 12542 12543v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 12544// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x16,0x06,0x06] 12545 12546v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 12547// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x16,0x06,0x06] 12548 12549v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 12550// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x06] 12551 12552v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 12553// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x00,0x06] 12554 12555v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 12556// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x01,0x06] 12557 12558v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 12559// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x02,0x06] 12560 12561v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 12562// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x03,0x06] 12563 12564v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 12565// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x04,0x06] 12566 12567v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 12568// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x05,0x06] 12569 12570v_ashrrev_i16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12571// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x0e,0x06] 12572 12573v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 12574// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x06] 12575 12576v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 12577// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x00] 12578 12579v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 12580// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x01] 12581 12582v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 12583// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x02] 12584 12585v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 12586// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x03] 12587 12588v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 12589// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x04] 12590 12591v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 12592// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x05] 12593 12594v_ashrrev_i16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12595// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x0e] 12596 12597v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 12598// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x00] 12599 12600v_ashrrev_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 12601// CHECK: [0xfa,0x04,0xfe,0x59,0x01,0xe4,0x00,0x00] 12602 12603v_ashrrev_i16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 12604// CHECK: [0xfa,0x04,0x0a,0x58,0xff,0xe4,0x00,0x00] 12605 12606v_ashrrev_i16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 12607// CHECK: [0xfa,0xfe,0x0b,0x58,0x01,0xe4,0x00,0x00] 12608 12609v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 12610// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x1b,0x00,0x00] 12611 12612v_ashrrev_i16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 12613// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x40,0x01,0x00] 12614 12615v_ashrrev_i16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 12616// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x41,0x01,0x00] 12617 12618v_ashrrev_i16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 12619// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x42,0x01,0x00] 12620 12621v_ashrrev_i16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 12622// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x43,0x01,0x00] 12623 12624v_ashrrev_i16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 12625// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x30,0x01,0x00] 12626 12627v_ashrrev_i16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 12628// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x34,0x01,0x00] 12629 12630v_ashrrev_i16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 12631// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x38,0x01,0x00] 12632 12633v_ashrrev_i16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 12634// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x3c,0x01,0x00] 12635 12636v_ashrrev_i16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 12637// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x01,0x01,0x00] 12638 12639v_ashrrev_i16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 12640// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x0f,0x01,0x00] 12641 12642v_ashrrev_i16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 12643// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x11,0x01,0x00] 12644 12645v_ashrrev_i16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 12646// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x1f,0x01,0x00] 12647 12648v_ashrrev_i16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 12649// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x21,0x01,0x00] 12650 12651v_ashrrev_i16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 12652// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x2f,0x01,0x00] 12653 12654v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 12655// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x10] 12656 12657v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 12658// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x30] 12659 12660v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 12661// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0xf0] 12662 12663v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 12664// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0xf0] 12665 12666v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 12667// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x01] 12668 12669v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 12670// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x03] 12671 12672v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 12673// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x0f] 12674 12675v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 12676// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x0f] 12677 12678v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 12679// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x08,0x00] 12680 12681v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12682// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x06] 12683 12684v_max_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12685// CHECK: [0xf9,0x04,0xfe,0x5b,0x01,0x06,0x06,0x06] 12686 12687v_max_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12688// CHECK: [0xf9,0x04,0x0a,0x5a,0xff,0x06,0x06,0x06] 12689 12690v_max_f16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12691// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x86,0x06] 12692 12693v_max_f16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12694// CHECK: [0xf9,0x04,0x0a,0x5a,0x65,0x06,0x86,0x06] 12695 12696v_max_f16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12697// CHECK: [0xf9,0x04,0x0a,0x5a,0x66,0x06,0x86,0x06] 12698 12699v_max_f16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12700// CHECK: [0xf9,0x04,0x0a,0x5a,0x67,0x06,0x86,0x06] 12701 12702v_max_f16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12703// CHECK: [0xf9,0x04,0x0a,0x5a,0x6a,0x06,0x86,0x06] 12704 12705v_max_f16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12706// CHECK: [0xf9,0x04,0x0a,0x5a,0x6b,0x06,0x86,0x06] 12707 12708v_max_f16_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12709// CHECK: [0xf9,0x04,0x0a,0x5a,0x7b,0x06,0x86,0x06] 12710 12711v_max_f16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12712// CHECK: [0xf9,0x04,0x0a,0x5a,0x7c,0x06,0x86,0x06] 12713 12714v_max_f16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12715// CHECK: [0xf9,0x04,0x0a,0x5a,0x7e,0x06,0x86,0x06] 12716 12717v_max_f16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12718// CHECK: [0xf9,0x04,0x0a,0x5a,0x7f,0x06,0x86,0x06] 12719 12720v_max_f16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12721// CHECK: [0xf9,0x04,0x0a,0x5a,0x80,0x06,0x86,0x06] 12722 12723v_max_f16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12724// CHECK: [0xf9,0x04,0x0a,0x5a,0xc1,0x06,0x86,0x06] 12725 12726v_max_f16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12727// CHECK: [0xf9,0x04,0x0a,0x5a,0xf0,0x06,0x86,0x06] 12728 12729v_max_f16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12730// CHECK: [0xf9,0x04,0x0a,0x5a,0xf7,0x06,0x86,0x06] 12731 12732v_max_f16_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12733// CHECK: [0xf9,0x04,0x0a,0x5a,0xfb,0x06,0x86,0x06] 12734 12735v_max_f16_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12736// CHECK: [0xf9,0x04,0x0a,0x5a,0xfc,0x06,0x86,0x06] 12737 12738v_max_f16_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12739// CHECK: [0xf9,0x04,0x0a,0x5a,0xfd,0x06,0x86,0x06] 12740 12741v_max_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12742// CHECK: [0xf9,0xfe,0x0b,0x5a,0x01,0x06,0x06,0x06] 12743 12744v_max_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12745// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x26,0x06,0x06] 12746 12747v_max_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12748// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x06] 12749 12750v_max_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12751// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x00,0x06,0x06] 12752 12753v_max_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12754// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x01,0x06,0x06] 12755 12756v_max_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12757// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x02,0x06,0x06] 12758 12759v_max_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12760// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x03,0x06,0x06] 12761 12762v_max_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12763// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x04,0x06,0x06] 12764 12765v_max_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12766// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x05,0x06,0x06] 12767 12768v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 12769// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x0e,0x06,0x06] 12770 12771v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 12772// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x16,0x06,0x06] 12773 12774v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 12775// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x16,0x06,0x06] 12776 12777v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 12778// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x06] 12779 12780v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 12781// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x00,0x06] 12782 12783v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 12784// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x01,0x06] 12785 12786v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 12787// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x02,0x06] 12788 12789v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 12790// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x03,0x06] 12791 12792v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 12793// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x04,0x06] 12794 12795v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 12796// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x05,0x06] 12797 12798v_max_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12799// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x16,0x06] 12800 12801v_max_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12802// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x26,0x06] 12803 12804v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 12805// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x06] 12806 12807v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 12808// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x00] 12809 12810v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 12811// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x01] 12812 12813v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 12814// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x02] 12815 12816v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 12817// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x03] 12818 12819v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 12820// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x04] 12821 12822v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 12823// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x05] 12824 12825v_max_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12826// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x16] 12827 12828v_max_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12829// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x26] 12830 12831v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 12832// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x00] 12833 12834v_max_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 12835// CHECK: [0xfa,0x04,0xfe,0x5b,0x01,0xe4,0x00,0x00] 12836 12837v_max_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 12838// CHECK: [0xfa,0x04,0x0a,0x5a,0xff,0xe4,0x00,0x00] 12839 12840v_max_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 12841// CHECK: [0xfa,0xfe,0x0b,0x5a,0x01,0xe4,0x00,0x00] 12842 12843v_max_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 12844// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x1b,0x00,0x00] 12845 12846v_max_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 12847// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x40,0x01,0x00] 12848 12849v_max_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 12850// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x41,0x01,0x00] 12851 12852v_max_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 12853// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x42,0x01,0x00] 12854 12855v_max_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 12856// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x43,0x01,0x00] 12857 12858v_max_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 12859// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x30,0x01,0x00] 12860 12861v_max_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 12862// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x34,0x01,0x00] 12863 12864v_max_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 12865// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x38,0x01,0x00] 12866 12867v_max_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 12868// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x3c,0x01,0x00] 12869 12870v_max_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 12871// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x01,0x01,0x00] 12872 12873v_max_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 12874// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x0f,0x01,0x00] 12875 12876v_max_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 12877// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x11,0x01,0x00] 12878 12879v_max_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 12880// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x1f,0x01,0x00] 12881 12882v_max_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 12883// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x21,0x01,0x00] 12884 12885v_max_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 12886// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x2f,0x01,0x00] 12887 12888v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 12889// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x10] 12890 12891v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 12892// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x30] 12893 12894v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 12895// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0xf0] 12896 12897v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 12898// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0xf0] 12899 12900v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 12901// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x01] 12902 12903v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 12904// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x03] 12905 12906v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 12907// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x0f] 12908 12909v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 12910// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x0f] 12911 12912v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 12913// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x08,0x00] 12914 12915v_max_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 12916// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x10,0x00] 12917 12918v_max_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 12919// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x20,0x00] 12920 12921v_max_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 12922// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x40,0x00] 12923 12924v_max_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 12925// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x80,0x00] 12926 12927v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12928// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x06] 12929 12930v_min_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12931// CHECK: [0xf9,0x04,0xfe,0x5d,0x01,0x06,0x06,0x06] 12932 12933v_min_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12934// CHECK: [0xf9,0x04,0x0a,0x5c,0xff,0x06,0x06,0x06] 12935 12936v_min_f16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12937// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x86,0x06] 12938 12939v_min_f16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12940// CHECK: [0xf9,0x04,0x0a,0x5c,0x65,0x06,0x86,0x06] 12941 12942v_min_f16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12943// CHECK: [0xf9,0x04,0x0a,0x5c,0x66,0x06,0x86,0x06] 12944 12945v_min_f16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12946// CHECK: [0xf9,0x04,0x0a,0x5c,0x67,0x06,0x86,0x06] 12947 12948v_min_f16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12949// CHECK: [0xf9,0x04,0x0a,0x5c,0x6a,0x06,0x86,0x06] 12950 12951v_min_f16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12952// CHECK: [0xf9,0x04,0x0a,0x5c,0x6b,0x06,0x86,0x06] 12953 12954v_min_f16_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12955// CHECK: [0xf9,0x04,0x0a,0x5c,0x7b,0x06,0x86,0x06] 12956 12957v_min_f16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12958// CHECK: [0xf9,0x04,0x0a,0x5c,0x7c,0x06,0x86,0x06] 12959 12960v_min_f16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12961// CHECK: [0xf9,0x04,0x0a,0x5c,0x7e,0x06,0x86,0x06] 12962 12963v_min_f16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12964// CHECK: [0xf9,0x04,0x0a,0x5c,0x7f,0x06,0x86,0x06] 12965 12966v_min_f16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12967// CHECK: [0xf9,0x04,0x0a,0x5c,0x80,0x06,0x86,0x06] 12968 12969v_min_f16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12970// CHECK: [0xf9,0x04,0x0a,0x5c,0xc1,0x06,0x86,0x06] 12971 12972v_min_f16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12973// CHECK: [0xf9,0x04,0x0a,0x5c,0xf0,0x06,0x86,0x06] 12974 12975v_min_f16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12976// CHECK: [0xf9,0x04,0x0a,0x5c,0xf7,0x06,0x86,0x06] 12977 12978v_min_f16_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12979// CHECK: [0xf9,0x04,0x0a,0x5c,0xfb,0x06,0x86,0x06] 12980 12981v_min_f16_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12982// CHECK: [0xf9,0x04,0x0a,0x5c,0xfc,0x06,0x86,0x06] 12983 12984v_min_f16_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12985// CHECK: [0xf9,0x04,0x0a,0x5c,0xfd,0x06,0x86,0x06] 12986 12987v_min_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12988// CHECK: [0xf9,0xfe,0x0b,0x5c,0x01,0x06,0x06,0x06] 12989 12990v_min_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12991// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x26,0x06,0x06] 12992 12993v_min_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12994// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x06] 12995 12996v_min_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 12997// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x00,0x06,0x06] 12998 12999v_min_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13000// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x01,0x06,0x06] 13001 13002v_min_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13003// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x02,0x06,0x06] 13004 13005v_min_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13006// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x03,0x06,0x06] 13007 13008v_min_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13009// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x04,0x06,0x06] 13010 13011v_min_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13012// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x05,0x06,0x06] 13013 13014v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 13015// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x0e,0x06,0x06] 13016 13017v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 13018// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x16,0x06,0x06] 13019 13020v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 13021// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x16,0x06,0x06] 13022 13023v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 13024// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x06] 13025 13026v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 13027// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x00,0x06] 13028 13029v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 13030// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x01,0x06] 13031 13032v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 13033// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x02,0x06] 13034 13035v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 13036// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x03,0x06] 13037 13038v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 13039// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x04,0x06] 13040 13041v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 13042// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x05,0x06] 13043 13044v_min_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13045// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x16,0x06] 13046 13047v_min_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13048// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x26,0x06] 13049 13050v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 13051// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x06] 13052 13053v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 13054// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x00] 13055 13056v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 13057// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x01] 13058 13059v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 13060// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x02] 13061 13062v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 13063// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x03] 13064 13065v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 13066// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x04] 13067 13068v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 13069// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x05] 13070 13071v_min_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13072// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x16] 13073 13074v_min_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13075// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x26] 13076 13077v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13078// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x00] 13079 13080v_min_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13081// CHECK: [0xfa,0x04,0xfe,0x5d,0x01,0xe4,0x00,0x00] 13082 13083v_min_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13084// CHECK: [0xfa,0x04,0x0a,0x5c,0xff,0xe4,0x00,0x00] 13085 13086v_min_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13087// CHECK: [0xfa,0xfe,0x0b,0x5c,0x01,0xe4,0x00,0x00] 13088 13089v_min_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 13090// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x1b,0x00,0x00] 13091 13092v_min_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 13093// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x40,0x01,0x00] 13094 13095v_min_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 13096// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x41,0x01,0x00] 13097 13098v_min_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 13099// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x42,0x01,0x00] 13100 13101v_min_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 13102// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x43,0x01,0x00] 13103 13104v_min_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 13105// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x30,0x01,0x00] 13106 13107v_min_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 13108// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x34,0x01,0x00] 13109 13110v_min_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 13111// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x38,0x01,0x00] 13112 13113v_min_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 13114// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x3c,0x01,0x00] 13115 13116v_min_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 13117// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x01,0x01,0x00] 13118 13119v_min_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 13120// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x0f,0x01,0x00] 13121 13122v_min_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 13123// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x11,0x01,0x00] 13124 13125v_min_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 13126// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x1f,0x01,0x00] 13127 13128v_min_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 13129// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x21,0x01,0x00] 13130 13131v_min_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 13132// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x2f,0x01,0x00] 13133 13134v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 13135// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x10] 13136 13137v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 13138// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x30] 13139 13140v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 13141// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0xf0] 13142 13143v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 13144// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0xf0] 13145 13146v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 13147// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x01] 13148 13149v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 13150// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x03] 13151 13152v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 13153// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x0f] 13154 13155v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 13156// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x0f] 13157 13158v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 13159// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x08,0x00] 13160 13161v_min_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13162// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x10,0x00] 13163 13164v_min_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13165// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x20,0x00] 13166 13167v_min_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13168// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x40,0x00] 13169 13170v_min_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13171// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x80,0x00] 13172 13173v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13174// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x06] 13175 13176v_max_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13177// CHECK: [0xf9,0x04,0xfe,0x5f,0x01,0x06,0x06,0x06] 13178 13179v_max_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13180// CHECK: [0xf9,0x04,0x0a,0x5e,0xff,0x06,0x06,0x06] 13181 13182v_max_u16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13183// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x86,0x06] 13184 13185v_max_u16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13186// CHECK: [0xf9,0x04,0x0a,0x5e,0x65,0x06,0x86,0x06] 13187 13188v_max_u16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13189// CHECK: [0xf9,0x04,0x0a,0x5e,0x66,0x06,0x86,0x06] 13190 13191v_max_u16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13192// CHECK: [0xf9,0x04,0x0a,0x5e,0x67,0x06,0x86,0x06] 13193 13194v_max_u16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13195// CHECK: [0xf9,0x04,0x0a,0x5e,0x6a,0x06,0x86,0x06] 13196 13197v_max_u16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13198// CHECK: [0xf9,0x04,0x0a,0x5e,0x6b,0x06,0x86,0x06] 13199 13200v_max_u16_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13201// CHECK: [0xf9,0x04,0x0a,0x5e,0x7b,0x06,0x86,0x06] 13202 13203v_max_u16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13204// CHECK: [0xf9,0x04,0x0a,0x5e,0x7c,0x06,0x86,0x06] 13205 13206v_max_u16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13207// CHECK: [0xf9,0x04,0x0a,0x5e,0x7e,0x06,0x86,0x06] 13208 13209v_max_u16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13210// CHECK: [0xf9,0x04,0x0a,0x5e,0x7f,0x06,0x86,0x06] 13211 13212v_max_u16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13213// CHECK: [0xf9,0x04,0x0a,0x5e,0x80,0x06,0x86,0x06] 13214 13215v_max_u16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13216// CHECK: [0xf9,0x04,0x0a,0x5e,0xc1,0x06,0x86,0x06] 13217 13218v_max_u16_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13219// CHECK: [0xf9,0x04,0x0a,0x5e,0xfb,0x06,0x86,0x06] 13220 13221v_max_u16_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13222// CHECK: [0xf9,0x04,0x0a,0x5e,0xfc,0x06,0x86,0x06] 13223 13224v_max_u16_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13225// CHECK: [0xf9,0x04,0x0a,0x5e,0xfd,0x06,0x86,0x06] 13226 13227v_max_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13228// CHECK: [0xf9,0xfe,0x0b,0x5e,0x01,0x06,0x06,0x06] 13229 13230v_max_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13231// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x06] 13232 13233v_max_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13234// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x00,0x06,0x06] 13235 13236v_max_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13237// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x01,0x06,0x06] 13238 13239v_max_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13240// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x02,0x06,0x06] 13241 13242v_max_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13243// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x03,0x06,0x06] 13244 13245v_max_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13246// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x04,0x06,0x06] 13247 13248v_max_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13249// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x05,0x06,0x06] 13250 13251v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 13252// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x0e,0x06,0x06] 13253 13254v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 13255// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x16,0x06,0x06] 13256 13257v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 13258// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x16,0x06,0x06] 13259 13260v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 13261// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x06] 13262 13263v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 13264// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x00,0x06] 13265 13266v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 13267// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x01,0x06] 13268 13269v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 13270// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x02,0x06] 13271 13272v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 13273// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x03,0x06] 13274 13275v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 13276// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x04,0x06] 13277 13278v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 13279// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x05,0x06] 13280 13281v_max_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13282// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x0e,0x06] 13283 13284v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 13285// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x06] 13286 13287v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 13288// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x00] 13289 13290v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 13291// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x01] 13292 13293v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 13294// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x02] 13295 13296v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 13297// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x03] 13298 13299v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 13300// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x04] 13301 13302v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 13303// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x05] 13304 13305v_max_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13306// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x0e] 13307 13308v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13309// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x00] 13310 13311v_max_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13312// CHECK: [0xfa,0x04,0xfe,0x5f,0x01,0xe4,0x00,0x00] 13313 13314v_max_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13315// CHECK: [0xfa,0x04,0x0a,0x5e,0xff,0xe4,0x00,0x00] 13316 13317v_max_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13318// CHECK: [0xfa,0xfe,0x0b,0x5e,0x01,0xe4,0x00,0x00] 13319 13320v_max_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 13321// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x1b,0x00,0x00] 13322 13323v_max_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 13324// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x40,0x01,0x00] 13325 13326v_max_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 13327// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x41,0x01,0x00] 13328 13329v_max_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 13330// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x42,0x01,0x00] 13331 13332v_max_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 13333// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x43,0x01,0x00] 13334 13335v_max_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 13336// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x30,0x01,0x00] 13337 13338v_max_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 13339// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x34,0x01,0x00] 13340 13341v_max_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 13342// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x38,0x01,0x00] 13343 13344v_max_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 13345// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x3c,0x01,0x00] 13346 13347v_max_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 13348// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x01,0x01,0x00] 13349 13350v_max_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 13351// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x0f,0x01,0x00] 13352 13353v_max_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 13354// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x11,0x01,0x00] 13355 13356v_max_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 13357// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x1f,0x01,0x00] 13358 13359v_max_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 13360// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x21,0x01,0x00] 13361 13362v_max_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 13363// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x2f,0x01,0x00] 13364 13365v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 13366// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x10] 13367 13368v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 13369// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x30] 13370 13371v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 13372// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0xf0] 13373 13374v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 13375// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0xf0] 13376 13377v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 13378// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x01] 13379 13380v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 13381// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x03] 13382 13383v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 13384// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x0f] 13385 13386v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 13387// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x0f] 13388 13389v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 13390// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x08,0x00] 13391 13392v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13393// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x06] 13394 13395v_max_i16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13396// CHECK: [0xf9,0x04,0xfe,0x61,0x01,0x06,0x06,0x06] 13397 13398v_max_i16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13399// CHECK: [0xf9,0x04,0x0a,0x60,0xff,0x06,0x06,0x06] 13400 13401v_max_i16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13402// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x86,0x06] 13403 13404v_max_i16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13405// CHECK: [0xf9,0x04,0x0a,0x60,0x65,0x06,0x86,0x06] 13406 13407v_max_i16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13408// CHECK: [0xf9,0x04,0x0a,0x60,0x66,0x06,0x86,0x06] 13409 13410v_max_i16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13411// CHECK: [0xf9,0x04,0x0a,0x60,0x67,0x06,0x86,0x06] 13412 13413v_max_i16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13414// CHECK: [0xf9,0x04,0x0a,0x60,0x6a,0x06,0x86,0x06] 13415 13416v_max_i16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13417// CHECK: [0xf9,0x04,0x0a,0x60,0x6b,0x06,0x86,0x06] 13418 13419v_max_i16_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13420// CHECK: [0xf9,0x04,0x0a,0x60,0x7b,0x06,0x86,0x06] 13421 13422v_max_i16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13423// CHECK: [0xf9,0x04,0x0a,0x60,0x7c,0x06,0x86,0x06] 13424 13425v_max_i16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13426// CHECK: [0xf9,0x04,0x0a,0x60,0x7e,0x06,0x86,0x06] 13427 13428v_max_i16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13429// CHECK: [0xf9,0x04,0x0a,0x60,0x7f,0x06,0x86,0x06] 13430 13431v_max_i16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13432// CHECK: [0xf9,0x04,0x0a,0x60,0x80,0x06,0x86,0x06] 13433 13434v_max_i16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13435// CHECK: [0xf9,0x04,0x0a,0x60,0xc1,0x06,0x86,0x06] 13436 13437v_max_i16_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13438// CHECK: [0xf9,0x04,0x0a,0x60,0xfb,0x06,0x86,0x06] 13439 13440v_max_i16_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13441// CHECK: [0xf9,0x04,0x0a,0x60,0xfc,0x06,0x86,0x06] 13442 13443v_max_i16_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13444// CHECK: [0xf9,0x04,0x0a,0x60,0xfd,0x06,0x86,0x06] 13445 13446v_max_i16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13447// CHECK: [0xf9,0xfe,0x0b,0x60,0x01,0x06,0x06,0x06] 13448 13449v_max_i16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13450// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x06] 13451 13452v_max_i16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13453// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x00,0x06,0x06] 13454 13455v_max_i16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13456// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x01,0x06,0x06] 13457 13458v_max_i16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13459// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x02,0x06,0x06] 13460 13461v_max_i16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13462// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x03,0x06,0x06] 13463 13464v_max_i16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13465// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x04,0x06,0x06] 13466 13467v_max_i16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13468// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x05,0x06,0x06] 13469 13470v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 13471// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x0e,0x06,0x06] 13472 13473v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 13474// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x16,0x06,0x06] 13475 13476v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 13477// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x16,0x06,0x06] 13478 13479v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 13480// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x06] 13481 13482v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 13483// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x00,0x06] 13484 13485v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 13486// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x01,0x06] 13487 13488v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 13489// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x02,0x06] 13490 13491v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 13492// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x03,0x06] 13493 13494v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 13495// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x04,0x06] 13496 13497v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 13498// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x05,0x06] 13499 13500v_max_i16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13501// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x0e,0x06] 13502 13503v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 13504// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x06] 13505 13506v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 13507// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x00] 13508 13509v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 13510// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x01] 13511 13512v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 13513// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x02] 13514 13515v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 13516// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x03] 13517 13518v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 13519// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x04] 13520 13521v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 13522// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x05] 13523 13524v_max_i16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13525// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x0e] 13526 13527v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13528// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x00] 13529 13530v_max_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13531// CHECK: [0xfa,0x04,0xfe,0x61,0x01,0xe4,0x00,0x00] 13532 13533v_max_i16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13534// CHECK: [0xfa,0x04,0x0a,0x60,0xff,0xe4,0x00,0x00] 13535 13536v_max_i16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13537// CHECK: [0xfa,0xfe,0x0b,0x60,0x01,0xe4,0x00,0x00] 13538 13539v_max_i16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 13540// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x1b,0x00,0x00] 13541 13542v_max_i16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 13543// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x40,0x01,0x00] 13544 13545v_max_i16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 13546// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x41,0x01,0x00] 13547 13548v_max_i16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 13549// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x42,0x01,0x00] 13550 13551v_max_i16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 13552// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x43,0x01,0x00] 13553 13554v_max_i16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 13555// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x30,0x01,0x00] 13556 13557v_max_i16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 13558// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x34,0x01,0x00] 13559 13560v_max_i16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 13561// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x38,0x01,0x00] 13562 13563v_max_i16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 13564// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x3c,0x01,0x00] 13565 13566v_max_i16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 13567// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x01,0x01,0x00] 13568 13569v_max_i16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 13570// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x0f,0x01,0x00] 13571 13572v_max_i16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 13573// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x11,0x01,0x00] 13574 13575v_max_i16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 13576// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x1f,0x01,0x00] 13577 13578v_max_i16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 13579// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x21,0x01,0x00] 13580 13581v_max_i16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 13582// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x2f,0x01,0x00] 13583 13584v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 13585// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x10] 13586 13587v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 13588// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x30] 13589 13590v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 13591// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0xf0] 13592 13593v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 13594// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0xf0] 13595 13596v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 13597// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x01] 13598 13599v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 13600// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x03] 13601 13602v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 13603// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x0f] 13604 13605v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 13606// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x0f] 13607 13608v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 13609// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x08,0x00] 13610 13611v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13612// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x06] 13613 13614v_min_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13615// CHECK: [0xf9,0x04,0xfe,0x63,0x01,0x06,0x06,0x06] 13616 13617v_min_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13618// CHECK: [0xf9,0x04,0x0a,0x62,0xff,0x06,0x06,0x06] 13619 13620v_min_u16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13621// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x86,0x06] 13622 13623v_min_u16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13624// CHECK: [0xf9,0x04,0x0a,0x62,0x65,0x06,0x86,0x06] 13625 13626v_min_u16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13627// CHECK: [0xf9,0x04,0x0a,0x62,0x66,0x06,0x86,0x06] 13628 13629v_min_u16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13630// CHECK: [0xf9,0x04,0x0a,0x62,0x67,0x06,0x86,0x06] 13631 13632v_min_u16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13633// CHECK: [0xf9,0x04,0x0a,0x62,0x6a,0x06,0x86,0x06] 13634 13635v_min_u16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13636// CHECK: [0xf9,0x04,0x0a,0x62,0x6b,0x06,0x86,0x06] 13637 13638v_min_u16_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13639// CHECK: [0xf9,0x04,0x0a,0x62,0x7b,0x06,0x86,0x06] 13640 13641v_min_u16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13642// CHECK: [0xf9,0x04,0x0a,0x62,0x7c,0x06,0x86,0x06] 13643 13644v_min_u16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13645// CHECK: [0xf9,0x04,0x0a,0x62,0x7e,0x06,0x86,0x06] 13646 13647v_min_u16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13648// CHECK: [0xf9,0x04,0x0a,0x62,0x7f,0x06,0x86,0x06] 13649 13650v_min_u16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13651// CHECK: [0xf9,0x04,0x0a,0x62,0x80,0x06,0x86,0x06] 13652 13653v_min_u16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13654// CHECK: [0xf9,0x04,0x0a,0x62,0xc1,0x06,0x86,0x06] 13655 13656v_min_u16_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13657// CHECK: [0xf9,0x04,0x0a,0x62,0xfb,0x06,0x86,0x06] 13658 13659v_min_u16_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13660// CHECK: [0xf9,0x04,0x0a,0x62,0xfc,0x06,0x86,0x06] 13661 13662v_min_u16_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13663// CHECK: [0xf9,0x04,0x0a,0x62,0xfd,0x06,0x86,0x06] 13664 13665v_min_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13666// CHECK: [0xf9,0xfe,0x0b,0x62,0x01,0x06,0x06,0x06] 13667 13668v_min_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13669// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x06] 13670 13671v_min_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13672// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x00,0x06,0x06] 13673 13674v_min_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13675// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x01,0x06,0x06] 13676 13677v_min_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13678// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x02,0x06,0x06] 13679 13680v_min_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13681// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x03,0x06,0x06] 13682 13683v_min_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13684// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x04,0x06,0x06] 13685 13686v_min_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13687// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x05,0x06,0x06] 13688 13689v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 13690// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x0e,0x06,0x06] 13691 13692v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 13693// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x16,0x06,0x06] 13694 13695v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 13696// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x16,0x06,0x06] 13697 13698v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 13699// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x06] 13700 13701v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 13702// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x00,0x06] 13703 13704v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 13705// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x01,0x06] 13706 13707v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 13708// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x02,0x06] 13709 13710v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 13711// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x03,0x06] 13712 13713v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 13714// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x04,0x06] 13715 13716v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 13717// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x05,0x06] 13718 13719v_min_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13720// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x0e,0x06] 13721 13722v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 13723// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x06] 13724 13725v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 13726// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x00] 13727 13728v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 13729// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x01] 13730 13731v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 13732// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x02] 13733 13734v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 13735// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x03] 13736 13737v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 13738// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x04] 13739 13740v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 13741// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x05] 13742 13743v_min_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13744// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x0e] 13745 13746v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13747// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x00] 13748 13749v_min_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13750// CHECK: [0xfa,0x04,0xfe,0x63,0x01,0xe4,0x00,0x00] 13751 13752v_min_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13753// CHECK: [0xfa,0x04,0x0a,0x62,0xff,0xe4,0x00,0x00] 13754 13755v_min_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13756// CHECK: [0xfa,0xfe,0x0b,0x62,0x01,0xe4,0x00,0x00] 13757 13758v_min_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 13759// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x1b,0x00,0x00] 13760 13761v_min_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 13762// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x40,0x01,0x00] 13763 13764v_min_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 13765// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x41,0x01,0x00] 13766 13767v_min_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 13768// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x42,0x01,0x00] 13769 13770v_min_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 13771// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x43,0x01,0x00] 13772 13773v_min_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 13774// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x30,0x01,0x00] 13775 13776v_min_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 13777// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x34,0x01,0x00] 13778 13779v_min_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 13780// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x38,0x01,0x00] 13781 13782v_min_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 13783// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x3c,0x01,0x00] 13784 13785v_min_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 13786// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x01,0x01,0x00] 13787 13788v_min_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 13789// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x0f,0x01,0x00] 13790 13791v_min_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 13792// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x11,0x01,0x00] 13793 13794v_min_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 13795// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x1f,0x01,0x00] 13796 13797v_min_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 13798// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x21,0x01,0x00] 13799 13800v_min_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 13801// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x2f,0x01,0x00] 13802 13803v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 13804// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x10] 13805 13806v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 13807// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x30] 13808 13809v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 13810// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0xf0] 13811 13812v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 13813// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0xf0] 13814 13815v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 13816// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x01] 13817 13818v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 13819// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x03] 13820 13821v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 13822// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x0f] 13823 13824v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 13825// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x0f] 13826 13827v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 13828// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x08,0x00] 13829 13830v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13831// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x06] 13832 13833v_min_i16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13834// CHECK: [0xf9,0x04,0xfe,0x65,0x01,0x06,0x06,0x06] 13835 13836v_min_i16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13837// CHECK: [0xf9,0x04,0x0a,0x64,0xff,0x06,0x06,0x06] 13838 13839v_min_i16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13840// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x86,0x06] 13841 13842v_min_i16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13843// CHECK: [0xf9,0x04,0x0a,0x64,0x65,0x06,0x86,0x06] 13844 13845v_min_i16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13846// CHECK: [0xf9,0x04,0x0a,0x64,0x66,0x06,0x86,0x06] 13847 13848v_min_i16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13849// CHECK: [0xf9,0x04,0x0a,0x64,0x67,0x06,0x86,0x06] 13850 13851v_min_i16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13852// CHECK: [0xf9,0x04,0x0a,0x64,0x6a,0x06,0x86,0x06] 13853 13854v_min_i16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13855// CHECK: [0xf9,0x04,0x0a,0x64,0x6b,0x06,0x86,0x06] 13856 13857v_min_i16_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13858// CHECK: [0xf9,0x04,0x0a,0x64,0x7b,0x06,0x86,0x06] 13859 13860v_min_i16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13861// CHECK: [0xf9,0x04,0x0a,0x64,0x7c,0x06,0x86,0x06] 13862 13863v_min_i16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13864// CHECK: [0xf9,0x04,0x0a,0x64,0x7e,0x06,0x86,0x06] 13865 13866v_min_i16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13867// CHECK: [0xf9,0x04,0x0a,0x64,0x7f,0x06,0x86,0x06] 13868 13869v_min_i16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13870// CHECK: [0xf9,0x04,0x0a,0x64,0x80,0x06,0x86,0x06] 13871 13872v_min_i16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13873// CHECK: [0xf9,0x04,0x0a,0x64,0xc1,0x06,0x86,0x06] 13874 13875v_min_i16_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13876// CHECK: [0xf9,0x04,0x0a,0x64,0xfb,0x06,0x86,0x06] 13877 13878v_min_i16_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13879// CHECK: [0xf9,0x04,0x0a,0x64,0xfc,0x06,0x86,0x06] 13880 13881v_min_i16_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13882// CHECK: [0xf9,0x04,0x0a,0x64,0xfd,0x06,0x86,0x06] 13883 13884v_min_i16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13885// CHECK: [0xf9,0xfe,0x0b,0x64,0x01,0x06,0x06,0x06] 13886 13887v_min_i16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13888// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x06] 13889 13890v_min_i16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13891// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x00,0x06,0x06] 13892 13893v_min_i16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13894// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x01,0x06,0x06] 13895 13896v_min_i16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13897// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x02,0x06,0x06] 13898 13899v_min_i16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13900// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x03,0x06,0x06] 13901 13902v_min_i16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13903// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x04,0x06,0x06] 13904 13905v_min_i16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13906// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x05,0x06,0x06] 13907 13908v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 13909// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x0e,0x06,0x06] 13910 13911v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 13912// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x16,0x06,0x06] 13913 13914v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 13915// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x16,0x06,0x06] 13916 13917v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 13918// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x06] 13919 13920v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 13921// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x00,0x06] 13922 13923v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 13924// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x01,0x06] 13925 13926v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 13927// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x02,0x06] 13928 13929v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 13930// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x03,0x06] 13931 13932v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 13933// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x04,0x06] 13934 13935v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 13936// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x05,0x06] 13937 13938v_min_i16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13939// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x0e,0x06] 13940 13941v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 13942// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x06] 13943 13944v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 13945// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x00] 13946 13947v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 13948// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x01] 13949 13950v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 13951// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x02] 13952 13953v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 13954// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x03] 13955 13956v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 13957// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x04] 13958 13959v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 13960// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x05] 13961 13962v_min_i16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 13963// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x0e] 13964 13965v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13966// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x00] 13967 13968v_min_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13969// CHECK: [0xfa,0x04,0xfe,0x65,0x01,0xe4,0x00,0x00] 13970 13971v_min_i16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13972// CHECK: [0xfa,0x04,0x0a,0x64,0xff,0xe4,0x00,0x00] 13973 13974v_min_i16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 13975// CHECK: [0xfa,0xfe,0x0b,0x64,0x01,0xe4,0x00,0x00] 13976 13977v_min_i16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 13978// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x1b,0x00,0x00] 13979 13980v_min_i16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 13981// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x40,0x01,0x00] 13982 13983v_min_i16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 13984// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x41,0x01,0x00] 13985 13986v_min_i16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 13987// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x42,0x01,0x00] 13988 13989v_min_i16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 13990// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x43,0x01,0x00] 13991 13992v_min_i16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 13993// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x30,0x01,0x00] 13994 13995v_min_i16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 13996// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x34,0x01,0x00] 13997 13998v_min_i16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 13999// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x38,0x01,0x00] 14000 14001v_min_i16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 14002// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x3c,0x01,0x00] 14003 14004v_min_i16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 14005// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x01,0x01,0x00] 14006 14007v_min_i16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 14008// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x0f,0x01,0x00] 14009 14010v_min_i16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 14011// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x11,0x01,0x00] 14012 14013v_min_i16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 14014// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x1f,0x01,0x00] 14015 14016v_min_i16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 14017// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x21,0x01,0x00] 14018 14019v_min_i16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 14020// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x2f,0x01,0x00] 14021 14022v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 14023// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x10] 14024 14025v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 14026// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x30] 14027 14028v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 14029// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0xf0] 14030 14031v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 14032// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0xf0] 14033 14034v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 14035// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x01] 14036 14037v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 14038// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x03] 14039 14040v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 14041// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x0f] 14042 14043v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 14044// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x0f] 14045 14046v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 14047// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x08,0x00] 14048 14049v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14050// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x06] 14051 14052v_ldexp_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14053// CHECK: [0xf9,0x04,0xfe,0x67,0x01,0x06,0x06,0x06] 14054 14055v_ldexp_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14056// CHECK: [0xf9,0x04,0x0a,0x66,0xff,0x06,0x06,0x06] 14057 14058v_ldexp_f16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14059// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x86,0x06] 14060 14061v_ldexp_f16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14062// CHECK: [0xf9,0x04,0x0a,0x66,0x65,0x06,0x86,0x06] 14063 14064v_ldexp_f16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14065// CHECK: [0xf9,0x04,0x0a,0x66,0x66,0x06,0x86,0x06] 14066 14067v_ldexp_f16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14068// CHECK: [0xf9,0x04,0x0a,0x66,0x67,0x06,0x86,0x06] 14069 14070v_ldexp_f16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14071// CHECK: [0xf9,0x04,0x0a,0x66,0x6a,0x06,0x86,0x06] 14072 14073v_ldexp_f16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14074// CHECK: [0xf9,0x04,0x0a,0x66,0x6b,0x06,0x86,0x06] 14075 14076v_ldexp_f16_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14077// CHECK: [0xf9,0x04,0x0a,0x66,0x7b,0x06,0x86,0x06] 14078 14079v_ldexp_f16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14080// CHECK: [0xf9,0x04,0x0a,0x66,0x7c,0x06,0x86,0x06] 14081 14082v_ldexp_f16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14083// CHECK: [0xf9,0x04,0x0a,0x66,0x7e,0x06,0x86,0x06] 14084 14085v_ldexp_f16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14086// CHECK: [0xf9,0x04,0x0a,0x66,0x7f,0x06,0x86,0x06] 14087 14088v_ldexp_f16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14089// CHECK: [0xf9,0x04,0x0a,0x66,0x80,0x06,0x86,0x06] 14090 14091v_ldexp_f16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14092// CHECK: [0xf9,0x04,0x0a,0x66,0xc1,0x06,0x86,0x06] 14093 14094v_ldexp_f16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14095// CHECK: [0xf9,0x04,0x0a,0x66,0xf0,0x06,0x86,0x06] 14096 14097v_ldexp_f16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14098// CHECK: [0xf9,0x04,0x0a,0x66,0xf7,0x06,0x86,0x06] 14099 14100v_ldexp_f16_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14101// CHECK: [0xf9,0x04,0x0a,0x66,0xfb,0x06,0x86,0x06] 14102 14103v_ldexp_f16_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14104// CHECK: [0xf9,0x04,0x0a,0x66,0xfc,0x06,0x86,0x06] 14105 14106v_ldexp_f16_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14107// CHECK: [0xf9,0x04,0x0a,0x66,0xfd,0x06,0x86,0x06] 14108 14109v_ldexp_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14110// CHECK: [0xf9,0xfe,0x0b,0x66,0x01,0x06,0x06,0x06] 14111 14112v_ldexp_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14113// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x26,0x06,0x06] 14114 14115v_ldexp_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14116// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x06] 14117 14118v_ldexp_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14119// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x00,0x06,0x06] 14120 14121v_ldexp_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14122// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x01,0x06,0x06] 14123 14124v_ldexp_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14125// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x02,0x06,0x06] 14126 14127v_ldexp_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14128// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x03,0x06,0x06] 14129 14130v_ldexp_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14131// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x04,0x06,0x06] 14132 14133v_ldexp_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14134// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x05,0x06,0x06] 14135 14136v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 14137// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x0e,0x06,0x06] 14138 14139v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 14140// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x16,0x06,0x06] 14141 14142v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 14143// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x16,0x06,0x06] 14144 14145v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 14146// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x06] 14147 14148v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 14149// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x00,0x06] 14150 14151v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 14152// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x01,0x06] 14153 14154v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 14155// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x02,0x06] 14156 14157v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 14158// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x03,0x06] 14159 14160v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 14161// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x04,0x06] 14162 14163v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 14164// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x05,0x06] 14165 14166v_ldexp_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14167// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x16,0x06] 14168 14169v_ldexp_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14170// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x26,0x06] 14171 14172v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 14173// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x06] 14174 14175v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 14176// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x00] 14177 14178v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 14179// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x01] 14180 14181v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 14182// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x02] 14183 14184v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 14185// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x03] 14186 14187v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 14188// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x04] 14189 14190v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 14191// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x05] 14192 14193v_ldexp_f16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14194// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x0e] 14195 14196v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 14197// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x00] 14198 14199v_ldexp_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 14200// CHECK: [0xfa,0x04,0xfe,0x67,0x01,0xe4,0x00,0x00] 14201 14202v_ldexp_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 14203// CHECK: [0xfa,0x04,0x0a,0x66,0xff,0xe4,0x00,0x00] 14204 14205v_ldexp_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 14206// CHECK: [0xfa,0xfe,0x0b,0x66,0x01,0xe4,0x00,0x00] 14207 14208v_ldexp_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 14209// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x1b,0x00,0x00] 14210 14211v_ldexp_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 14212// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x40,0x01,0x00] 14213 14214v_ldexp_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 14215// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x41,0x01,0x00] 14216 14217v_ldexp_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 14218// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x42,0x01,0x00] 14219 14220v_ldexp_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 14221// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x43,0x01,0x00] 14222 14223v_ldexp_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 14224// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x30,0x01,0x00] 14225 14226v_ldexp_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 14227// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x34,0x01,0x00] 14228 14229v_ldexp_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 14230// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x38,0x01,0x00] 14231 14232v_ldexp_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 14233// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x3c,0x01,0x00] 14234 14235v_ldexp_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 14236// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x01,0x01,0x00] 14237 14238v_ldexp_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 14239// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x0f,0x01,0x00] 14240 14241v_ldexp_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 14242// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x11,0x01,0x00] 14243 14244v_ldexp_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 14245// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x1f,0x01,0x00] 14246 14247v_ldexp_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 14248// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x21,0x01,0x00] 14249 14250v_ldexp_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 14251// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x2f,0x01,0x00] 14252 14253v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 14254// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x10] 14255 14256v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 14257// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x30] 14258 14259v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 14260// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0xf0] 14261 14262v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 14263// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0xf0] 14264 14265v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 14266// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x01] 14267 14268v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 14269// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x03] 14270 14271v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 14272// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x0f] 14273 14274v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 14275// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x0f] 14276 14277v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 14278// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x08,0x00] 14279 14280v_ldexp_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 14281// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x10,0x00] 14282 14283v_ldexp_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 14284// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x20,0x00] 14285 14286v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14287// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x06] 14288 14289v_add_u32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14290// CHECK: [0xf9,0x04,0xfe,0x69,0x01,0x06,0x06,0x06] 14291 14292v_add_u32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14293// CHECK: [0xf9,0x04,0x0a,0x68,0xff,0x06,0x06,0x06] 14294 14295v_add_u32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14296// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x86,0x06] 14297 14298v_add_u32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14299// CHECK: [0xf9,0x04,0x0a,0x68,0x65,0x06,0x86,0x06] 14300 14301v_add_u32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14302// CHECK: [0xf9,0x04,0x0a,0x68,0x66,0x06,0x86,0x06] 14303 14304v_add_u32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14305// CHECK: [0xf9,0x04,0x0a,0x68,0x67,0x06,0x86,0x06] 14306 14307v_add_u32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14308// CHECK: [0xf9,0x04,0x0a,0x68,0x6a,0x06,0x86,0x06] 14309 14310v_add_u32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14311// CHECK: [0xf9,0x04,0x0a,0x68,0x6b,0x06,0x86,0x06] 14312 14313v_add_u32_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14314// CHECK: [0xf9,0x04,0x0a,0x68,0x7b,0x06,0x86,0x06] 14315 14316v_add_u32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14317// CHECK: [0xf9,0x04,0x0a,0x68,0x7c,0x06,0x86,0x06] 14318 14319v_add_u32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14320// CHECK: [0xf9,0x04,0x0a,0x68,0x7e,0x06,0x86,0x06] 14321 14322v_add_u32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14323// CHECK: [0xf9,0x04,0x0a,0x68,0x7f,0x06,0x86,0x06] 14324 14325v_add_u32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14326// CHECK: [0xf9,0x04,0x0a,0x68,0x80,0x06,0x86,0x06] 14327 14328v_add_u32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14329// CHECK: [0xf9,0x04,0x0a,0x68,0xc1,0x06,0x86,0x06] 14330 14331v_add_u32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14332// CHECK: [0xf9,0x04,0x0a,0x68,0xf0,0x06,0x86,0x06] 14333 14334v_add_u32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14335// CHECK: [0xf9,0x04,0x0a,0x68,0xf7,0x06,0x86,0x06] 14336 14337v_add_u32_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14338// CHECK: [0xf9,0x04,0x0a,0x68,0xfb,0x06,0x86,0x06] 14339 14340v_add_u32_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14341// CHECK: [0xf9,0x04,0x0a,0x68,0xfc,0x06,0x86,0x06] 14342 14343v_add_u32_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14344// CHECK: [0xf9,0x04,0x0a,0x68,0xfd,0x06,0x86,0x06] 14345 14346v_add_u32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14347// CHECK: [0xf9,0xfe,0x0b,0x68,0x01,0x06,0x06,0x06] 14348 14349v_add_u32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14350// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x26,0x06,0x06] 14351 14352v_add_u32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14353// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x06] 14354 14355v_add_u32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14356// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x00,0x06,0x06] 14357 14358v_add_u32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14359// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x01,0x06,0x06] 14360 14361v_add_u32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14362// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x02,0x06,0x06] 14363 14364v_add_u32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14365// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x03,0x06,0x06] 14366 14367v_add_u32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14368// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x04,0x06,0x06] 14369 14370v_add_u32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14371// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x05,0x06,0x06] 14372 14373v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 14374// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x0e,0x06,0x06] 14375 14376v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 14377// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x16,0x06,0x06] 14378 14379v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 14380// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x16,0x06,0x06] 14381 14382v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 14383// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x06] 14384 14385v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 14386// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x00,0x06] 14387 14388v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 14389// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x01,0x06] 14390 14391v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 14392// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x02,0x06] 14393 14394v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 14395// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x03,0x06] 14396 14397v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 14398// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x04,0x06] 14399 14400v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 14401// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x05,0x06] 14402 14403v_add_u32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14404// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x0e,0x06] 14405 14406v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 14407// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x06] 14408 14409v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 14410// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x00] 14411 14412v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 14413// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x01] 14414 14415v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 14416// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x02] 14417 14418v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 14419// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x03] 14420 14421v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 14422// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x04] 14423 14424v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 14425// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x05] 14426 14427v_add_u32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14428// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x0e] 14429 14430v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 14431// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x00] 14432 14433v_add_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 14434// CHECK: [0xfa,0x04,0xfe,0x69,0x01,0xe4,0x00,0x00] 14435 14436v_add_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 14437// CHECK: [0xfa,0x04,0x0a,0x68,0xff,0xe4,0x00,0x00] 14438 14439v_add_u32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 14440// CHECK: [0xfa,0xfe,0x0b,0x68,0x01,0xe4,0x00,0x00] 14441 14442v_add_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 14443// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x1b,0x00,0x00] 14444 14445v_add_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 14446// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x40,0x01,0x00] 14447 14448v_add_u32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 14449// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x41,0x01,0x00] 14450 14451v_add_u32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 14452// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x42,0x01,0x00] 14453 14454v_add_u32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 14455// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x43,0x01,0x00] 14456 14457v_add_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 14458// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x30,0x01,0x00] 14459 14460v_add_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 14461// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x34,0x01,0x00] 14462 14463v_add_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 14464// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x38,0x01,0x00] 14465 14466v_add_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 14467// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x3c,0x01,0x00] 14468 14469v_add_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 14470// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x01,0x01,0x00] 14471 14472v_add_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 14473// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x0f,0x01,0x00] 14474 14475v_add_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 14476// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x11,0x01,0x00] 14477 14478v_add_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 14479// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x1f,0x01,0x00] 14480 14481v_add_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 14482// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x21,0x01,0x00] 14483 14484v_add_u32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 14485// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x2f,0x01,0x00] 14486 14487v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 14488// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x10] 14489 14490v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 14491// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x30] 14492 14493v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 14494// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0xf0] 14495 14496v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 14497// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0xf0] 14498 14499v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 14500// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x01] 14501 14502v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 14503// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x03] 14504 14505v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 14506// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x0f] 14507 14508v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 14509// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x0f] 14510 14511v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 14512// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x08,0x00] 14513 14514v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14515// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x06] 14516 14517v_sub_u32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14518// CHECK: [0xf9,0x04,0xfe,0x6b,0x01,0x06,0x06,0x06] 14519 14520v_sub_u32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14521// CHECK: [0xf9,0x04,0x0a,0x6a,0xff,0x06,0x06,0x06] 14522 14523v_sub_u32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14524// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x86,0x06] 14525 14526v_sub_u32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14527// CHECK: [0xf9,0x04,0x0a,0x6a,0x65,0x06,0x86,0x06] 14528 14529v_sub_u32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14530// CHECK: [0xf9,0x04,0x0a,0x6a,0x66,0x06,0x86,0x06] 14531 14532v_sub_u32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14533// CHECK: [0xf9,0x04,0x0a,0x6a,0x67,0x06,0x86,0x06] 14534 14535v_sub_u32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14536// CHECK: [0xf9,0x04,0x0a,0x6a,0x6a,0x06,0x86,0x06] 14537 14538v_sub_u32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14539// CHECK: [0xf9,0x04,0x0a,0x6a,0x6b,0x06,0x86,0x06] 14540 14541v_sub_u32_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14542// CHECK: [0xf9,0x04,0x0a,0x6a,0x7b,0x06,0x86,0x06] 14543 14544v_sub_u32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14545// CHECK: [0xf9,0x04,0x0a,0x6a,0x7c,0x06,0x86,0x06] 14546 14547v_sub_u32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14548// CHECK: [0xf9,0x04,0x0a,0x6a,0x7e,0x06,0x86,0x06] 14549 14550v_sub_u32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14551// CHECK: [0xf9,0x04,0x0a,0x6a,0x7f,0x06,0x86,0x06] 14552 14553v_sub_u32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14554// CHECK: [0xf9,0x04,0x0a,0x6a,0x80,0x06,0x86,0x06] 14555 14556v_sub_u32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14557// CHECK: [0xf9,0x04,0x0a,0x6a,0xc1,0x06,0x86,0x06] 14558 14559v_sub_u32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14560// CHECK: [0xf9,0x04,0x0a,0x6a,0xf0,0x06,0x86,0x06] 14561 14562v_sub_u32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14563// CHECK: [0xf9,0x04,0x0a,0x6a,0xf7,0x06,0x86,0x06] 14564 14565v_sub_u32_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14566// CHECK: [0xf9,0x04,0x0a,0x6a,0xfb,0x06,0x86,0x06] 14567 14568v_sub_u32_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14569// CHECK: [0xf9,0x04,0x0a,0x6a,0xfc,0x06,0x86,0x06] 14570 14571v_sub_u32_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14572// CHECK: [0xf9,0x04,0x0a,0x6a,0xfd,0x06,0x86,0x06] 14573 14574v_sub_u32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14575// CHECK: [0xf9,0xfe,0x0b,0x6a,0x01,0x06,0x06,0x06] 14576 14577v_sub_u32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14578// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x26,0x06,0x06] 14579 14580v_sub_u32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14581// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x06] 14582 14583v_sub_u32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14584// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x00,0x06,0x06] 14585 14586v_sub_u32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14587// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x01,0x06,0x06] 14588 14589v_sub_u32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14590// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x02,0x06,0x06] 14591 14592v_sub_u32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14593// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x03,0x06,0x06] 14594 14595v_sub_u32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14596// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x04,0x06,0x06] 14597 14598v_sub_u32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14599// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x05,0x06,0x06] 14600 14601v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 14602// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x0e,0x06,0x06] 14603 14604v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 14605// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x16,0x06,0x06] 14606 14607v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 14608// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x16,0x06,0x06] 14609 14610v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 14611// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x06] 14612 14613v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 14614// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x00,0x06] 14615 14616v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 14617// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x01,0x06] 14618 14619v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 14620// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x02,0x06] 14621 14622v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 14623// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x03,0x06] 14624 14625v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 14626// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x04,0x06] 14627 14628v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 14629// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x05,0x06] 14630 14631v_sub_u32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14632// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x0e,0x06] 14633 14634v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 14635// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x06] 14636 14637v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 14638// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x00] 14639 14640v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 14641// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x01] 14642 14643v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 14644// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x02] 14645 14646v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 14647// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x03] 14648 14649v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 14650// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x04] 14651 14652v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 14653// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x05] 14654 14655v_sub_u32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14656// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x0e] 14657 14658v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 14659// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x00] 14660 14661v_sub_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 14662// CHECK: [0xfa,0x04,0xfe,0x6b,0x01,0xe4,0x00,0x00] 14663 14664v_sub_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 14665// CHECK: [0xfa,0x04,0x0a,0x6a,0xff,0xe4,0x00,0x00] 14666 14667v_sub_u32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 14668// CHECK: [0xfa,0xfe,0x0b,0x6a,0x01,0xe4,0x00,0x00] 14669 14670v_sub_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 14671// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x1b,0x00,0x00] 14672 14673v_sub_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 14674// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x40,0x01,0x00] 14675 14676v_sub_u32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 14677// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x41,0x01,0x00] 14678 14679v_sub_u32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 14680// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x42,0x01,0x00] 14681 14682v_sub_u32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 14683// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x43,0x01,0x00] 14684 14685v_sub_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 14686// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x30,0x01,0x00] 14687 14688v_sub_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 14689// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x34,0x01,0x00] 14690 14691v_sub_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 14692// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x38,0x01,0x00] 14693 14694v_sub_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 14695// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x3c,0x01,0x00] 14696 14697v_sub_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 14698// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x01,0x01,0x00] 14699 14700v_sub_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 14701// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x0f,0x01,0x00] 14702 14703v_sub_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 14704// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x11,0x01,0x00] 14705 14706v_sub_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 14707// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x1f,0x01,0x00] 14708 14709v_sub_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 14710// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x21,0x01,0x00] 14711 14712v_sub_u32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 14713// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x2f,0x01,0x00] 14714 14715v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 14716// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x10] 14717 14718v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 14719// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x30] 14720 14721v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 14722// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0xf0] 14723 14724v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 14725// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0xf0] 14726 14727v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 14728// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x01] 14729 14730v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 14731// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x03] 14732 14733v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 14734// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x0f] 14735 14736v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 14737// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x0f] 14738 14739v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 14740// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x08,0x00] 14741 14742v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14743// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x06] 14744 14745v_subrev_u32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14746// CHECK: [0xf9,0x04,0xfe,0x6d,0x01,0x06,0x06,0x06] 14747 14748v_subrev_u32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14749// CHECK: [0xf9,0x04,0x0a,0x6c,0xff,0x06,0x06,0x06] 14750 14751v_subrev_u32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14752// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x86,0x06] 14753 14754v_subrev_u32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14755// CHECK: [0xf9,0x04,0x0a,0x6c,0x65,0x06,0x86,0x06] 14756 14757v_subrev_u32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14758// CHECK: [0xf9,0x04,0x0a,0x6c,0x66,0x06,0x86,0x06] 14759 14760v_subrev_u32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14761// CHECK: [0xf9,0x04,0x0a,0x6c,0x67,0x06,0x86,0x06] 14762 14763v_subrev_u32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14764// CHECK: [0xf9,0x04,0x0a,0x6c,0x6a,0x06,0x86,0x06] 14765 14766v_subrev_u32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14767// CHECK: [0xf9,0x04,0x0a,0x6c,0x6b,0x06,0x86,0x06] 14768 14769v_subrev_u32_sdwa v5, ttmp15, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14770// CHECK: [0xf9,0x04,0x0a,0x6c,0x7b,0x06,0x86,0x06] 14771 14772v_subrev_u32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14773// CHECK: [0xf9,0x04,0x0a,0x6c,0x7c,0x06,0x86,0x06] 14774 14775v_subrev_u32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14776// CHECK: [0xf9,0x04,0x0a,0x6c,0x7e,0x06,0x86,0x06] 14777 14778v_subrev_u32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14779// CHECK: [0xf9,0x04,0x0a,0x6c,0x7f,0x06,0x86,0x06] 14780 14781v_subrev_u32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14782// CHECK: [0xf9,0x04,0x0a,0x6c,0x80,0x06,0x86,0x06] 14783 14784v_subrev_u32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14785// CHECK: [0xf9,0x04,0x0a,0x6c,0xc1,0x06,0x86,0x06] 14786 14787v_subrev_u32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14788// CHECK: [0xf9,0x04,0x0a,0x6c,0xf0,0x06,0x86,0x06] 14789 14790v_subrev_u32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14791// CHECK: [0xf9,0x04,0x0a,0x6c,0xf7,0x06,0x86,0x06] 14792 14793v_subrev_u32_sdwa v5, src_vccz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14794// CHECK: [0xf9,0x04,0x0a,0x6c,0xfb,0x06,0x86,0x06] 14795 14796v_subrev_u32_sdwa v5, src_execz, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14797// CHECK: [0xf9,0x04,0x0a,0x6c,0xfc,0x06,0x86,0x06] 14798 14799v_subrev_u32_sdwa v5, src_scc, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14800// CHECK: [0xf9,0x04,0x0a,0x6c,0xfd,0x06,0x86,0x06] 14801 14802v_subrev_u32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14803// CHECK: [0xf9,0xfe,0x0b,0x6c,0x01,0x06,0x06,0x06] 14804 14805v_subrev_u32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14806// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x26,0x06,0x06] 14807 14808v_subrev_u32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14809// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x06] 14810 14811v_subrev_u32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14812// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x00,0x06,0x06] 14813 14814v_subrev_u32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14815// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x01,0x06,0x06] 14816 14817v_subrev_u32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14818// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x02,0x06,0x06] 14819 14820v_subrev_u32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14821// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x03,0x06,0x06] 14822 14823v_subrev_u32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14824// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x04,0x06,0x06] 14825 14826v_subrev_u32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14827// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x05,0x06,0x06] 14828 14829v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD 14830// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x0e,0x06,0x06] 14831 14832v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD 14833// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x16,0x06,0x06] 14834 14835v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD 14836// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x16,0x06,0x06] 14837 14838v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD 14839// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x06] 14840 14841v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD 14842// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x00,0x06] 14843 14844v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD 14845// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x01,0x06] 14846 14847v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD 14848// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x02,0x06] 14849 14850v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD 14851// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x03,0x06] 14852 14853v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 14854// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x04,0x06] 14855 14856v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 14857// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x05,0x06] 14858 14859v_subrev_u32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14860// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x0e,0x06] 14861 14862v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD 14863// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x06] 14864 14865v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 14866// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x00] 14867 14868v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 14869// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x01] 14870 14871v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 14872// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x02] 14873 14874v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 14875// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x03] 14876 14877v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 14878// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x04] 14879 14880v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 14881// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x05] 14882 14883v_subrev_u32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 14884// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x0e] 14885 14886v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 14887// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x00] 14888 14889v_subrev_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 14890// CHECK: [0xfa,0x04,0xfe,0x6d,0x01,0xe4,0x00,0x00] 14891 14892v_subrev_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 14893// CHECK: [0xfa,0x04,0x0a,0x6c,0xff,0xe4,0x00,0x00] 14894 14895v_subrev_u32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 14896// CHECK: [0xfa,0xfe,0x0b,0x6c,0x01,0xe4,0x00,0x00] 14897 14898v_subrev_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 14899// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x1b,0x00,0x00] 14900 14901v_subrev_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 14902// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x40,0x01,0x00] 14903 14904v_subrev_u32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 14905// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x41,0x01,0x00] 14906 14907v_subrev_u32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 14908// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x42,0x01,0x00] 14909 14910v_subrev_u32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 14911// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x43,0x01,0x00] 14912 14913v_subrev_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 14914// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x30,0x01,0x00] 14915 14916v_subrev_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 14917// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x34,0x01,0x00] 14918 14919v_subrev_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 14920// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x38,0x01,0x00] 14921 14922v_subrev_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 14923// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x3c,0x01,0x00] 14924 14925v_subrev_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 14926// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x01,0x01,0x00] 14927 14928v_subrev_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 14929// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x0f,0x01,0x00] 14930 14931v_subrev_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 14932// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x11,0x01,0x00] 14933 14934v_subrev_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 14935// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x1f,0x01,0x00] 14936 14937v_subrev_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 14938// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x21,0x01,0x00] 14939 14940v_subrev_u32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 14941// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x2f,0x01,0x00] 14942 14943v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 14944// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x10] 14945 14946v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 14947// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x30] 14948 14949v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 14950// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0xf0] 14951 14952v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 14953// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0xf0] 14954 14955v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 14956// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x01] 14957 14958v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 14959// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x03] 14960 14961v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf 14962// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x0f] 14963 14964v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 14965// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x0f] 14966 14967v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 14968// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x08,0x00] 14969