1; RUN: llc < %s -ppc-vsr-nums-as-vr -mtriple=powerpc64-unknown-linux-gnu \ 2; RUN: -verify-machineinstrs -ppc-asm-full-reg-names -mcpu=pwr8 -relocation-model=pic \ 3; RUN: | FileCheck %s 4; RUN: llc < %s -ppc-vsr-nums-as-vr -mtriple=powerpc64le-unknown-linux-gnu \ 5; RUN: -verify-machineinstrs -ppc-asm-full-reg-names -mcpu=pwr8 -relocation-model=pic \ 6; RUN: | FileCheck %s -check-prefix=CHECK-LE 7 8; The build[csilf] functions simply test the scalar_to_vector handling with 9; direct moves. This corresponds to the "insertelement" instruction. Subsequent 10; to this, there will be a splat corresponding to the shufflevector. 11 12@d = common global double 0.000000e+00, align 8 13 14; Function Attrs: norecurse nounwind readnone 15define <16 x i8> @buildc(i8 zeroext %a) { 16entry: 17 %splat.splatinsert = insertelement <16 x i8> undef, i8 %a, i32 0 18 %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> undef, <16 x i32> zeroinitializer 19 ret <16 x i8> %splat.splat 20; CHECK-LABEL: buildc 21; CHECK: sldi r3, r3, 56 22; CHECK: mtvsrd v2, r3 23; CHECK-LE-LABEL: buildc 24; CHECK-LE: mtvsrd f0, r3 25; CHECK-LE: xxswapd v2, vs0 26} 27 28; Function Attrs: norecurse nounwind readnone 29define <8 x i16> @builds(i16 zeroext %a) { 30entry: 31 %splat.splatinsert = insertelement <8 x i16> undef, i16 %a, i32 0 32 %splat.splat = shufflevector <8 x i16> %splat.splatinsert, <8 x i16> undef, <8 x i32> zeroinitializer 33 ret <8 x i16> %splat.splat 34; CHECK-LABEL: builds 35; CHECK: sldi r3, r3, 48 36; CHECK: mtvsrd v2, r3 37; CHECK-LE-LABEL: builds 38; CHECK-LE: mtvsrd f0, r3 39; CHECK-LE: xxswapd v2, vs0 40} 41 42; Function Attrs: norecurse nounwind readnone 43define <4 x i32> @buildi(i32 zeroext %a) { 44entry: 45 %splat.splatinsert = insertelement <4 x i32> undef, i32 %a, i32 0 46 %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer 47 ret <4 x i32> %splat.splat 48; CHECK-LABEL: buildi 49; CHECK: mtvsrwz f0, r3 50; CHECK: xxspltw v2, vs0, 1 51; CHECK-LE-LABEL: buildi 52; CHECK-LE: mtvsrwz f0, r3 53; CHECK-LE: xxspltw v2, vs0, 1 54} 55 56; Function Attrs: norecurse nounwind readnone 57define <2 x i64> @buildl(i64 %a) { 58entry: 59 %splat.splatinsert = insertelement <2 x i64> undef, i64 %a, i32 0 60 %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer 61 ret <2 x i64> %splat.splat 62; CHECK-LABEL: buildl 63; CHECK: mtvsrd f0, r3 64; CHECK-LE-LABEL: buildl 65; CHECK-LE: mtvsrd f0, r3 66; CHECK-LE: xxspltd v2, vs0, 0 67} 68 69; Function Attrs: norecurse nounwind readnone 70define <4 x float> @buildf(float %a) { 71entry: 72 %splat.splatinsert = insertelement <4 x float> undef, float %a, i32 0 73 %splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> zeroinitializer 74 ret <4 x float> %splat.splat 75; CHECK-LABEL: buildf 76; CHECK: xscvdpspn vs0, f1 77; CHECK: xxspltw v2, vs0, 0 78; CHECK-LE-LABEL: buildf 79; CHECK-LE: xscvdpspn vs0, f1 80; CHECK-LE: xxspltw v2, vs0, 0 81} 82 83; The optimization to remove stack operations from PPCDAGToDAGISel::Select 84; should still trigger for v2f64, producing an lxvdsx. 85; Function Attrs: norecurse nounwind readonly 86define <2 x double> @buildd() { 87entry: 88 %0 = load double, double* @d, align 8 89 %splat.splatinsert = insertelement <2 x double> undef, double %0, i32 0 90 %splat.splat = shufflevector <2 x double> %splat.splatinsert, <2 x double> undef, <2 x i32> zeroinitializer 91 ret <2 x double> %splat.splat 92; CHECK-LABEL: buildd 93; CHECK: ld r3, .LC0@toc@l(r3) 94; CHECK: lxvdsx v2, 0, r3 95; CHECK-LE-LABEL: buildd 96; CHECK-LE: ld r3, .LC0@toc@l(r3) 97; CHECK-LE: lxvdsx v2, 0, r3 98} 99 100; Function Attrs: norecurse nounwind readnone 101define signext i8 @getsc0(<16 x i8> %vsc) { 102entry: 103 %vecext = extractelement <16 x i8> %vsc, i32 0 104 ret i8 %vecext 105; CHECK-LABEL: @getsc0 106; CHECK: mfvsrd r3, v2 107; CHECK: rldicl r3, r3, 8, 56 108; CHECK: extsb r3, r3 109; CHECK-LE-LABEL: @getsc0 110; CHECK-LE: mfvsrd r3, f0 111; CHECK-LE: clrldi r3, r3, 56 112; CHECK-LE: extsb r3, r3 113} 114 115; Function Attrs: norecurse nounwind readnone 116define signext i8 @getsc1(<16 x i8> %vsc) { 117entry: 118 %vecext = extractelement <16 x i8> %vsc, i32 1 119 ret i8 %vecext 120; CHECK-LABEL: @getsc1 121; CHECK: mfvsrd r3, v2 122; CHECK: rldicl r3, r3, 16, 56 123; CHECK: extsb r3, r3 124; CHECK-LE-LABEL: @getsc1 125; CHECK-LE: mfvsrd r3, f0 126; CHECK-LE: rldicl r3, r3, 56, 56 127; CHECK-LE: extsb r3, r3 128} 129 130; Function Attrs: norecurse nounwind readnone 131define signext i8 @getsc2(<16 x i8> %vsc) { 132entry: 133 %vecext = extractelement <16 x i8> %vsc, i32 2 134 ret i8 %vecext 135; CHECK-LABEL: @getsc2 136; CHECK: mfvsrd r3, v2 137; CHECK: rldicl r3, r3, 24, 56 138; CHECK: extsb r3, r3 139; CHECK-LE-LABEL: @getsc2 140; CHECK-LE: mfvsrd r3, f0 141; CHECK-LE: rldicl r3, r3, 48, 56 142; CHECK-LE: extsb r3, r3 143} 144 145; Function Attrs: norecurse nounwind readnone 146define signext i8 @getsc3(<16 x i8> %vsc) { 147entry: 148 %vecext = extractelement <16 x i8> %vsc, i32 3 149 ret i8 %vecext 150; CHECK-LABEL: @getsc3 151; CHECK: mfvsrd r3, v2 152; CHECK: rldicl r3, r3, 32, 56 153; CHECK: extsb r3, r3 154; CHECK-LE-LABEL: @getsc3 155; CHECK-LE: mfvsrd r3, f0 156; CHECK-LE: rldicl r3, r3, 40, 56 157; CHECK-LE: extsb r3, r3 158} 159 160; Function Attrs: norecurse nounwind readnone 161define signext i8 @getsc4(<16 x i8> %vsc) { 162entry: 163 %vecext = extractelement <16 x i8> %vsc, i32 4 164 ret i8 %vecext 165; CHECK-LABEL: @getsc4 166; CHECK: mfvsrd r3, v2 167; CHECK: rldicl r3, r3, 40, 56 168; CHECK: extsb r3, r3 169; CHECK-LE-LABEL: @getsc4 170; CHECK-LE: mfvsrd r3, f0 171; CHECK-LE: rldicl r3, r3, 32, 56 172; CHECK-LE: extsb r3, r3 173} 174 175; Function Attrs: norecurse nounwind readnone 176define signext i8 @getsc5(<16 x i8> %vsc) { 177entry: 178 %vecext = extractelement <16 x i8> %vsc, i32 5 179 ret i8 %vecext 180; CHECK-LABEL: @getsc5 181; CHECK: mfvsrd r3, v2 182; CHECK: rldicl r3, r3, 48, 56 183; CHECK: extsb r3, r3 184; CHECK-LE-LABEL: @getsc5 185; CHECK-LE: mfvsrd r3, f0 186; CHECK-LE: rldicl r3, r3, 24, 56 187; CHECK-LE: extsb r3, r3 188} 189 190; Function Attrs: norecurse nounwind readnone 191define signext i8 @getsc6(<16 x i8> %vsc) { 192entry: 193 %vecext = extractelement <16 x i8> %vsc, i32 6 194 ret i8 %vecext 195; CHECK-LABEL: @getsc6 196; CHECK: mfvsrd r3, v2 197; CHECK: rldicl r3, r3, 56, 56 198; CHECK: extsb r3, r3 199; CHECK-LE-LABEL: @getsc6 200; CHECK-LE: mfvsrd r3, f0 201; CHECK-LE: rldicl r3, r3, 16, 56 202; CHECK-LE: extsb r3, r3 203} 204 205; Function Attrs: norecurse nounwind readnone 206define signext i8 @getsc7(<16 x i8> %vsc) { 207entry: 208 %vecext = extractelement <16 x i8> %vsc, i32 7 209 ret i8 %vecext 210; CHECK-LABEL: @getsc7 211; CHECK: mfvsrd r3, v2 212; CHECK: clrldi r3, r3, 56 213; CHECK: extsb r3, r3 214; CHECK-LE-LABEL: @getsc7 215; CHECK-LE: mfvsrd r3, f0 216; CHECK-LE: rldicl r3, r3, 8, 56 217; CHECK-LE: extsb r3, r3 218} 219 220; Function Attrs: norecurse nounwind readnone 221define signext i8 @getsc8(<16 x i8> %vsc) { 222entry: 223 %vecext = extractelement <16 x i8> %vsc, i32 8 224 ret i8 %vecext 225; CHECK-LABEL: @getsc8 226; CHECK: mfvsrd r3, f0 227; CHECK: rldicl r3, r3, 8, 56 228; CHECK: extsb r3, r3 229; CHECK-LE-LABEL: @getsc8 230; CHECK-LE: mfvsrd r3, v2 231; CHECK-LE: clrldi r3, r3, 56 232; CHECK-LE: extsb r3, r3 233} 234 235; Function Attrs: norecurse nounwind readnone 236define signext i8 @getsc9(<16 x i8> %vsc) { 237entry: 238 %vecext = extractelement <16 x i8> %vsc, i32 9 239 ret i8 %vecext 240; CHECK-LABEL: @getsc9 241; CHECK: mfvsrd r3, f0 242; CHECK: rldicl r3, r3, 16, 56 243; CHECK: extsb r3, r3 244; CHECK-LE-LABEL: @getsc9 245; CHECK-LE: mfvsrd r3, v2 246; CHECK-LE: rldicl r3, r3, 56, 56 247; CHECK-LE: extsb r3, r3 248} 249 250; Function Attrs: norecurse nounwind readnone 251define signext i8 @getsc10(<16 x i8> %vsc) { 252entry: 253 %vecext = extractelement <16 x i8> %vsc, i32 10 254 ret i8 %vecext 255; CHECK-LABEL: @getsc10 256; CHECK: mfvsrd r3, f0 257; CHECK: rldicl r3, r3, 24, 56 258; CHECK: extsb r3, r3 259; CHECK-LE-LABEL: @getsc10 260; CHECK-LE: mfvsrd r3, v2 261; CHECK-LE: rldicl r3, r3, 48, 56 262; CHECK-LE: extsb r3, r3 263} 264 265; Function Attrs: norecurse nounwind readnone 266define signext i8 @getsc11(<16 x i8> %vsc) { 267entry: 268 %vecext = extractelement <16 x i8> %vsc, i32 11 269 ret i8 %vecext 270; CHECK-LABEL: @getsc11 271; CHECK: mfvsrd r3, f0 272; CHECK: rldicl r3, r3, 32, 56 273; CHECK: extsb r3, r3 274; CHECK-LE-LABEL: @getsc11 275; CHECK-LE: mfvsrd r3, v2 276; CHECK-LE: rldicl r3, r3, 40, 56 277; CHECK-LE: extsb r3, r3 278} 279 280; Function Attrs: norecurse nounwind readnone 281define signext i8 @getsc12(<16 x i8> %vsc) { 282entry: 283 %vecext = extractelement <16 x i8> %vsc, i32 12 284 ret i8 %vecext 285; CHECK-LABEL: @getsc12 286; CHECK: mfvsrd r3, f0 287; CHECK: rldicl r3, r3, 40, 56 288; CHECK: extsb r3, r3 289; CHECK-LE-LABEL: @getsc12 290; CHECK-LE: mfvsrd r3, v2 291; CHECK-LE: rldicl r3, r3, 32, 56 292; CHECK-LE: extsb r3, r3 293} 294 295; Function Attrs: norecurse nounwind readnone 296define signext i8 @getsc13(<16 x i8> %vsc) { 297entry: 298 %vecext = extractelement <16 x i8> %vsc, i32 13 299 ret i8 %vecext 300; CHECK-LABEL: @getsc13 301; CHECK: mfvsrd r3, f0 302; CHECK: rldicl r3, r3, 48, 56 303; CHECK: extsb r3, r3 304; CHECK-LE-LABEL: @getsc13 305; CHECK-LE: mfvsrd r3, v2 306; CHECK-LE: rldicl r3, r3, 24, 56 307; CHECK-LE: extsb r3, r3 308} 309 310; Function Attrs: norecurse nounwind readnone 311define signext i8 @getsc14(<16 x i8> %vsc) { 312entry: 313 %vecext = extractelement <16 x i8> %vsc, i32 14 314 ret i8 %vecext 315; CHECK-LABEL: @getsc14 316; CHECK: mfvsrd r3, f0 317; CHECK: rldicl r3, r3, 56, 56 318; CHECK: extsb r3, r3 319; CHECK-LE-LABEL: @getsc14 320; CHECK-LE: mfvsrd r3, v2 321; CHECK-LE: rldicl r3, r3, 16, 56 322; CHECK-LE: extsb r3, r3 323} 324 325; Function Attrs: norecurse nounwind readnone 326define signext i8 @getsc15(<16 x i8> %vsc) { 327entry: 328 %vecext = extractelement <16 x i8> %vsc, i32 15 329 ret i8 %vecext 330; CHECK-LABEL: @getsc15 331; CHECK: mfvsrd r3, f0 332; CHECK: clrldi r3, r3, 56 333; CHECK: extsb r3, r3 334; CHECK-LE-LABEL: @getsc15 335; CHECK-LE: mfvsrd r3, v2 336; CHECK-LE: rldicl r3, r3, 8, 56 337; CHECK-LE: extsb r3, r3 338} 339 340; Function Attrs: norecurse nounwind readnone 341define zeroext i8 @getuc0(<16 x i8> %vuc) { 342entry: 343 %vecext = extractelement <16 x i8> %vuc, i32 0 344 ret i8 %vecext 345; CHECK-LABEL: @getuc0 346; CHECK: mfvsrd r3, v2 347; CHECK: rldicl r3, r3, 8, 56 348; CHECK-LE-LABEL: @getuc0 349; CHECK-LE: mfvsrd r3, f0 350; CHECK-LE: clrldi r3, r3, 56 351} 352 353; Function Attrs: norecurse nounwind readnone 354define zeroext i8 @getuc1(<16 x i8> %vuc) { 355entry: 356 %vecext = extractelement <16 x i8> %vuc, i32 1 357 ret i8 %vecext 358; CHECK-LABEL: @getuc1 359; CHECK: mfvsrd r3, v2 360; CHECK: rldicl r3, r3, 16, 56 361; CHECK-LE-LABEL: @getuc1 362; CHECK-LE: mfvsrd r3, f0 363; CHECK-LE: rldicl r3, r3, 56, 56 364} 365 366; Function Attrs: norecurse nounwind readnone 367define zeroext i8 @getuc2(<16 x i8> %vuc) { 368entry: 369 %vecext = extractelement <16 x i8> %vuc, i32 2 370 ret i8 %vecext 371; CHECK-LABEL: @getuc2 372; CHECK: mfvsrd r3, v2 373; CHECK: rldicl r3, r3, 24, 56 374; CHECK-LE-LABEL: @getuc2 375; CHECK-LE: mfvsrd r3, f0 376; CHECK-LE: rldicl r3, r3, 48, 56 377} 378 379; Function Attrs: norecurse nounwind readnone 380define zeroext i8 @getuc3(<16 x i8> %vuc) { 381entry: 382 %vecext = extractelement <16 x i8> %vuc, i32 3 383 ret i8 %vecext 384; CHECK-LABEL: @getuc3 385; CHECK: mfvsrd r3, v2 386; CHECK: rldicl r3, r3, 32, 56 387; CHECK-LE-LABEL: @getuc3 388; CHECK-LE: mfvsrd r3, f0 389; CHECK-LE: rldicl r3, r3, 40, 56 390} 391 392; Function Attrs: norecurse nounwind readnone 393define zeroext i8 @getuc4(<16 x i8> %vuc) { 394entry: 395 %vecext = extractelement <16 x i8> %vuc, i32 4 396 ret i8 %vecext 397; CHECK-LABEL: @getuc4 398; CHECK: mfvsrd r3, v2 399; CHECK: rldicl r3, r3, 40, 56 400; CHECK-LE-LABEL: @getuc4 401; CHECK-LE: mfvsrd r3, f0 402; CHECK-LE: rldicl r3, r3, 32, 56 403} 404 405; Function Attrs: norecurse nounwind readnone 406define zeroext i8 @getuc5(<16 x i8> %vuc) { 407entry: 408 %vecext = extractelement <16 x i8> %vuc, i32 5 409 ret i8 %vecext 410; CHECK-LABEL: @getuc5 411; CHECK: mfvsrd r3, v2 412; CHECK: rldicl r3, r3, 48, 56 413; CHECK-LE-LABEL: @getuc5 414; CHECK-LE: mfvsrd r3, f0 415; CHECK-LE: rldicl r3, r3, 24, 56 416} 417 418; Function Attrs: norecurse nounwind readnone 419define zeroext i8 @getuc6(<16 x i8> %vuc) { 420entry: 421 %vecext = extractelement <16 x i8> %vuc, i32 6 422 ret i8 %vecext 423; CHECK-LABEL: @getuc6 424; CHECK: mfvsrd r3, v2 425; CHECK: rldicl r3, r3, 56, 56 426; CHECK-LE-LABEL: @getuc6 427; CHECK-LE: mfvsrd r3, f0 428; CHECK-LE: rldicl r3, r3, 16, 56 429} 430 431; Function Attrs: norecurse nounwind readnone 432define zeroext i8 @getuc7(<16 x i8> %vuc) { 433entry: 434 %vecext = extractelement <16 x i8> %vuc, i32 7 435 ret i8 %vecext 436; CHECK-LABEL: @getuc7 437; CHECK: mfvsrd r3, v2 438; CHECK: clrldi r3, r3, 56 439; CHECK-LE-LABEL: @getuc7 440; CHECK-LE: mfvsrd r3, f0 441; CHECK-LE: rldicl r3, r3, 8, 56 442} 443 444; Function Attrs: norecurse nounwind readnone 445define zeroext i8 @getuc8(<16 x i8> %vuc) { 446entry: 447 %vecext = extractelement <16 x i8> %vuc, i32 8 448 ret i8 %vecext 449; CHECK-LABEL: @getuc8 450; CHECK: mfvsrd r3, f0 451; CHECK: rldicl r3, r3, 8, 56 452; CHECK-LE-LABEL: @getuc8 453; CHECK-LE: mfvsrd r3, v2 454; CHECK-LE: clrldi r3, r3, 56 455} 456 457; Function Attrs: norecurse nounwind readnone 458define zeroext i8 @getuc9(<16 x i8> %vuc) { 459entry: 460 %vecext = extractelement <16 x i8> %vuc, i32 9 461 ret i8 %vecext 462; CHECK-LABEL: @getuc9 463; CHECK: mfvsrd r3, f0 464; CHECK: rldicl r3, r3, 16, 56 465; CHECK-LE-LABEL: @getuc9 466; CHECK-LE: mfvsrd r3, v2 467; CHECK-LE: rldicl r3, r3, 56, 56 468} 469 470; Function Attrs: norecurse nounwind readnone 471define zeroext i8 @getuc10(<16 x i8> %vuc) { 472entry: 473 %vecext = extractelement <16 x i8> %vuc, i32 10 474 ret i8 %vecext 475; CHECK-LABEL: @getuc10 476; CHECK: mfvsrd r3, f0 477; CHECK: rldicl r3, r3, 24, 56 478; CHECK-LE-LABEL: @getuc10 479; CHECK-LE: mfvsrd r3, v2 480; CHECK-LE: rldicl r3, r3, 48, 56 481} 482 483; Function Attrs: norecurse nounwind readnone 484define zeroext i8 @getuc11(<16 x i8> %vuc) { 485entry: 486 %vecext = extractelement <16 x i8> %vuc, i32 11 487 ret i8 %vecext 488; CHECK-LABEL: @getuc11 489; CHECK: mfvsrd r3, f0 490; CHECK: rldicl r3, r3, 32, 56 491; CHECK-LE-LABEL: @getuc11 492; CHECK-LE: mfvsrd r3, v2 493; CHECK-LE: rldicl r3, r3, 40, 56 494} 495 496; Function Attrs: norecurse nounwind readnone 497define zeroext i8 @getuc12(<16 x i8> %vuc) { 498entry: 499 %vecext = extractelement <16 x i8> %vuc, i32 12 500 ret i8 %vecext 501; CHECK-LABEL: @getuc12 502; CHECK: mfvsrd r3, f0 503; CHECK: rldicl r3, r3, 40, 56 504; CHECK-LE-LABEL: @getuc12 505; CHECK-LE: mfvsrd r3, v2 506; CHECK-LE: rldicl r3, r3, 32, 56 507} 508 509; Function Attrs: norecurse nounwind readnone 510define zeroext i8 @getuc13(<16 x i8> %vuc) { 511entry: 512 %vecext = extractelement <16 x i8> %vuc, i32 13 513 ret i8 %vecext 514; CHECK-LABEL: @getuc13 515; CHECK: mfvsrd r3, f0 516; CHECK: rldicl r3, r3, 48, 56 517; CHECK-LE-LABEL: @getuc13 518; CHECK-LE: mfvsrd r3, v2 519; CHECK-LE: rldicl r3, r3, 24, 56 520} 521 522; Function Attrs: norecurse nounwind readnone 523define zeroext i8 @getuc14(<16 x i8> %vuc) { 524entry: 525 %vecext = extractelement <16 x i8> %vuc, i32 14 526 ret i8 %vecext 527; CHECK-LABEL: @getuc14 528; CHECK: mfvsrd r3, f0 529; CHECK: rldicl r3, r3, 56, 56 530; CHECK-LE-LABEL: @getuc14 531; CHECK-LE: mfvsrd r3, v2 532; CHECK-LE: rldicl r3, r3, 16, 56 533} 534 535; Function Attrs: norecurse nounwind readnone 536define zeroext i8 @getuc15(<16 x i8> %vuc) { 537entry: 538 %vecext = extractelement <16 x i8> %vuc, i32 15 539 ret i8 %vecext 540; CHECK-LABEL: @getuc15 541; CHECK: mfvsrd r3, f0 542; CHECK: clrldi r3, r3, 56 543; CHECK-LE-LABEL: @getuc15 544; CHECK-LE: mfvsrd r3, v2 545; CHECK-LE: rldicl r3, r3, 8, 56 546} 547 548; Function Attrs: norecurse nounwind readnone 549define signext i8 @getvelsc(<16 x i8> %vsc, i32 signext %i) { 550; CHECK-LABEL: @getvelsc 551; CHECK: andi. r4, r5, 8 552; CHECK: li r3, 7 553; CHECK: lvsl v3, 0, r4 554; CHECK: andc r3, r3, r5 555; CHECK: sldi r3, r3, 3 556; CHECK: vperm v2, v2, v2, v3 557; CHECK: mfvsrd r4, v2 558; CHECK: srd r3, r4, r3 559; CHECK: extsb r3, r3 560; CHECK-LE-LABEL: @getvelsc 561; CHECK-LE: li r3, 8 562; CHECK-LE: andc r3, r3, r5 563; CHECK-LE: lvsl v3, 0, r3 564; CHECK-LE: li r3, 7 565; CHECK-LE: and r3, r3, r5 566; CHECK-LE: vperm v2, v2, v2, v3 567; CHECK-LE: sldi r3, r3, 3 568; CHECK-LE: mfvsrd r4, v2 569; CHECK-LE: srd r3, r4, r3 570; CHECK-LE: extsb r3, r3 571entry: 572 %vecext = extractelement <16 x i8> %vsc, i32 %i 573 ret i8 %vecext 574} 575 576; Function Attrs: norecurse nounwind readnone 577define zeroext i8 @getveluc(<16 x i8> %vuc, i32 signext %i) { 578; CHECK-LABEL: @getveluc 579; CHECK: andi. r4, r5, 8 580; CHECK: li r3, 7 581; CHECK: lvsl v3, 0, r4 582; CHECK: andc r3, r3, r5 583; CHECK: sldi r3, r3, 3 584; CHECK: vperm v2, v2, v2, v3 585; CHECK: mfvsrd r4, v2 586; CHECK: srd r3, r4, r3 587; CHECK: clrldi r3, r3, 5 588; CHECK-LE-LABEL: @getveluc 589; CHECK-LE: li r3, 8 590; CHECK-LE: andc r3, r3, r5 591; CHECK-LE: lvsl v3, 0, r3 592; CHECK-LE: li r3, 7 593; CHECK-LE: and r3, r3, r5 594; CHECK-LE: vperm v2, v2, v2, v3 595; CHECK-LE: sldi r3, r3, 3 596; CHECK-LE: mfvsrd r4, v2 597; CHECK-LE: srd r3, r4, r3 598; CHECK-LE: clrldi r3, r3, 56 599entry: 600 %vecext = extractelement <16 x i8> %vuc, i32 %i 601 ret i8 %vecext 602} 603 604; Function Attrs: norecurse nounwind readnone 605define signext i16 @getss0(<8 x i16> %vss) { 606entry: 607 %vecext = extractelement <8 x i16> %vss, i32 0 608 ret i16 %vecext 609; CHECK-LABEL: @getss0 610; CHECK: mfvsrd r3, v2 611; CHECK: rldicl r3, r3, 16, 48 612; CHECK: extsh r3, r3 613; CHECK-LE-LABEL: @getss0 614; CHECK-LE: mfvsrd r3, f0 615; CHECK-LE: clrldi r3, r3, 48 616; CHECK-LE: extsh r3, r3 617} 618 619; Function Attrs: norecurse nounwind readnone 620define signext i16 @getss1(<8 x i16> %vss) { 621entry: 622 %vecext = extractelement <8 x i16> %vss, i32 1 623 ret i16 %vecext 624; CHECK-LABEL: @getss1 625; CHECK: mfvsrd r3, v2 626; CHECK: rldicl r3, r3, 32, 48 627; CHECK: extsh r3, r3 628; CHECK-LE-LABEL: @getss1 629; CHECK-LE: mfvsrd r3, f0 630; CHECK-LE: rldicl r3, r3, 48, 48 631; CHECK-LE: extsh r3, r3 632} 633 634; Function Attrs: norecurse nounwind readnone 635define signext i16 @getss2(<8 x i16> %vss) { 636entry: 637 %vecext = extractelement <8 x i16> %vss, i32 2 638 ret i16 %vecext 639; CHECK-LABEL: @getss2 640; CHECK: mfvsrd r3, v2 641; CHECK: rldicl r3, r3, 48, 48 642; CHECK: extsh r3, r3 643; CHECK-LE-LABEL: @getss2 644; CHECK-LE: mfvsrd r3, f0 645; CHECK-LE: rldicl r3, r3, 32, 48 646; CHECK-LE: extsh r3, r3 647} 648 649; Function Attrs: norecurse nounwind readnone 650define signext i16 @getss3(<8 x i16> %vss) { 651entry: 652 %vecext = extractelement <8 x i16> %vss, i32 3 653 ret i16 %vecext 654; CHECK-LABEL: @getss3 655; CHECK: mfvsrd r3, v2 656; CHECK: clrldi r3, r3, 48 657; CHECK: extsh r3, r3 658; CHECK-LE-LABEL: @getss3 659; CHECK-LE: mfvsrd r3, f0 660; CHECK-LE: rldicl r3, r3, 16, 48 661; CHECK-LE: extsh r3, r3 662} 663 664; Function Attrs: norecurse nounwind readnone 665define signext i16 @getss4(<8 x i16> %vss) { 666entry: 667 %vecext = extractelement <8 x i16> %vss, i32 4 668 ret i16 %vecext 669; CHECK-LABEL: @getss4 670; CHECK: mfvsrd r3, f0 671; CHECK: rldicl r3, r3, 16, 48 672; CHECK: extsh r3, r3 673; CHECK-LE-LABEL: @getss4 674; CHECK-LE: mfvsrd r3, v2 675; CHECK-LE: clrldi r3, r3, 48 676; CHECK-LE: extsh r3, r3 677} 678 679; Function Attrs: norecurse nounwind readnone 680define signext i16 @getss5(<8 x i16> %vss) { 681entry: 682 %vecext = extractelement <8 x i16> %vss, i32 5 683 ret i16 %vecext 684; CHECK-LABEL: @getss5 685; CHECK: mfvsrd r3, f0 686; CHECK: rldicl r3, r3, 32, 48 687; CHECK: extsh r3, r3 688; CHECK-LE-LABEL: @getss5 689; CHECK-LE: mfvsrd r3, v2 690; CHECK-LE: rldicl r3, r3, 48, 48 691; CHECK-LE: extsh r3, r3 692} 693 694; Function Attrs: norecurse nounwind readnone 695define signext i16 @getss6(<8 x i16> %vss) { 696entry: 697 %vecext = extractelement <8 x i16> %vss, i32 6 698 ret i16 %vecext 699; CHECK-LABEL: @getss6 700; CHECK: mfvsrd r3, f0 701; CHECK: rldicl r3, r3, 48, 48 702; CHECK: extsh r3, r3 703; CHECK-LE-LABEL: @getss6 704; CHECK-LE: mfvsrd r3, v2 705; CHECK-LE: rldicl r3, r3, 32, 48 706; CHECK-LE: extsh r3, r3 707} 708 709; Function Attrs: norecurse nounwind readnone 710define signext i16 @getss7(<8 x i16> %vss) { 711entry: 712 %vecext = extractelement <8 x i16> %vss, i32 7 713 ret i16 %vecext 714; CHECK-LABEL: @getss7 715; CHECK: mfvsrd r3, f0 716; CHECK: clrldi r3, r3, 48 717; CHECK: extsh r3, r3 718; CHECK-LE-LABEL: @getss7 719; CHECK-LE: mfvsrd r3, v2 720; CHECK-LE: rldicl r3, r3, 16, 48 721; CHECK-LE: extsh r3, r3 722} 723 724; Function Attrs: norecurse nounwind readnone 725define zeroext i16 @getus0(<8 x i16> %vus) { 726entry: 727 %vecext = extractelement <8 x i16> %vus, i32 0 728 ret i16 %vecext 729; CHECK-LABEL: @getus0 730; CHECK: mfvsrd r3, v2 731; CHECK: rldicl r3, r3, 16, 48 732; CHECK-LE-LABEL: @getus0 733; CHECK-LE: mfvsrd r3, f0 734; CHECK-LE: clrldi r3, r3, 48 735} 736 737; Function Attrs: norecurse nounwind readnone 738define zeroext i16 @getus1(<8 x i16> %vus) { 739entry: 740 %vecext = extractelement <8 x i16> %vus, i32 1 741 ret i16 %vecext 742; CHECK-LABEL: @getus1 743; CHECK: mfvsrd r3, v2 744; CHECK: rldicl r3, r3, 32, 48 745; CHECK-LE-LABEL: @getus1 746; CHECK-LE: mfvsrd r3, f0 747; CHECK-LE: rldicl r3, r3, 48, 48 748} 749 750; Function Attrs: norecurse nounwind readnone 751define zeroext i16 @getus2(<8 x i16> %vus) { 752entry: 753 %vecext = extractelement <8 x i16> %vus, i32 2 754 ret i16 %vecext 755; CHECK-LABEL: @getus2 756; CHECK: mfvsrd r3, v2 757; CHECK: rldicl r3, r3, 48, 48 758; CHECK-LE-LABEL: @getus2 759; CHECK-LE: mfvsrd r3, f0 760; CHECK-LE: rldicl r3, r3, 32, 48 761} 762 763; Function Attrs: norecurse nounwind readnone 764define zeroext i16 @getus3(<8 x i16> %vus) { 765entry: 766 %vecext = extractelement <8 x i16> %vus, i32 3 767 ret i16 %vecext 768; CHECK-LABEL: @getus3 769; CHECK: mfvsrd r3, v2 770; CHECK: clrldi r3, r3, 48 771; CHECK-LE-LABEL: @getus3 772; CHECK-LE: mfvsrd r3, f0 773; CHECK-LE: rldicl r3, r3, 16, 48 774} 775 776; Function Attrs: norecurse nounwind readnone 777define zeroext i16 @getus4(<8 x i16> %vus) { 778entry: 779 %vecext = extractelement <8 x i16> %vus, i32 4 780 ret i16 %vecext 781; CHECK-LABEL: @getus4 782; CHECK: mfvsrd r3, f0 783; CHECK: rldicl r3, r3, 16, 48 784; CHECK-LE-LABEL: @getus4 785; CHECK-LE: mfvsrd r3, v2 786; CHECK-LE: clrldi r3, r3, 48 787} 788 789; Function Attrs: norecurse nounwind readnone 790define zeroext i16 @getus5(<8 x i16> %vus) { 791entry: 792 %vecext = extractelement <8 x i16> %vus, i32 5 793 ret i16 %vecext 794; CHECK-LABEL: @getus5 795; CHECK: mfvsrd r3, f0 796; CHECK: rldicl r3, r3, 32, 48 797; CHECK-LE-LABEL: @getus5 798; CHECK-LE: mfvsrd r3, v2 799; CHECK-LE: rldicl r3, r3, 48, 48 800} 801 802; Function Attrs: norecurse nounwind readnone 803define zeroext i16 @getus6(<8 x i16> %vus) { 804entry: 805 %vecext = extractelement <8 x i16> %vus, i32 6 806 ret i16 %vecext 807; CHECK-LABEL: @getus6 808; CHECK: mfvsrd r3, f0 809; CHECK: rldicl r3, r3, 48, 48 810; CHECK-LE-LABEL: @getus6 811; CHECK-LE: mfvsrd r3, v2 812; CHECK-LE: rldicl r3, r3, 32, 48 813} 814 815; Function Attrs: norecurse nounwind readnone 816define zeroext i16 @getus7(<8 x i16> %vus) { 817entry: 818 %vecext = extractelement <8 x i16> %vus, i32 7 819 ret i16 %vecext 820; CHECK-LABEL: @getus7 821; CHECK: mfvsrd r3, f0 822; CHECK: clrldi r3, r3, 48 823; CHECK-LE-LABEL: @getus7 824; CHECK-LE: mfvsrd r3, v2 825; CHECK-LE: rldicl r3, r3, 16, 48 826} 827 828; Function Attrs: norecurse nounwind readnone 829define signext i16 @getvelss(<8 x i16> %vss, i32 signext %i) { 830; CHECK-LABEL: @getvelss 831; CHECK: andi. r4, r5, 4 832; CHECK: li r3, 3 833; CHECK: sldi r4, r4, 1 834; CHECK: andc r3, r3, r5 835; CHECK: lvsl v3, 0, r4 836; CHECK: sldi r3, r3, 4 837; CHECK: vperm v2, v2, v2, v3 838; CHECK: mfvsrd r4, v2 839; CHECK: srd r3, r4, r3 840; CHECK: extsh r3, r3 841; CHECK-LE-LABEL: @getvelss 842; CHECK-LE: li r3, 4 843; CHECK-LE: andc r3, r3, r5 844; CHECK-LE: sldi r3, r3, 1 845; CHECK-LE: lvsl v3, 0, r3 846; CHECK-LE: li r3, 3 847; CHECK-LE: and r3, r3, r5 848; CHECK-LE: vperm v2, v2, v2, v3 849; CHECK-LE: sldi r3, r3, 4 850; CHECK-LE: mfvsrd r4, v2 851; CHECK-LE: srd r3, r4, r3 852; CHECK-LE: extsh r3, r3 853entry: 854 %vecext = extractelement <8 x i16> %vss, i32 %i 855 ret i16 %vecext 856} 857 858; Function Attrs: norecurse nounwind readnone 859define zeroext i16 @getvelus(<8 x i16> %vus, i32 signext %i) { 860; CHECK-LABEL: @getvelus 861; CHECK: andi. r4, r5, 4 862; CHECK: li r3, 3 863; CHECK: sldi r4, r4, 1 864; CHECK: andc r3, r3, r5 865; CHECK: lvsl v3, 0, r4 866; CHECK: sldi r3, r3, 4 867; CHECK: vperm v2, v2, v2, v3 868; CHECK: mfvsrd r4, v2 869; CHECK: srd r3, r4, r3 870; CHECK: clrldi r3, r3, 48 871; CHECK-LE-LABEL: @getvelus 872; CHECK-LE: li r3, 4 873; CHECK-LE: andc r3, r3, r5 874; CHECK-LE: sldi r3, r3, 1 875; CHECK-LE: lvsl v3, 0, r3 876; CHECK-LE: li r3, 3 877; CHECK-LE: and r3, r3, r5 878; CHECK-LE: vperm v2, v2, v2, v3 879; CHECK-LE: sldi r3, r3, 4 880; CHECK-LE: mfvsrd r4, v2 881; CHECK-LE: srd r3, r4, r3 882; CHECK-LE: clrldi r3, r3, 48 883entry: 884 %vecext = extractelement <8 x i16> %vus, i32 %i 885 ret i16 %vecext 886} 887 888; Function Attrs: norecurse nounwind readnone 889define signext i32 @getsi0(<4 x i32> %vsi) { 890entry: 891 %vecext = extractelement <4 x i32> %vsi, i32 0 892 ret i32 %vecext 893; CHECK-LABEL: @getsi0 894; CHECK: xxsldwi vs0, v2, v2, 3 895; CHECK: mfvsrwz r3, f0 896; CHECK: extsw r3, r3 897; CHECK-LE-LABEL: @getsi0 898; CHECK-LE: xxswapd vs0, v2 899; CHECK-LE: mfvsrwz r3, f0 900; CHECK-LE: extsw r3, r3 901} 902 903; Function Attrs: norecurse nounwind readnone 904define signext i32 @getsi1(<4 x i32> %vsi) { 905entry: 906 %vecext = extractelement <4 x i32> %vsi, i32 1 907 ret i32 %vecext 908; CHECK-LABEL: @getsi1 909; CHECK: mfvsrwz r3, v2 910; CHECK: extsw r3, r3 911; CHECK-LE-LABEL: @getsi1 912; CHECK-LE: xxsldwi vs0, v2, v2, 1 913; CHECK-LE: mfvsrwz r3, f0 914; CHECK-LE: extsw r3, r3 915} 916 917; Function Attrs: norecurse nounwind readnone 918define signext i32 @getsi2(<4 x i32> %vsi) { 919entry: 920 %vecext = extractelement <4 x i32> %vsi, i32 2 921 ret i32 %vecext 922; CHECK-LABEL: @getsi2 923; CHECK: xxsldwi vs0, v2, v2, 1 924; CHECK: mfvsrwz r3, f0 925; CHECK: extsw r3, r3 926; CHECK-LE-LABEL: @getsi2 927; CHECK-LE: mfvsrwz r3, v2 928; CHECK-LE: extsw r3, r3 929} 930 931; Function Attrs: norecurse nounwind readnone 932define signext i32 @getsi3(<4 x i32> %vsi) { 933entry: 934 %vecext = extractelement <4 x i32> %vsi, i32 3 935 ret i32 %vecext 936; CHECK-LABEL: @getsi3 937; CHECK: xxswapd vs0, v2 938; CHECK: mfvsrwz r3, f0 939; CHECK: extsw r3, r3 940; CHECK-LE-LABEL: @getsi3 941; CHECK-LE: xxsldwi vs0, v2, v2, 3 942; CHECK-LE: mfvsrwz r3, f0 943; CHECK-LE: extsw r3, r3 944} 945 946; Function Attrs: norecurse nounwind readnone 947define zeroext i32 @getui0(<4 x i32> %vui) { 948entry: 949 %vecext = extractelement <4 x i32> %vui, i32 0 950 ret i32 %vecext 951; CHECK-LABEL: @getui0 952; CHECK: xxsldwi vs0, v2, v2, 3 953; CHECK: mfvsrwz r3, f0 954; CHECK-LE-LABEL: @getui0 955; CHECK-LE: xxswapd vs0, v2 956; CHECK-LE: mfvsrwz r3, f0 957} 958 959; Function Attrs: norecurse nounwind readnone 960define zeroext i32 @getui1(<4 x i32> %vui) { 961entry: 962 %vecext = extractelement <4 x i32> %vui, i32 1 963 ret i32 %vecext 964; CHECK-LABEL: @getui1 965; CHECK: mfvsrwz r3, v2 966; CHECK-LE-LABEL: @getui1 967; CHECK-LE: xxsldwi vs0, v2, v2, 1 968; CHECK-LE: mfvsrwz r3, f0 969} 970 971; Function Attrs: norecurse nounwind readnone 972define zeroext i32 @getui2(<4 x i32> %vui) { 973entry: 974 %vecext = extractelement <4 x i32> %vui, i32 2 975 ret i32 %vecext 976; CHECK-LABEL: @getui2 977; CHECK: xxsldwi vs0, v2, v2, 1 978; CHECK: mfvsrwz r3, f0 979; CHECK-LE-LABEL: @getui2 980; CHECK-LE: mfvsrwz r3, v2 981} 982 983; Function Attrs: norecurse nounwind readnone 984define zeroext i32 @getui3(<4 x i32> %vui) { 985entry: 986 %vecext = extractelement <4 x i32> %vui, i32 3 987 ret i32 %vecext 988; CHECK-LABEL: @getui3 989; CHECK: xxswapd vs0, v2 990; CHECK: mfvsrwz r3, f0 991; CHECK-LE-LABEL: @getui3 992; CHECK-LE: xxsldwi vs0, v2, v2, 3 993; CHECK-LE: mfvsrwz r3, f0 994} 995 996; Function Attrs: norecurse nounwind readnone 997define signext i32 @getvelsi(<4 x i32> %vsi, i32 signext %i) { 998entry: 999 %vecext = extractelement <4 x i32> %vsi, i32 %i 1000 ret i32 %vecext 1001; CHECK-LABEL: @getvelsi 1002; CHECK-LE-LABEL: @getvelsi 1003; FIXME: add check patterns when variable element extraction is implemented 1004} 1005 1006; Function Attrs: norecurse nounwind readnone 1007define zeroext i32 @getvelui(<4 x i32> %vui, i32 signext %i) { 1008entry: 1009 %vecext = extractelement <4 x i32> %vui, i32 %i 1010 ret i32 %vecext 1011; CHECK-LABEL: @getvelui 1012; CHECK-LE-LABEL: @getvelui 1013; FIXME: add check patterns when variable element extraction is implemented 1014} 1015 1016; Function Attrs: norecurse nounwind readnone 1017define i64 @getsl0(<2 x i64> %vsl) { 1018entry: 1019 %vecext = extractelement <2 x i64> %vsl, i32 0 1020 ret i64 %vecext 1021; CHECK-LABEL: @getsl0 1022; CHECK: mfvsrd r3, v2 1023; CHECK-LE-LABEL: @getsl0 1024; CHECK-LE: xxswapd vs0, v2 1025; CHECK-LE: mfvsrd r3, f0 1026} 1027 1028; Function Attrs: norecurse nounwind readnone 1029define i64 @getsl1(<2 x i64> %vsl) { 1030entry: 1031 %vecext = extractelement <2 x i64> %vsl, i32 1 1032 ret i64 %vecext 1033; CHECK-LABEL: @getsl1 1034; CHECK: xxswapd vs0, v2 1035; CHECK: mfvsrd r3, f0 1036; CHECK-LE-LABEL: @getsl1 1037; CHECK-LE: mfvsrd r3, v2 1038} 1039 1040; Function Attrs: norecurse nounwind readnone 1041define i64 @getul0(<2 x i64> %vul) { 1042entry: 1043 %vecext = extractelement <2 x i64> %vul, i32 0 1044 ret i64 %vecext 1045; CHECK-LABEL: @getul0 1046; CHECK: mfvsrd r3, v2 1047; CHECK-LE-LABEL: @getul0 1048; CHECK-LE: xxswapd vs0, v2 1049; CHECK-LE: mfvsrd r3, f0 1050} 1051 1052; Function Attrs: norecurse nounwind readnone 1053define i64 @getul1(<2 x i64> %vul) { 1054entry: 1055 %vecext = extractelement <2 x i64> %vul, i32 1 1056 ret i64 %vecext 1057; CHECK-LABEL: @getul1 1058; CHECK: xxswapd vs0, v2 1059; CHECK: mfvsrd r3, f0 1060; CHECK-LE-LABEL: @getul1 1061; CHECK-LE: mfvsrd r3, v2 1062} 1063 1064; Function Attrs: norecurse nounwind readnone 1065define i64 @getvelsl(<2 x i64> %vsl, i32 signext %i) { 1066entry: 1067 %vecext = extractelement <2 x i64> %vsl, i32 %i 1068 ret i64 %vecext 1069; CHECK-LABEL: @getvelsl 1070; CHECK-LE-LABEL: @getvelsl 1071; FIXME: add check patterns when variable element extraction is implemented 1072} 1073 1074; Function Attrs: norecurse nounwind readnone 1075define i64 @getvelul(<2 x i64> %vul, i32 signext %i) { 1076entry: 1077 %vecext = extractelement <2 x i64> %vul, i32 %i 1078 ret i64 %vecext 1079; CHECK-LABEL: @getvelul 1080; CHECK-LE-LABEL: @getvelul 1081; FIXME: add check patterns when variable element extraction is implemented 1082} 1083 1084; Function Attrs: norecurse nounwind readnone 1085define float @getf0(<4 x float> %vf) { 1086entry: 1087 %vecext = extractelement <4 x float> %vf, i32 0 1088 ret float %vecext 1089; CHECK-LABEL: @getf0 1090; CHECK: xscvspdpn f1, v2 1091; CHECK-LE-LABEL: @getf0 1092; CHECK-LE: xxsldwi vs0, v2, v2, 3 1093; CHECK-LE: xscvspdpn f1, vs0 1094} 1095 1096; Function Attrs: norecurse nounwind readnone 1097define float @getf1(<4 x float> %vf) { 1098entry: 1099 %vecext = extractelement <4 x float> %vf, i32 1 1100 ret float %vecext 1101; CHECK-LABEL: @getf1 1102; CHECK: xxsldwi vs0, v2, v2, 1 1103; CHECK: xscvspdpn f1, vs0 1104; CHECK-LE-LABEL: @getf1 1105; CHECK-LE: xxswapd vs0, v2 1106; CHECK-LE: xscvspdpn f1, vs0 1107} 1108 1109; Function Attrs: norecurse nounwind readnone 1110define float @getf2(<4 x float> %vf) { 1111entry: 1112 %vecext = extractelement <4 x float> %vf, i32 2 1113 ret float %vecext 1114; CHECK-LABEL: @getf2 1115; CHECK: xxswapd vs0, v2 1116; CHECK: xscvspdpn f1, vs0 1117; CHECK-LE-LABEL: @getf2 1118; CHECK-LE: xxsldwi vs0, v2, v2, 1 1119; CHECK-LE: xscvspdpn f1, vs0 1120} 1121 1122; Function Attrs: norecurse nounwind readnone 1123define float @getf3(<4 x float> %vf) { 1124entry: 1125 %vecext = extractelement <4 x float> %vf, i32 3 1126 ret float %vecext 1127; CHECK-LABEL: @getf3 1128; CHECK: xxsldwi vs0, v2, v2, 3 1129; CHECK: xscvspdpn f1, vs0 1130; CHECK-LE-LABEL: @getf3 1131; CHECK-LE: xscvspdpn f1, v2 1132} 1133 1134; Function Attrs: norecurse nounwind readnone 1135define float @getvelf(<4 x float> %vf, i32 signext %i) { 1136entry: 1137 %vecext = extractelement <4 x float> %vf, i32 %i 1138 ret float %vecext 1139; CHECK-LABEL: @getvelf 1140; CHECK-LE-LABEL: @getvelf 1141; FIXME: add check patterns when variable element extraction is implemented 1142} 1143 1144; Function Attrs: norecurse nounwind readnone 1145define double @getd0(<2 x double> %vd) { 1146entry: 1147 %vecext = extractelement <2 x double> %vd, i32 0 1148 ret double %vecext 1149; CHECK-LABEL: @getd0 1150; CHECK: xxlor f1, v2, v2 1151; CHECK-LE-LABEL: @getd0 1152; CHECK-LE: xxswapd vs1, v2 1153} 1154 1155; Function Attrs: norecurse nounwind readnone 1156define double @getd1(<2 x double> %vd) { 1157entry: 1158 %vecext = extractelement <2 x double> %vd, i32 1 1159 ret double %vecext 1160; CHECK-LABEL: @getd1 1161; CHECK: xxswapd vs1, v2 1162; CHECK-LE-LABEL: @getd1 1163; CHECK-LE: xxlor f1, v2, v2 1164} 1165 1166; Function Attrs: norecurse nounwind readnone 1167define double @getveld(<2 x double> %vd, i32 signext %i) { 1168entry: 1169 %vecext = extractelement <2 x double> %vd, i32 %i 1170 ret double %vecext 1171; CHECK-LABEL: @getveld 1172; CHECK-LE-LABEL: @getveld 1173; FIXME: add check patterns when variable element extraction is implemented 1174} 1175