1 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s
2 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
3 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
4 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=TERM_DEBUG
5 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -O1 -fopenmp -emit-llvm %s -o - | FileCheck %s --check-prefix=CLEANUP
6 
7 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck --check-prefix SIMD-ONLY0 %s
8 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
9 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
10 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp-simd -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
11 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -O1 -fopenmp-simd -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
12 // SIMD-ONLY0-NOT: {{__kmpc|__tgt}}
13 // expected-no-diagnostics
14 
15 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck --check-prefix=OMP5 %s
16 // RUN: %clang_cc1 -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
17 // RUN: %clang_cc1 -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix=OMP5 %s
18 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=50 -DOMP5 -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck --check-prefix SIMD-ONLY0 %s
19 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=50 -DOMP5 -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
20 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=50 -DOMP5 -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
21 #ifndef HEADER
22 #define HEADER
23 
24 #ifndef OMP5
25 // CHECK-DAG: [[IDENT_T_TY:%.+]] = type { i32, i32, i32, i32, i8* }
26 // CHECK-DAG: [[LOOP_LOC:@.+]] = private unnamed_addr global [[IDENT_T_TY]] { i32 0, i32 514, i32 0, i32 0, i8*
27 
28 // CHECK-LABEL: with_var_schedule
with_var_schedule()29 void with_var_schedule() {
30   double a = 5;
31 // CHECK: [[CHUNK_SIZE:%.+]] = fptosi double %{{.+}}to i8
32 // CHECK: store i8 %{{.+}}, i8* [[CHUNK:%.+]],
33 // CHECK: [[VAL:%.+]] = load i8, i8* [[CHUNK]],
34 // CHECK: store i8 [[VAL]], i8*
35 // CHECK: [[CHUNK:%.+]] = load i64, i64* %
36 // CHECK: call void {{.+}} @__kmpc_fork_call({{.+}}, i64 [[CHUNK]])
37 
38 // CHECK: [[UNDEF_A:%.+]] = load double, double* undef
39 // CHECK: fadd double 2.000000e+00, [[UNDEF_A]]
40 // CHECK: [[CHUNK_VAL:%.+]] = load i8, i8* %
41 // CHECK: [[CHUNK_SIZE:%.+]] = sext i8 [[CHUNK_VAL]] to i64
42 // CHECK: call void @__kmpc_for_static_init_8u([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID:%[^,]+]], i32 33, i32* [[IS_LAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]], i64 1, i64 [[CHUNK_SIZE]])
43 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID:%.+]])
44 #pragma omp parallel for schedule(static, char(a)) private(a)
45   for (unsigned long long i = 1; i < 2 + a; ++i) {
46   }
47 }
48 
49 // CHECK-LABEL: define {{.*void}} @{{.*}}without_schedule_clause{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
without_schedule_clause(float * a,float * b,float * c,float * d)50 void without_schedule_clause(float *a, float *b, float *c, float *d) {
51   #pragma omp parallel for
52 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*),
53 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}})
54 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]],
55 // CHECK: call void @__kmpc_for_static_init_4([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID:%.+]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1)
56 // UB = min(UB, GlobalUB)
57 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
58 // CHECK-NEXT: [[UBCMP:%.+]] = icmp sgt i32 [[UB]], 4571423
59 // CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]]
60 // CHECK: [[UBRESULT:%.+]] = phi i32 [ 4571423, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ]
61 // CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]]
62 // CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]]
63 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]]
64 // Loop header
65 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
66 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
67 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]]
68 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
69   for (int i = 33; i < 32000000; i += 7) {
70 // CHECK: [[LOOP1_BODY]]
71 // Start of body: calculate i from IV:
72 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]
73 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 7
74 // CHECK-NEXT: [[CALC_I_2:%.+]] = add nsw i32 33, [[CALC_I_1]]
75 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]
76 // ... loop body ...
77 // End of body: store into a[i]:
78 // CHECK: store float [[RESULT:%.+]], float* {{%.+}}
79     a[i] = b[i] * c[i] * d[i];
80 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}
81 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1
82 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]
83 // CHECK-NEXT: br label %{{.+}}
84   }
85 // CHECK: [[LOOP1_END]]
86 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID]])
87 // CHECK: ret void
88 }
89 
90 // CHECK-LABEL: define {{.*void}} @{{.*}}static_not_chunked{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
static_not_chunked(float * a,float * b,float * c,float * d)91 void static_not_chunked(float *a, float *b, float *c, float *d) {
92   #pragma omp parallel for schedule(static)
93 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*),
94 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}})
95 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]],
96 // CHECK: call void @__kmpc_for_static_init_4([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID:%.+]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1)
97 // UB = min(UB, GlobalUB)
98 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
99 // CHECK-NEXT: [[UBCMP:%.+]] = icmp sgt i32 [[UB]], 4571423
100 // CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]]
101 // CHECK: [[UBRESULT:%.+]] = phi i32 [ 4571423, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ]
102 // CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]]
103 // CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]]
104 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]]
105 // Loop header
106 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
107 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
108 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]]
109 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
110   for (int i = 32000000; i > 33; i += -7) {
111 // CHECK: [[LOOP1_BODY]]
112 // Start of body: calculate i from IV:
113 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]
114 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 7
115 // CHECK-NEXT: [[CALC_I_2:%.+]] = sub nsw i32 32000000, [[CALC_I_1]]
116 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]
117 // ... loop body ...
118 // End of body: store into a[i]:
119 // CHECK: store float [[RESULT:%.+]], float* {{%.+}}
120     a[i] = b[i] * c[i] * d[i];
121 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}
122 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1
123 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]
124 // CHECK-NEXT: br label %{{.+}}
125   }
126 // CHECK: [[LOOP1_END]]
127 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID]])
128 // CHECK: ret void
129 }
130 
131 // CHECK-LABEL: define {{.*void}} @{{.*}}static_chunked{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
static_chunked(float * a,float * b,float * c,float * d)132 void static_chunked(float *a, float *b, float *c, float *d) {
133   #pragma omp parallel for schedule(static, 5)
134 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*),
135 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}})
136 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]],
137 // CHECK: call void @__kmpc_for_static_init_4u([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID:%.+]], i32 33, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 5)
138 // UB = min(UB, GlobalUB)
139 // CHECK: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
140 // CHECK-NEXT: [[UBCMP:%.+]] = icmp ugt i32 [[UB]], 16908288
141 // CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]]
142 // CHECK: [[UBRESULT:%.+]] = phi i32 [ 16908288, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ]
143 // CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]]
144 // CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]]
145 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]]
146 
147 // Outer loop header
148 // CHECK: [[O_IV:%.+]] = load i32, i32* [[OMP_IV]]
149 // CHECK-NEXT: [[O_UB:%.+]] = load i32, i32* [[OMP_UB]]
150 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ule i32 [[O_IV]], [[O_UB]]
151 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]]
152 
153 // Loop header
154 // CHECK: [[O_LOOP1_BODY]]
155 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
156 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
157 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i32 [[IV]], [[UB]]
158 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
159   for (unsigned i = 131071; i <= 2147483647; i += 127) {
160 // CHECK: [[LOOP1_BODY]]
161 // Start of body: calculate i from IV:
162 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]
163 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i32 [[IV1_1]], 127
164 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i32 131071, [[CALC_I_1]]
165 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]
166 // ... loop body ...
167 // End of body: store into a[i]:
168 // CHECK: store float [[RESULT:%.+]], float* {{%.+}}
169     a[i] = b[i] * c[i] * d[i];
170 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}
171 // CHECK-NEXT: [[ADD1_2:%.+]] = add i32 [[IV1_2]], 1
172 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]
173 // CHECK-NEXT: br label %{{.+}}
174   }
175 // CHECK: [[LOOP1_END]]
176 // Update the counters, adding stride
177 // CHECK:  [[LB:%.+]] = load i32, i32* [[OMP_LB]]
178 // CHECK-NEXT: [[ST:%.+]] = load i32, i32* [[OMP_ST]]
179 // CHECK-NEXT: [[ADD_LB:%.+]] = add i32 [[LB]], [[ST]]
180 // CHECK-NEXT: store i32 [[ADD_LB]], i32* [[OMP_LB]]
181 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
182 // CHECK-NEXT: [[ST:%.+]] = load i32, i32* [[OMP_ST]]
183 // CHECK-NEXT: [[ADD_UB:%.+]] = add i32 [[UB]], [[ST]]
184 // CHECK-NEXT: store i32 [[ADD_UB]], i32* [[OMP_UB]]
185 
186 // CHECK: [[O_LOOP1_END]]
187 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[LOOP_LOC]], i32 [[GTID]])
188 // CHECK: ret void
189 }
190 
191 // CHECK-LABEL: define {{.*void}} @{{.*}}dynamic1{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
dynamic1(float * a,float * b,float * c,float * d)192 void dynamic1(float *a, float *b, float *c, float *d) {
193   #pragma omp parallel for schedule(dynamic)
194 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*),
195 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}})
196 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]],
197 // CHECK: call void @__kmpc_dispatch_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID:%.+]], i32 35, i64 0, i64 16908287, i64 1, i64 1)
198 //
199 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]])
200 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0
201 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]]
202 
203 // Loop header
204 // CHECK: [[O_LOOP1_BODY]]
205 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]]
206 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]]
207 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]]
208 
209 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]]
210 // CHECK-NEXT: [[BOUND:%.+]] = add i64 [[UB]], 1
211 // CHECK-NEXT: [[CMP:%.+]] = icmp ult i64 [[IV]], [[BOUND]]
212 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
213   for (unsigned long long i = 131071; i < 2147483647; i += 127) {
214 // CHECK: [[LOOP1_BODY]]
215 // Start of body: calculate i from IV:
216 // CHECK: [[IV1_1:%.+]] = load i64, i64* [[OMP_IV]]
217 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i64 [[IV1_1]], 127
218 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i64 131071, [[CALC_I_1]]
219 // CHECK-NEXT: store i64 [[CALC_I_2]], i64* [[LC_I:.+]]
220 // ... loop body ...
221 // End of body: store into a[i]:
222 // CHECK: store float [[RESULT:%.+]], float* {{%.+}}
223     a[i] = b[i] * c[i] * d[i];
224 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}}
225 // CHECK-NEXT: [[ADD1_2:%.+]] = add i64 [[IV1_2]], 1
226 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]]
227 // CHECK-NEXT: br label %{{.+}}
228   }
229 // CHECK: [[LOOP1_END]]
230 // CHECK: [[O_LOOP1_END]]
231 // CHECK: ret void
232 }
233 
234 // CHECK-LABEL: define {{.*void}} @{{.*}}guided7{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
guided7(float * a,float * b,float * c,float * d)235 void guided7(float *a, float *b, float *c, float *d) {
236   #pragma omp parallel for schedule(guided, 7)
237 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*),
238 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}})
239 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]],
240 // CHECK: call void @__kmpc_dispatch_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID:%.+]], i32 36, i64 0, i64 16908287, i64 1, i64 7)
241 //
242 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]])
243 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0
244 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]]
245 
246 // Loop header
247 // CHECK: [[O_LOOP1_BODY]]
248 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]]
249 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]]
250 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]]
251 
252 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]]
253 // CHECK-NEXT: [[BOUND:%.+]] = add i64 [[UB]], 1
254 // CHECK-NEXT: [[CMP:%.+]] = icmp ult i64 [[IV]], [[BOUND]]
255 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
256   for (unsigned long long i = 131071; i < 2147483647; i += 127) {
257 // CHECK: [[LOOP1_BODY]]
258 // Start of body: calculate i from IV:
259 // CHECK: [[IV1_1:%.+]] = load i64, i64* [[OMP_IV]]
260 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i64 [[IV1_1]], 127
261 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i64 131071, [[CALC_I_1]]
262 // CHECK-NEXT: store i64 [[CALC_I_2]], i64* [[LC_I:.+]]
263 // ... loop body ...
264 // End of body: store into a[i]:
265 // CHECK: store float [[RESULT:%.+]], float* {{%.+}}
266     a[i] = b[i] * c[i] * d[i];
267 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}}
268 // CHECK-NEXT: [[ADD1_2:%.+]] = add i64 [[IV1_2]], 1
269 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]]
270 // CHECK-NEXT: br label %{{.+}}
271   }
272 // CHECK: [[LOOP1_END]]
273 // CHECK: [[O_LOOP1_END]]
274 // CHECK: ret void
275 }
276 
277 // CHECK-LABEL: define {{.*void}} @{{.*}}test_auto{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
test_auto(float * a,float * b,float * c,float * d)278 void test_auto(float *a, float *b, float *c, float *d) {
279   unsigned int x = 0;
280   unsigned int y = 0;
281   #pragma omp parallel for schedule(auto) collapse(2)
282 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*),
283 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, i32* dereferenceable(4) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}})
284 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]],
285 // CHECK: call void @__kmpc_dispatch_init_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID:%.+]], i32 38, i64 0, i64 [[LAST_ITER:%[^,]+]], i64 1, i64 1)
286 //
287 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID:%.+]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]])
288 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0
289 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]]
290 
291 // Loop header
292 // CHECK: [[O_LOOP1_BODY]]
293 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]]
294 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]]
295 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]]
296 
297 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]]
298 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i64 [[IV]], [[UB]]
299 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
300 // FIXME: When the iteration count of some nested loop is not a known constant,
301 // we should pre-calculate it, like we do for the total number of iterations!
302   for (char i = static_cast<char>(y); i <= '9'; ++i)
303     for (x = 11; x > 0; --x) {
304 // CHECK: [[LOOP1_BODY]]
305 // Start of body: indices are calculated from IV:
306 // CHECK: store i8 {{%[^,]+}}, i8* {{%[^,]+}}
307 // CHECK: store i32 {{%[^,]+}}, i32* {{%[^,]+}}
308 // ... loop body ...
309 // End of body: store into a[i]:
310 // CHECK: store float [[RESULT:%.+]], float* {{%.+}}
311     a[i] = b[i] * c[i] * d[i];
312 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}}
313 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i64 [[IV1_2]], 1
314 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]]
315 // CHECK-NEXT: br label %{{.+}}
316   }
317 // CHECK: [[LOOP1_END]]
318 // CHECK: [[O_LOOP1_END]]
319 // CHECK: ret void
320 }
321 
322 // CHECK-LABEL: define {{.*void}} @{{.*}}runtime{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
runtime(float * a,float * b,float * c,float * d)323 void runtime(float *a, float *b, float *c, float *d) {
324   int x = 0;
325   #pragma omp parallel for collapse(2) schedule(runtime)
326 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*),
327 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}})
328 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]],
329 // CHECK: call void @__kmpc_dispatch_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID:%.+]], i32 37, i32 0, i32 199, i32 1, i32 1)
330 //
331 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]])
332 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0
333 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]]
334 
335 // Loop header
336 // CHECK: [[O_LOOP1_BODY]]
337 // CHECK: [[LB:%.+]] = load i32, i32* [[OMP_LB]]
338 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]]
339 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
340 
341 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
342 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]]
343 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
344   for (unsigned char i = '0' ; i <= '9'; ++i)
345     for (x = -10; x < 10; ++x) {
346 // CHECK: [[LOOP1_BODY]]
347 // Start of body: indices are calculated from IV:
348 // CHECK: store i8 {{%[^,]+}}, i8* {{%[^,]+}}
349 // CHECK: store i32 {{%[^,]+}}, i32* {{%[^,]+}}
350 // ... loop body ...
351 // End of body: store into a[i]:
352 // CHECK: store float [[RESULT:%.+]], float* {{%.+}}
353     a[i] = b[i] * c[i] * d[i];
354 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}
355 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1
356 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]
357 // CHECK-NEXT: br label %{{.+}}
358   }
359 // CHECK: [[LOOP1_END]]
360 // CHECK: [[O_LOOP1_END]]
361 // CHECK: ret void
362 }
363 
364 // TERM_DEBUG-LABEL: foo
foo()365 int foo() {return 0;};
366 
367 // TERM_DEBUG-LABEL: parallel_for
368 // CLEANUP: parallel_for
parallel_for(float * a,const int n)369 void parallel_for(float *a, const int n) {
370   float arr[n];
371 #pragma omp parallel for schedule(static, 5) private(arr) default(none) firstprivate(n) shared(a)
372   // TERM_DEBUG-NOT: __kmpc_global_thread_num
373   // TERM_DEBUG:     call void @__kmpc_for_static_init_4u({{.+}}), !dbg [[DBG_LOC_START:![0-9]+]]
374   // TERM_DEBUG:     invoke i32 {{.*}}foo{{.*}}()
375   // TERM_DEBUG:     unwind label %[[TERM_LPAD:.+]],
376   // TERM_DEBUG-NOT: __kmpc_global_thread_num
377   // TERM_DEBUG:     call void @__kmpc_for_static_fini({{.+}}), !dbg [[DBG_LOC_END:![0-9]+]]
378   // TERM_DEBUG:     [[TERM_LPAD]]
379   // TERM_DEBUG:     call void @__clang_call_terminate
380   // TERM_DEBUG:     unreachable
381   // CLEANUP-NOT: __kmpc_global_thread_num
382   // CLEANUP:     call void @__kmpc_for_static_init_4u({{.+}})
383   // CLEANUP:     call void @__kmpc_for_static_fini({{.+}})
384   for (unsigned i = 131071; i <= 2147483647; i += 127)
385     a[i] += foo() + arr[i] + n;
386 }
387 // Check source line corresponds to "#pragma omp parallel for schedule(static, 5)" above:
388 // TERM_DEBUG-DAG: [[DBG_LOC_START]] = !DILocation(line: [[@LINE-4]],
389 // TERM_DEBUG-DAG: [[DBG_LOC_END]] = !DILocation(line: [[@LINE-18]],
390 
391 #else // OMP5
392 // OMP5-LABEL: increment
increment()393 int increment () {
394 // OMP5: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* [[DEFAULT_LOC:[@%].+]])
395   #pragma omp for
396 // Determine UB = min(UB, GlobalUB)
397 // OMP5: call void @__kmpc_for_static_init_4(%struct.ident_t* [[LOOP_LOC:[@%].+]], i32 [[GTID]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1)
398 // OMP5-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
399 // OMP5-NEXT: [[UBCMP:%.+]] = icmp sgt i32 [[UB]], 4
400 // OMP5-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]]
401 // OMP5: [[UBRESULT:%.+]] = phi i32 [ 4, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ]
402 // OMP5-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]]
403 // OMP5-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]]
404 // OMP5-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]]
405 // OMP5-NEXT: br label %[[LOOP1_HEAD:.+]]
406 
407 // Loop header
408 // OMP5: [[LOOP1_HEAD]]
409 // OMP5: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
410 // OMP5-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
411 // OMP5-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]]
412 // OMP5-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
413 
414   for (int i = 0 ; i != 5; ++i)
415 // Start of body: calculate i from IV:
416 // OMP5: [[LOOP1_BODY]]
417 // OMP5: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]
418 // OMP5-NEXT: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 1
419 // OMP5-NEXT: [[CALC_I_2:%.+]] = add nsw i32 0, [[CALC_I_1]]
420 // OMP5-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]
421 // OMP5: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}
422 // OMP5-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1
423 // OMP5-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]
424 // OMP5-NEXT: br label %[[LOOP1_HEAD]]
425     ;
426 // OMP5: [[LOOP1_END]]
427 // OMP5: call void @__kmpc_for_static_fini(%struct.ident_t* [[LOOP_LOC]], i32 [[GTID]])
428 // OMP5: __kmpc_barrier
429   return 0;
430 // OMP5: ret i32 0
431 }
432 
433 // OMP5-LABEL: decrement_nowait
decrement_nowait()434 int decrement_nowait () {
435 // OMP5: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* [[DEFAULT_LOC:[@%].+]])
436   #pragma omp for nowait
437 // Determine UB = min(UB, GlobalUB)
438 // OMP5: call void @__kmpc_for_static_init_4(%struct.ident_t* [[LOOP_LOC]], i32 [[GTID]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1)
439 // OMP5-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
440 // OMP5-NEXT: [[UBCMP:%.+]] = icmp sgt i32 [[UB]], 4
441 // OMP5-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]]
442 // OMP5: [[UBRESULT:%.+]] = phi i32 [ 4, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ]
443 // OMP5-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]]
444 // OMP5-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]]
445 // OMP5-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]]
446 // OMP5-NEXT: br label %[[LOOP1_HEAD:.+]]
447 
448 // Loop header
449 // OMP5: [[LOOP1_HEAD]]
450 // OMP5: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
451 // OMP5-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
452 // OMP5-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]]
453 // OMP5-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
454   for (int j = 5 ; j != 0; --j)
455 // Start of body: calculate i from IV:
456 // OMP5: [[LOOP1_BODY]]
457 // OMP5: [[IV2_1:%.+]] = load i32, i32* [[OMP_IV]]
458 // OMP5-NEXT: [[CALC_II_1:%.+]] = mul nsw i32 [[IV2_1]], 1
459 // OMP5-NEXT: [[CALC_II_2:%.+]] = sub nsw i32 5, [[CALC_II_1]]
460 // OMP5-NEXT: store i32 [[CALC_II_2]], i32* [[LC_I:.+]]
461 // OMP5: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}
462 // OMP5-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV2_2]], 1
463 // OMP5-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV]]
464 // OMP5-NEXT: br label %[[LOOP1_HEAD]]
465     ;
466 // OMP5: [[LOOP1_END]]
467 // OMP5: call void @__kmpc_for_static_fini(%struct.ident_t* [[LOOP_LOC]], i32 [[GTID]])
468 // OMP5-NOT: __kmpc_barrier
469   return 0;
470 // OMP5: ret i32 0
471 }
472 
473 // OMP5-LABEL: range_for_single
range_for_single()474 void range_for_single() {
475   int arr[10] = {0};
476 // OMP5: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* {{.+}}, i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* [[OUTLINED:@.+]] to void (i32*, i32*, ...)*), [10 x i32]* %{{.+}})
477 #pragma omp parallel for
478   for (auto &a : arr)
479     (void)a;
480 }
481 
482 // OMP5: define internal void @.omp_outlined.(i32* {{.+}}, i32* {{.+}}, [10 x i32]* dereferenceable(40) %arr)
483 // OMP5: [[ARR_ADDR:%.+]] = alloca [10 x i32]*,
484 // OMP5: [[IV:%.+]] = alloca i64,
485 // OMP5: [[RANGE_ADDR:%.+]] = alloca [10 x i32]*,
486 // OMP5: [[END_ADDR:%.+]] = alloca i32*,
487 // OMP5: alloca i32*,
488 // OMP5: alloca i32*,
489 // OMP5: alloca i64,
490 // OMP5: [[BEGIN_INIT:%.+]] = alloca i32*,
491 // OMP5: [[LB:%.+]] = alloca i64,
492 // OMP5: [[UB:%.+]] = alloca i64,
493 // OMP5: [[STRIDE:%.+]] = alloca i64,
494 // OMP5: [[IS_LAST:%.+]] = alloca i32,
495 // OMP5: [[BEGIN:%.+]] = alloca i32*,
496 // OMP5: [[A_PTR:%.+]] = alloca i32*,
497 
498 // __range = arr;
499 // OMP5: [[ARR:%.+]] = load [10 x i32]*, [10 x i32]** [[ARR_ADDR]],
500 // OMP5: store [10 x i32]* [[ARR]], [10 x i32]** [[RANGE_ADDR]],
501 
502 // __end = end(_range);
503 // OMP5: [[RANGE:%.+]] = load [10 x i32]*, [10 x i32]** [[RANGE_ADDR]],
504 // OMP5: [[RANGE_0:%.+]] = getelementptr inbounds [10 x i32], [10 x i32]* [[RANGE]], i{{[0-9]+}} 0, i{{[0-9]+}} 0
505 // OMP5: [[RANGE_10:%.+]] = getelementptr inbounds i32, i32* [[RANGE_0]], i{{[0-9]+}} 10
506 // OMP5: store i32* [[RANGE_10]], i32** [[END_ADDR]],
507 
508 // OMP5: [[RANGE:%.+]] = load [10 x i32]*, [10 x i32]** [[RANGE_ADDR]],
509 // OMP5: [[RANGE_0:%.+]] = getelementptr inbounds [10 x i32], [10 x i32]* [[RANGE]], i{{[0-9]+}} 0, i{{[0-9]+}} 0
510 // OMP5: store i32* [[RANGE_0]], i32** [[CAP1:%.+]],
511 // OMP5: [[END:%.+]] = load i32*, i32** [[END_ADDR]],
512 // OMP5: store i32* [[END]], i32** [[CAP2:%.+]],
513 
514 // calculate number of elements.
515 // OMP5: [[CAP2_VAL:%.+]] = load i32*, i32** [[CAP2]],
516 // OMP5: [[CAP1_VAL:%.+]] = load i32*, i32** [[CAP1]],
517 // OMP5: [[CAP2_I64:%.+]] = ptrtoint i32* [[CAP2_VAL]] to i64
518 // OMP5: [[CAP1_I64:%.+]] = ptrtoint i32* [[CAP1_VAL]] to i64
519 // OMP5: [[DIFF:%.+]] = sub i64 [[CAP2_I64]], [[CAP1_I64]]
520 // OMP5: [[NUM:%.+]] = sdiv exact i64 [[DIFF]], 4
521 // OMP5: [[NUM1:%.+]] = sub nsw i64 [[NUM]], 1
522 // OMP5: [[NUM2:%.+]] = add nsw i64 [[NUM1]], 1
523 // OMP5: [[NUM3:%.+]] = sdiv i64 [[NUM2]], 1
524 // OMP5: [[NUM4:%.+]] = sub nsw i64 [[NUM3]], 1
525 // OMP5: store i64 [[NUM4]], i64* [[CAP3:%.+]],
526 // OMP5: [[RANGE_0:%.+]] = load i32*, i32** [[CAP1]],
527 
528 // __begin = begin(range);
529 // OMP5: store i32* [[RANGE_0]], i32** [[BEGIN_INIT]],
530 // OMP5: [[CAP1_VAL:%.+]] = load i32*, i32** [[CAP1]],
531 // OMP5: [[CAP2_VAL:%.+]] = load i32*, i32** [[CAP2]],
532 // OMP5: [[CMP:%.+]] = icmp ult i32* [[CAP1_VAL]], [[CAP2_VAL]]
533 
534 // __begin >= __end ? goto then : goto exit;
535 // OMP5: br i1 [[CMP]], label %[[THEN:.+]], label %[[EXIT:.+]]
536 
537 // OMP5: [[THEN]]:
538 
539 // lb = 0;
540 // OMP5: store i64 0, i64* [[LB]],
541 
542 // ub = number of elements
543 // OMP5: [[NUM:%.+]] = load i64, i64* [[CAP3]],
544 // OMP5: store i64 [[NUM]], i64* [[UB]],
545 
546 // stride = 1;
547 // OMP5: store i64 1, i64* [[STRIDE]],
548 
549 // is_last = 0;
550 // OMP5: store i32 0, i32* [[IS_LAST]],
551 
552 // loop.
553 // OMP5: call void @__kmpc_for_static_init_8(%struct.ident_t* {{.+}}, i32 [[GTID:%.+]], i32 34, i32* [[IS_LAST]], i64* [[LB]], i64* [[UB]], i64* [[STRIDE]], i64 1, i64 1)
554 
555 // ub = (ub > number_of_elems ? number_of_elems : ub);
556 // OMP5: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
557 // OMP5: [[NUM_VAL:%.+]] = load i64, i64* [[CAP3]],
558 // OMP5: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], [[NUM_VAL]]
559 // OMP5: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:.+]]
560 
561 // OMP5: [[TRUE]]:
562 // OMP5: [[NUM_VAL:%.+]] = load i64, i64* [[CAP3]],
563 // OMP5: br label %[[END:.+]]
564 
565 // OMP5: [[FALSE]]:
566 // OMP5: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
567 // OMP5: br label %[[END:.+]]
568 
569 // OMP5: [[END]]:
570 // OMP5: [[MIN:%.+]] = phi i64 [ [[NUM_VAL]], %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
571 // OMP%: store i64 [[MIN]], i64* [[UB]],
572 
573 // iv = lb;
574 // OMP5: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
575 // OMP5: store i64 [[LB_VAL]], i64* [[IV]],
576 
577 // goto loop;
578 // loop:
579 // OMP5: br label %[[LOOP:.+]]
580 
581 // OMP5: [[LOOP]]:
582 
583 // iv <= ub ? goto body : goto end;
584 // OMP5: [[IV_VAL:%.+]] = load i64, i64* [[IV]],
585 // OMP5: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
586 // OMP5: [[CMP:%.+]] = icmp sle i64 [[IV_VAL]], [[UB_VAL]]
587 // OMP5: br i1 [[CMP]], label %[[BODY:.+]], label %[[END:.+]]
588 
589 // body:
590 // __begin = begin(arr) + iv * 1;
591 // OMP5: [[BODY]]:
592 // OMP5: [[CAP1_VAL:%.+]] = load i32*, i32** [[CAP1]],
593 // OMP5: [[IV_VAL:%.+]] = load i64, i64* [[IV]],
594 // OMP5: [[MUL:%.+]] = mul nsw i64 [[IV_VAL]], 1
595 // OMP5: [[ADDR:%.+]] = getelementptr inbounds i32, i32* [[CAP1_VAL]], i64 [[MUL]]
596 // OMP5: store i32* [[ADDR]], i32** [[BEGIN]],
597 
598 // a = *__begin;
599 // OMP5: [[BEGIN_VAL:%.+]] = load i32*, i32** [[BEGIN]],
600 // OMP5: store i32* [[BEGIN_VAL]], i32** [[A_PTR]],
601 
602 // (void)a;
603 // OMP5: load i32*, i32** [[A_PTR]],
604 
605 // iv += 1;
606 // OMP5: [[IV_VAL:%.+]] = load i64, i64* [[IV]],
607 // OMP5: [[IV_VAL_ADD_1:%.+]] = add nsw i64 [[IV_VAL]], 1
608 // OMP5: store i64 [[IV_VAL_ADD_1]], i64* [[IV]],
609 
610 // goto loop;
611 // OMP5: br label %[[LOOP]]
612 
613 // end:
614 // OMP5: [[END]]:
615 // OMP5: call void @__kmpc_for_static_fini(%struct.ident_t* {{.+}}, i32 [[GTID:%.+]])
616 // exit:
617 // OMP5: [[EXIT]]:
618 // OMP5: ret void
619 
620 // OMP5-LABEL: range_for_collapsed
range_for_collapsed()621 void range_for_collapsed() {
622   int arr[10] = {0};
623 // OMP5: call void @__kmpc_for_static_init_8(%struct.ident_t* {{.+}}, i32 [[GTID:%.+]], i32 34, i32* %{{.+}}, i64* %{{.+}}, i64* %{{.+}}, i64* %{{.+}}, i64 1, i64 1)
624 #pragma omp parallel for collapse(2)
625   for (auto &a : arr)
626     for (auto b : arr)
627       a = b;
628 // OMP5: call void @__kmpc_for_static_fini(%struct.ident_t* {{.+}}, i32 [[GTID:%.+]])
629 }
630 #endif // OMP5
631 
632 #endif // HEADER
633 
634