1tblgen - Target Description To C++ Code Generator 2================================================= 3 4.. program:: tblgen 5 6SYNOPSIS 7-------- 8 9:program:`tblgen` [*options*] [*filename*] 10 11DESCRIPTION 12----------- 13 14:program:`tblgen` translates from target description (``.td``) files into C++ 15code that can be included in the definition of an LLVM target library. Most 16users of LLVM will not need to use this program. It is only for assisting with 17writing an LLVM target backend. 18 19The input and output of :program:`tblgen` is beyond the scope of this short 20introduction; please see the :doc:`introduction to TableGen 21<../TableGen/index>`. 22 23The *filename* argument specifies the name of a Target Description (``.td``) 24file to read as input. 25 26OPTIONS 27------- 28 29.. program:: tblgen 30 31.. option:: -help 32 33 Print a summary of command line options. 34 35.. option:: -o filename 36 37 Specify the output file name. If ``filename`` is ``-``, then 38 :program:`tblgen` sends its output to standard output. 39 40.. option:: -I directory 41 42 Specify where to find other target description files for inclusion. The 43 ``directory`` value should be a full or partial path to a directory that 44 contains target description files. 45 46.. option:: -asmparsernum N 47 48 Make -gen-asm-parser emit assembly writer number ``N``. 49 50.. option:: -asmwriternum N 51 52 Make -gen-asm-writer emit assembly writer number ``N``. 53 54.. option:: -class className 55 56 Print the enumeration list for this class. 57 58.. option:: -print-records 59 60 Print all records to standard output (default). 61 62.. option:: -dump-json 63 64 Print a JSON representation of all records, suitable for further 65 automated processing. 66 67.. option:: -print-enums 68 69 Print enumeration values for a class. 70 71.. option:: -print-sets 72 73 Print expanded sets for testing DAG exprs. 74 75.. option:: -gen-emitter 76 77 Generate machine code emitter. 78 79.. option:: -gen-register-info 80 81 Generate registers and register classes info. 82 83.. option:: -gen-instr-info 84 85 Generate instruction descriptions. 86 87.. option:: -gen-asm-writer 88 89 Generate the assembly writer. 90 91.. option:: -gen-disassembler 92 93 Generate disassembler. 94 95.. option:: -gen-pseudo-lowering 96 97 Generate pseudo instruction lowering. 98 99.. option:: -gen-dag-isel 100 101 Generate a DAG (Directed Acyclic Graph) instruction selector. 102 103.. option:: -gen-asm-matcher 104 105 Generate assembly instruction matcher. 106 107.. option:: -gen-dfa-packetizer 108 109 Generate DFA Packetizer for VLIW targets. 110 111.. option:: -gen-fast-isel 112 113 Generate a "fast" instruction selector. 114 115.. option:: -gen-subtarget 116 117 Generate subtarget enumerations. 118 119.. option:: -gen-intrinsic-enums 120 121 Generate intrinsic enums. 122 123.. option:: -gen-intrinsic-impl 124 125 Generate intrinsic implementation. 126 127.. option:: -gen-tgt-intrinsic 128 129 Generate target intrinsic information. 130 131.. option:: -gen-enhanced-disassembly-info 132 133 Generate enhanced disassembly info. 134 135.. option:: -gen-exegesis 136 137 Generate llvm-exegesis tables. 138 139.. option:: -version 140 141 Show the version number of this program. 142 143EXIT STATUS 144----------- 145 146If :program:`tblgen` succeeds, it will exit with 0. Otherwise, if an error 147occurs, it will exit with a non-zero value. 148