1; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon,+i8mm < %s -o -| FileCheck %s 2 3define <4 x i32> @smmla.v4i32.v16i8(<4 x i32> %r, <16 x i8> %a, <16 x i8> %b) { 4entry: 5; CHECK-LABEL: smmla.v4i32.v16i8 6; CHECK: smmla v0.4s, v1.16b, v2.16b 7 %vmmla1.i = tail call <4 x i32> @llvm.aarch64.neon.smmla.v4i32.v16i8(<4 x i32> %r, <16 x i8> %a, <16 x i8> %b) 8 ret <4 x i32> %vmmla1.i 9} 10 11define <4 x i32> @ummla.v4i32.v16i8(<4 x i32> %r, <16 x i8> %a, <16 x i8> %b) { 12entry: 13; CHECK-LABEL: ummla.v4i32.v16i8 14; CHECK: ummla v0.4s, v1.16b, v2.16b 15 %vmmla1.i = tail call <4 x i32> @llvm.aarch64.neon.ummla.v4i32.v16i8(<4 x i32> %r, <16 x i8> %a, <16 x i8> %b) 16 ret <4 x i32> %vmmla1.i 17} 18 19define <4 x i32> @usmmla.v4i32.v16i8(<4 x i32> %r, <16 x i8> %a, <16 x i8> %b) { 20entry: 21; CHECK-LABEL: usmmla.v4i32.v16i8 22; CHECK: usmmla v0.4s, v1.16b, v2.16b 23 %vusmmla1.i = tail call <4 x i32> @llvm.aarch64.neon.usmmla.v4i32.v16i8(<4 x i32> %r, <16 x i8> %a, <16 x i8> %b) #3 24 ret <4 x i32> %vusmmla1.i 25} 26 27define <2 x i32> @usdot.v2i32.v8i8(<2 x i32> %r, <8 x i8> %a, <8 x i8> %b) { 28entry: 29; CHECK-LABEL: usdot.v2i32.v8i8 30; CHECK: usdot v0.2s, v1.8b, v2.8b 31 %vusdot1.i = tail call <2 x i32> @llvm.aarch64.neon.usdot.v2i32.v8i8(<2 x i32> %r, <8 x i8> %a, <8 x i8> %b) 32 ret <2 x i32> %vusdot1.i 33} 34 35define <2 x i32> @usdot_lane.v2i32.v8i8(<2 x i32> %r, <8 x i8> %a, <8 x i8> %b) { 36entry: 37; CHECK-LABEL: usdot_lane.v2i32.v8i8 38; CHECK: usdot v0.2s, v1.8b, v2.4b[0] 39 %0 = bitcast <8 x i8> %b to <2 x i32> 40 %shuffle = shufflevector <2 x i32> %0, <2 x i32> undef, <2 x i32> zeroinitializer 41 %1 = bitcast <2 x i32> %shuffle to <8 x i8> 42 %vusdot1.i = tail call <2 x i32> @llvm.aarch64.neon.usdot.v2i32.v8i8(<2 x i32> %r, <8 x i8> %a, <8 x i8> %1) 43 ret <2 x i32> %vusdot1.i 44} 45 46define <2 x i32> @sudot_lane.v2i32.v8i8(<2 x i32> %r, <8 x i8> %a, <8 x i8> %b) { 47entry: 48; CHECK-LABEL: sudot_lane.v2i32.v8i8 49; CHECK: sudot v0.2s, v1.8b, v2.4b[0] 50 %0 = bitcast <8 x i8> %b to <2 x i32> 51 %shuffle = shufflevector <2 x i32> %0, <2 x i32> undef, <2 x i32> zeroinitializer 52 %1 = bitcast <2 x i32> %shuffle to <8 x i8> 53 %vusdot1.i = tail call <2 x i32> @llvm.aarch64.neon.usdot.v2i32.v8i8(<2 x i32> %r, <8 x i8> %1, <8 x i8> %a) 54 ret <2 x i32> %vusdot1.i 55} 56 57define <2 x i32> @usdot_lane.v2i32.v16i8(<2 x i32> %r, <8 x i8> %a, <16 x i8> %b) { 58entry: 59; CHECK-LABEL: usdot_lane.v2i32.v16i8 60; CHECK: usdot v0.2s, v1.8b, v2.4b[0] 61 %0 = bitcast <16 x i8> %b to <4 x i32> 62 %shuffle = shufflevector <4 x i32> %0, <4 x i32> undef, <2 x i32> zeroinitializer 63 %1 = bitcast <2 x i32> %shuffle to <8 x i8> 64 %vusdot1.i = tail call <2 x i32> @llvm.aarch64.neon.usdot.v2i32.v8i8(<2 x i32> %r, <8 x i8> %a, <8 x i8> %1) 65 ret <2 x i32> %vusdot1.i 66} 67 68define <2 x i32> @sudot_lane.v2i32.v16i8(<2 x i32> %r, <8 x i8> %a, <16 x i8> %b) { 69entry: 70; CHECK-LABEL: sudot_lane.v2i32.v16i8 71; CHECK: sudot v0.2s, v1.8b, v2.4b[0] 72 %0 = bitcast <16 x i8> %b to <4 x i32> 73 %shuffle = shufflevector <4 x i32> %0, <4 x i32> undef, <2 x i32> zeroinitializer 74 %1 = bitcast <2 x i32> %shuffle to <8 x i8> 75 %vusdot1.i = tail call <2 x i32> @llvm.aarch64.neon.usdot.v2i32.v8i8(<2 x i32> %r, <8 x i8> %1, <8 x i8> %a) #3 76 ret <2 x i32> %vusdot1.i 77} 78 79define <4 x i32> @usdot.v4i32.v16i8(<4 x i32> %r, <16 x i8> %a, <16 x i8> %b) { 80entry: 81; CHECK-LABEL: usdot.v4i32.v16i8 82; CHECK: usdot v0.4s, v1.16b, v2.16b 83 %vusdot1.i = tail call <4 x i32> @llvm.aarch64.neon.usdot.v4i32.v16i8(<4 x i32> %r, <16 x i8> %a, <16 x i8> %b) #3 84 ret <4 x i32> %vusdot1.i 85} 86 87define <4 x i32> @usdot_lane.v4i32.v16i8(<4 x i32> %r, <16 x i8> %a, <8 x i8> %b) { 88entry: 89; CHECK-LABEL: usdot_lane.v4i32.v16i8 90; CHECK: usdot v0.4s, v1.16b, v2.4b[0] 91 %0 = bitcast <8 x i8> %b to <2 x i32> 92 %shuffle = shufflevector <2 x i32> %0, <2 x i32> undef, <4 x i32> zeroinitializer 93 %1 = bitcast <4 x i32> %shuffle to <16 x i8> 94 %vusdot1.i = tail call <4 x i32> @llvm.aarch64.neon.usdot.v4i32.v16i8(<4 x i32> %r, <16 x i8> %a, <16 x i8> %1) #3 95 ret <4 x i32> %vusdot1.i 96} 97 98define <4 x i32> @sudot_lane.v4i32.v16i8(<4 x i32> %r, <16 x i8> %a, <8 x i8> %b) { 99entry: 100; CHECK-LABEL: sudot_lane.v4i32.v16i8 101; CHECK: sudot v0.4s, v1.16b, v2.4b[0] 102 %0 = bitcast <8 x i8> %b to <2 x i32> 103 %shuffle = shufflevector <2 x i32> %0, <2 x i32> undef, <4 x i32> zeroinitializer 104 %1 = bitcast <4 x i32> %shuffle to <16 x i8> 105 %vusdot1.i = tail call <4 x i32> @llvm.aarch64.neon.usdot.v4i32.v16i8(<4 x i32> %r, <16 x i8> %1, <16 x i8> %a) #3 106 ret <4 x i32> %vusdot1.i 107} 108 109define <4 x i32> @usdot_laneq.v4i32.v16i8(<4 x i32> %r, <16 x i8> %a, <16 x i8> %b) { 110entry: 111; CHECK-LABEL: usdot_laneq.v4i32.v16i8 112; CHECK: usdot v0.4s, v1.16b, v2.4b[0] 113 %0 = bitcast <16 x i8> %b to <4 x i32> 114 %shuffle = shufflevector <4 x i32> %0, <4 x i32> undef, <4 x i32> zeroinitializer 115 %1 = bitcast <4 x i32> %shuffle to <16 x i8> 116 %vusdot1.i = tail call <4 x i32> @llvm.aarch64.neon.usdot.v4i32.v16i8(<4 x i32> %r, <16 x i8> %a, <16 x i8> %1) #3 117 ret <4 x i32> %vusdot1.i 118} 119 120define <4 x i32> @sudot_laneq.v4i32.v16i8(<4 x i32> %r, <16 x i8> %a, <16 x i8> %b) { 121entry: 122; CHECK-LABEL: sudot_laneq.v4i32.v16i8 123; CHECK: sudot v0.4s, v1.16b, v2.4b[0] 124 %0 = bitcast <16 x i8> %b to <4 x i32> 125 %shuffle = shufflevector <4 x i32> %0, <4 x i32> undef, <4 x i32> zeroinitializer 126 %1 = bitcast <4 x i32> %shuffle to <16 x i8> 127 %vusdot1.i = tail call <4 x i32> @llvm.aarch64.neon.usdot.v4i32.v16i8(<4 x i32> %r, <16 x i8> %1, <16 x i8> %a) #3 128 ret <4 x i32> %vusdot1.i 129} 130 131declare <4 x i32> @llvm.aarch64.neon.smmla.v4i32.v16i8(<4 x i32>, <16 x i8>, <16 x i8>) #2 132declare <4 x i32> @llvm.aarch64.neon.ummla.v4i32.v16i8(<4 x i32>, <16 x i8>, <16 x i8>) #2 133declare <4 x i32> @llvm.aarch64.neon.usmmla.v4i32.v16i8(<4 x i32>, <16 x i8>, <16 x i8>) #2 134declare <2 x i32> @llvm.aarch64.neon.usdot.v2i32.v8i8(<2 x i32>, <8 x i8>, <8 x i8>) #2 135declare <4 x i32> @llvm.aarch64.neon.usdot.v4i32.v16i8(<4 x i32>, <16 x i8>, <16 x i8>) #2 136 137