1; RUN: llc -O0 --march=aarch64 -verify-machineinstrs --filetype=asm %s -o - 2>&1 | FileCheck %s
2; RUN: llc -O1 --march=aarch64 -verify-machineinstrs --filetype=asm %s -o - 2>&1 | FileCheck %s
3; RUN: llc -O2 --march=aarch64 -verify-machineinstrs --filetype=asm %s -o - 2>&1 | FileCheck %s
4target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
5target triple = "aarch64-unknown-linux-gnu"
6
7declare void @normal_cc()
8
9; Caller: preserve_mostcc; callee: normalcc. Normally callee saved registers
10; x9~x15 need to be spilled. Since most of them will be spilled in pairs in
11; reverse order, we only check the odd number ones due to FileCheck not
12; matching the same line of assembly twice.
13; CHECK-LABEL: preserve_most
14; CHECK-DAG: {{st[rp]}} {{(x[0-9]+, )?x9(, x[0-9]+)?}}, [sp, #{{[-0-9]+}}]
15; CHECK-DAG: {{st[rp]}} {{(x[0-9]+, )?x11(, x[0-9]+)?}}, [sp, #{{[-0-9]+}}]
16; CHECK-DAG: {{st[rp]}} {{(x[0-9]+, )?x13(, x[0-9]+)?}}, [sp, #{{[-0-9]+}}]
17; CHECK-DAG: {{st[rp]}} {{(x[0-9]+, )?x15(, x[0-9]+)?}}, [sp, #{{[-0-9]+}}]
18define preserve_mostcc void @preserve_most() {
19  call void @normal_cc()
20  ret void
21}
22
23; Caller: normalcc; callee: preserve_mostcc. x9 does not need to be spilled.
24; The same holds for x10 through x15, but we only check x9.
25; CHECK-LABEL: normal_cc_caller
26; CHECK-NOT: stp {{x[0-9]+}}, x9, [sp, #{{[-0-9]+}}]
27; CHECK-NOT: stp x9, {{x[0-9]+}}, [sp, #{{[-0-9]+}}]
28; CHECK-NOT: str x9, [sp, {{#[-0-9]+}}]
29define dso_local void @normal_cc_caller() {
30entry:
31  %v = alloca i32, align 4
32  call void asm sideeffect "mov x9, $0", "N,~{x9}"(i32 48879) #2
33  call preserve_mostcc void @preserve_most()
34  %0 = load i32, i32* %v, align 4
35  %1 = call i32 asm sideeffect "mov ${0:w}, w9", "=r,r"(i32 %0) #2
36  store i32 %1, i32* %v, align 4
37  ret void
38}
39