1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=aarch64-apple- -mcpu=cyclone | FileCheck %s 3 4; The non-byte ones used to fail with "Cannot select" 5 6define <8 x i8> @ctpopv8i8(<8 x i8> %x) nounwind readnone { 7; CHECK-LABEL: ctpopv8i8: 8; CHECK: // %bb.0: 9; CHECK-NEXT: cnt v0.8b, v0.8b 10; CHECK-NEXT: ret 11 %cnt = tail call <8 x i8> @llvm.ctpop.v8i8(<8 x i8> %x) 12 ret <8 x i8> %cnt 13} 14 15declare <8 x i8> @llvm.ctpop.v8i8(<8 x i8>) nounwind readnone 16 17define <4 x i16> @ctpopv4i16(<4 x i16> %x) nounwind readnone { 18; CHECK-LABEL: ctpopv4i16: 19; CHECK: // %bb.0: 20; CHECK-NEXT: cnt v0.8b, v0.8b 21; CHECK-NEXT: uaddlp v0.4h, v0.8b 22; CHECK-NEXT: ret 23 %cnt = tail call <4 x i16> @llvm.ctpop.v4i16(<4 x i16> %x) 24 ret <4 x i16> %cnt 25} 26 27declare <4 x i16> @llvm.ctpop.v4i16(<4 x i16>) nounwind readnone 28 29define <2 x i32> @ctpopv2i32(<2 x i32> %x) nounwind readnone { 30; CHECK-LABEL: ctpopv2i32: 31; CHECK: // %bb.0: 32; CHECK-NEXT: cnt v0.8b, v0.8b 33; CHECK-NEXT: uaddlp v0.4h, v0.8b 34; CHECK-NEXT: uaddlp v0.2s, v0.4h 35; CHECK-NEXT: ret 36 %cnt = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %x) 37 ret <2 x i32> %cnt 38} 39 40declare <2 x i32> @llvm.ctpop.v2i32(<2 x i32>) nounwind readnone 41 42define <1 x i64> @ctpopv1i64(<1 x i64> %x) nounwind readnone { 43; CHECK-LABEL: ctpopv1i64: 44; CHECK: // %bb.0: 45; CHECK-NEXT: cnt v0.8b, v0.8b 46; CHECK-NEXT: uaddlp v0.4h, v0.8b 47; CHECK-NEXT: uaddlp v0.2s, v0.4h 48; CHECK-NEXT: uaddlp v0.1d, v0.2s 49; CHECK-NEXT: ret 50 %cnt = tail call <1 x i64> @llvm.ctpop.v1i64(<1 x i64> %x) 51 ret <1 x i64> %cnt 52} 53 54declare <1 x i64> @llvm.ctpop.v1i64(<1 x i64>) nounwind readnone 55 56define <16 x i8> @ctpopv16i8(<16 x i8> %x) nounwind readnone { 57; CHECK-LABEL: ctpopv16i8: 58; CHECK: // %bb.0: 59; CHECK-NEXT: cnt v0.16b, v0.16b 60; CHECK-NEXT: ret 61 %cnt = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %x) 62 ret <16 x i8> %cnt 63} 64 65declare <16 x i8> @llvm.ctpop.v16i8(<16 x i8>) nounwind readnone 66 67define <8 x i16> @ctpopv8i16(<8 x i16> %x) nounwind readnone { 68; CHECK-LABEL: ctpopv8i16: 69; CHECK: // %bb.0: 70; CHECK-NEXT: cnt v0.16b, v0.16b 71; CHECK-NEXT: uaddlp v0.8h, v0.16b 72; CHECK-NEXT: ret 73 %cnt = tail call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %x) 74 ret <8 x i16> %cnt 75} 76 77declare <8 x i16> @llvm.ctpop.v8i16(<8 x i16>) nounwind readnone 78 79define <4 x i32> @ctpopv4i32(<4 x i32> %x) nounwind readnone { 80; CHECK-LABEL: ctpopv4i32: 81; CHECK: // %bb.0: 82; CHECK-NEXT: cnt v0.16b, v0.16b 83; CHECK-NEXT: uaddlp v0.8h, v0.16b 84; CHECK-NEXT: uaddlp v0.4s, v0.8h 85; CHECK-NEXT: ret 86 %cnt = tail call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %x) 87 ret <4 x i32> %cnt 88} 89 90declare <4 x i32> @llvm.ctpop.v4i32(<4 x i32>) nounwind readnone 91 92define <2 x i64> @ctpopv2i64(<2 x i64> %x) nounwind readnone { 93; CHECK-LABEL: ctpopv2i64: 94; CHECK: // %bb.0: 95; CHECK-NEXT: cnt v0.16b, v0.16b 96; CHECK-NEXT: uaddlp v0.8h, v0.16b 97; CHECK-NEXT: uaddlp v0.4s, v0.8h 98; CHECK-NEXT: uaddlp v0.2d, v0.4s 99; CHECK-NEXT: ret 100 %cnt = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %x) 101 ret <2 x i64> %cnt 102} 103 104declare <2 x i64> @llvm.ctpop.v2i64(<2 x i64>) nounwind readnone 105