1; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-arm-none-eabi -mattr=+neon -mattr=+bf16 | FileCheck %s
2
3declare bfloat @llvm.aarch64.neon.bfcvt(float)
4declare <8 x bfloat> @llvm.aarch64.neon.bfcvtn(<4 x float>)
5declare <8 x bfloat> @llvm.aarch64.neon.bfcvtn2(<8 x bfloat>, <4 x float>)
6
7; CHECK-LABEL: test_vcvth_bf16_f32
8; CHECK:      bfcvt h0, s0
9; CHECK-NEXT: ret
10define bfloat @test_vcvth_bf16_f32(float %a) {
11entry:
12  %vcvth_bf16_f32 = call bfloat @llvm.aarch64.neon.bfcvt(float %a)
13  ret bfloat %vcvth_bf16_f32
14}
15
16; CHECK-LABEL: test_vcvtq_low_bf16_f32
17; CHECK:      bfcvtn v0.4h, v0.4s
18; CHECK-NEXT: ret
19define <8 x bfloat> @test_vcvtq_low_bf16_f32(<4 x float> %a) {
20entry:
21  %cvt = call <8 x bfloat> @llvm.aarch64.neon.bfcvtn(<4 x float> %a)
22  ret <8 x bfloat> %cvt
23}
24
25; CHECK-LABEL: test_vcvtq_high_bf16_f32
26; CHECK:      bfcvtn2 v1.8h, v0.4s
27; CHECK-NEXT: mov v0.16b, v1.16b
28; CHECK-NEXT: ret
29define <8 x bfloat> @test_vcvtq_high_bf16_f32(<4 x float> %a, <8 x bfloat> %inactive) {
30entry:
31  %cvt = call <8 x bfloat> @llvm.aarch64.neon.bfcvtn2(<8 x bfloat> %inactive, <4 x float> %a)
32  ret <8 x bfloat> %cvt
33}
34
35