1; RUN: llc -verify-machineinstrs -mtriple=aarch64-linux-gnu -O0 -fast-isel=0 -global-isel=false %s -o - | FileCheck %s 2 3define { i8, i1 } @test_cmpxchg_8(i8* %addr, i8 %desired, i8 %new) nounwind { 4; CHECK-LABEL: test_cmpxchg_8: 5; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]: 6; CHECK: mov [[STATUS:w[3-9]+]], #0 7; CHECK: ldaxrb [[OLD:w[0-9]+]], [x0] 8; CHECK: cmp [[OLD]], w1, uxtb 9; CHECK: b.ne [[DONE:.LBB[0-9]+_[0-9]+]] 10; CHECK: stlxrb [[STATUS]], w2, [x0] 11; CHECK: cbnz [[STATUS]], [[RETRY]] 12; CHECK: [[DONE]]: 13; CHECK: subs {{w[0-9]+}}, [[OLD]], w1 14; CHECK: cset {{w[0-9]+}}, eq 15 %res = cmpxchg i8* %addr, i8 %desired, i8 %new seq_cst monotonic 16 ret { i8, i1 } %res 17} 18 19define { i16, i1 } @test_cmpxchg_16(i16* %addr, i16 %desired, i16 %new) nounwind { 20; CHECK-LABEL: test_cmpxchg_16: 21; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]: 22; CHECK: mov [[STATUS:w[3-9]+]], #0 23; CHECK: ldaxrh [[OLD:w[0-9]+]], [x0] 24; CHECK: cmp [[OLD]], w1, uxth 25; CHECK: b.ne [[DONE:.LBB[0-9]+_[0-9]+]] 26; CHECK: stlxrh [[STATUS:w[3-9]]], w2, [x0] 27; CHECK: cbnz [[STATUS]], [[RETRY]] 28; CHECK: [[DONE]]: 29; CHECK: subs {{w[0-9]+}}, [[OLD]], w1 30; CHECK: cset {{w[0-9]+}}, eq 31 %res = cmpxchg i16* %addr, i16 %desired, i16 %new seq_cst monotonic 32 ret { i16, i1 } %res 33} 34 35define { i32, i1 } @test_cmpxchg_32(i32* %addr, i32 %desired, i32 %new) nounwind { 36; CHECK-LABEL: test_cmpxchg_32: 37; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]: 38; CHECK: mov [[STATUS:w[3-9]+]], #0 39; CHECK: ldaxr [[OLD:w[0-9]+]], [x0] 40; CHECK: cmp [[OLD]], w1 41; CHECK: b.ne [[DONE:.LBB[0-9]+_[0-9]+]] 42; CHECK: stlxr [[STATUS]], w2, [x0] 43; CHECK: cbnz [[STATUS]], [[RETRY]] 44; CHECK: [[DONE]]: 45; CHECK: subs {{w[0-9]+}}, [[OLD]], w1 46; CHECK: cset {{w[0-9]+}}, eq 47 %res = cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst monotonic 48 ret { i32, i1 } %res 49} 50 51define { i64, i1 } @test_cmpxchg_64(i64* %addr, i64 %desired, i64 %new) nounwind { 52; CHECK-LABEL: test_cmpxchg_64: 53; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]: 54; CHECK: mov [[STATUS:w[3-9]+]], #0 55; CHECK: ldaxr [[OLD:x[0-9]+]], [x0] 56; CHECK: cmp [[OLD]], x1 57; CHECK: b.ne [[DONE:.LBB[0-9]+_[0-9]+]] 58; CHECK: stlxr [[STATUS]], x2, [x0] 59; CHECK: cbnz [[STATUS]], [[RETRY]] 60; CHECK: [[DONE]]: 61; CHECK: subs {{x[0-9]+}}, [[OLD]], x1 62; CHECK: cset {{w[0-9]+}}, eq 63 %res = cmpxchg i64* %addr, i64 %desired, i64 %new seq_cst monotonic 64 ret { i64, i1 } %res 65} 66 67define { i128, i1 } @test_cmpxchg_128(i128* %addr, i128 %desired, i128 %new) nounwind { 68; CHECK-LABEL: test_cmpxchg_128: 69; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]: 70; CHECK: ldaxp [[OLD_LO:x[0-9]+]], [[OLD_HI:x[0-9]+]], [x0] 71; CHECK: cmp [[OLD_LO]], x2 72; CHECK: cset [[CMP_TMP:w[0-9]+]], ne 73; CHECK: cmp [[OLD_HI]], x3 74; CHECK: cinc [[CMP:w[0-9]+]], [[CMP_TMP]], ne 75; CHECK: cbnz [[CMP]], [[DONE:.LBB[0-9]+_[0-9]+]] 76; CHECK: stlxp [[STATUS:w[0-9]+]], x4, x5, [x0] 77; CHECK: cbnz [[STATUS]], [[RETRY]] 78; CHECK: [[DONE]]: 79 %res = cmpxchg i128* %addr, i128 %desired, i128 %new seq_cst monotonic 80 ret { i128, i1 } %res 81} 82 83; Original implementation assumed the desired & new arguments had already been 84; type-legalized into some kind of BUILD_PAIR operation and crashed when this 85; was false. 86@var128 = global i128 0 87define {i128, i1} @test_cmpxchg_128_unsplit(i128* %addr) { 88; CHECK-LABEL: test_cmpxchg_128_unsplit: 89; CHECK: add x[[VAR128:[0-9]+]], {{x[0-9]+}}, :lo12:var128 90; CHECK: ldp [[DESIRED_LO:x[0-9]+]], [[DESIRED_HI:x[0-9]+]], [x[[VAR128]]] 91; CHECK: ldp [[NEW_LO:x[0-9]+]], [[NEW_HI:x[0-9]+]], [x[[VAR128]]] 92; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]: 93; CHECK: ldaxp [[OLD_LO:x[0-9]+]], [[OLD_HI:x[0-9]+]], [x0] 94; CHECK: cmp [[OLD_LO]], [[DESIRED_LO]] 95; CHECK: cset [[CMP_TMP:w[0-9]+]], ne 96; CHECK: cmp [[OLD_HI]], [[DESIRED_HI]] 97; CHECK: cinc [[CMP:w[0-9]+]], [[CMP_TMP]], ne 98; CHECK: cbnz [[CMP]], [[DONE:.LBB[0-9]+_[0-9]+]] 99; CHECK: stlxp [[STATUS:w[0-9]+]], [[NEW_LO]], [[NEW_HI]], [x0] 100; CHECK: cbnz [[STATUS]], [[RETRY]] 101; CHECK: [[DONE]]: 102 103 %desired = load volatile i128, i128* @var128 104 %new = load volatile i128, i128* @var128 105 %val = cmpxchg i128* %addr, i128 %desired, i128 %new seq_cst seq_cst 106 ret { i128, i1 } %val 107} 108