1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s
3; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
4
5; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.
6; WARN-NOT: warning
7
8define <vscale x 2 x i64> @and_d(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {
9; CHECK-LABEL: and_d:
10; CHECK:       // %bb.0:
11; CHECK-NEXT:    and z0.d, z0.d, z1.d
12; CHECK-NEXT:    ret
13  %res = and <vscale x 2 x i64> %a, %b
14  ret <vscale x 2 x i64> %res
15}
16
17define <vscale x 4 x i32> @and_s(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
18; CHECK-LABEL: and_s:
19; CHECK:       // %bb.0:
20; CHECK-NEXT:    and z0.d, z0.d, z1.d
21; CHECK-NEXT:    ret
22  %res = and <vscale x 4 x i32> %a, %b
23  ret <vscale x 4 x i32> %res
24}
25
26define <vscale x 8 x i16> @and_h(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b) {
27; CHECK-LABEL: and_h:
28; CHECK:       // %bb.0:
29; CHECK-NEXT:    and z0.d, z0.d, z1.d
30; CHECK-NEXT:    ret
31  %res = and <vscale x 8 x i16> %a, %b
32  ret <vscale x 8 x i16> %res
33}
34
35define <vscale x 16 x i8> @and_b(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b) {
36; CHECK-LABEL: and_b:
37; CHECK:       // %bb.0:
38; CHECK-NEXT:    and z0.d, z0.d, z1.d
39; CHECK-NEXT:    ret
40  %res = and <vscale x 16 x i8> %a, %b
41  ret <vscale x 16 x i8> %res
42}
43
44define <vscale x 2 x i1> @and_pred_d(<vscale x 2 x i1> %a, <vscale x 2 x i1> %b) {
45; CHECK-LABEL: and_pred_d:
46; CHECK:       // %bb.0:
47; CHECK-NEXT:    ptrue p2.d
48; CHECK-NEXT:    and p0.b, p2/z, p0.b, p1.b
49; CHECK-NEXT:    ret
50  %res = and <vscale x 2 x i1> %a, %b
51  ret <vscale x 2 x i1> %res
52}
53
54define <vscale x 4 x i1> @and_pred_s(<vscale x 4 x i1> %a, <vscale x 4 x i1> %b) {
55; CHECK-LABEL: and_pred_s:
56; CHECK:       // %bb.0:
57; CHECK-NEXT:    ptrue p2.s
58; CHECK-NEXT:    and p0.b, p2/z, p0.b, p1.b
59; CHECK-NEXT:    ret
60  %res = and <vscale x 4 x i1> %a, %b
61  ret <vscale x 4 x i1> %res
62}
63
64define <vscale x 8 x i1> @and_pred_h(<vscale x 8 x i1> %a, <vscale x 8 x i1> %b) {
65; CHECK-LABEL: and_pred_h:
66; CHECK:       // %bb.0:
67; CHECK-NEXT:    ptrue p2.h
68; CHECK-NEXT:    and p0.b, p2/z, p0.b, p1.b
69; CHECK-NEXT:    ret
70  %res = and <vscale x 8 x i1> %a, %b
71  ret <vscale x 8 x i1> %res
72}
73
74define <vscale x 16 x i1> @and_pred_b(<vscale x 16 x i1> %a, <vscale x 16 x i1> %b) {
75; CHECK-LABEL: and_pred_b:
76; CHECK:       // %bb.0:
77; CHECK-NEXT:    ptrue p2.b
78; CHECK-NEXT:    and p0.b, p2/z, p0.b, p1.b
79; CHECK-NEXT:    ret
80  %res = and <vscale x 16 x i1> %a, %b
81  ret <vscale x 16 x i1> %res
82}
83
84define <vscale x 2 x i64> @or_d(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {
85; CHECK-LABEL: or_d:
86; CHECK:       // %bb.0:
87; CHECK-NEXT:    orr z0.d, z0.d, z1.d
88; CHECK-NEXT:    ret
89  %res = or <vscale x 2 x i64> %a, %b
90  ret <vscale x 2 x i64> %res
91}
92
93define <vscale x 4 x i32> @or_s(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
94; CHECK-LABEL: or_s:
95; CHECK:       // %bb.0:
96; CHECK-NEXT:    orr z0.d, z0.d, z1.d
97; CHECK-NEXT:    ret
98  %res = or <vscale x 4 x i32> %a, %b
99  ret <vscale x 4 x i32> %res
100}
101
102define <vscale x 8 x i16> @or_h(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b) {
103; CHECK-LABEL: or_h:
104; CHECK:       // %bb.0:
105; CHECK-NEXT:    orr z0.d, z0.d, z1.d
106; CHECK-NEXT:    ret
107  %res = or <vscale x 8 x i16> %a, %b
108  ret <vscale x 8 x i16> %res
109}
110
111define <vscale x 16 x i8> @or_b(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b) {
112; CHECK-LABEL: or_b:
113; CHECK:       // %bb.0:
114; CHECK-NEXT:    orr z0.d, z0.d, z1.d
115; CHECK-NEXT:    ret
116  %res = or <vscale x 16 x i8> %a, %b
117  ret <vscale x 16 x i8> %res
118}
119
120define <vscale x 2 x i1> @or_pred_d(<vscale x 2 x i1> %a, <vscale x 2 x i1> %b) {
121; CHECK-LABEL: or_pred_d:
122; CHECK:       // %bb.0:
123; CHECK-NEXT:    ptrue p2.d
124; CHECK-NEXT:    orr p0.b, p2/z, p0.b, p1.b
125; CHECK-NEXT:    ret
126  %res = or <vscale x 2 x i1> %a, %b
127  ret <vscale x 2 x i1> %res
128}
129
130define <vscale x 4 x i1> @or_pred_s(<vscale x 4 x i1> %a, <vscale x 4 x i1> %b) {
131; CHECK-LABEL: or_pred_s:
132; CHECK:       // %bb.0:
133; CHECK-NEXT:    ptrue p2.s
134; CHECK-NEXT:    orr p0.b, p2/z, p0.b, p1.b
135; CHECK-NEXT:    ret
136  %res = or <vscale x 4 x i1> %a, %b
137  ret <vscale x 4 x i1> %res
138}
139
140define <vscale x 8 x i1> @or_pred_h(<vscale x 8 x i1> %a, <vscale x 8 x i1> %b) {
141; CHECK-LABEL: or_pred_h:
142; CHECK:       // %bb.0:
143; CHECK-NEXT:    ptrue p2.h
144; CHECK-NEXT:    orr p0.b, p2/z, p0.b, p1.b
145; CHECK-NEXT:    ret
146  %res = or <vscale x 8 x i1> %a, %b
147  ret <vscale x 8 x i1> %res
148}
149
150define <vscale x 16 x i1> @or_pred_b(<vscale x 16 x i1> %a, <vscale x 16 x i1> %b) {
151; CHECK-LABEL: or_pred_b:
152; CHECK:       // %bb.0:
153; CHECK-NEXT:    ptrue p2.b
154; CHECK-NEXT:    orr p0.b, p2/z, p0.b, p1.b
155; CHECK-NEXT:    ret
156  %res = or <vscale x 16 x i1> %a, %b
157  ret <vscale x 16 x i1> %res
158}
159
160define <vscale x 2 x i64> @xor_d(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {
161; CHECK-LABEL: xor_d:
162; CHECK:       // %bb.0:
163; CHECK-NEXT:    eor z0.d, z0.d, z1.d
164; CHECK-NEXT:    ret
165  %res = xor <vscale x 2 x i64> %a, %b
166  ret <vscale x 2 x i64> %res
167}
168
169define <vscale x 4 x i32> @xor_s(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
170; CHECK-LABEL: xor_s:
171; CHECK:       // %bb.0:
172; CHECK-NEXT:    eor z0.d, z0.d, z1.d
173; CHECK-NEXT:    ret
174  %res = xor <vscale x 4 x i32> %a, %b
175  ret <vscale x 4 x i32> %res
176}
177
178define <vscale x 8 x i16> @xor_h(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b) {
179; CHECK-LABEL: xor_h:
180; CHECK:       // %bb.0:
181; CHECK-NEXT:    eor z0.d, z0.d, z1.d
182; CHECK-NEXT:    ret
183  %res = xor <vscale x 8 x i16> %a, %b
184  ret <vscale x 8 x i16> %res
185}
186
187define <vscale x 16 x i8> @xor_b(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b) {
188; CHECK-LABEL: xor_b:
189; CHECK:       // %bb.0:
190; CHECK-NEXT:    eor z0.d, z0.d, z1.d
191; CHECK-NEXT:    ret
192  %res = xor <vscale x 16 x i8> %a, %b
193  ret <vscale x 16 x i8> %res
194}
195
196define <vscale x 2 x i1> @xor_pred_d(<vscale x 2 x i1> %a, <vscale x 2 x i1> %b) {
197; CHECK-LABEL: xor_pred_d:
198; CHECK:       // %bb.0:
199; CHECK-NEXT:    ptrue p2.d
200; CHECK-NEXT:    eor p0.b, p2/z, p0.b, p1.b
201; CHECK-NEXT:    ret
202  %res = xor <vscale x 2 x i1> %a, %b
203  ret <vscale x 2 x i1> %res
204}
205
206define <vscale x 4 x i1> @xor_pred_s(<vscale x 4 x i1> %a, <vscale x 4 x i1> %b) {
207; CHECK-LABEL: xor_pred_s:
208; CHECK:       // %bb.0:
209; CHECK-NEXT:    ptrue p2.s
210; CHECK-NEXT:    eor p0.b, p2/z, p0.b, p1.b
211; CHECK-NEXT:    ret
212  %res = xor <vscale x 4 x i1> %a, %b
213  ret <vscale x 4 x i1> %res
214}
215
216define <vscale x 8 x i1> @xor_pred_h(<vscale x 8 x i1> %a, <vscale x 8 x i1> %b) {
217; CHECK-LABEL: xor_pred_h:
218; CHECK:       // %bb.0:
219; CHECK-NEXT:    ptrue p2.h
220; CHECK-NEXT:    eor p0.b, p2/z, p0.b, p1.b
221; CHECK-NEXT:    ret
222  %res = xor <vscale x 8 x i1> %a, %b
223  ret <vscale x 8 x i1> %res
224}
225
226define <vscale x 16 x i1> @xor_pred_b(<vscale x 16 x i1> %a, <vscale x 16 x i1> %b) {
227; CHECK-LABEL: xor_pred_b:
228; CHECK:       // %bb.0:
229; CHECK-NEXT:    ptrue p2.b
230; CHECK-NEXT:    eor p0.b, p2/z, p0.b, p1.b
231; CHECK-NEXT:    ret
232  %res = xor <vscale x 16 x i1> %a, %b
233  ret <vscale x 16 x i1> %res
234}
235