1; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s 2; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 3 4; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it. 5; WARN-NOT: warning 6 7; 8; FABD 9; 10 11define <vscale x 8 x half> @fabd_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) { 12; CHECK-LABEL: fabd_h: 13; CHECK: fabd z0.h, p0/m, z0.h, z1.h 14; CHECK-NEXT: ret 15 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fabd.nxv8f16(<vscale x 8 x i1> %pg, 16 <vscale x 8 x half> %a, 17 <vscale x 8 x half> %b) 18 ret <vscale x 8 x half> %out 19} 20 21define <vscale x 4 x float> @fabd_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) { 22; CHECK-LABEL: fabd_s: 23; CHECK: fabd z0.s, p0/m, z0.s, z1.s 24; CHECK-NEXT: ret 25 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fabd.nxv4f32(<vscale x 4 x i1> %pg, 26 <vscale x 4 x float> %a, 27 <vscale x 4 x float> %b) 28 ret <vscale x 4 x float> %out 29} 30 31define <vscale x 2 x double> @fabd_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) { 32; CHECK-LABEL: fabd_d: 33; CHECK: fabd z0.d, p0/m, z0.d, z1.d 34; CHECK-NEXT: ret 35 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fabd.nxv2f64(<vscale x 2 x i1> %pg, 36 <vscale x 2 x double> %a, 37 <vscale x 2 x double> %b) 38 ret <vscale x 2 x double> %out 39} 40 41; 42; FABS 43; 44 45define <vscale x 8 x half> @fabs_h(<vscale x 8 x half> %a, <vscale x 8 x i1> %pg, <vscale x 8 x half> %b) { 46; CHECK-LABEL: fabs_h: 47; CHECK: fabs z0.h, p0/m, z1.h 48; CHECK-NEXT: ret 49 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fabs.nxv8f16(<vscale x 8 x half> %a, 50 <vscale x 8 x i1> %pg, 51 <vscale x 8 x half> %b) 52 ret <vscale x 8 x half> %out 53} 54 55define <vscale x 4 x float> @fabs_s(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) { 56; CHECK-LABEL: fabs_s: 57; CHECK: fabs z0.s, p0/m, z1.s 58; CHECK-NEXT: ret 59 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fabs.nxv4f32(<vscale x 4 x float> %a, 60 <vscale x 4 x i1> %pg, 61 <vscale x 4 x float> %b) 62 ret <vscale x 4 x float> %out 63} 64 65define <vscale x 2 x double> @fabs_d(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) { 66; CHECK-LABEL: fabs_d: 67; CHECK: fabs z0.d, p0/m, z1.d 68; CHECK-NEXT: ret 69 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fabs.nxv2f64(<vscale x 2 x double> %a, 70 <vscale x 2 x i1> %pg, 71 <vscale x 2 x double> %b) 72 ret <vscale x 2 x double> %out 73} 74 75; 76; FADD 77; 78 79define <vscale x 8 x half> @fadd_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) { 80; CHECK-LABEL: fadd_h: 81; CHECK: fadd z0.h, p0/m, z0.h, z1.h 82; CHECK-NEXT: ret 83 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fadd.nxv8f16(<vscale x 8 x i1> %pg, 84 <vscale x 8 x half> %a, 85 <vscale x 8 x half> %b) 86 ret <vscale x 8 x half> %out 87} 88 89define <vscale x 4 x float> @fadd_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) { 90; CHECK-LABEL: fadd_s: 91; CHECK: fadd z0.s, p0/m, z0.s, z1.s 92; CHECK-NEXT: ret 93 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fadd.nxv4f32(<vscale x 4 x i1> %pg, 94 <vscale x 4 x float> %a, 95 <vscale x 4 x float> %b) 96 ret <vscale x 4 x float> %out 97} 98 99define <vscale x 2 x double> @fadd_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) { 100; CHECK-LABEL: fadd_d: 101; CHECK: fadd z0.d, p0/m, z0.d, z1.d 102; CHECK-NEXT: ret 103 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fadd.nxv2f64(<vscale x 2 x i1> %pg, 104 <vscale x 2 x double> %a, 105 <vscale x 2 x double> %b) 106 ret <vscale x 2 x double> %out 107} 108 109; 110; FCADD 111; 112 113define <vscale x 8 x half> @fcadd_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) { 114; CHECK-LABEL: fcadd_h: 115; CHECK: fcadd z0.h, p0/m, z0.h, z1.h, #90 116; CHECK-NEXT: ret 117 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fcadd.nxv8f16(<vscale x 8 x i1> %pg, 118 <vscale x 8 x half> %a, 119 <vscale x 8 x half> %b, 120 i32 90) 121 ret <vscale x 8 x half> %out 122} 123 124define <vscale x 4 x float> @fcadd_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) { 125; CHECK-LABEL: fcadd_s: 126; CHECK: fcadd z0.s, p0/m, z0.s, z1.s, #270 127; CHECK-NEXT: ret 128 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fcadd.nxv4f32(<vscale x 4 x i1> %pg, 129 <vscale x 4 x float> %a, 130 <vscale x 4 x float> %b, 131 i32 270) 132 ret <vscale x 4 x float> %out 133} 134 135define <vscale x 2 x double> @fcadd_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) { 136; CHECK-LABEL: fcadd_d: 137; CHECK: fcadd z0.d, p0/m, z0.d, z1.d, #90 138; CHECK-NEXT: ret 139 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fcadd.nxv2f64(<vscale x 2 x i1> %pg, 140 <vscale x 2 x double> %a, 141 <vscale x 2 x double> %b, 142 i32 90) 143 ret <vscale x 2 x double> %out 144} 145 146; 147; FCMLA 148; 149 150define <vscale x 8 x half> @fcmla_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) { 151; CHECK-LABEL: fcmla_h: 152; CHECK: fcmla z0.h, p0/m, z1.h, z2.h, #90 153; CHECK-NEXT: ret 154 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fcmla.nxv8f16(<vscale x 8 x i1> %pg, 155 <vscale x 8 x half> %a, 156 <vscale x 8 x half> %b, 157 <vscale x 8 x half> %c, 158 i32 90) 159 ret <vscale x 8 x half> %out 160} 161 162define <vscale x 4 x float> @fcmla_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) { 163; CHECK-LABEL: fcmla_s: 164; CHECK: fcmla z0.s, p0/m, z1.s, z2.s, #180 165; CHECK-NEXT: ret 166 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fcmla.nxv4f32(<vscale x 4 x i1> %pg, 167 <vscale x 4 x float> %a, 168 <vscale x 4 x float> %b, 169 <vscale x 4 x float> %c, 170 i32 180) 171 ret <vscale x 4 x float> %out 172} 173 174define <vscale x 2 x double> @fcmla_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c) { 175; CHECK-LABEL: fcmla_d: 176; CHECK: fcmla z0.d, p0/m, z1.d, z2.d, #270 177; CHECK-NEXT: ret 178 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fcmla.nxv2f64(<vscale x 2 x i1> %pg, 179 <vscale x 2 x double> %a, 180 <vscale x 2 x double> %b, 181 <vscale x 2 x double> %c, 182 i32 270) 183 ret <vscale x 2 x double> %out 184} 185 186; 187; FCMLA (Indexed) 188; 189 190define <vscale x 8 x half> @fcmla_lane_h(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) { 191; CHECK-LABEL: fcmla_lane_h: 192; CHECK: fcmla z0.h, z1.h, z2.h[3], #0 193; CHECK-NEXT: ret 194 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fcmla.lane.nxv8f16(<vscale x 8 x half> %a, 195 <vscale x 8 x half> %b, 196 <vscale x 8 x half> %c, 197 i32 3, 198 i32 0) 199 ret <vscale x 8 x half> %out 200} 201 202define <vscale x 4 x float> @fcmla_lane_s(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) { 203; CHECK-LABEL: fcmla_lane_s: 204; CHECK: fcmla z0.s, z1.s, z2.s[1], #90 205; CHECK-NEXT: ret 206 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fcmla.lane.nxv4f32(<vscale x 4 x float> %a, 207 <vscale x 4 x float> %b, 208 <vscale x 4 x float> %c, 209 i32 1, 210 i32 90) 211 ret <vscale x 4 x float> %out 212} 213 214; 215; FDIV 216; 217 218define <vscale x 8 x half> @fdiv_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) { 219; CHECK-LABEL: fdiv_h: 220; CHECK: fdiv z0.h, p0/m, z0.h, z1.h 221; CHECK-NEXT: ret 222 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fdiv.nxv8f16(<vscale x 8 x i1> %pg, 223 <vscale x 8 x half> %a, 224 <vscale x 8 x half> %b) 225 ret <vscale x 8 x half> %out 226} 227 228define <vscale x 4 x float> @fdiv_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) { 229; CHECK-LABEL: fdiv_s: 230; CHECK: fdiv z0.s, p0/m, z0.s, z1.s 231; CHECK-NEXT: ret 232 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fdiv.nxv4f32(<vscale x 4 x i1> %pg, 233 <vscale x 4 x float> %a, 234 <vscale x 4 x float> %b) 235 ret <vscale x 4 x float> %out 236} 237 238define <vscale x 2 x double> @fdiv_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) { 239; CHECK-LABEL: fdiv_d: 240; CHECK: fdiv z0.d, p0/m, z0.d, z1.d 241; CHECK-NEXT: ret 242 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fdiv.nxv2f64(<vscale x 2 x i1> %pg, 243 <vscale x 2 x double> %a, 244 <vscale x 2 x double> %b) 245 ret <vscale x 2 x double> %out 246} 247 248; 249; FDIVR 250; 251 252define <vscale x 8 x half> @fdivr_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) { 253; CHECK-LABEL: fdivr_h: 254; CHECK: fdivr z0.h, p0/m, z0.h, z1.h 255; CHECK-NEXT: ret 256 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fdivr.nxv8f16(<vscale x 8 x i1> %pg, 257 <vscale x 8 x half> %a, 258 <vscale x 8 x half> %b) 259 ret <vscale x 8 x half> %out 260} 261 262define <vscale x 4 x float> @fdivr_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) { 263; CHECK-LABEL: fdivr_s: 264; CHECK: fdivr z0.s, p0/m, z0.s, z1.s 265; CHECK-NEXT: ret 266 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fdivr.nxv4f32(<vscale x 4 x i1> %pg, 267 <vscale x 4 x float> %a, 268 <vscale x 4 x float> %b) 269 ret <vscale x 4 x float> %out 270} 271 272define <vscale x 2 x double> @fdivr_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) { 273; CHECK-LABEL: fdivr_d: 274; CHECK: fdivr z0.d, p0/m, z0.d, z1.d 275; CHECK-NEXT: ret 276 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fdivr.nxv2f64(<vscale x 2 x i1> %pg, 277 <vscale x 2 x double> %a, 278 <vscale x 2 x double> %b) 279 ret <vscale x 2 x double> %out 280} 281 282; 283; FEXPA 284; 285 286define <vscale x 8 x half> @fexpa_h(<vscale x 8 x i16> %a) { 287; CHECK-LABEL: fexpa_h: 288; CHECK: fexpa z0.h, z0.h 289; CHECK-NEXT: ret 290 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fexpa.x.nxv8f16(<vscale x 8 x i16> %a) 291 ret <vscale x 8 x half> %out 292} 293 294define <vscale x 4 x float> @fexpa_s(<vscale x 4 x i32> %a) { 295; CHECK-LABEL: fexpa_s: 296; CHECK: fexpa z0.s, z0.s 297; CHECK-NEXT: ret 298 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fexpa.x.nxv4f32(<vscale x 4 x i32> %a) 299 ret <vscale x 4 x float> %out 300} 301 302define <vscale x 2 x double> @fexpa_d(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a) { 303; CHECK-LABEL: fexpa_d: 304; CHECK: fexpa z0.d, z0.d 305; CHECK-NEXT: ret 306 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fexpa.x.nxv2f64(<vscale x 2 x i64> %a) 307 ret <vscale x 2 x double> %out 308} 309 310; 311; FMAD 312; 313 314define <vscale x 8 x half> @fmad_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) { 315; CHECK-LABEL: fmad_h: 316; CHECK: fmad z0.h, p0/m, z1.h, z2.h 317; CHECK-NEXT: ret 318 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmad.nxv8f16(<vscale x 8 x i1> %pg, 319 <vscale x 8 x half> %a, 320 <vscale x 8 x half> %b, 321 <vscale x 8 x half> %c) 322 ret <vscale x 8 x half> %out 323} 324 325define <vscale x 4 x float> @fmad_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) { 326; CHECK-LABEL: fmad_s: 327; CHECK: fmad z0.s, p0/m, z1.s, z2.s 328; CHECK-NEXT: ret 329 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmad.nxv4f32(<vscale x 4 x i1> %pg, 330 <vscale x 4 x float> %a, 331 <vscale x 4 x float> %b, 332 <vscale x 4 x float> %c) 333 ret <vscale x 4 x float> %out 334} 335 336define <vscale x 2 x double> @fmad_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c) { 337; CHECK-LABEL: fmad_d: 338; CHECK: fmad z0.d, p0/m, z1.d, z2.d 339; CHECK-NEXT: ret 340 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmad.nxv2f64(<vscale x 2 x i1> %pg, 341 <vscale x 2 x double> %a, 342 <vscale x 2 x double> %b, 343 <vscale x 2 x double> %c) 344 ret <vscale x 2 x double> %out 345} 346 347; 348; FMAX 349; 350 351define <vscale x 8 x half> @fmax_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) { 352; CHECK-LABEL: fmax_h: 353; CHECK: fmax z0.h, p0/m, z0.h, z1.h 354; CHECK-NEXT: ret 355 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmax.nxv8f16(<vscale x 8 x i1> %pg, 356 <vscale x 8 x half> %a, 357 <vscale x 8 x half> %b) 358 ret <vscale x 8 x half> %out 359} 360 361define <vscale x 4 x float> @fmax_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) { 362; CHECK-LABEL: fmax_s: 363; CHECK: fmax z0.s, p0/m, z0.s, z1.s 364; CHECK-NEXT: ret 365 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmax.nxv4f32(<vscale x 4 x i1> %pg, 366 <vscale x 4 x float> %a, 367 <vscale x 4 x float> %b) 368 ret <vscale x 4 x float> %out 369} 370 371define <vscale x 2 x double> @fmax_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) { 372; CHECK-LABEL: fmax_d: 373; CHECK: fmax z0.d, p0/m, z0.d, z1.d 374; CHECK-NEXT: ret 375 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmax.nxv2f64(<vscale x 2 x i1> %pg, 376 <vscale x 2 x double> %a, 377 <vscale x 2 x double> %b) 378 ret <vscale x 2 x double> %out 379} 380 381; 382; FMAXNM 383; 384 385define <vscale x 8 x half> @fmaxnm_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) { 386; CHECK-LABEL: fmaxnm_h: 387; CHECK: fmaxnm z0.h, p0/m, z0.h, z1.h 388; CHECK-NEXT: ret 389 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %pg, 390 <vscale x 8 x half> %a, 391 <vscale x 8 x half> %b) 392 ret <vscale x 8 x half> %out 393} 394 395define <vscale x 4 x float> @fmaxnm_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) { 396; CHECK-LABEL: fmaxnm_s: 397; CHECK: fmaxnm z0.s, p0/m, z0.s, z1.s 398; CHECK-NEXT: ret 399 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %pg, 400 <vscale x 4 x float> %a, 401 <vscale x 4 x float> %b) 402 ret <vscale x 4 x float> %out 403} 404 405define <vscale x 2 x double> @fmaxnm_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) { 406; CHECK-LABEL: fmaxnm_d: 407; CHECK: fmaxnm z0.d, p0/m, z0.d, z1.d 408; CHECK-NEXT: ret 409 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %pg, 410 <vscale x 2 x double> %a, 411 <vscale x 2 x double> %b) 412 ret <vscale x 2 x double> %out 413} 414 415; 416; FMIN 417; 418 419define <vscale x 8 x half> @fmin_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) { 420; CHECK-LABEL: fmin_h: 421; CHECK: fmin z0.h, p0/m, z0.h, z1.h 422; CHECK-NEXT: ret 423 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmin.nxv8f16(<vscale x 8 x i1> %pg, 424 <vscale x 8 x half> %a, 425 <vscale x 8 x half> %b) 426 ret <vscale x 8 x half> %out 427} 428 429define <vscale x 4 x float> @fmin_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) { 430; CHECK-LABEL: fmin_s: 431; CHECK: fmin z0.s, p0/m, z0.s, z1.s 432; CHECK-NEXT: ret 433 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmin.nxv4f32(<vscale x 4 x i1> %pg, 434 <vscale x 4 x float> %a, 435 <vscale x 4 x float> %b) 436 ret <vscale x 4 x float> %out 437} 438 439define <vscale x 2 x double> @fmin_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) { 440; CHECK-LABEL: fmin_d: 441; CHECK: fmin z0.d, p0/m, z0.d, z1.d 442; CHECK-NEXT: ret 443 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmin.nxv2f64(<vscale x 2 x i1> %pg, 444 <vscale x 2 x double> %a, 445 <vscale x 2 x double> %b) 446 ret <vscale x 2 x double> %out 447} 448 449; 450; FMINNM 451; 452 453define <vscale x 8 x half> @fminnm_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) { 454; CHECK-LABEL: fminnm_h: 455; CHECK: fminnm z0.h, p0/m, z0.h, z1.h 456; CHECK-NEXT: ret 457 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fminnm.nxv8f16(<vscale x 8 x i1> %pg, 458 <vscale x 8 x half> %a, 459 <vscale x 8 x half> %b) 460 ret <vscale x 8 x half> %out 461} 462 463define <vscale x 4 x float> @fminnm_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) { 464; CHECK-LABEL: fminnm_s: 465; CHECK: fminnm z0.s, p0/m, z0.s, z1.s 466; CHECK-NEXT: ret 467 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fminnm.nxv4f32(<vscale x 4 x i1> %pg, 468 <vscale x 4 x float> %a, 469 <vscale x 4 x float> %b) 470 ret <vscale x 4 x float> %out 471} 472 473define <vscale x 2 x double> @fminnm_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) { 474; CHECK-LABEL: fminnm_d: 475; CHECK: fminnm z0.d, p0/m, z0.d, z1.d 476; CHECK-NEXT: ret 477 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fminnm.nxv2f64(<vscale x 2 x i1> %pg, 478 <vscale x 2 x double> %a, 479 <vscale x 2 x double> %b) 480 ret <vscale x 2 x double> %out 481} 482 483; 484; FMLA 485; 486 487define <vscale x 8 x half> @fmla_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) { 488; CHECK-LABEL: fmla_h: 489; CHECK: fmla z0.h, p0/m, z1.h, z2.h 490; CHECK-NEXT: ret 491 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmla.nxv8f16(<vscale x 8 x i1> %pg, 492 <vscale x 8 x half> %a, 493 <vscale x 8 x half> %b, 494 <vscale x 8 x half> %c) 495 ret <vscale x 8 x half> %out 496} 497 498define <vscale x 4 x float> @fmla_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) { 499; CHECK-LABEL: fmla_s: 500; CHECK: fmla z0.s, p0/m, z1.s, z2.s 501; CHECK-NEXT: ret 502 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmla.nxv4f32(<vscale x 4 x i1> %pg, 503 <vscale x 4 x float> %a, 504 <vscale x 4 x float> %b, 505 <vscale x 4 x float> %c) 506 ret <vscale x 4 x float> %out 507} 508 509define <vscale x 2 x double> @fmla_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c) { 510; CHECK-LABEL: fmla_d: 511; CHECK: fmla z0.d, p0/m, z1.d, z2.d 512; CHECK-NEXT: ret 513 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmla.nxv2f64(<vscale x 2 x i1> %pg, 514 <vscale x 2 x double> %a, 515 <vscale x 2 x double> %b, 516 <vscale x 2 x double> %c) 517 ret <vscale x 2 x double> %out 518} 519 520; 521; FMLA (Indexed) 522; 523 524define <vscale x 8 x half> @fmla_lane_h(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) { 525; CHECK-LABEL: fmla_lane_h: 526; CHECK: fmla z0.h, z1.h, z2.h[3] 527; CHECK-NEXT: ret 528 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmla.lane.nxv8f16(<vscale x 8 x half> %a, 529 <vscale x 8 x half> %b, 530 <vscale x 8 x half> %c, 531 i32 3) 532 ret <vscale x 8 x half> %out 533} 534 535define <vscale x 4 x float> @fmla_lane_s(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) { 536; CHECK-LABEL: fmla_lane_s: 537; CHECK: fmla z0.s, z1.s, z2.s[2] 538; CHECK-NEXT: ret 539 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmla.lane.nxv4f32(<vscale x 4 x float> %a, 540 <vscale x 4 x float> %b, 541 <vscale x 4 x float> %c, 542 i32 2) 543 ret <vscale x 4 x float> %out 544} 545 546define <vscale x 2 x double> @fmla_lane_d(<vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c) { 547; CHECK-LABEL: fmla_lane_d: 548; CHECK: fmla z0.d, z1.d, z2.d[1] 549; CHECK-NEXT: ret 550 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmla.lane.nxv2f64(<vscale x 2 x double> %a, 551 <vscale x 2 x double> %b, 552 <vscale x 2 x double> %c, 553 i32 1) 554 ret <vscale x 2 x double> %out 555} 556 557; 558; FMLS 559; 560 561define <vscale x 8 x half> @fmls_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) { 562; CHECK-LABEL: fmls_h: 563; CHECK: fmls z0.h, p0/m, z1.h, z2.h 564; CHECK-NEXT: ret 565 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmls.nxv8f16(<vscale x 8 x i1> %pg, 566 <vscale x 8 x half> %a, 567 <vscale x 8 x half> %b, 568 <vscale x 8 x half> %c) 569 ret <vscale x 8 x half> %out 570} 571 572define <vscale x 4 x float> @fmls_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) { 573; CHECK-LABEL: fmls_s: 574; CHECK: fmls z0.s, p0/m, z1.s, z2.s 575; CHECK-NEXT: ret 576 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmls.nxv4f32(<vscale x 4 x i1> %pg, 577 <vscale x 4 x float> %a, 578 <vscale x 4 x float> %b, 579 <vscale x 4 x float> %c) 580 ret <vscale x 4 x float> %out 581} 582 583define <vscale x 2 x double> @fmls_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c) { 584; CHECK-LABEL: fmls_d: 585; CHECK: fmls z0.d, p0/m, z1.d, z2.d 586; CHECK-NEXT: ret 587 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmls.nxv2f64(<vscale x 2 x i1> %pg, 588 <vscale x 2 x double> %a, 589 <vscale x 2 x double> %b, 590 <vscale x 2 x double> %c) 591 ret <vscale x 2 x double> %out 592} 593 594; 595; FMLS (Indexed) 596; 597 598define <vscale x 8 x half> @fmls_lane_h(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) { 599; CHECK-LABEL: fmls_lane_h: 600; CHECK: fmls z0.h, z1.h, z2.h[3] 601; CHECK-NEXT: ret 602 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmls.lane.nxv8f16(<vscale x 8 x half> %a, 603 <vscale x 8 x half> %b, 604 <vscale x 8 x half> %c, 605 i32 3) 606 ret <vscale x 8 x half> %out 607} 608 609define <vscale x 4 x float> @fmls_lane_s(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) { 610; CHECK-LABEL: fmls_lane_s: 611; CHECK: fmls z0.s, z1.s, z2.s[2] 612; CHECK-NEXT: ret 613 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmls.lane.nxv4f32(<vscale x 4 x float> %a, 614 <vscale x 4 x float> %b, 615 <vscale x 4 x float> %c, 616 i32 2) 617 ret <vscale x 4 x float> %out 618} 619 620define <vscale x 2 x double> @fmls_lane_d(<vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c) { 621; CHECK-LABEL: fmls_lane_d: 622; CHECK: fmls z0.d, z1.d, z2.d[1] 623; CHECK-NEXT: ret 624 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmls.lane.nxv2f64(<vscale x 2 x double> %a, 625 <vscale x 2 x double> %b, 626 <vscale x 2 x double> %c, 627 i32 1) 628 ret <vscale x 2 x double> %out 629} 630 631; 632; FMSB 633; 634 635define <vscale x 8 x half> @fmsb_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) { 636; CHECK-LABEL: fmsb_h: 637; CHECK: fmsb z0.h, p0/m, z1.h, z2.h 638; CHECK-NEXT: ret 639 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmsb.nxv8f16(<vscale x 8 x i1> %pg, 640 <vscale x 8 x half> %a, 641 <vscale x 8 x half> %b, 642 <vscale x 8 x half> %c) 643 ret <vscale x 8 x half> %out 644} 645 646define <vscale x 4 x float> @fmsb_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) { 647; CHECK-LABEL: fmsb_s: 648; CHECK: fmsb z0.s, p0/m, z1.s, z2.s 649; CHECK-NEXT: ret 650 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmsb.nxv4f32(<vscale x 4 x i1> %pg, 651 <vscale x 4 x float> %a, 652 <vscale x 4 x float> %b, 653 <vscale x 4 x float> %c) 654 ret <vscale x 4 x float> %out 655} 656 657define <vscale x 2 x double> @fmsb_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c) { 658; CHECK-LABEL: fmsb_d: 659; CHECK: fmsb z0.d, p0/m, z1.d, z2.d 660; CHECK-NEXT: ret 661 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmsb.nxv2f64(<vscale x 2 x i1> %pg, 662 <vscale x 2 x double> %a, 663 <vscale x 2 x double> %b, 664 <vscale x 2 x double> %c) 665 ret <vscale x 2 x double> %out 666} 667 668; 669; FMUL 670; 671 672define <vscale x 8 x half> @fmul_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) { 673; CHECK-LABEL: fmul_h: 674; CHECK: fmul z0.h, p0/m, z0.h, z1.h 675; CHECK-NEXT: ret 676 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmul.nxv8f16(<vscale x 8 x i1> %pg, 677 <vscale x 8 x half> %a, 678 <vscale x 8 x half> %b) 679 ret <vscale x 8 x half> %out 680} 681 682define <vscale x 4 x float> @fmul_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) { 683; CHECK-LABEL: fmul_s: 684; CHECK: fmul z0.s, p0/m, z0.s, z1.s 685; CHECK-NEXT: ret 686 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmul.nxv4f32(<vscale x 4 x i1> %pg, 687 <vscale x 4 x float> %a, 688 <vscale x 4 x float> %b) 689 ret <vscale x 4 x float> %out 690} 691 692define <vscale x 2 x double> @fmul_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) { 693; CHECK-LABEL: fmul_d: 694; CHECK: fmul z0.d, p0/m, z0.d, z1.d 695; CHECK-NEXT: ret 696 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1> %pg, 697 <vscale x 2 x double> %a, 698 <vscale x 2 x double> %b) 699 ret <vscale x 2 x double> %out 700} 701 702; 703; FMUL (Indexed) 704; 705 706define <vscale x 8 x half> @fmul_lane_h(<vscale x 8 x half> %a, <vscale x 8 x half> %b) { 707; CHECK-LABEL: fmul_lane_h: 708; CHECK: fmul z0.h, z0.h, z1.h[3] 709; CHECK-NEXT: ret 710 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmul.lane.nxv8f16(<vscale x 8 x half> %a, 711 <vscale x 8 x half> %b, 712 i32 3) 713 ret <vscale x 8 x half> %out 714} 715 716define <vscale x 4 x float> @fmul_lane_s(<vscale x 4 x float> %a, <vscale x 4 x float> %b) { 717; CHECK-LABEL: fmul_lane_s: 718; CHECK: fmul z0.s, z0.s, z1.s[2] 719; CHECK-NEXT: ret 720 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmul.lane.nxv4f32(<vscale x 4 x float> %a, 721 <vscale x 4 x float> %b, 722 i32 2) 723 ret <vscale x 4 x float> %out 724} 725 726define <vscale x 2 x double> @fmul_lane_d(<vscale x 2 x double> %a, <vscale x 2 x double> %b) { 727; CHECK-LABEL: fmul_lane_d: 728; CHECK: fmul z0.d, z0.d, z1.d[1] 729; CHECK-NEXT: ret 730 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmul.lane.nxv2f64(<vscale x 2 x double> %a, 731 <vscale x 2 x double> %b, 732 i32 1) 733 ret <vscale x 2 x double> %out 734} 735 736; 737; FMULX 738; 739 740define <vscale x 8 x half> @fmulx_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) { 741; CHECK-LABEL: fmulx_h: 742; CHECK: fmulx z0.h, p0/m, z0.h, z1.h 743; CHECK-NEXT: ret 744 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmulx.nxv8f16(<vscale x 8 x i1> %pg, 745 <vscale x 8 x half> %a, 746 <vscale x 8 x half> %b) 747 ret <vscale x 8 x half> %out 748} 749 750define <vscale x 4 x float> @fmulx_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) { 751; CHECK-LABEL: fmulx_s: 752; CHECK: fmulx z0.s, p0/m, z0.s, z1.s 753; CHECK-NEXT: ret 754 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmulx.nxv4f32(<vscale x 4 x i1> %pg, 755 <vscale x 4 x float> %a, 756 <vscale x 4 x float> %b) 757 ret <vscale x 4 x float> %out 758} 759 760define <vscale x 2 x double> @fmulx_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) { 761; CHECK-LABEL: fmulx_d: 762; CHECK: fmulx z0.d, p0/m, z0.d, z1.d 763; CHECK-NEXT: ret 764 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmulx.nxv2f64(<vscale x 2 x i1> %pg, 765 <vscale x 2 x double> %a, 766 <vscale x 2 x double> %b) 767 ret <vscale x 2 x double> %out 768} 769 770; 771; FNEG 772; 773 774define <vscale x 8 x half> @fneg_h(<vscale x 8 x half> %a, <vscale x 8 x i1> %pg, <vscale x 8 x half> %b) { 775; CHECK-LABEL: fneg_h: 776; CHECK: fneg z0.h, p0/m, z1.h 777; CHECK-NEXT: ret 778 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fneg.nxv8f16(<vscale x 8 x half> %a, 779 <vscale x 8 x i1> %pg, 780 <vscale x 8 x half> %b) 781 ret <vscale x 8 x half> %out 782} 783 784define <vscale x 4 x float> @fneg_s(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) { 785; CHECK-LABEL: fneg_s: 786; CHECK: fneg z0.s, p0/m, z1.s 787; CHECK-NEXT: ret 788 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fneg.nxv4f32(<vscale x 4 x float> %a, 789 <vscale x 4 x i1> %pg, 790 <vscale x 4 x float> %b) 791 ret <vscale x 4 x float> %out 792} 793 794define <vscale x 2 x double> @fneg_d(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) { 795; CHECK-LABEL: fneg_d: 796; CHECK: fneg z0.d, p0/m, z1.d 797; CHECK-NEXT: ret 798 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fneg.nxv2f64(<vscale x 2 x double> %a, 799 <vscale x 2 x i1> %pg, 800 <vscale x 2 x double> %b) 801 ret <vscale x 2 x double> %out 802} 803 804; 805; FNMAD 806; 807 808define <vscale x 8 x half> @fnmad_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) { 809; CHECK-LABEL: fnmad_h: 810; CHECK: fnmad z0.h, p0/m, z1.h, z2.h 811; CHECK-NEXT: ret 812 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fnmad.nxv8f16(<vscale x 8 x i1> %pg, 813 <vscale x 8 x half> %a, 814 <vscale x 8 x half> %b, 815 <vscale x 8 x half> %c) 816 ret <vscale x 8 x half> %out 817} 818 819define <vscale x 4 x float> @fnmad_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) { 820; CHECK-LABEL: fnmad_s: 821; CHECK: fnmad z0.s, p0/m, z1.s, z2.s 822; CHECK-NEXT: ret 823 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fnmad.nxv4f32(<vscale x 4 x i1> %pg, 824 <vscale x 4 x float> %a, 825 <vscale x 4 x float> %b, 826 <vscale x 4 x float> %c) 827 ret <vscale x 4 x float> %out 828} 829 830define <vscale x 2 x double> @fnmad_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c) { 831; CHECK-LABEL: fnmad_d: 832; CHECK: fnmad z0.d, p0/m, z1.d, z2.d 833; CHECK-NEXT: ret 834 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fnmad.nxv2f64(<vscale x 2 x i1> %pg, 835 <vscale x 2 x double> %a, 836 <vscale x 2 x double> %b, 837 <vscale x 2 x double> %c) 838 ret <vscale x 2 x double> %out 839} 840 841; 842; FNMLA 843; 844 845define <vscale x 8 x half> @fnmla_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) { 846; CHECK-LABEL: fnmla_h: 847; CHECK: fnmla z0.h, p0/m, z1.h, z2.h 848; CHECK-NEXT: ret 849 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fnmla.nxv8f16(<vscale x 8 x i1> %pg, 850 <vscale x 8 x half> %a, 851 <vscale x 8 x half> %b, 852 <vscale x 8 x half> %c) 853 ret <vscale x 8 x half> %out 854} 855 856define <vscale x 4 x float> @fnmla_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) { 857; CHECK-LABEL: fnmla_s: 858; CHECK: fnmla z0.s, p0/m, z1.s, z2.s 859; CHECK-NEXT: ret 860 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fnmla.nxv4f32(<vscale x 4 x i1> %pg, 861 <vscale x 4 x float> %a, 862 <vscale x 4 x float> %b, 863 <vscale x 4 x float> %c) 864 ret <vscale x 4 x float> %out 865} 866 867define <vscale x 2 x double> @fnmla_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c) { 868; CHECK-LABEL: fnmla_d: 869; CHECK: fnmla z0.d, p0/m, z1.d, z2.d 870; CHECK-NEXT: ret 871 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fnmla.nxv2f64(<vscale x 2 x i1> %pg, 872 <vscale x 2 x double> %a, 873 <vscale x 2 x double> %b, 874 <vscale x 2 x double> %c) 875 ret <vscale x 2 x double> %out 876} 877 878; 879; FNMLS 880; 881 882define <vscale x 8 x half> @fnmls_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) { 883; CHECK-LABEL: fnmls_h: 884; CHECK: fnmls z0.h, p0/m, z1.h, z2.h 885; CHECK-NEXT: ret 886 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fnmls.nxv8f16(<vscale x 8 x i1> %pg, 887 <vscale x 8 x half> %a, 888 <vscale x 8 x half> %b, 889 <vscale x 8 x half> %c) 890 ret <vscale x 8 x half> %out 891} 892 893define <vscale x 4 x float> @fnmls_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) { 894; CHECK-LABEL: fnmls_s: 895; CHECK: fnmls z0.s, p0/m, z1.s, z2.s 896; CHECK-NEXT: ret 897 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fnmls.nxv4f32(<vscale x 4 x i1> %pg, 898 <vscale x 4 x float> %a, 899 <vscale x 4 x float> %b, 900 <vscale x 4 x float> %c) 901 ret <vscale x 4 x float> %out 902} 903 904define <vscale x 2 x double> @fnmls_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c) { 905; CHECK-LABEL: fnmls_d: 906; CHECK: fnmls z0.d, p0/m, z1.d, z2.d 907; CHECK-NEXT: ret 908 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fnmls.nxv2f64(<vscale x 2 x i1> %pg, 909 <vscale x 2 x double> %a, 910 <vscale x 2 x double> %b, 911 <vscale x 2 x double> %c) 912 ret <vscale x 2 x double> %out 913} 914 915; 916; FNMSB 917; 918 919define <vscale x 8 x half> @fnmsb_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) { 920; CHECK-LABEL: fnmsb_h: 921; CHECK: fnmsb z0.h, p0/m, z1.h, z2.h 922; CHECK-NEXT: ret 923 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fnmsb.nxv8f16(<vscale x 8 x i1> %pg, 924 <vscale x 8 x half> %a, 925 <vscale x 8 x half> %b, 926 <vscale x 8 x half> %c) 927 ret <vscale x 8 x half> %out 928} 929 930define <vscale x 4 x float> @fnmsb_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) { 931; CHECK-LABEL: fnmsb_s: 932; CHECK: fnmsb z0.s, p0/m, z1.s, z2.s 933; CHECK-NEXT: ret 934 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fnmsb.nxv4f32(<vscale x 4 x i1> %pg, 935 <vscale x 4 x float> %a, 936 <vscale x 4 x float> %b, 937 <vscale x 4 x float> %c) 938 ret <vscale x 4 x float> %out 939} 940 941define <vscale x 2 x double> @fnmsb_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c) { 942; CHECK-LABEL: fnmsb_d: 943; CHECK: fnmsb z0.d, p0/m, z1.d, z2.d 944; CHECK-NEXT: ret 945 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fnmsb.nxv2f64(<vscale x 2 x i1> %pg, 946 <vscale x 2 x double> %a, 947 <vscale x 2 x double> %b, 948 <vscale x 2 x double> %c) 949 ret <vscale x 2 x double> %out 950} 951 952; 953; FRECPE 954; 955 956define <vscale x 8 x half> @frecpe_h(<vscale x 8 x half> %a) { 957; CHECK-LABEL: frecpe_h: 958; CHECK: frecpe z0.h, z0.h 959; CHECK-NEXT: ret 960 %out = call <vscale x 8 x half> @llvm.aarch64.sve.frecpe.x.nxv8f16(<vscale x 8 x half> %a) 961 ret <vscale x 8 x half> %out 962} 963 964define <vscale x 4 x float> @frecpe_s(<vscale x 4 x float> %a) { 965; CHECK-LABEL: frecpe_s: 966; CHECK: frecpe z0.s, z0.s 967; CHECK-NEXT: ret 968 %out = call <vscale x 4 x float> @llvm.aarch64.sve.frecpe.x.nxv4f32(<vscale x 4 x float> %a) 969 ret <vscale x 4 x float> %out 970} 971 972define <vscale x 2 x double> @frecpe_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) { 973; CHECK-LABEL: frecpe_d: 974; CHECK: frecpe z0.d, z0.d 975; CHECK-NEXT: ret 976 %out = call <vscale x 2 x double> @llvm.aarch64.sve.frecpe.x.nxv2f64(<vscale x 2 x double> %a) 977 ret <vscale x 2 x double> %out 978} 979 980; 981; FRECPX 982; 983 984define <vscale x 8 x half> @frecpx_h(<vscale x 8 x half> %a, <vscale x 8 x i1> %pg, <vscale x 8 x half> %b) { 985; CHECK-LABEL: frecpx_h: 986; CHECK: frecpx z0.h, p0/m, z1.h 987; CHECK-NEXT: ret 988 %out = call <vscale x 8 x half> @llvm.aarch64.sve.frecpx.nxv8f16(<vscale x 8 x half> %a, 989 <vscale x 8 x i1> %pg, 990 <vscale x 8 x half> %b) 991 ret <vscale x 8 x half> %out 992} 993 994define <vscale x 4 x float> @frecpx_s(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) { 995; CHECK-LABEL: frecpx_s: 996; CHECK: frecpx z0.s, p0/m, z1.s 997; CHECK-NEXT: ret 998 %out = call <vscale x 4 x float> @llvm.aarch64.sve.frecpx.nxv4f32(<vscale x 4 x float> %a, 999 <vscale x 4 x i1> %pg, 1000 <vscale x 4 x float> %b) 1001 ret <vscale x 4 x float> %out 1002} 1003 1004define <vscale x 2 x double> @frecpx_d(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) { 1005; CHECK-LABEL: frecpx_d: 1006; CHECK: frecpx z0.d, p0/m, z1.d 1007; CHECK-NEXT: ret 1008 %out = call <vscale x 2 x double> @llvm.aarch64.sve.frecpx.nxv2f64(<vscale x 2 x double> %a, 1009 <vscale x 2 x i1> %pg, 1010 <vscale x 2 x double> %b) 1011 ret <vscale x 2 x double> %out 1012} 1013 1014; 1015; FRINTA 1016; 1017 1018define <vscale x 8 x half> @frinta_h(<vscale x 8 x half> %a, <vscale x 8 x i1> %pg, <vscale x 8 x half> %b) { 1019; CHECK-LABEL: frinta_h: 1020; CHECK: frinta z0.h, p0/m, z1.h 1021; CHECK-NEXT: ret 1022 %out = call <vscale x 8 x half> @llvm.aarch64.sve.frinta.nxv8f16(<vscale x 8 x half> %a, 1023 <vscale x 8 x i1> %pg, 1024 <vscale x 8 x half> %b) 1025 ret <vscale x 8 x half> %out 1026} 1027 1028define <vscale x 4 x float> @frinta_s(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) { 1029; CHECK-LABEL: frinta_s: 1030; CHECK: frinta z0.s, p0/m, z1.s 1031; CHECK-NEXT: ret 1032 %out = call <vscale x 4 x float> @llvm.aarch64.sve.frinta.nxv4f32(<vscale x 4 x float> %a, 1033 <vscale x 4 x i1> %pg, 1034 <vscale x 4 x float> %b) 1035 ret <vscale x 4 x float> %out 1036} 1037 1038define <vscale x 2 x double> @frinta_d(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) { 1039; CHECK-LABEL: frinta_d: 1040; CHECK: frinta z0.d, p0/m, z1.d 1041; CHECK-NEXT: ret 1042 %out = call <vscale x 2 x double> @llvm.aarch64.sve.frinta.nxv2f64(<vscale x 2 x double> %a, 1043 <vscale x 2 x i1> %pg, 1044 <vscale x 2 x double> %b) 1045 ret <vscale x 2 x double> %out 1046} 1047 1048; 1049; FRINTI 1050; 1051 1052define <vscale x 8 x half> @frinti_h(<vscale x 8 x half> %a, <vscale x 8 x i1> %pg, <vscale x 8 x half> %b) { 1053; CHECK-LABEL: frinti_h: 1054; CHECK: frinti z0.h, p0/m, z1.h 1055; CHECK-NEXT: ret 1056 %out = call <vscale x 8 x half> @llvm.aarch64.sve.frinti.nxv8f16(<vscale x 8 x half> %a, 1057 <vscale x 8 x i1> %pg, 1058 <vscale x 8 x half> %b) 1059 ret <vscale x 8 x half> %out 1060} 1061 1062define <vscale x 4 x float> @frinti_s(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) { 1063; CHECK-LABEL: frinti_s: 1064; CHECK: frinti z0.s, p0/m, z1.s 1065; CHECK-NEXT: ret 1066 %out = call <vscale x 4 x float> @llvm.aarch64.sve.frinti.nxv4f32(<vscale x 4 x float> %a, 1067 <vscale x 4 x i1> %pg, 1068 <vscale x 4 x float> %b) 1069 ret <vscale x 4 x float> %out 1070} 1071 1072define <vscale x 2 x double> @frinti_d(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) { 1073; CHECK-LABEL: frinti_d: 1074; CHECK: frinti z0.d, p0/m, z1.d 1075; CHECK-NEXT: ret 1076 %out = call <vscale x 2 x double> @llvm.aarch64.sve.frinti.nxv2f64(<vscale x 2 x double> %a, 1077 <vscale x 2 x i1> %pg, 1078 <vscale x 2 x double> %b) 1079 ret <vscale x 2 x double> %out 1080} 1081 1082; 1083; FRINTM 1084; 1085 1086define <vscale x 8 x half> @frintm_h(<vscale x 8 x half> %a, <vscale x 8 x i1> %pg, <vscale x 8 x half> %b) { 1087; CHECK-LABEL: frintm_h: 1088; CHECK: frintm z0.h, p0/m, z1.h 1089; CHECK-NEXT: ret 1090 %out = call <vscale x 8 x half> @llvm.aarch64.sve.frintm.nxv8f16(<vscale x 8 x half> %a, 1091 <vscale x 8 x i1> %pg, 1092 <vscale x 8 x half> %b) 1093 ret <vscale x 8 x half> %out 1094} 1095 1096define <vscale x 4 x float> @frintm_s(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) { 1097; CHECK-LABEL: frintm_s: 1098; CHECK: frintm z0.s, p0/m, z1.s 1099; CHECK-NEXT: ret 1100 %out = call <vscale x 4 x float> @llvm.aarch64.sve.frintm.nxv4f32(<vscale x 4 x float> %a, 1101 <vscale x 4 x i1> %pg, 1102 <vscale x 4 x float> %b) 1103 ret <vscale x 4 x float> %out 1104} 1105 1106define <vscale x 2 x double> @frintm_d(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) { 1107; CHECK-LABEL: frintm_d: 1108; CHECK: frintm z0.d, p0/m, z1.d 1109; CHECK-NEXT: ret 1110 %out = call <vscale x 2 x double> @llvm.aarch64.sve.frintm.nxv2f64(<vscale x 2 x double> %a, 1111 <vscale x 2 x i1> %pg, 1112 <vscale x 2 x double> %b) 1113 ret <vscale x 2 x double> %out 1114} 1115 1116; 1117; FRINTN 1118; 1119 1120define <vscale x 8 x half> @frintn_h(<vscale x 8 x half> %a, <vscale x 8 x i1> %pg, <vscale x 8 x half> %b) { 1121; CHECK-LABEL: frintn_h: 1122; CHECK: frintn z0.h, p0/m, z1.h 1123; CHECK-NEXT: ret 1124 %out = call <vscale x 8 x half> @llvm.aarch64.sve.frintn.nxv8f16(<vscale x 8 x half> %a, 1125 <vscale x 8 x i1> %pg, 1126 <vscale x 8 x half> %b) 1127 ret <vscale x 8 x half> %out 1128} 1129 1130define <vscale x 4 x float> @frintn_s(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) { 1131; CHECK-LABEL: frintn_s: 1132; CHECK: frintn z0.s, p0/m, z1.s 1133; CHECK-NEXT: ret 1134 %out = call <vscale x 4 x float> @llvm.aarch64.sve.frintn.nxv4f32(<vscale x 4 x float> %a, 1135 <vscale x 4 x i1> %pg, 1136 <vscale x 4 x float> %b) 1137 ret <vscale x 4 x float> %out 1138} 1139 1140define <vscale x 2 x double> @frintn_d(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) { 1141; CHECK-LABEL: frintn_d: 1142; CHECK: frintn z0.d, p0/m, z1.d 1143; CHECK-NEXT: ret 1144 %out = call <vscale x 2 x double> @llvm.aarch64.sve.frintn.nxv2f64(<vscale x 2 x double> %a, 1145 <vscale x 2 x i1> %pg, 1146 <vscale x 2 x double> %b) 1147 ret <vscale x 2 x double> %out 1148} 1149 1150; 1151; FRINTP 1152; 1153 1154define <vscale x 8 x half> @frintp_h(<vscale x 8 x half> %a, <vscale x 8 x i1> %pg, <vscale x 8 x half> %b) { 1155; CHECK-LABEL: frintp_h: 1156; CHECK: frintp z0.h, p0/m, z1.h 1157; CHECK-NEXT: ret 1158 %out = call <vscale x 8 x half> @llvm.aarch64.sve.frintp.nxv8f16(<vscale x 8 x half> %a, 1159 <vscale x 8 x i1> %pg, 1160 <vscale x 8 x half> %b) 1161 ret <vscale x 8 x half> %out 1162} 1163 1164define <vscale x 4 x float> @frintp_s(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) { 1165; CHECK-LABEL: frintp_s: 1166; CHECK: frintp z0.s, p0/m, z1.s 1167; CHECK-NEXT: ret 1168 %out = call <vscale x 4 x float> @llvm.aarch64.sve.frintp.nxv4f32(<vscale x 4 x float> %a, 1169 <vscale x 4 x i1> %pg, 1170 <vscale x 4 x float> %b) 1171 ret <vscale x 4 x float> %out 1172} 1173 1174define <vscale x 2 x double> @frintp_d(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) { 1175; CHECK-LABEL: frintp_d: 1176; CHECK: frintp z0.d, p0/m, z1.d 1177; CHECK-NEXT: ret 1178 %out = call <vscale x 2 x double> @llvm.aarch64.sve.frintp.nxv2f64(<vscale x 2 x double> %a, 1179 <vscale x 2 x i1> %pg, 1180 <vscale x 2 x double> %b) 1181 ret <vscale x 2 x double> %out 1182} 1183 1184; 1185; FRINTX 1186; 1187 1188define <vscale x 8 x half> @frintx_h(<vscale x 8 x half> %a, <vscale x 8 x i1> %pg, <vscale x 8 x half> %b) { 1189; CHECK-LABEL: frintx_h: 1190; CHECK: frintx z0.h, p0/m, z1.h 1191; CHECK-NEXT: ret 1192 %out = call <vscale x 8 x half> @llvm.aarch64.sve.frintx.nxv8f16(<vscale x 8 x half> %a, 1193 <vscale x 8 x i1> %pg, 1194 <vscale x 8 x half> %b) 1195 ret <vscale x 8 x half> %out 1196} 1197 1198define <vscale x 4 x float> @frintx_s(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) { 1199; CHECK-LABEL: frintx_s: 1200; CHECK: frintx z0.s, p0/m, z1.s 1201; CHECK-NEXT: ret 1202 %out = call <vscale x 4 x float> @llvm.aarch64.sve.frintx.nxv4f32(<vscale x 4 x float> %a, 1203 <vscale x 4 x i1> %pg, 1204 <vscale x 4 x float> %b) 1205 ret <vscale x 4 x float> %out 1206} 1207 1208define <vscale x 2 x double> @frintx_d(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) { 1209; CHECK-LABEL: frintx_d: 1210; CHECK: frintx z0.d, p0/m, z1.d 1211; CHECK-NEXT: ret 1212 %out = call <vscale x 2 x double> @llvm.aarch64.sve.frintx.nxv2f64(<vscale x 2 x double> %a, 1213 <vscale x 2 x i1> %pg, 1214 <vscale x 2 x double> %b) 1215 ret <vscale x 2 x double> %out 1216} 1217 1218; 1219; FRINTZ 1220; 1221 1222define <vscale x 8 x half> @frintz_h(<vscale x 8 x half> %a, <vscale x 8 x i1> %pg, <vscale x 8 x half> %b) { 1223; CHECK-LABEL: frintz_h: 1224; CHECK: frintz z0.h, p0/m, z1.h 1225; CHECK-NEXT: ret 1226 %out = call <vscale x 8 x half> @llvm.aarch64.sve.frintz.nxv8f16(<vscale x 8 x half> %a, 1227 <vscale x 8 x i1> %pg, 1228 <vscale x 8 x half> %b) 1229 ret <vscale x 8 x half> %out 1230} 1231 1232define <vscale x 4 x float> @frintz_s(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) { 1233; CHECK-LABEL: frintz_s: 1234; CHECK: frintz z0.s, p0/m, z1.s 1235; CHECK-NEXT: ret 1236 %out = call <vscale x 4 x float> @llvm.aarch64.sve.frintz.nxv4f32(<vscale x 4 x float> %a, 1237 <vscale x 4 x i1> %pg, 1238 <vscale x 4 x float> %b) 1239 ret <vscale x 4 x float> %out 1240} 1241 1242define <vscale x 2 x double> @frintz_d(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) { 1243; CHECK-LABEL: frintz_d: 1244; CHECK: frintz z0.d, p0/m, z1.d 1245; CHECK-NEXT: ret 1246 %out = call <vscale x 2 x double> @llvm.aarch64.sve.frintz.nxv2f64(<vscale x 2 x double> %a, 1247 <vscale x 2 x i1> %pg, 1248 <vscale x 2 x double> %b) 1249 ret <vscale x 2 x double> %out 1250} 1251 1252; 1253; FRSQRTE 1254; 1255 1256define <vscale x 8 x half> @frsqrte_h(<vscale x 8 x half> %a) { 1257; CHECK-LABEL: frsqrte_h: 1258; CHECK: frsqrte z0.h, z0.h 1259; CHECK-NEXT: ret 1260 %out = call <vscale x 8 x half> @llvm.aarch64.sve.frsqrte.x.nxv8f16(<vscale x 8 x half> %a) 1261 ret <vscale x 8 x half> %out 1262} 1263 1264define <vscale x 4 x float> @frsqrte_s(<vscale x 4 x float> %a) { 1265; CHECK-LABEL: frsqrte_s: 1266; CHECK: frsqrte z0.s, z0.s 1267; CHECK-NEXT: ret 1268 %out = call <vscale x 4 x float> @llvm.aarch64.sve.frsqrte.x.nxv4f32(<vscale x 4 x float> %a) 1269 ret <vscale x 4 x float> %out 1270} 1271 1272define <vscale x 2 x double> @frsqrte_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) { 1273; CHECK-LABEL: frsqrte_d: 1274; CHECK: frsqrte z0.d, z0.d 1275; CHECK-NEXT: ret 1276 %out = call <vscale x 2 x double> @llvm.aarch64.sve.frsqrte.x.nxv2f64(<vscale x 2 x double> %a) 1277 ret <vscale x 2 x double> %out 1278} 1279 1280; 1281; FSCALE 1282; 1283 1284define <vscale x 8 x half> @fscale_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x i16> %b) { 1285; CHECK-LABEL: fscale_h: 1286; CHECK: fscale z0.h, p0/m, z0.h, z1.h 1287; CHECK-NEXT: ret 1288 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fscale.nxv8f16(<vscale x 8 x i1> %pg, 1289 <vscale x 8 x half> %a, 1290 <vscale x 8 x i16> %b) 1291 ret <vscale x 8 x half> %out 1292} 1293 1294define <vscale x 4 x float> @fscale_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x i32> %b) { 1295; CHECK-LABEL: fscale_s: 1296; CHECK: fscale z0.s, p0/m, z0.s, z1.s 1297; CHECK-NEXT: ret 1298 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fscale.nxv4f32(<vscale x 4 x i1> %pg, 1299 <vscale x 4 x float> %a, 1300 <vscale x 4 x i32> %b) 1301 ret <vscale x 4 x float> %out 1302} 1303 1304define <vscale x 2 x double> @fscale_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x i64> %b) { 1305; CHECK-LABEL: fscale_d: 1306; CHECK: fscale z0.d, p0/m, z0.d, z1.d 1307; CHECK-NEXT: ret 1308 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fscale.nxv2f64(<vscale x 2 x i1> %pg, 1309 <vscale x 2 x double> %a, 1310 <vscale x 2 x i64> %b) 1311 ret <vscale x 2 x double> %out 1312} 1313 1314; 1315; FSQRT 1316; 1317 1318define <vscale x 8 x half> @fsqrt_h(<vscale x 8 x half> %a, <vscale x 8 x i1> %pg, <vscale x 8 x half> %b) { 1319; CHECK-LABEL: fsqrt_h: 1320; CHECK: fsqrt z0.h, p0/m, z1.h 1321; CHECK-NEXT: ret 1322 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fsqrt.nxv8f16(<vscale x 8 x half> %a, 1323 <vscale x 8 x i1> %pg, 1324 <vscale x 8 x half> %b) 1325 ret <vscale x 8 x half> %out 1326} 1327 1328define <vscale x 4 x float> @fsqrt_s(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) { 1329; CHECK-LABEL: fsqrt_s: 1330; CHECK: fsqrt z0.s, p0/m, z1.s 1331; CHECK-NEXT: ret 1332 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fsqrt.nxv4f32(<vscale x 4 x float> %a, 1333 <vscale x 4 x i1> %pg, 1334 <vscale x 4 x float> %b) 1335 ret <vscale x 4 x float> %out 1336} 1337 1338define <vscale x 2 x double> @fsqrt_d(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) { 1339; CHECK-LABEL: fsqrt_d: 1340; CHECK: fsqrt z0.d, p0/m, z1.d 1341; CHECK-NEXT: ret 1342 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fsqrt.nxv2f64(<vscale x 2 x double> %a, 1343 <vscale x 2 x i1> %pg, 1344 <vscale x 2 x double> %b) 1345 ret <vscale x 2 x double> %out 1346} 1347 1348; 1349; FSUB 1350; 1351 1352define <vscale x 8 x half> @fsub_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) { 1353; CHECK-LABEL: fsub_h: 1354; CHECK: fsub z0.h, p0/m, z0.h, z1.h 1355; CHECK-NEXT: ret 1356 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fsub.nxv8f16(<vscale x 8 x i1> %pg, 1357 <vscale x 8 x half> %a, 1358 <vscale x 8 x half> %b) 1359 ret <vscale x 8 x half> %out 1360} 1361 1362define <vscale x 4 x float> @fsub_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) { 1363; CHECK-LABEL: fsub_s: 1364; CHECK: fsub z0.s, p0/m, z0.s, z1.s 1365; CHECK-NEXT: ret 1366 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fsub.nxv4f32(<vscale x 4 x i1> %pg, 1367 <vscale x 4 x float> %a, 1368 <vscale x 4 x float> %b) 1369 ret <vscale x 4 x float> %out 1370} 1371 1372define <vscale x 2 x double> @fsub_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) { 1373; CHECK-LABEL: fsub_d: 1374; CHECK: fsub z0.d, p0/m, z0.d, z1.d 1375; CHECK-NEXT: ret 1376 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fsub.nxv2f64(<vscale x 2 x i1> %pg, 1377 <vscale x 2 x double> %a, 1378 <vscale x 2 x double> %b) 1379 ret <vscale x 2 x double> %out 1380} 1381 1382; 1383; FSUBR 1384; 1385 1386define <vscale x 8 x half> @fsubr_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) { 1387; CHECK-LABEL: fsubr_h: 1388; CHECK: fsubr z0.h, p0/m, z0.h, z1.h 1389; CHECK-NEXT: ret 1390 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fsubr.nxv8f16(<vscale x 8 x i1> %pg, 1391 <vscale x 8 x half> %a, 1392 <vscale x 8 x half> %b) 1393 ret <vscale x 8 x half> %out 1394} 1395 1396define <vscale x 4 x float> @fsubr_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) { 1397; CHECK-LABEL: fsubr_s: 1398; CHECK: fsubr z0.s, p0/m, z0.s, z1.s 1399; CHECK-NEXT: ret 1400 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fsubr.nxv4f32(<vscale x 4 x i1> %pg, 1401 <vscale x 4 x float> %a, 1402 <vscale x 4 x float> %b) 1403 ret <vscale x 4 x float> %out 1404} 1405 1406define <vscale x 2 x double> @fsubr_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) { 1407; CHECK-LABEL: fsubr_d: 1408; CHECK: fsubr z0.d, p0/m, z0.d, z1.d 1409; CHECK-NEXT: ret 1410 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fsubr.nxv2f64(<vscale x 2 x i1> %pg, 1411 <vscale x 2 x double> %a, 1412 <vscale x 2 x double> %b) 1413 ret <vscale x 2 x double> %out 1414} 1415 1416; 1417; FTMAD 1418; 1419 1420define <vscale x 8 x half> @ftmad_h(<vscale x 8 x half> %a, <vscale x 8 x half> %b) { 1421; CHECK-LABEL: ftmad_h: 1422; CHECK: ftmad z0.h, z0.h, z1.h, #0 1423; CHECK-NEXT: ret 1424 %out = call <vscale x 8 x half> @llvm.aarch64.sve.ftmad.x.nxv8f16(<vscale x 8 x half> %a, 1425 <vscale x 8 x half> %b, 1426 i32 0) 1427 ret <vscale x 8 x half> %out 1428} 1429 1430define <vscale x 4 x float> @ftmad_s(<vscale x 4 x float> %a, <vscale x 4 x float> %b) { 1431; CHECK-LABEL: ftmad_s: 1432; CHECK: ftmad z0.s, z0.s, z1.s, #0 1433; CHECK-NEXT: ret 1434 %out = call <vscale x 4 x float> @llvm.aarch64.sve.ftmad.x.nxv4f32(<vscale x 4 x float> %a, 1435 <vscale x 4 x float> %b, 1436 i32 0) 1437 ret <vscale x 4 x float> %out 1438} 1439 1440define <vscale x 2 x double> @ftmad_d(<vscale x 2 x double> %a, <vscale x 2 x double> %b) { 1441; CHECK-LABEL: ftmad_d: 1442; CHECK: ftmad z0.d, z0.d, z1.d, #7 1443; CHECK-NEXT: ret 1444 %out = call <vscale x 2 x double> @llvm.aarch64.sve.ftmad.x.nxv2f64(<vscale x 2 x double> %a, 1445 <vscale x 2 x double> %b, 1446 i32 7) 1447 ret <vscale x 2 x double> %out 1448} 1449 1450; 1451; FTSMUL 1452; 1453 1454define <vscale x 8 x half> @ftsmul_h(<vscale x 8 x half> %a, <vscale x 8 x i16> %b) { 1455; CHECK-LABEL: ftsmul_h: 1456; CHECK: ftsmul z0.h, z0.h, z1.h 1457; CHECK-NEXT: ret 1458 %out = call <vscale x 8 x half> @llvm.aarch64.sve.ftsmul.x.nxv8f16(<vscale x 8 x half> %a, 1459 <vscale x 8 x i16> %b) 1460 ret <vscale x 8 x half> %out 1461} 1462 1463define <vscale x 4 x float> @ftsmul_s(<vscale x 4 x float> %a, <vscale x 4 x i32> %b) { 1464; CHECK-LABEL: ftsmul_s: 1465; CHECK: ftsmul z0.s, z0.s, z1.s 1466; CHECK-NEXT: ret 1467 %out = call <vscale x 4 x float> @llvm.aarch64.sve.ftsmul.x.nxv4f32(<vscale x 4 x float> %a, 1468 <vscale x 4 x i32> %b) 1469 ret <vscale x 4 x float> %out 1470} 1471 1472define <vscale x 2 x double> @ftsmul_d(<vscale x 2 x double> %a, <vscale x 2 x i64> %b) { 1473; CHECK-LABEL: ftsmul_d: 1474; CHECK: ftsmul z0.d, z0.d, z1.d 1475; CHECK-NEXT: ret 1476 %out = call <vscale x 2 x double> @llvm.aarch64.sve.ftsmul.x.nxv2f64(<vscale x 2 x double> %a, 1477 <vscale x 2 x i64> %b) 1478 ret <vscale x 2 x double> %out 1479} 1480 1481; 1482; FTSSEL 1483; 1484 1485define <vscale x 8 x half> @ftssel_h(<vscale x 8 x half> %a, <vscale x 8 x i16> %b) { 1486; CHECK-LABEL: ftssel_h: 1487; CHECK: ftssel z0.h, z0.h, z1.h 1488; CHECK-NEXT: ret 1489 %out = call <vscale x 8 x half> @llvm.aarch64.sve.ftssel.x.nxv8f16(<vscale x 8 x half> %a, 1490 <vscale x 8 x i16> %b) 1491 ret <vscale x 8 x half> %out 1492} 1493 1494define <vscale x 4 x float> @ftssel_s(<vscale x 4 x float> %a, <vscale x 4 x i32> %b) { 1495; CHECK-LABEL: ftssel_s: 1496; CHECK: ftssel z0.s, z0.s, z1.s 1497; CHECK-NEXT: ret 1498 %out = call <vscale x 4 x float> @llvm.aarch64.sve.ftssel.x.nxv4f32(<vscale x 4 x float> %a, 1499 <vscale x 4 x i32> %b) 1500 ret <vscale x 4 x float> %out 1501} 1502 1503define <vscale x 2 x double> @ftssel_d(<vscale x 2 x double> %a, <vscale x 2 x i64> %b) { 1504; CHECK-LABEL: ftssel_d: 1505; CHECK: ftssel z0.d, z0.d, z1.d 1506; CHECK-NEXT: ret 1507 %out = call <vscale x 2 x double> @llvm.aarch64.sve.ftssel.x.nxv2f64(<vscale x 2 x double> %a, 1508 <vscale x 2 x i64> %b) 1509 ret <vscale x 2 x double> %out 1510} 1511 1512declare <vscale x 8 x half> @llvm.aarch64.sve.fabd.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>) 1513declare <vscale x 4 x float> @llvm.aarch64.sve.fabd.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>) 1514declare <vscale x 2 x double> @llvm.aarch64.sve.fabd.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>) 1515 1516declare <vscale x 8 x half> @llvm.aarch64.sve.fabs.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, <vscale x 8 x half>) 1517declare <vscale x 4 x float> @llvm.aarch64.sve.fabs.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x float>) 1518declare <vscale x 2 x double> @llvm.aarch64.sve.fabs.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x double>) 1519 1520declare <vscale x 8 x half> @llvm.aarch64.sve.fadd.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>) 1521declare <vscale x 4 x float> @llvm.aarch64.sve.fadd.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>) 1522declare <vscale x 2 x double> @llvm.aarch64.sve.fadd.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>) 1523 1524declare <vscale x 8 x half> @llvm.aarch64.sve.fcadd.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>, i32) 1525declare <vscale x 4 x float> @llvm.aarch64.sve.fcadd.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>, i32) 1526declare <vscale x 2 x double> @llvm.aarch64.sve.fcadd.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>, i32) 1527 1528declare <vscale x 8 x half> @llvm.aarch64.sve.fcmla.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>, i32) 1529declare <vscale x 4 x float> @llvm.aarch64.sve.fcmla.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, i32) 1530declare <vscale x 2 x double> @llvm.aarch64.sve.fcmla.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>, i32) 1531 1532declare <vscale x 8 x half> @llvm.aarch64.sve.fcmla.lane.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>, i32, i32) 1533declare <vscale x 4 x float> @llvm.aarch64.sve.fcmla.lane.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, i32, i32) 1534 1535declare <vscale x 8 x half> @llvm.aarch64.sve.fdiv.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>) 1536declare <vscale x 4 x float> @llvm.aarch64.sve.fdiv.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>) 1537declare <vscale x 2 x double> @llvm.aarch64.sve.fdiv.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>) 1538 1539declare <vscale x 8 x half> @llvm.aarch64.sve.fdivr.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>) 1540declare <vscale x 4 x float> @llvm.aarch64.sve.fdivr.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>) 1541declare <vscale x 2 x double> @llvm.aarch64.sve.fdivr.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>) 1542 1543declare <vscale x 8 x half> @llvm.aarch64.sve.fexpa.x.nxv8f16(<vscale x 8 x i16>) 1544declare <vscale x 4 x float> @llvm.aarch64.sve.fexpa.x.nxv4f32(<vscale x 4 x i32>) 1545declare <vscale x 2 x double> @llvm.aarch64.sve.fexpa.x.nxv2f64(<vscale x 2 x i64>) 1546 1547declare <vscale x 8 x half> @llvm.aarch64.sve.fmad.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>) 1548declare <vscale x 4 x float> @llvm.aarch64.sve.fmad.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>) 1549declare <vscale x 2 x double> @llvm.aarch64.sve.fmad.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>) 1550 1551declare <vscale x 8 x half> @llvm.aarch64.sve.fmax.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>) 1552declare <vscale x 4 x float> @llvm.aarch64.sve.fmax.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>) 1553declare <vscale x 2 x double> @llvm.aarch64.sve.fmax.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>) 1554 1555declare <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>) 1556declare <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>) 1557declare <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>) 1558 1559declare <vscale x 8 x half> @llvm.aarch64.sve.fmin.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>) 1560declare <vscale x 4 x float> @llvm.aarch64.sve.fmin.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>) 1561declare <vscale x 2 x double> @llvm.aarch64.sve.fmin.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>) 1562 1563declare <vscale x 8 x half> @llvm.aarch64.sve.fminnm.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>) 1564declare <vscale x 4 x float> @llvm.aarch64.sve.fminnm.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>) 1565declare <vscale x 2 x double> @llvm.aarch64.sve.fminnm.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>) 1566 1567declare <vscale x 8 x half> @llvm.aarch64.sve.fmla.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>) 1568declare <vscale x 4 x float> @llvm.aarch64.sve.fmla.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>) 1569declare <vscale x 2 x double> @llvm.aarch64.sve.fmla.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>) 1570 1571declare <vscale x 8 x half> @llvm.aarch64.sve.fmla.lane.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>, i32) 1572declare <vscale x 4 x float> @llvm.aarch64.sve.fmla.lane.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, i32) 1573declare <vscale x 2 x double> @llvm.aarch64.sve.fmla.lane.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>, i32) 1574 1575declare <vscale x 8 x half> @llvm.aarch64.sve.fmls.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>) 1576declare <vscale x 4 x float> @llvm.aarch64.sve.fmls.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>) 1577declare <vscale x 2 x double> @llvm.aarch64.sve.fmls.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>) 1578 1579declare <vscale x 8 x half> @llvm.aarch64.sve.fmls.lane.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>, i32) 1580declare <vscale x 4 x float> @llvm.aarch64.sve.fmls.lane.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, i32) 1581declare <vscale x 2 x double> @llvm.aarch64.sve.fmls.lane.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>, i32) 1582 1583declare <vscale x 8 x half> @llvm.aarch64.sve.fmsb.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>) 1584declare <vscale x 4 x float> @llvm.aarch64.sve.fmsb.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>) 1585declare <vscale x 2 x double> @llvm.aarch64.sve.fmsb.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>) 1586 1587declare <vscale x 8 x half> @llvm.aarch64.sve.fmul.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>) 1588declare <vscale x 4 x float> @llvm.aarch64.sve.fmul.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>) 1589declare <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>) 1590 1591declare <vscale x 8 x half> @llvm.aarch64.sve.fmul.lane.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>, i32) 1592declare <vscale x 4 x float> @llvm.aarch64.sve.fmul.lane.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, i32) 1593declare <vscale x 2 x double> @llvm.aarch64.sve.fmul.lane.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>, i32) 1594 1595declare <vscale x 8 x half> @llvm.aarch64.sve.fmulx.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>) 1596declare <vscale x 4 x float> @llvm.aarch64.sve.fmulx.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>) 1597declare <vscale x 2 x double> @llvm.aarch64.sve.fmulx.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>) 1598 1599declare <vscale x 8 x half> @llvm.aarch64.sve.fneg.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, <vscale x 8 x half>) 1600declare <vscale x 4 x float> @llvm.aarch64.sve.fneg.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x float>) 1601declare <vscale x 2 x double> @llvm.aarch64.sve.fneg.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x double>) 1602 1603declare <vscale x 8 x half> @llvm.aarch64.sve.fnmad.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>) 1604declare <vscale x 4 x float> @llvm.aarch64.sve.fnmad.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>) 1605declare <vscale x 2 x double> @llvm.aarch64.sve.fnmad.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>) 1606 1607declare <vscale x 8 x half> @llvm.aarch64.sve.fnmla.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>) 1608declare <vscale x 4 x float> @llvm.aarch64.sve.fnmla.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>) 1609declare <vscale x 2 x double> @llvm.aarch64.sve.fnmla.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>) 1610 1611declare <vscale x 8 x half> @llvm.aarch64.sve.fnmls.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>) 1612declare <vscale x 4 x float> @llvm.aarch64.sve.fnmls.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>) 1613declare <vscale x 2 x double> @llvm.aarch64.sve.fnmls.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>) 1614 1615declare <vscale x 8 x half> @llvm.aarch64.sve.fnmsb.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>) 1616declare <vscale x 4 x float> @llvm.aarch64.sve.fnmsb.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>) 1617declare <vscale x 2 x double> @llvm.aarch64.sve.fnmsb.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>) 1618 1619declare <vscale x 8 x half> @llvm.aarch64.sve.frecpe.x.nxv8f16(<vscale x 8 x half>) 1620declare <vscale x 4 x float> @llvm.aarch64.sve.frecpe.x.nxv4f32(<vscale x 4 x float>) 1621declare <vscale x 2 x double> @llvm.aarch64.sve.frecpe.x.nxv2f64(<vscale x 2 x double>) 1622 1623declare <vscale x 8 x half> @llvm.aarch64.sve.frecpx.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, <vscale x 8 x half>) 1624declare <vscale x 4 x float> @llvm.aarch64.sve.frecpx.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x float>) 1625declare <vscale x 2 x double> @llvm.aarch64.sve.frecpx.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x double>) 1626 1627declare <vscale x 8 x half> @llvm.aarch64.sve.frinta.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, <vscale x 8 x half>) 1628declare <vscale x 4 x float> @llvm.aarch64.sve.frinta.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x float>) 1629declare <vscale x 2 x double> @llvm.aarch64.sve.frinta.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x double>) 1630 1631declare <vscale x 8 x half> @llvm.aarch64.sve.frinti.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, <vscale x 8 x half>) 1632declare <vscale x 4 x float> @llvm.aarch64.sve.frinti.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x float>) 1633declare <vscale x 2 x double> @llvm.aarch64.sve.frinti.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x double>) 1634 1635declare <vscale x 8 x half> @llvm.aarch64.sve.frintm.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, <vscale x 8 x half>) 1636declare <vscale x 4 x float> @llvm.aarch64.sve.frintm.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x float>) 1637declare <vscale x 2 x double> @llvm.aarch64.sve.frintm.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x double>) 1638 1639declare <vscale x 8 x half> @llvm.aarch64.sve.frintn.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, <vscale x 8 x half>) 1640declare <vscale x 4 x float> @llvm.aarch64.sve.frintn.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x float>) 1641declare <vscale x 2 x double> @llvm.aarch64.sve.frintn.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x double>) 1642 1643declare <vscale x 8 x half> @llvm.aarch64.sve.frintp.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, <vscale x 8 x half>) 1644declare <vscale x 4 x float> @llvm.aarch64.sve.frintp.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x float>) 1645declare <vscale x 2 x double> @llvm.aarch64.sve.frintp.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x double>) 1646 1647declare <vscale x 8 x half> @llvm.aarch64.sve.frintx.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, <vscale x 8 x half>) 1648declare <vscale x 4 x float> @llvm.aarch64.sve.frintx.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x float>) 1649declare <vscale x 2 x double> @llvm.aarch64.sve.frintx.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x double>) 1650 1651declare <vscale x 8 x half> @llvm.aarch64.sve.frintz.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, <vscale x 8 x half>) 1652declare <vscale x 4 x float> @llvm.aarch64.sve.frintz.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x float>) 1653declare <vscale x 2 x double> @llvm.aarch64.sve.frintz.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x double>) 1654 1655declare <vscale x 8 x half> @llvm.aarch64.sve.frsqrte.x.nxv8f16(<vscale x 8 x half>) 1656declare <vscale x 4 x float> @llvm.aarch64.sve.frsqrte.x.nxv4f32(<vscale x 4 x float>) 1657declare <vscale x 2 x double> @llvm.aarch64.sve.frsqrte.x.nxv2f64(<vscale x 2 x double>) 1658 1659declare <vscale x 8 x half> @llvm.aarch64.sve.fscale.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x i16>) 1660declare <vscale x 4 x float> @llvm.aarch64.sve.fscale.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x i32>) 1661declare <vscale x 2 x double> @llvm.aarch64.sve.fscale.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x i64>) 1662 1663declare <vscale x 8 x half> @llvm.aarch64.sve.fsqrt.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, <vscale x 8 x half>) 1664declare <vscale x 4 x float> @llvm.aarch64.sve.fsqrt.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x float>) 1665declare <vscale x 2 x double> @llvm.aarch64.sve.fsqrt.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x double>) 1666 1667declare <vscale x 8 x half> @llvm.aarch64.sve.fsub.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>) 1668declare <vscale x 4 x float> @llvm.aarch64.sve.fsub.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>) 1669declare <vscale x 2 x double> @llvm.aarch64.sve.fsub.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>) 1670 1671declare <vscale x 8 x half> @llvm.aarch64.sve.fsubr.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>) 1672declare <vscale x 4 x float> @llvm.aarch64.sve.fsubr.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>) 1673declare <vscale x 2 x double> @llvm.aarch64.sve.fsubr.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>) 1674 1675declare <vscale x 8 x half> @llvm.aarch64.sve.ftmad.x.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>, i32) 1676declare <vscale x 4 x float> @llvm.aarch64.sve.ftmad.x.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, i32) 1677declare <vscale x 2 x double> @llvm.aarch64.sve.ftmad.x.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>, i32) 1678 1679declare <vscale x 8 x half> @llvm.aarch64.sve.ftsmul.x.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i16>) 1680declare <vscale x 4 x float> @llvm.aarch64.sve.ftsmul.x.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i32>) 1681declare <vscale x 2 x double> @llvm.aarch64.sve.ftsmul.x.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i64>) 1682 1683declare <vscale x 8 x half> @llvm.aarch64.sve.ftssel.x.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i16>) 1684declare <vscale x 4 x float> @llvm.aarch64.sve.ftssel.x.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i32>) 1685declare <vscale x 2 x double> @llvm.aarch64.sve.ftssel.x.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i64>) 1686