1; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 < %s | FileCheck %s
2
3;
4; WHILEGE
5;
6
7define <vscale x 16 x i1> @whilege_b_ww(i32 %a, i32 %b) {
8; CHECK-LABEL: whilege_b_ww:
9; CHECK: whilege p0.b, w0, w1
10; CHECK-NEXT: ret
11  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilege.nxv16i1.i32(i32 %a, i32 %b)
12  ret <vscale x 16 x i1> %out
13}
14
15define <vscale x 16 x i1> @whilege_b_xx(i64 %a, i64 %b) {
16; CHECK-LABEL: whilege_b_xx:
17; CHECK: whilege p0.b, x0, x1
18; CHECK-NEXT: ret
19  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilege.nxv16i1.i64(i64 %a, i64 %b)
20  ret <vscale x 16 x i1> %out
21}
22
23define <vscale x 8 x i1> @whilege_h_ww(i32 %a, i32 %b) {
24; CHECK-LABEL: whilege_h_ww:
25; CHECK: whilege p0.h, w0, w1
26; CHECK-NEXT: ret
27  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilege.nxv8i1.i32(i32 %a, i32 %b)
28  ret <vscale x 8 x i1> %out
29}
30
31define <vscale x 8 x i1> @whilege_h_xx(i64 %a, i64 %b) {
32; CHECK-LABEL: whilege_h_xx:
33; CHECK: whilege p0.h, x0, x1
34; CHECK-NEXT: ret
35  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilege.nxv8i1.i64(i64 %a, i64 %b)
36  ret <vscale x 8 x i1> %out
37}
38
39define <vscale x 4 x i1> @whilege_s_ww(i32 %a, i32 %b) {
40; CHECK-LABEL: whilege_s_ww:
41; CHECK: whilege p0.s, w0, w1
42; CHECK-NEXT: ret
43  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilege.nxv4i1.i32(i32 %a, i32 %b)
44  ret <vscale x 4 x i1> %out
45}
46
47define <vscale x 4 x i1> @whilege_s_xx(i64 %a, i64 %b) {
48; CHECK-LABEL: whilege_s_xx:
49; CHECK: whilege p0.s, x0, x1
50; CHECK-NEXT: ret
51  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilege.nxv4i1.i64(i64 %a, i64 %b)
52  ret <vscale x 4 x i1> %out
53}
54
55define <vscale x 2 x i1> @whilege_d_ww(i32 %a, i32 %b) {
56; CHECK-LABEL: whilege_d_ww:
57; CHECK: whilege p0.d, w0, w1
58; CHECK-NEXT: ret
59  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilege.nxv2i1.i32(i32 %a, i32 %b)
60  ret <vscale x 2 x i1> %out
61}
62
63define <vscale x 2 x i1> @whilege_d_xx(i64 %a, i64 %b) {
64; CHECK-LABEL: whilege_d_xx:
65; CHECK: whilege p0.d, x0, x1
66; CHECK-NEXT: ret
67  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilege.nxv2i1.i64(i64 %a, i64 %b)
68  ret <vscale x 2 x i1> %out
69}
70
71;
72; WHILEHS
73;
74
75define <vscale x 16 x i1> @whilehs_b_ww(i32 %a, i32 %b) {
76; CHECK-LABEL: whilehs_b_ww:
77; CHECK: whilehs p0.b, w0, w1
78; CHECK-NEXT: ret
79  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilehs.nxv16i1.i32(i32 %a, i32 %b)
80  ret <vscale x 16 x i1> %out
81}
82
83define <vscale x 16 x i1> @whilehs_b_xx(i64 %a, i64 %b) {
84; CHECK-LABEL: whilehs_b_xx:
85; CHECK: whilehs p0.b, x0, x1
86; CHECK-NEXT: ret
87  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilehs.nxv16i1.i64(i64 %a, i64 %b)
88  ret <vscale x 16 x i1> %out
89}
90
91define <vscale x 8 x i1> @whilehs_h_ww(i32 %a, i32 %b) {
92; CHECK-LABEL: whilehs_h_ww:
93; CHECK: whilehs p0.h, w0, w1
94; CHECK-NEXT: ret
95  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilehs.nxv8i1.i32(i32 %a, i32 %b)
96  ret <vscale x 8 x i1> %out
97}
98
99define <vscale x 8 x i1> @whilehs_h_xx(i64 %a, i64 %b) {
100; CHECK-LABEL: whilehs_h_xx:
101; CHECK: whilehs p0.h, x0, x1
102; CHECK-NEXT: ret
103  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilehs.nxv8i1.i64(i64 %a, i64 %b)
104  ret <vscale x 8 x i1> %out
105}
106
107define <vscale x 4 x i1> @whilehs_s_ww(i32 %a, i32 %b) {
108; CHECK-LABEL: whilehs_s_ww:
109; CHECK: whilehs p0.s, w0, w1
110; CHECK-NEXT: ret
111  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilehs.nxv4i1.i32(i32 %a, i32 %b)
112  ret <vscale x 4 x i1> %out
113}
114
115define <vscale x 4 x i1> @whilehs_s_xx(i64 %a, i64 %b) {
116; CHECK-LABEL: whilehs_s_xx:
117; CHECK: whilehs p0.s, x0, x1
118; CHECK-NEXT: ret
119  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilehs.nxv4i1.i64(i64 %a, i64 %b)
120  ret <vscale x 4 x i1> %out
121}
122
123define <vscale x 2 x i1> @whilehs_d_ww(i32 %a, i32 %b) {
124; CHECK-LABEL: whilehs_d_ww:
125; CHECK: whilehs p0.d, w0, w1
126; CHECK-NEXT: ret
127  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilehs.nxv2i1.i32(i32 %a, i32 %b)
128  ret <vscale x 2 x i1> %out
129}
130
131define <vscale x 2 x i1> @whilehs_d_xx(i64 %a, i64 %b) {
132; CHECK-LABEL: whilehs_d_xx:
133; CHECK: whilehs p0.d, x0, x1
134; CHECK-NEXT: ret
135  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilehs.nxv2i1.i64(i64 %a, i64 %b)
136  ret <vscale x 2 x i1> %out
137}
138
139;
140; WHILEGT
141;
142
143define <vscale x 16 x i1> @whilegt_b_ww(i32 %a, i32 %b) {
144; CHECK-LABEL: whilegt_b_ww:
145; CHECK: whilegt p0.b, w0, w1
146; CHECK-NEXT: ret
147  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilegt.nxv16i1.i32(i32 %a, i32 %b)
148  ret <vscale x 16 x i1> %out
149}
150
151define <vscale x 16 x i1> @whilegt_b_xx(i64 %a, i64 %b) {
152; CHECK-LABEL: whilegt_b_xx:
153; CHECK: whilegt p0.b, x0, x1
154; CHECK-NEXT: ret
155  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilegt.nxv16i1.i64(i64 %a, i64 %b)
156  ret <vscale x 16 x i1> %out
157}
158
159define <vscale x 8 x i1> @whilegt_h_ww(i32 %a, i32 %b) {
160; CHECK-LABEL: whilegt_h_ww:
161; CHECK: whilegt p0.h, w0, w1
162; CHECK-NEXT: ret
163  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilegt.nxv8i1.i32(i32 %a, i32 %b)
164  ret <vscale x 8 x i1> %out
165}
166
167define <vscale x 8 x i1> @whilegt_h_xx(i64 %a, i64 %b) {
168; CHECK-LABEL: whilegt_h_xx:
169; CHECK: whilegt p0.h, x0, x1
170; CHECK-NEXT: ret
171  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilegt.nxv8i1.i64(i64 %a, i64 %b)
172  ret <vscale x 8 x i1> %out
173}
174
175define <vscale x 4 x i1> @whilegt_s_ww(i32 %a, i32 %b) {
176; CHECK-LABEL: whilegt_s_ww:
177; CHECK: whilegt p0.s, w0, w1
178; CHECK-NEXT: ret
179  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilegt.nxv4i1.i32(i32 %a, i32 %b)
180  ret <vscale x 4 x i1> %out
181}
182
183define <vscale x 4 x i1> @whilegt_s_xx(i64 %a, i64 %b) {
184; CHECK-LABEL: whilegt_s_xx:
185; CHECK: whilegt p0.s, x0, x1
186; CHECK-NEXT: ret
187  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilegt.nxv4i1.i64(i64 %a, i64 %b)
188  ret <vscale x 4 x i1> %out
189}
190
191define <vscale x 2 x i1> @whilegt_d_ww(i32 %a, i32 %b) {
192; CHECK-LABEL: whilegt_d_ww:
193; CHECK: whilegt p0.d, w0, w1
194; CHECK-NEXT: ret
195  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilegt.nxv2i1.i32(i32 %a, i32 %b)
196  ret <vscale x 2 x i1> %out
197}
198
199define <vscale x 2 x i1> @whilegt_d_xx(i64 %a, i64 %b) {
200; CHECK-LABEL: whilegt_d_xx:
201; CHECK: whilegt p0.d, x0, x1
202; CHECK-NEXT: ret
203  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilegt.nxv2i1.i64(i64 %a, i64 %b)
204  ret <vscale x 2 x i1> %out
205}
206
207;
208; WHILEHI
209;
210
211define <vscale x 16 x i1> @whilehi_b_ww(i32 %a, i32 %b) {
212; CHECK-LABEL: whilehi_b_ww:
213; CHECK: whilehi p0.b, w0, w1
214; CHECK-NEXT: ret
215  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilehi.nxv16i1.i32(i32 %a, i32 %b)
216  ret <vscale x 16 x i1> %out
217}
218
219define <vscale x 16 x i1> @whilehi_b_xx(i64 %a, i64 %b) {
220; CHECK-LABEL: whilehi_b_xx:
221; CHECK: whilehi p0.b, x0, x1
222; CHECK-NEXT: ret
223  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.whilehi.nxv16i1.i64(i64 %a, i64 %b)
224  ret <vscale x 16 x i1> %out
225}
226
227define <vscale x 8 x i1> @whilehi_h_ww(i32 %a, i32 %b) {
228; CHECK-LABEL: whilehi_h_ww:
229; CHECK: whilehi p0.h, w0, w1
230; CHECK-NEXT: ret
231  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilehi.nxv8i1.i32(i32 %a, i32 %b)
232  ret <vscale x 8 x i1> %out
233}
234
235define <vscale x 8 x i1> @whilehi_h_xx(i64 %a, i64 %b) {
236; CHECK-LABEL: whilehi_h_xx:
237; CHECK: whilehi p0.h, x0, x1
238; CHECK-NEXT: ret
239  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.whilehi.nxv8i1.i64(i64 %a, i64 %b)
240  ret <vscale x 8 x i1> %out
241}
242
243define <vscale x 4 x i1> @whilehi_s_ww(i32 %a, i32 %b) {
244; CHECK-LABEL: whilehi_s_ww:
245; CHECK: whilehi p0.s, w0, w1
246; CHECK-NEXT: ret
247  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilehi.nxv4i1.i32(i32 %a, i32 %b)
248  ret <vscale x 4 x i1> %out
249}
250
251define <vscale x 4 x i1> @whilehi_s_xx(i64 %a, i64 %b) {
252; CHECK-LABEL: whilehi_s_xx:
253; CHECK: whilehi p0.s, x0, x1
254; CHECK-NEXT: ret
255  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.whilehi.nxv4i1.i64(i64 %a, i64 %b)
256  ret <vscale x 4 x i1> %out
257}
258
259define <vscale x 2 x i1> @whilehi_d_ww(i32 %a, i32 %b) {
260; CHECK-LABEL: whilehi_d_ww:
261; CHECK: whilehi p0.d, w0, w1
262; CHECK-NEXT: ret
263  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilehi.nxv2i1.i32(i32 %a, i32 %b)
264  ret <vscale x 2 x i1> %out
265}
266
267define <vscale x 2 x i1> @whilehi_d_xx(i64 %a, i64 %b) {
268; CHECK-LABEL: whilehi_d_xx:
269; CHECK: whilehi p0.d, x0, x1
270; CHECK-NEXT: ret
271  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.whilehi.nxv2i1.i64(i64 %a, i64 %b)
272  ret <vscale x 2 x i1> %out
273}
274
275declare <vscale x 16 x i1> @llvm.aarch64.sve.whilege.nxv16i1.i32(i32, i32)
276declare <vscale x 16 x i1> @llvm.aarch64.sve.whilege.nxv16i1.i64(i64, i64)
277declare <vscale x 8 x i1> @llvm.aarch64.sve.whilege.nxv8i1.i32(i32, i32)
278declare <vscale x 8 x i1> @llvm.aarch64.sve.whilege.nxv8i1.i64(i64, i64)
279declare <vscale x 4 x i1> @llvm.aarch64.sve.whilege.nxv4i1.i32(i32, i32)
280declare <vscale x 4 x i1> @llvm.aarch64.sve.whilege.nxv4i1.i64(i64, i64)
281declare <vscale x 2 x i1> @llvm.aarch64.sve.whilege.nxv2i1.i32(i32, i32)
282declare <vscale x 2 x i1> @llvm.aarch64.sve.whilege.nxv2i1.i64(i64, i64)
283
284declare <vscale x 16 x i1> @llvm.aarch64.sve.whilehs.nxv16i1.i32(i32, i32)
285declare <vscale x 16 x i1> @llvm.aarch64.sve.whilehs.nxv16i1.i64(i64, i64)
286declare <vscale x 8 x i1> @llvm.aarch64.sve.whilehs.nxv8i1.i32(i32, i32)
287declare <vscale x 8 x i1> @llvm.aarch64.sve.whilehs.nxv8i1.i64(i64, i64)
288declare <vscale x 4 x i1> @llvm.aarch64.sve.whilehs.nxv4i1.i32(i32, i32)
289declare <vscale x 4 x i1> @llvm.aarch64.sve.whilehs.nxv4i1.i64(i64, i64)
290declare <vscale x 2 x i1> @llvm.aarch64.sve.whilehs.nxv2i1.i32(i32, i32)
291declare <vscale x 2 x i1> @llvm.aarch64.sve.whilehs.nxv2i1.i64(i64, i64)
292
293declare <vscale x 16 x i1> @llvm.aarch64.sve.whilegt.nxv16i1.i32(i32, i32)
294declare <vscale x 16 x i1> @llvm.aarch64.sve.whilegt.nxv16i1.i64(i64, i64)
295declare <vscale x 8 x i1> @llvm.aarch64.sve.whilegt.nxv8i1.i32(i32, i32)
296declare <vscale x 8 x i1> @llvm.aarch64.sve.whilegt.nxv8i1.i64(i64, i64)
297declare <vscale x 4 x i1> @llvm.aarch64.sve.whilegt.nxv4i1.i32(i32, i32)
298declare <vscale x 4 x i1> @llvm.aarch64.sve.whilegt.nxv4i1.i64(i64, i64)
299declare <vscale x 2 x i1> @llvm.aarch64.sve.whilegt.nxv2i1.i32(i32, i32)
300declare <vscale x 2 x i1> @llvm.aarch64.sve.whilegt.nxv2i1.i64(i64, i64)
301
302declare <vscale x 16 x i1> @llvm.aarch64.sve.whilehi.nxv16i1.i32(i32, i32)
303declare <vscale x 16 x i1> @llvm.aarch64.sve.whilehi.nxv16i1.i64(i64, i64)
304declare <vscale x 8 x i1> @llvm.aarch64.sve.whilehi.nxv8i1.i32(i32, i32)
305declare <vscale x 8 x i1> @llvm.aarch64.sve.whilehi.nxv8i1.i64(i64, i64)
306declare <vscale x 4 x i1> @llvm.aarch64.sve.whilehi.nxv4i1.i32(i32, i32)
307declare <vscale x 4 x i1> @llvm.aarch64.sve.whilehi.nxv4i1.i64(i64, i64)
308declare <vscale x 2 x i1> @llvm.aarch64.sve.whilehi.nxv2i1.i32(i32, i32)
309declare <vscale x 2 x i1> @llvm.aarch64.sve.whilehi.nxv2i1.i64(i64, i64)
310