1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o -  | FileCheck -check-prefix=GCN %s
3
4# FIXME: Need to deal with constant bus restriction
5# ---
6# name: mbcnt_lo_ss
7# legalized: true
8# regBankSelected: true
9
10# body: |
11#   bb.0:
12#     liveins: $sgpr0, $sgpr1
13#     %0:sgpr(s32) = COPY $sgpr0
14#     %1:sgpr(s32) = COPY $sgpr1
15#     %2:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.mbcnt.lo), %0, %1
16#     S_ENDPGM 0, implicit %2
17# ...
18
19---
20name: mbcnt_lo_sv
21legalized: true
22regBankSelected: true
23
24body: |
25  bb.0:
26    liveins: $sgpr0, $vgpr0
27    ; GCN-LABEL: name: mbcnt_lo_sv
28    ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
29    ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
30    ; GCN: [[V_MBCNT_LO_U32_B32_e64_:%[0-9]+]]:vgpr_32 = V_MBCNT_LO_U32_B32_e64 [[COPY]], [[COPY1]], implicit $exec
31    ; GCN: S_ENDPGM 0, implicit [[V_MBCNT_LO_U32_B32_e64_]]
32    %0:sgpr(s32) = COPY $sgpr0
33    %1:vgpr(s32) = COPY $vgpr0
34    %2:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.mbcnt.lo), %0, %1
35    S_ENDPGM 0, implicit %2
36...
37
38---
39name: smin_s32_vs
40legalized: true
41regBankSelected: true
42
43body: |
44  bb.0:
45    liveins: $sgpr0, $vgpr0
46    ; GCN-LABEL: name: smin_s32_vs
47    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
48    ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
49    ; GCN: [[V_MBCNT_LO_U32_B32_e64_:%[0-9]+]]:vgpr_32 = V_MBCNT_LO_U32_B32_e64 [[COPY]], [[COPY1]], implicit $exec
50    ; GCN: S_ENDPGM 0, implicit [[V_MBCNT_LO_U32_B32_e64_]]
51    %0:vgpr(s32) = COPY $vgpr0
52    %1:sgpr(s32) = COPY $sgpr0
53    %2:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.mbcnt.lo), %0, %1
54    S_ENDPGM 0, implicit %2
55...
56
57---
58name: smin_s32_vv
59legalized: true
60regBankSelected: true
61
62body: |
63  bb.0:
64    liveins: $vgpr0, $vgpr1
65    ; GCN-LABEL: name: smin_s32_vv
66    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
67    ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
68    ; GCN: [[V_MBCNT_LO_U32_B32_e64_:%[0-9]+]]:vgpr_32 = V_MBCNT_LO_U32_B32_e64 [[COPY]], [[COPY1]], implicit $exec
69    ; GCN: S_ENDPGM 0, implicit [[V_MBCNT_LO_U32_B32_e64_]]
70    %0:vgpr(s32) = COPY $vgpr0
71    %1:vgpr(s32) = COPY $vgpr1
72    %2:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.mbcnt.lo), %0, %1
73    S_ENDPGM 0, implicit %2
74...
75