1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-- -mattr=+sse4.1   | FileCheck %s --check-prefixes=SSE,SSE41
3; RUN: llc < %s -mtriple=i686-- -mattr=+avx      | FileCheck %s --check-prefixes=AVX,AVX1
4; RUN: llc < %s -mtriple=i686-- -mattr=+avx2     | FileCheck %s --check-prefixes=AVX,AVX2
5; RUN: llc < %s -mtriple=i686-- -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512VL
6
7; Test an isel pattern for a splatted VZLOAD.
8
9define <4 x float> @movddup_load_fold(float %x, float %y) {
10; SSE-LABEL: movddup_load_fold:
11; SSE:       # %bb.0:
12; SSE-NEXT:    movddup {{.*#+}} xmm0 = mem[0,0]
13; SSE-NEXT:    retl
14;
15; AVX-LABEL: movddup_load_fold:
16; AVX:       # %bb.0:
17; AVX-NEXT:    vmovddup {{.*#+}} xmm0 = mem[0,0]
18; AVX-NEXT:    retl
19  %i0 = insertelement <4 x float> zeroinitializer, float %x, i32 0
20  %i1 = insertelement <4 x float> %i0, float %y, i32 1
21  %dup = shufflevector <4 x float> %i1, <4 x float> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
22  ret <4 x float> %dup
23}
24
25