1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2  2>&1 < %s| FileCheck %s
2
3
4// --------------------------------------------------------------------------//
5// Invalid result type.
6
7stnt1w { z0.b }, p0, [z0.s]
8// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
9// CHECK-NEXT: stnt1w { z0.b }, p0, [z0.s]
10// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
11
12stnt1w { z0.h }, p0, [z0.s]
13// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
14// CHECK-NEXT: stnt1w { z0.h }, p0, [z0.s]
15// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
16
17
18// --------------------------------------------------------------------------//
19// Invalid base vector.
20
21stnt1w { z0.s }, p0, [z0.b]
22// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
23// CHECK-NEXT: stnt1w { z0.s }, p0, [z0.b]
24// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
25
26stnt1w { z0.d }, p0, [z0.h]
27// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
28// CHECK-NEXT: stnt1w { z0.d }, p0, [z0.h]
29// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
30
31
32// --------------------------------------------------------------------------//
33// Invalid offset type.
34
35stnt1w { z0.d }, p0, [z0.d, z1.d]
36// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
37// CHECK-NEXT: stnt1w { z0.d }, p0, [z0.d, z1.d]
38// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
39
40
41// --------------------------------------------------------------------------//
42// restricted predicate has range [0, 7].
43
44stnt1w { z27.d }, p8, [z0.d]
45// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
46// CHECK-NEXT: stnt1w { z27.d }, p8, [z0.d]
47// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
48
49
50// --------------------------------------------------------------------------//
51// Invalid vector list.
52
53stnt1w { }, p0, [z0.d]
54// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector register expected
55// CHECK-NEXT: stnt1w { }, p0, [z0.d]
56// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
57
58stnt1w { z0.d, z1.d }, p0, [z0.d]
59// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
60// CHECK-NEXT: stnt1w { z0.d, z1.d }, p0, [z0.d]
61// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
62
63stnt1w { v0.2d }, p0, [z0.d]
64// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
65// CHECK-NEXT: stnt1w { v0.2d }, p0, [z0.d]
66// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
67
68
69// --------------------------------------------------------------------------//
70// Negative tests for instructions that are incompatible with movprfx
71
72movprfx z0.d, p0/z, z7.d
73stnt1w  { z0.d }, p0, [z0.d, x0]
74// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
75// CHECK-NEXT: stnt1w  { z0.d }, p0, [z0.d, x0]
76// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
77
78movprfx z0, z7
79stnt1w  { z0.s }, p0, [z0.s, x0]
80// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
81// CHECK-NEXT: stnt1w  { z0.s }, p0, [z0.s, x0]
82// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
83