1 //===-- RegisterInfos_mips64.h ----------------------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include <stddef.h> 10 11 #include "lldb/Core/dwarf.h" 12 #include "llvm/Support/Compiler.h" 13 14 15 #ifdef DECLARE_REGISTER_INFOS_MIPS64_STRUCT 16 17 // Computes the offset of the given GPR in the user data area. 18 #ifdef LINUX_MIPS64 19 #define GPR_OFFSET(regname) \ 20 (LLVM_EXTENSION offsetof(UserArea, gpr) + \ 21 LLVM_EXTENSION offsetof(GPR_linux_mips, regname)) 22 #else 23 #define GPR_OFFSET(regname) (LLVM_EXTENSION offsetof(GPR_freebsd_mips, regname)) 24 #endif 25 26 // Computes the offset of the given FPR in the extended data area. 27 #define FPR_OFFSET(regname) \ 28 (LLVM_EXTENSION offsetof(UserArea, fpr) + \ 29 LLVM_EXTENSION offsetof(FPR_linux_mips, regname)) 30 31 // Computes the offset of the given MSA in the extended data area. 32 #define MSA_OFFSET(regname) \ 33 (LLVM_EXTENSION offsetof(UserArea, msa) + \ 34 LLVM_EXTENSION offsetof(MSA_linux_mips, regname)) 35 36 // RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB 37 38 // Note that the size and offset will be updated by platform-specific classes. 39 #ifdef LINUX_MIPS64 40 #define DEFINE_GPR(reg, alt, kind1, kind2, kind3) \ 41 { \ 42 #reg, alt, sizeof(((GPR_linux_mips *) 0)->reg), \ 43 GPR_OFFSET(reg), eEncodingUint, eFormatHex, \ 44 {kind1, kind2, kind3, ptrace_##reg##_mips, \ 45 gpr_##reg##_mips64 }, \ 46 NULL, NULL, NULL, 0 \ 47 } 48 #else 49 #define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \ 50 { \ 51 #reg, alt, sizeof(((GPR_freebsd_mips *) 0)->reg), \ 52 GPR_OFFSET(reg), eEncodingUint, eFormatHex, \ 53 {kind1, kind2, kind3, kind4, \ 54 gpr_##reg##_mips64 }, \ 55 NULL, NULL, NULL, 0 \ 56 } 57 #endif 58 59 #define DEFINE_GPR_INFO(reg, alt, kind1, kind2, kind3) \ 60 { \ 61 #reg, alt, sizeof(((GPR_linux_mips *) 0)->reg) / 2, \ 62 GPR_OFFSET(reg), eEncodingUint, eFormatHex, \ 63 {kind1, kind2, kind3, ptrace_##reg##_mips, \ 64 gpr_##reg##_mips64 }, \ 65 NULL, NULL, NULL, 0 \ 66 } 67 68 const uint8_t dwarf_opcode_mips64[] = { 69 llvm::dwarf::DW_OP_regx, dwarf_sr_mips64, llvm::dwarf::DW_OP_lit1, 70 llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shl, llvm::dwarf::DW_OP_and, 71 llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shr}; 72 73 #define DEFINE_FPR(reg, alt, kind1, kind2, kind3) \ 74 { \ 75 #reg, alt, sizeof(((FPR_linux_mips *) 0)->reg), \ 76 FPR_OFFSET(reg), eEncodingIEEE754, eFormatFloat, \ 77 {kind1, kind2, kind3, ptrace_##reg##_mips, \ 78 fpr_##reg##_mips64 }, \ 79 NULL, NULL, dwarf_opcode_mips64, \ 80 sizeof(dwarf_opcode_mips64) \ 81 } 82 83 #define DEFINE_FPR_INFO(reg, alt, kind1, kind2, kind3) \ 84 { \ 85 #reg, alt, sizeof(((FPR_linux_mips *) 0)->reg), \ 86 FPR_OFFSET(reg), eEncodingUint, eFormatHex, \ 87 {kind1, kind2, kind3, ptrace_##reg##_mips, \ 88 fpr_##reg##_mips64 }, \ 89 NULL, NULL, NULL, 0 \ 90 } 91 92 #define DEFINE_MSA(reg, alt, kind1, kind2, kind3, kind4) \ 93 { \ 94 #reg, alt, sizeof(((MSA_linux_mips *) 0)->reg), \ 95 MSA_OFFSET(reg), eEncodingVector, eFormatVectorOfUInt8, \ 96 {kind1, kind2, kind3, kind4, \ 97 msa_##reg##_mips64 }, \ 98 NULL, NULL, NULL, 0 \ 99 } 100 101 #define DEFINE_MSA_INFO(reg, alt, kind1, kind2, kind3, kind4) \ 102 { \ 103 #reg, alt, sizeof(((MSA_linux_mips *) 0)->reg), \ 104 MSA_OFFSET(reg), eEncodingUint, eFormatHex, \ 105 {kind1, kind2, kind3, kind4, \ 106 msa_##reg##_mips64 }, \ 107 NULL, NULL, NULL, 0 \ 108 } 109 110 static RegisterInfo g_register_infos_mips64[] = { 111 // General purpose registers. EH_Frame, DWARF, 112 // Generic, Process Plugin 113 #ifndef LINUX_MIPS64 114 DEFINE_GPR(zero, "r0", dwarf_zero_mips64, dwarf_zero_mips64, 115 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 116 DEFINE_GPR(r1, nullptr, dwarf_r1_mips64, dwarf_r1_mips64, 117 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 118 DEFINE_GPR(r2, nullptr, dwarf_r2_mips64, dwarf_r2_mips64, 119 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 120 DEFINE_GPR(r3, nullptr, dwarf_r3_mips64, dwarf_r3_mips64, 121 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 122 DEFINE_GPR(r4, nullptr, dwarf_r4_mips64, dwarf_r4_mips64, 123 LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM), 124 DEFINE_GPR(r5, nullptr, dwarf_r5_mips64, dwarf_r5_mips64, 125 LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM), 126 DEFINE_GPR(r6, nullptr, dwarf_r6_mips64, dwarf_r6_mips64, 127 LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM), 128 DEFINE_GPR(r7, nullptr, dwarf_r7_mips64, dwarf_r7_mips64, 129 LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM), 130 DEFINE_GPR(r8, nullptr, dwarf_r8_mips64, dwarf_r8_mips64, 131 LLDB_REGNUM_GENERIC_ARG5, LLDB_INVALID_REGNUM), 132 DEFINE_GPR(r9, nullptr, dwarf_r9_mips64, dwarf_r9_mips64, 133 LLDB_REGNUM_GENERIC_ARG6, LLDB_INVALID_REGNUM), 134 DEFINE_GPR(r10, nullptr, dwarf_r10_mips64, dwarf_r10_mips64, 135 LLDB_REGNUM_GENERIC_ARG7, LLDB_INVALID_REGNUM), 136 DEFINE_GPR(r11, nullptr, dwarf_r11_mips64, dwarf_r11_mips64, 137 LLDB_REGNUM_GENERIC_ARG8, LLDB_INVALID_REGNUM), 138 DEFINE_GPR(r12, nullptr, dwarf_r12_mips64, dwarf_r12_mips64, 139 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 140 DEFINE_GPR(r13, nullptr, dwarf_r13_mips64, dwarf_r13_mips64, 141 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 142 DEFINE_GPR(r14, nullptr, dwarf_r14_mips64, dwarf_r14_mips64, 143 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 144 DEFINE_GPR(r15, nullptr, dwarf_r15_mips64, dwarf_r15_mips64, 145 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 146 DEFINE_GPR(r16, nullptr, dwarf_r16_mips64, dwarf_r16_mips64, 147 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 148 DEFINE_GPR(r17, nullptr, dwarf_r17_mips64, dwarf_r17_mips64, 149 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 150 DEFINE_GPR(r18, nullptr, dwarf_r18_mips64, dwarf_r18_mips64, 151 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 152 DEFINE_GPR(r19, nullptr, dwarf_r19_mips64, dwarf_r19_mips64, 153 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 154 DEFINE_GPR(r20, nullptr, dwarf_r20_mips64, dwarf_r20_mips64, 155 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 156 DEFINE_GPR(r21, nullptr, dwarf_r21_mips64, dwarf_r21_mips64, 157 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 158 DEFINE_GPR(r22, nullptr, dwarf_r22_mips64, dwarf_r22_mips64, 159 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 160 DEFINE_GPR(r23, nullptr, dwarf_r23_mips64, dwarf_r23_mips64, 161 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 162 DEFINE_GPR(r24, nullptr, dwarf_r24_mips64, dwarf_r24_mips64, 163 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 164 DEFINE_GPR(r25, nullptr, dwarf_r25_mips64, dwarf_r25_mips64, 165 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 166 DEFINE_GPR(r26, nullptr, dwarf_r26_mips64, dwarf_r26_mips64, 167 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 168 DEFINE_GPR(r27, nullptr, dwarf_r27_mips64, dwarf_r27_mips64, 169 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 170 DEFINE_GPR(gp, "r28", dwarf_gp_mips64, dwarf_gp_mips64, LLDB_INVALID_REGNUM, 171 LLDB_INVALID_REGNUM), 172 DEFINE_GPR(sp, "r29", dwarf_sp_mips64, dwarf_sp_mips64, 173 LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM), 174 DEFINE_GPR(r30, nullptr, dwarf_r30_mips64, dwarf_r30_mips64, 175 LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM), 176 DEFINE_GPR(ra, "r31", dwarf_ra_mips64, dwarf_ra_mips64, 177 LLDB_REGNUM_GENERIC_RA, LLDB_INVALID_REGNUM), 178 DEFINE_GPR(sr, nullptr, dwarf_sr_mips64, dwarf_sr_mips64, 179 LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM), 180 DEFINE_GPR(mullo, nullptr, dwarf_lo_mips64, dwarf_lo_mips64, 181 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 182 DEFINE_GPR(mulhi, nullptr, dwarf_hi_mips64, dwarf_hi_mips64, 183 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 184 DEFINE_GPR(badvaddr, nullptr, dwarf_bad_mips64, dwarf_bad_mips64, 185 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 186 DEFINE_GPR(cause, nullptr, dwarf_cause_mips64, dwarf_cause_mips64, 187 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 188 DEFINE_GPR(pc, "pc", dwarf_pc_mips64, dwarf_pc_mips64, 189 LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM), 190 DEFINE_GPR(ic, nullptr, dwarf_ic_mips64, dwarf_ic_mips64, 191 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 192 DEFINE_GPR(dummy, nullptr, dwarf_dummy_mips64, dwarf_dummy_mips64, 193 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 194 #else 195 DEFINE_GPR(zero, "r0", dwarf_zero_mips64, dwarf_zero_mips64, 196 LLDB_INVALID_REGNUM), 197 DEFINE_GPR(r1, nullptr, dwarf_r1_mips64, dwarf_r1_mips64, 198 LLDB_INVALID_REGNUM), 199 DEFINE_GPR(r2, nullptr, dwarf_r2_mips64, dwarf_r2_mips64, 200 LLDB_INVALID_REGNUM), 201 DEFINE_GPR(r3, nullptr, dwarf_r3_mips64, dwarf_r3_mips64, 202 LLDB_INVALID_REGNUM), 203 DEFINE_GPR(r4, nullptr, dwarf_r4_mips64, dwarf_r4_mips64, 204 LLDB_REGNUM_GENERIC_ARG1), 205 DEFINE_GPR(r5, nullptr, dwarf_r5_mips64, dwarf_r5_mips64, 206 LLDB_REGNUM_GENERIC_ARG2), 207 DEFINE_GPR(r6, nullptr, dwarf_r6_mips64, dwarf_r6_mips64, 208 LLDB_REGNUM_GENERIC_ARG3), 209 DEFINE_GPR(r7, nullptr, dwarf_r7_mips64, dwarf_r7_mips64, 210 LLDB_REGNUM_GENERIC_ARG4), 211 DEFINE_GPR(r8, nullptr, dwarf_r8_mips64, dwarf_r8_mips64, 212 LLDB_REGNUM_GENERIC_ARG5), 213 DEFINE_GPR(r9, nullptr, dwarf_r9_mips64, dwarf_r9_mips64, 214 LLDB_REGNUM_GENERIC_ARG6), 215 DEFINE_GPR(r10, nullptr, dwarf_r10_mips64, dwarf_r10_mips64, 216 LLDB_REGNUM_GENERIC_ARG7), 217 DEFINE_GPR(r11, nullptr, dwarf_r11_mips64, dwarf_r11_mips64, 218 LLDB_REGNUM_GENERIC_ARG8), 219 DEFINE_GPR(r12, nullptr, dwarf_r12_mips64, dwarf_r12_mips64, 220 LLDB_INVALID_REGNUM), 221 DEFINE_GPR(r13, nullptr, dwarf_r13_mips64, dwarf_r13_mips64, 222 LLDB_INVALID_REGNUM), 223 DEFINE_GPR(r14, nullptr, dwarf_r14_mips64, dwarf_r14_mips64, 224 LLDB_INVALID_REGNUM), 225 DEFINE_GPR(r15, nullptr, dwarf_r15_mips64, dwarf_r15_mips64, 226 LLDB_INVALID_REGNUM), 227 DEFINE_GPR(r16, nullptr, dwarf_r16_mips64, dwarf_r16_mips64, 228 LLDB_INVALID_REGNUM), 229 DEFINE_GPR(r17, nullptr, dwarf_r17_mips64, dwarf_r17_mips64, 230 LLDB_INVALID_REGNUM), 231 DEFINE_GPR(r18, nullptr, dwarf_r18_mips64, dwarf_r18_mips64, 232 LLDB_INVALID_REGNUM), 233 DEFINE_GPR(r19, nullptr, dwarf_r19_mips64, dwarf_r19_mips64, 234 LLDB_INVALID_REGNUM), 235 DEFINE_GPR(r20, nullptr, dwarf_r20_mips64, dwarf_r20_mips64, 236 LLDB_INVALID_REGNUM), 237 DEFINE_GPR(r21, nullptr, dwarf_r21_mips64, dwarf_r21_mips64, 238 LLDB_INVALID_REGNUM), 239 DEFINE_GPR(r22, nullptr, dwarf_r22_mips64, dwarf_r22_mips64, 240 LLDB_INVALID_REGNUM), 241 DEFINE_GPR(r23, nullptr, dwarf_r23_mips64, dwarf_r23_mips64, 242 LLDB_INVALID_REGNUM), 243 DEFINE_GPR(r24, nullptr, dwarf_r24_mips64, dwarf_r24_mips64, 244 LLDB_INVALID_REGNUM), 245 DEFINE_GPR(r25, nullptr, dwarf_r25_mips64, dwarf_r25_mips64, 246 LLDB_INVALID_REGNUM), 247 DEFINE_GPR(r26, nullptr, dwarf_r26_mips64, dwarf_r26_mips64, 248 LLDB_INVALID_REGNUM), 249 DEFINE_GPR(r27, nullptr, dwarf_r27_mips64, dwarf_r27_mips64, 250 LLDB_INVALID_REGNUM), 251 DEFINE_GPR(gp, "r28", dwarf_gp_mips64, dwarf_gp_mips64, 252 LLDB_INVALID_REGNUM), 253 DEFINE_GPR(sp, "r29", dwarf_sp_mips64, dwarf_sp_mips64, 254 LLDB_REGNUM_GENERIC_SP), 255 DEFINE_GPR(r30, nullptr, dwarf_r30_mips64, dwarf_r30_mips64, 256 LLDB_REGNUM_GENERIC_FP), 257 DEFINE_GPR(ra, "r31", dwarf_ra_mips64, dwarf_ra_mips64, 258 LLDB_REGNUM_GENERIC_RA), 259 DEFINE_GPR_INFO(sr, nullptr, dwarf_sr_mips64, dwarf_sr_mips64, 260 LLDB_REGNUM_GENERIC_FLAGS), 261 DEFINE_GPR(mullo, nullptr, dwarf_lo_mips64, dwarf_lo_mips64, 262 LLDB_INVALID_REGNUM), 263 DEFINE_GPR(mulhi, nullptr, dwarf_hi_mips64, dwarf_hi_mips64, 264 LLDB_INVALID_REGNUM), 265 DEFINE_GPR(badvaddr, nullptr, dwarf_bad_mips64, dwarf_bad_mips64, 266 LLDB_INVALID_REGNUM), 267 DEFINE_GPR_INFO(cause, nullptr, dwarf_cause_mips64, dwarf_cause_mips64, 268 LLDB_INVALID_REGNUM), 269 DEFINE_GPR(pc, "pc", dwarf_pc_mips64, dwarf_pc_mips64, 270 LLDB_REGNUM_GENERIC_PC), 271 DEFINE_GPR_INFO(config5, nullptr, dwarf_config5_mips64, 272 dwarf_config5_mips64, LLDB_INVALID_REGNUM), 273 DEFINE_FPR(f0, nullptr, dwarf_f0_mips64, dwarf_f0_mips64, 274 LLDB_INVALID_REGNUM), 275 DEFINE_FPR(f1, nullptr, dwarf_f1_mips64, dwarf_f1_mips64, 276 LLDB_INVALID_REGNUM), 277 DEFINE_FPR(f2, nullptr, dwarf_f2_mips64, dwarf_f2_mips64, 278 LLDB_INVALID_REGNUM), 279 DEFINE_FPR(f3, nullptr, dwarf_f3_mips64, dwarf_f3_mips64, 280 LLDB_INVALID_REGNUM), 281 DEFINE_FPR(f4, nullptr, dwarf_f4_mips64, dwarf_f4_mips64, 282 LLDB_INVALID_REGNUM), 283 DEFINE_FPR(f5, nullptr, dwarf_f5_mips64, dwarf_f5_mips64, 284 LLDB_INVALID_REGNUM), 285 DEFINE_FPR(f6, nullptr, dwarf_f6_mips64, dwarf_f6_mips64, 286 LLDB_INVALID_REGNUM), 287 DEFINE_FPR(f7, nullptr, dwarf_f7_mips64, dwarf_f7_mips64, 288 LLDB_INVALID_REGNUM), 289 DEFINE_FPR(f8, nullptr, dwarf_f8_mips64, dwarf_f8_mips64, 290 LLDB_INVALID_REGNUM), 291 DEFINE_FPR(f9, nullptr, dwarf_f9_mips64, dwarf_f9_mips64, 292 LLDB_INVALID_REGNUM), 293 DEFINE_FPR(f10, nullptr, dwarf_f10_mips64, dwarf_f10_mips64, 294 LLDB_INVALID_REGNUM), 295 DEFINE_FPR(f11, nullptr, dwarf_f11_mips64, dwarf_f11_mips64, 296 LLDB_INVALID_REGNUM), 297 DEFINE_FPR(f12, nullptr, dwarf_f12_mips64, dwarf_f12_mips64, 298 LLDB_INVALID_REGNUM), 299 DEFINE_FPR(f13, nullptr, dwarf_f13_mips64, dwarf_f13_mips64, 300 LLDB_INVALID_REGNUM), 301 DEFINE_FPR(f14, nullptr, dwarf_f14_mips64, dwarf_f14_mips64, 302 LLDB_INVALID_REGNUM), 303 DEFINE_FPR(f15, nullptr, dwarf_f15_mips64, dwarf_f15_mips64, 304 LLDB_INVALID_REGNUM), 305 DEFINE_FPR(f16, nullptr, dwarf_f16_mips64, dwarf_f16_mips64, 306 LLDB_INVALID_REGNUM), 307 DEFINE_FPR(f17, nullptr, dwarf_f17_mips64, dwarf_f17_mips64, 308 LLDB_INVALID_REGNUM), 309 DEFINE_FPR(f18, nullptr, dwarf_f18_mips64, dwarf_f18_mips64, 310 LLDB_INVALID_REGNUM), 311 DEFINE_FPR(f19, nullptr, dwarf_f19_mips64, dwarf_f19_mips64, 312 LLDB_INVALID_REGNUM), 313 DEFINE_FPR(f20, nullptr, dwarf_f20_mips64, dwarf_f20_mips64, 314 LLDB_INVALID_REGNUM), 315 DEFINE_FPR(f21, nullptr, dwarf_f21_mips64, dwarf_f21_mips64, 316 LLDB_INVALID_REGNUM), 317 DEFINE_FPR(f22, nullptr, dwarf_f22_mips64, dwarf_f22_mips64, 318 LLDB_INVALID_REGNUM), 319 DEFINE_FPR(f23, nullptr, dwarf_f23_mips64, dwarf_f23_mips64, 320 LLDB_INVALID_REGNUM), 321 DEFINE_FPR(f24, nullptr, dwarf_f24_mips64, dwarf_f24_mips64, 322 LLDB_INVALID_REGNUM), 323 DEFINE_FPR(f25, nullptr, dwarf_f25_mips64, dwarf_f25_mips64, 324 LLDB_INVALID_REGNUM), 325 DEFINE_FPR(f26, nullptr, dwarf_f26_mips64, dwarf_f26_mips64, 326 LLDB_INVALID_REGNUM), 327 DEFINE_FPR(f27, nullptr, dwarf_f27_mips64, dwarf_f27_mips64, 328 LLDB_INVALID_REGNUM), 329 DEFINE_FPR(f28, nullptr, dwarf_f28_mips64, dwarf_f28_mips64, 330 LLDB_INVALID_REGNUM), 331 DEFINE_FPR(f29, nullptr, dwarf_f29_mips64, dwarf_f29_mips64, 332 LLDB_INVALID_REGNUM), 333 DEFINE_FPR(f30, nullptr, dwarf_f30_mips64, dwarf_f30_mips64, 334 LLDB_INVALID_REGNUM), 335 DEFINE_FPR(f31, nullptr, dwarf_f31_mips64, dwarf_f31_mips64, 336 LLDB_INVALID_REGNUM), 337 DEFINE_FPR_INFO(fcsr, nullptr, dwarf_fcsr_mips64, dwarf_fcsr_mips64, 338 LLDB_INVALID_REGNUM), 339 DEFINE_FPR_INFO(fir, nullptr, dwarf_fir_mips64, dwarf_fir_mips64, 340 LLDB_INVALID_REGNUM), 341 DEFINE_FPR_INFO(config5, nullptr, dwarf_config5_mips64, 342 dwarf_config5_mips64, LLDB_INVALID_REGNUM), 343 DEFINE_MSA(w0, nullptr, dwarf_w0_mips64, dwarf_w0_mips64, 344 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 345 DEFINE_MSA(w1, nullptr, dwarf_w1_mips64, dwarf_w1_mips64, 346 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 347 DEFINE_MSA(w2, nullptr, dwarf_w2_mips64, dwarf_w2_mips64, 348 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 349 DEFINE_MSA(w3, nullptr, dwarf_w3_mips64, dwarf_w3_mips64, 350 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 351 DEFINE_MSA(w4, nullptr, dwarf_w4_mips64, dwarf_w4_mips64, 352 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 353 DEFINE_MSA(w5, nullptr, dwarf_w5_mips64, dwarf_w5_mips64, 354 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 355 DEFINE_MSA(w6, nullptr, dwarf_w6_mips64, dwarf_w6_mips64, 356 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 357 DEFINE_MSA(w7, nullptr, dwarf_w7_mips64, dwarf_w7_mips64, 358 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 359 DEFINE_MSA(w8, nullptr, dwarf_w8_mips64, dwarf_w8_mips64, 360 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 361 DEFINE_MSA(w9, nullptr, dwarf_w9_mips64, dwarf_w9_mips64, 362 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 363 DEFINE_MSA(w10, nullptr, dwarf_w10_mips64, dwarf_w10_mips64, 364 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 365 DEFINE_MSA(w11, nullptr, dwarf_w11_mips64, dwarf_w11_mips64, 366 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 367 DEFINE_MSA(w12, nullptr, dwarf_w12_mips64, dwarf_w12_mips64, 368 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 369 DEFINE_MSA(w13, nullptr, dwarf_w13_mips64, dwarf_w13_mips64, 370 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 371 DEFINE_MSA(w14, nullptr, dwarf_w14_mips64, dwarf_w14_mips64, 372 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 373 DEFINE_MSA(w15, nullptr, dwarf_w15_mips64, dwarf_w15_mips64, 374 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 375 DEFINE_MSA(w16, nullptr, dwarf_w16_mips64, dwarf_w16_mips64, 376 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 377 DEFINE_MSA(w17, nullptr, dwarf_w17_mips64, dwarf_w17_mips64, 378 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 379 DEFINE_MSA(w18, nullptr, dwarf_w18_mips64, dwarf_w18_mips64, 380 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 381 DEFINE_MSA(w19, nullptr, dwarf_w19_mips64, dwarf_w19_mips64, 382 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 383 DEFINE_MSA(w20, nullptr, dwarf_w10_mips64, dwarf_w20_mips64, 384 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 385 DEFINE_MSA(w21, nullptr, dwarf_w21_mips64, dwarf_w21_mips64, 386 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 387 DEFINE_MSA(w22, nullptr, dwarf_w22_mips64, dwarf_w22_mips64, 388 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 389 DEFINE_MSA(w23, nullptr, dwarf_w23_mips64, dwarf_w23_mips64, 390 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 391 DEFINE_MSA(w24, nullptr, dwarf_w24_mips64, dwarf_w24_mips64, 392 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 393 DEFINE_MSA(w25, nullptr, dwarf_w25_mips64, dwarf_w25_mips64, 394 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 395 DEFINE_MSA(w26, nullptr, dwarf_w26_mips64, dwarf_w26_mips64, 396 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 397 DEFINE_MSA(w27, nullptr, dwarf_w27_mips64, dwarf_w27_mips64, 398 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 399 DEFINE_MSA(w28, nullptr, dwarf_w28_mips64, dwarf_w28_mips64, 400 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 401 DEFINE_MSA(w29, nullptr, dwarf_w29_mips64, dwarf_w29_mips64, 402 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 403 DEFINE_MSA(w30, nullptr, dwarf_w30_mips64, dwarf_w30_mips64, 404 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 405 DEFINE_MSA(w31, nullptr, dwarf_w31_mips64, dwarf_w31_mips64, 406 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 407 DEFINE_MSA_INFO(mcsr, nullptr, dwarf_mcsr_mips64, dwarf_mcsr_mips64, 408 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 409 DEFINE_MSA_INFO(mir, nullptr, dwarf_mir_mips64, dwarf_mir_mips64, 410 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 411 DEFINE_MSA_INFO(fcsr, nullptr, dwarf_fcsr_mips64, dwarf_fcsr_mips64, 412 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 413 DEFINE_MSA_INFO(fir, nullptr, dwarf_fir_mips64, dwarf_fir_mips64, 414 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 415 DEFINE_MSA_INFO(config5, nullptr, dwarf_config5_mips64, 416 dwarf_config5_mips64, LLDB_INVALID_REGNUM, 417 LLDB_INVALID_REGNUM) 418 #endif 419 }; 420 421 static_assert((sizeof(g_register_infos_mips64) / 422 sizeof(g_register_infos_mips64[0])) == k_num_registers_mips64, 423 "g_register_infos_mips64 has wrong number of register infos"); 424 425 #undef DEFINE_GPR 426 #undef DEFINE_GPR_INFO 427 #undef DEFINE_FPR 428 #undef DEFINE_FPR_INFO 429 #undef DEFINE_MSA 430 #undef DEFINE_MSA_INFO 431 #undef GPR_OFFSET 432 #undef FPR_OFFSET 433 #undef MSA_OFFSET 434 435 #endif // DECLARE_REGISTER_INFOS_MIPS64_STRUCT 436