1 //===- MCSubtargetInfo.cpp - Subtarget Information ------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8
9 #include "llvm/MC/MCSubtargetInfo.h"
10 #include "llvm/ADT/ArrayRef.h"
11 #include "llvm/ADT/StringRef.h"
12 #include "llvm/MC/MCInstrItineraries.h"
13 #include "llvm/MC/MCSchedule.h"
14 #include "llvm/MC/SubtargetFeature.h"
15 #include "llvm/Support/Format.h"
16 #include "llvm/Support/raw_ostream.h"
17 #include <algorithm>
18 #include <cassert>
19 #include <cstring>
20
21 using namespace llvm;
22
23 /// Find KV in array using binary search.
24 template <typename T>
Find(StringRef S,ArrayRef<T> A)25 static const T *Find(StringRef S, ArrayRef<T> A) {
26 // Binary search the array
27 auto F = llvm::lower_bound(A, S);
28 // If not found then return NULL
29 if (F == A.end() || StringRef(F->Key) != S) return nullptr;
30 // Return the found array item
31 return F;
32 }
33
34 /// For each feature that is (transitively) implied by this feature, set it.
35 static
SetImpliedBits(FeatureBitset & Bits,const FeatureBitset & Implies,ArrayRef<SubtargetFeatureKV> FeatureTable)36 void SetImpliedBits(FeatureBitset &Bits, const FeatureBitset &Implies,
37 ArrayRef<SubtargetFeatureKV> FeatureTable) {
38 // OR the Implies bits in outside the loop. This allows the Implies for CPUs
39 // which might imply features not in FeatureTable to use this.
40 Bits |= Implies;
41 for (const SubtargetFeatureKV &FE : FeatureTable)
42 if (Implies.test(FE.Value))
43 SetImpliedBits(Bits, FE.Implies.getAsBitset(), FeatureTable);
44 }
45
46 /// For each feature that (transitively) implies this feature, clear it.
47 static
ClearImpliedBits(FeatureBitset & Bits,unsigned Value,ArrayRef<SubtargetFeatureKV> FeatureTable)48 void ClearImpliedBits(FeatureBitset &Bits, unsigned Value,
49 ArrayRef<SubtargetFeatureKV> FeatureTable) {
50 for (const SubtargetFeatureKV &FE : FeatureTable) {
51 if (FE.Implies.getAsBitset().test(Value)) {
52 Bits.reset(FE.Value);
53 ClearImpliedBits(Bits, FE.Value, FeatureTable);
54 }
55 }
56 }
57
ApplyFeatureFlag(FeatureBitset & Bits,StringRef Feature,ArrayRef<SubtargetFeatureKV> FeatureTable)58 static void ApplyFeatureFlag(FeatureBitset &Bits, StringRef Feature,
59 ArrayRef<SubtargetFeatureKV> FeatureTable) {
60 assert(SubtargetFeatures::hasFlag(Feature) &&
61 "Feature flags should start with '+' or '-'");
62
63 // Find feature in table.
64 const SubtargetFeatureKV *FeatureEntry =
65 Find(SubtargetFeatures::StripFlag(Feature), FeatureTable);
66 // If there is a match
67 if (FeatureEntry) {
68 // Enable/disable feature in bits
69 if (SubtargetFeatures::isEnabled(Feature)) {
70 Bits.set(FeatureEntry->Value);
71
72 // For each feature that this implies, set it.
73 SetImpliedBits(Bits, FeatureEntry->Implies.getAsBitset(), FeatureTable);
74 } else {
75 Bits.reset(FeatureEntry->Value);
76
77 // For each feature that implies this, clear it.
78 ClearImpliedBits(Bits, FeatureEntry->Value, FeatureTable);
79 }
80 } else {
81 errs() << "'" << Feature << "' is not a recognized feature for this target"
82 << " (ignoring feature)\n";
83 }
84 }
85
86 /// Return the length of the longest entry in the table.
87 template <typename T>
getLongestEntryLength(ArrayRef<T> Table)88 static size_t getLongestEntryLength(ArrayRef<T> Table) {
89 size_t MaxLen = 0;
90 for (auto &I : Table)
91 MaxLen = std::max(MaxLen, std::strlen(I.Key));
92 return MaxLen;
93 }
94
95 /// Display help for feature and mcpu choices.
Help(ArrayRef<SubtargetSubTypeKV> CPUTable,ArrayRef<SubtargetFeatureKV> FeatTable)96 static void Help(ArrayRef<SubtargetSubTypeKV> CPUTable,
97 ArrayRef<SubtargetFeatureKV> FeatTable) {
98 // the static variable ensures that the help information only gets
99 // printed once even though a target machine creates multiple subtargets
100 static bool PrintOnce = false;
101 if (PrintOnce) {
102 return;
103 }
104
105 // Determine the length of the longest CPU and Feature entries.
106 unsigned MaxCPULen = getLongestEntryLength(CPUTable);
107 unsigned MaxFeatLen = getLongestEntryLength(FeatTable);
108
109 // Print the CPU table.
110 errs() << "Available CPUs for this target:\n\n";
111 for (auto &CPU : CPUTable)
112 errs() << format(" %-*s - Select the %s processor.\n", MaxCPULen, CPU.Key,
113 CPU.Key);
114 errs() << '\n';
115
116 // Print the Feature table.
117 errs() << "Available features for this target:\n\n";
118 for (auto &Feature : FeatTable)
119 errs() << format(" %-*s - %s.\n", MaxFeatLen, Feature.Key, Feature.Desc);
120 errs() << '\n';
121
122 errs() << "Use +feature to enable a feature, or -feature to disable it.\n"
123 "For example, llc -mcpu=mycpu -mattr=+feature1,-feature2\n";
124
125 PrintOnce = true;
126 }
127
128 /// Display help for mcpu choices only
cpuHelp(ArrayRef<SubtargetSubTypeKV> CPUTable)129 static void cpuHelp(ArrayRef<SubtargetSubTypeKV> CPUTable) {
130 // the static variable ensures that the help information only gets
131 // printed once even though a target machine creates multiple subtargets
132 static bool PrintOnce = false;
133 if (PrintOnce) {
134 return;
135 }
136
137 // Print the CPU table.
138 errs() << "Available CPUs for this target:\n\n";
139 for (auto &CPU : CPUTable)
140 errs() << "\t" << CPU.Key << "\n";
141 errs() << '\n';
142
143 errs() << "Use -mcpu or -mtune to specify the target's processor.\n"
144 "For example, clang --target=aarch64-unknown-linux-gui "
145 "-mcpu=cortex-a35\n";
146
147 PrintOnce = true;
148 }
149
getFeatures(StringRef CPU,StringRef TuneCPU,StringRef FS,ArrayRef<SubtargetSubTypeKV> ProcDesc,ArrayRef<SubtargetFeatureKV> ProcFeatures)150 static FeatureBitset getFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS,
151 ArrayRef<SubtargetSubTypeKV> ProcDesc,
152 ArrayRef<SubtargetFeatureKV> ProcFeatures) {
153 SubtargetFeatures Features(FS);
154
155 if (ProcDesc.empty() || ProcFeatures.empty())
156 return FeatureBitset();
157
158 assert(llvm::is_sorted(ProcDesc) && "CPU table is not sorted");
159 assert(llvm::is_sorted(ProcFeatures) && "CPU features table is not sorted");
160 // Resulting bits
161 FeatureBitset Bits;
162
163 // Check if help is needed
164 if (CPU == "help")
165 Help(ProcDesc, ProcFeatures);
166
167 // Find CPU entry if CPU name is specified.
168 else if (!CPU.empty()) {
169 const SubtargetSubTypeKV *CPUEntry = Find(CPU, ProcDesc);
170
171 // If there is a match
172 if (CPUEntry) {
173 // Set the features implied by this CPU feature, if any.
174 SetImpliedBits(Bits, CPUEntry->Implies.getAsBitset(), ProcFeatures);
175 } else {
176 errs() << "'" << CPU << "' is not a recognized processor for this target"
177 << " (ignoring processor)\n";
178 }
179 }
180
181 if (!TuneCPU.empty()) {
182 const SubtargetSubTypeKV *CPUEntry = Find(TuneCPU, ProcDesc);
183
184 // If there is a match
185 if (CPUEntry) {
186 // Set the features implied by this CPU feature, if any.
187 SetImpliedBits(Bits, CPUEntry->TuneImplies.getAsBitset(), ProcFeatures);
188 } else if (TuneCPU != CPU) {
189 errs() << "'" << TuneCPU << "' is not a recognized processor for this "
190 << "target (ignoring processor)\n";
191 }
192 }
193
194 // Iterate through each feature
195 for (const std::string &Feature : Features.getFeatures()) {
196 // Check for help
197 if (Feature == "+help")
198 Help(ProcDesc, ProcFeatures);
199 else if (Feature == "+cpuhelp")
200 cpuHelp(ProcDesc);
201 else
202 ApplyFeatureFlag(Bits, Feature, ProcFeatures);
203 }
204
205 return Bits;
206 }
207
InitMCProcessorInfo(StringRef CPU,StringRef TuneCPU,StringRef FS)208 void MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef TuneCPU,
209 StringRef FS) {
210 FeatureBits = getFeatures(CPU, TuneCPU, FS, ProcDesc, ProcFeatures);
211 if (!TuneCPU.empty())
212 CPUSchedModel = &getSchedModelForCPU(TuneCPU);
213 else
214 CPUSchedModel = &MCSchedModel::GetDefaultSchedModel();
215 }
216
setDefaultFeatures(StringRef CPU,StringRef TuneCPU,StringRef FS)217 void MCSubtargetInfo::setDefaultFeatures(StringRef CPU, StringRef TuneCPU,
218 StringRef FS) {
219 FeatureBits = getFeatures(CPU, TuneCPU, FS, ProcDesc, ProcFeatures);
220 }
221
MCSubtargetInfo(const Triple & TT,StringRef C,StringRef TC,StringRef FS,ArrayRef<SubtargetFeatureKV> PF,ArrayRef<SubtargetSubTypeKV> PD,const MCWriteProcResEntry * WPR,const MCWriteLatencyEntry * WL,const MCReadAdvanceEntry * RA,const InstrStage * IS,const unsigned * OC,const unsigned * FP)222 MCSubtargetInfo::MCSubtargetInfo(const Triple &TT, StringRef C, StringRef TC,
223 StringRef FS, ArrayRef<SubtargetFeatureKV> PF,
224 ArrayRef<SubtargetSubTypeKV> PD,
225 const MCWriteProcResEntry *WPR,
226 const MCWriteLatencyEntry *WL,
227 const MCReadAdvanceEntry *RA,
228 const InstrStage *IS, const unsigned *OC,
229 const unsigned *FP)
230 : TargetTriple(TT), CPU(std::string(C)), TuneCPU(std::string(TC)),
231 ProcFeatures(PF), ProcDesc(PD), WriteProcResTable(WPR),
232 WriteLatencyTable(WL), ReadAdvanceTable(RA), Stages(IS),
233 OperandCycles(OC), ForwardingPaths(FP) {
234 InitMCProcessorInfo(CPU, TuneCPU, FS);
235 }
236
ToggleFeature(uint64_t FB)237 FeatureBitset MCSubtargetInfo::ToggleFeature(uint64_t FB) {
238 FeatureBits.flip(FB);
239 return FeatureBits;
240 }
241
ToggleFeature(const FeatureBitset & FB)242 FeatureBitset MCSubtargetInfo::ToggleFeature(const FeatureBitset &FB) {
243 FeatureBits ^= FB;
244 return FeatureBits;
245 }
246
SetFeatureBitsTransitively(const FeatureBitset & FB)247 FeatureBitset MCSubtargetInfo::SetFeatureBitsTransitively(
248 const FeatureBitset &FB) {
249 SetImpliedBits(FeatureBits, FB, ProcFeatures);
250 return FeatureBits;
251 }
252
ClearFeatureBitsTransitively(const FeatureBitset & FB)253 FeatureBitset MCSubtargetInfo::ClearFeatureBitsTransitively(
254 const FeatureBitset &FB) {
255 for (unsigned I = 0, E = FB.size(); I < E; I++) {
256 if (FB[I]) {
257 FeatureBits.reset(I);
258 ClearImpliedBits(FeatureBits, I, ProcFeatures);
259 }
260 }
261 return FeatureBits;
262 }
263
ToggleFeature(StringRef Feature)264 FeatureBitset MCSubtargetInfo::ToggleFeature(StringRef Feature) {
265 // Find feature in table.
266 const SubtargetFeatureKV *FeatureEntry =
267 Find(SubtargetFeatures::StripFlag(Feature), ProcFeatures);
268 // If there is a match
269 if (FeatureEntry) {
270 if (FeatureBits.test(FeatureEntry->Value)) {
271 FeatureBits.reset(FeatureEntry->Value);
272 // For each feature that implies this, clear it.
273 ClearImpliedBits(FeatureBits, FeatureEntry->Value, ProcFeatures);
274 } else {
275 FeatureBits.set(FeatureEntry->Value);
276
277 // For each feature that this implies, set it.
278 SetImpliedBits(FeatureBits, FeatureEntry->Implies.getAsBitset(),
279 ProcFeatures);
280 }
281 } else {
282 errs() << "'" << Feature << "' is not a recognized feature for this target"
283 << " (ignoring feature)\n";
284 }
285
286 return FeatureBits;
287 }
288
ApplyFeatureFlag(StringRef FS)289 FeatureBitset MCSubtargetInfo::ApplyFeatureFlag(StringRef FS) {
290 ::ApplyFeatureFlag(FeatureBits, FS, ProcFeatures);
291 return FeatureBits;
292 }
293
checkFeatures(StringRef FS) const294 bool MCSubtargetInfo::checkFeatures(StringRef FS) const {
295 SubtargetFeatures T(FS);
296 FeatureBitset Set, All;
297 for (std::string F : T.getFeatures()) {
298 ::ApplyFeatureFlag(Set, F, ProcFeatures);
299 if (F[0] == '-')
300 F[0] = '+';
301 ::ApplyFeatureFlag(All, F, ProcFeatures);
302 }
303 return (FeatureBits & All) == Set;
304 }
305
getSchedModelForCPU(StringRef CPU) const306 const MCSchedModel &MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const {
307 assert(llvm::is_sorted(ProcDesc) &&
308 "Processor machine model table is not sorted");
309
310 // Find entry
311 const SubtargetSubTypeKV *CPUEntry = Find(CPU, ProcDesc);
312
313 if (!CPUEntry) {
314 if (CPU != "help") // Don't error if the user asked for help.
315 errs() << "'" << CPU
316 << "' is not a recognized processor for this target"
317 << " (ignoring processor)\n";
318 return MCSchedModel::GetDefaultSchedModel();
319 }
320 assert(CPUEntry->SchedModel && "Missing processor SchedModel value");
321 return *CPUEntry->SchedModel;
322 }
323
324 InstrItineraryData
getInstrItineraryForCPU(StringRef CPU) const325 MCSubtargetInfo::getInstrItineraryForCPU(StringRef CPU) const {
326 const MCSchedModel &SchedModel = getSchedModelForCPU(CPU);
327 return InstrItineraryData(SchedModel, Stages, OperandCycles, ForwardingPaths);
328 }
329
initInstrItins(InstrItineraryData & InstrItins) const330 void MCSubtargetInfo::initInstrItins(InstrItineraryData &InstrItins) const {
331 InstrItins = InstrItineraryData(getSchedModel(), Stages, OperandCycles,
332 ForwardingPaths);
333 }
334
getCacheSize(unsigned Level) const335 Optional<unsigned> MCSubtargetInfo::getCacheSize(unsigned Level) const {
336 return Optional<unsigned>();
337 }
338
339 Optional<unsigned>
getCacheAssociativity(unsigned Level) const340 MCSubtargetInfo::getCacheAssociativity(unsigned Level) const {
341 return Optional<unsigned>();
342 }
343
getCacheLineSize(unsigned Level) const344 Optional<unsigned> MCSubtargetInfo::getCacheLineSize(unsigned Level) const {
345 return Optional<unsigned>();
346 }
347
getPrefetchDistance() const348 unsigned MCSubtargetInfo::getPrefetchDistance() const {
349 return 0;
350 }
351
getMaxPrefetchIterationsAhead() const352 unsigned MCSubtargetInfo::getMaxPrefetchIterationsAhead() const {
353 return UINT_MAX;
354 }
355
enableWritePrefetching() const356 bool MCSubtargetInfo::enableWritePrefetching() const {
357 return false;
358 }
359
getMinPrefetchStride(unsigned NumMemAccesses,unsigned NumStridedMemAccesses,unsigned NumPrefetches,bool HasCall) const360 unsigned MCSubtargetInfo::getMinPrefetchStride(unsigned NumMemAccesses,
361 unsigned NumStridedMemAccesses,
362 unsigned NumPrefetches,
363 bool HasCall) const {
364 return 1;
365 }
366