1 //===- AArch64CallLowering.h - Call lowering --------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file describes how to lower LLVM calls to machine code calls.
11 ///
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H
15 #define LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H
16 
17 #include "llvm/ADT/ArrayRef.h"
18 #include "llvm/CodeGen/GlobalISel/CallLowering.h"
19 #include "llvm/IR/CallingConv.h"
20 #include <cstdint>
21 #include <functional>
22 
23 namespace llvm {
24 
25 class AArch64TargetLowering;
26 class CCValAssign;
27 class DataLayout;
28 class MachineIRBuilder;
29 class MachineRegisterInfo;
30 class Type;
31 
32 class AArch64CallLowering: public CallLowering {
33 public:
34   AArch64CallLowering(const AArch64TargetLowering &TLI);
35 
36   bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
37                    ArrayRef<Register> VRegs, FunctionLoweringInfo &FLI,
38                    Register SwiftErrorVReg) const override;
39 
40   bool fallBackToDAGISel(const Function &F) const override;
41 
42   bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
43                             ArrayRef<ArrayRef<Register>> VRegs,
44                             FunctionLoweringInfo &FLI) const override;
45 
46   bool lowerCall(MachineIRBuilder &MIRBuilder,
47                  CallLoweringInfo &Info) const override;
48 
49   /// Returns true if the call can be lowered as a tail call.
50   bool
51   isEligibleForTailCallOptimization(MachineIRBuilder &MIRBuilder,
52                                     CallLoweringInfo &Info,
53                                     SmallVectorImpl<ArgInfo> &InArgs,
54                                     SmallVectorImpl<ArgInfo> &OutArgs) const;
55 
supportSwiftError()56   bool supportSwiftError() const override { return true; }
57 
58 private:
59   using RegHandler = std::function<void(MachineIRBuilder &, Type *, unsigned,
60                                         CCValAssign &)>;
61 
62   using MemHandler =
63       std::function<void(MachineIRBuilder &, int, CCValAssign &)>;
64 
65   void splitToValueTypes(const ArgInfo &OrigArgInfo,
66                          SmallVectorImpl<ArgInfo> &SplitArgs,
67                          const DataLayout &DL, MachineRegisterInfo &MRI,
68                          CallingConv::ID CallConv) const;
69 
70   bool lowerTailCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info,
71                      SmallVectorImpl<ArgInfo> &OutArgs) const;
72 
73   bool
74   doCallerAndCalleePassArgsTheSameWay(CallLoweringInfo &Info,
75                                       MachineFunction &MF,
76                                       SmallVectorImpl<ArgInfo> &InArgs) const;
77 
78   bool
79   areCalleeOutgoingArgsTailCallable(CallLoweringInfo &Info, MachineFunction &MF,
80                                     SmallVectorImpl<ArgInfo> &OutArgs) const;
81 };
82 
83 } // end namespace llvm
84 
85 #endif // LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H
86