1; RUN: llc -verify-machineinstrs -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -enable-amdgpu-aa=0 -mattr=+flat-for-global -denormal-fp-math=preserve-sign -enable-misched=false < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX89 %s
2
3; GCN-LABEL: {{^}}v_insertelement_v2i16_dynamic_vgpr:
4
5; GCN: {{flat|global}}_load_dword [[IDX:v[0-9]+]]
6; GCN: {{flat|global}}_load_dword [[VEC:v[0-9]+]]
7
8; GFX89-DAG: s_mov_b32 [[MASKK:s[0-9]+]], 0xffff{{$}}
9; GCN-DAG: s_mov_b32 [[K:s[0-9]+]], 0x3e7
10
11; GFX89-DAG: v_lshlrev_b32_e32 [[SCALED_IDX:v[0-9]+]], 4, [[IDX]]
12; GFX89-DAG: v_lshlrev_b32_e64 [[MASK:v[0-9]+]], [[SCALED_IDX]], [[MASKK]]
13
14; CI-DAG: v_lshlrev_b32_e32 [[SCALED_IDX:v[0-9]+]], 4, [[IDX]]
15; CI-DAG: v_lshl_b32_e32 [[MASK:v[0-9]+]], 0xffff, [[SCALED_IDX]]
16
17; GCN: v_bfi_b32 [[RESULT:v[0-9]+]], [[MASK]], [[K]], [[VEC]]
18; GCN: {{flat|global}}_store_dword v{{.+}}, [[RESULT]]
19define amdgpu_kernel void @v_insertelement_v2i16_dynamic_vgpr(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(1)* %in, i32 addrspace(1)* %idx.ptr) #0 {
20  %tid = call i32 @llvm.amdgcn.workitem.id.x() #1
21  %tid.ext = sext i32 %tid to i64
22  %in.gep = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %in, i64 %tid.ext
23  %idx.gep = getelementptr inbounds i32, i32 addrspace(1)* %idx.ptr, i64 %tid.ext
24  %out.gep = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %out, i64 %tid.ext
25  %idx = load i32, i32 addrspace(1)* %idx.gep
26  %vec = load <2 x i16>, <2 x i16> addrspace(1)* %in.gep
27  %vecins = insertelement <2 x i16> %vec, i16 999, i32 %idx
28  store <2 x i16> %vecins, <2 x i16> addrspace(1)* %out.gep
29  ret void
30}
31
32
33declare i32 @llvm.amdgcn.workitem.id.x() #1
34
35attributes #0 = { nounwind }
36attributes #1 = { nounwind readnone }
37