1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ 3; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | FileCheck %s \ 4; RUN: --check-prefixes=CHECK,CHECK-LE 5; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ 6; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | FileCheck %s \ 7; RUN: --check-prefixes=CHECK,CHECK-BE 8 9; This file does not contain many test cases involving comparisons and logical 10; comparisons (cmplwi, cmpldi). This is because alternative code is generated 11; when there is a compare (logical or not), followed by a sign or zero extend. 12; This codegen will be re-evaluated at a later time on whether or not it should 13; be emitted on P10. 14 15@globalVal = common dso_local local_unnamed_addr global i8 0, align 1 16@globalVal2 = common dso_local local_unnamed_addr global i32 0, align 4 17@globalVal3 = common dso_local local_unnamed_addr global i64 0, align 8 18@globalVal4 = common dso_local local_unnamed_addr global i16 0, align 2 19 20define dso_local signext i32 @setnbcr1(i8 %a) { 21; CHECK-LABEL: setnbcr1: 22; CHECK: # %bb.0: # %entry 23; CHECK-NEXT: andi. r3, r3, 255 24; CHECK-NEXT: setnbcr r3, eq 25; CHECK-NEXT: blr 26entry: 27 %cmp = icmp uge i8 %a, 1 28 %conv = sext i1 %cmp to i32 29 ret i32 %conv 30} 31 32define dso_local signext i32 @setnbcr2(i32 %a) { 33; CHECK-LABEL: setnbcr2: 34; CHECK: # %bb.0: # %entry 35; CHECK-NEXT: cmpwi r3, 0 36; CHECK-NEXT: setnbcr r3, eq 37; CHECK-NEXT: blr 38entry: 39 %cmp = icmp uge i32 %a, 1 40 %conv = sext i1 %cmp to i32 41 ret i32 %conv 42} 43 44define dso_local signext i32 @setnbcr3(i64 %a) { 45; CHECK-LABEL: setnbcr3: 46; CHECK: # %bb.0: # %entry 47; CHECK-NEXT: cmpdi r3, 0 48; CHECK-NEXT: setnbcr r3, eq 49; CHECK-NEXT: blr 50entry: 51 %cmp = icmp uge i64 %a, 1 52 %conv = sext i1 %cmp to i32 53 ret i32 %conv 54} 55 56define dso_local signext i32 @setnbcr4(i16 %a) { 57; CHECK-LABEL: setnbcr4: 58; CHECK: # %bb.0: # %entry 59; CHECK-NEXT: andi. r3, r3, 65535 60; CHECK-NEXT: setnbcr r3, eq 61; CHECK-NEXT: blr 62entry: 63 %cmp = icmp uge i16 %a, 1 64 %conv = sext i1 %cmp to i32 65 ret i32 %conv 66} 67 68define signext i64 @setnbcr5(i8 %a) { 69; CHECK-LABEL: setnbcr5: 70; CHECK: # %bb.0: # %entry 71; CHECK-NEXT: andi. r3, r3, 255 72; CHECK-NEXT: setnbcr r3, eq 73; CHECK-NEXT: blr 74entry: 75 %cmp = icmp uge i8 %a, 1 76 %conv = sext i1 %cmp to i64 77 ret i64 %conv 78} 79 80define signext i64 @setnbcr6(i32 %a) { 81; CHECK-LABEL: setnbcr6: 82; CHECK: # %bb.0: # %entry 83; CHECK-NEXT: cmpwi r3, 0 84; CHECK-NEXT: setnbcr r3, eq 85; CHECK-NEXT: blr 86entry: 87 %cmp = icmp uge i32 %a, 1 88 %conv = sext i1 %cmp to i64 89 ret i64 %conv 90} 91 92define signext i64 @setnbcr7(i64 %a) { 93; CHECK-LABEL: setnbcr7: 94; CHECK: # %bb.0: # %entry 95; CHECK-NEXT: cmpdi r3, 0 96; CHECK-NEXT: setnbcr r3, eq 97; CHECK-NEXT: blr 98entry: 99 %cmp = icmp uge i64 %a, 1 100 %conv = sext i1 %cmp to i64 101 ret i64 %conv 102} 103 104define signext i64 @setnbcr8(i16 %a) { 105; CHECK-LABEL: setnbcr8: 106; CHECK: # %bb.0: # %entry 107; CHECK-NEXT: andi. r3, r3, 65535 108; CHECK-NEXT: setnbcr r3, eq 109; CHECK-NEXT: blr 110entry: 111 %cmp = icmp uge i16 %a, 1 112 %conv = sext i1 %cmp to i64 113 ret i64 %conv 114} 115 116define dso_local void @setnbcr9(i8 %a) { 117; CHECK-LE-LABEL: setnbcr9: 118; CHECK-LE: # %bb.0: # %entry 119; CHECK-LE-NEXT: andi. r3, r3, 255 120; CHECK-LE-NEXT: setnbcr r3, eq 121; CHECK-LE-NEXT: pstb r3, globalVal@PCREL(0), 1 122; CHECK-LE-NEXT: blr 123; 124; CHECK-BE-LABEL: setnbcr9: 125; CHECK-BE: # %bb.0: # %entry 126; CHECK-BE-NEXT: andi. r3, r3, 255 127; CHECK-BE-NEXT: addis r4, r2, globalVal@toc@ha 128; CHECK-BE-NEXT: setnbcr r3, eq 129; CHECK-BE-NEXT: stb r3, globalVal@toc@l(r4) 130; CHECK-BE-NEXT: blr 131entry: 132 %cmp = icmp uge i8 %a, 1 133 %conv1 = sext i1 %cmp to i8 134 store i8 %conv1, i8* @globalVal, align 1 135 ret void 136} 137 138define dso_local void @setnbcr10(i32 %a) { 139; CHECK-LE-LABEL: setnbcr10: 140; CHECK-LE: # %bb.0: # %entry 141; CHECK-LE-NEXT: cmpwi r3, 0 142; CHECK-LE-NEXT: setnbcr r3, eq 143; CHECK-LE-NEXT: pstw r3, globalVal2@PCREL(0), 1 144; CHECK-LE-NEXT: blr 145; 146; CHECK-BE-LABEL: setnbcr10: 147; CHECK-BE: # %bb.0: # %entry 148; CHECK-BE-NEXT: cmpwi r3, 0 149; CHECK-BE-NEXT: addis r4, r2, globalVal2@toc@ha 150; CHECK-BE-NEXT: setnbcr r3, eq 151; CHECK-BE-NEXT: stw r3, globalVal2@toc@l(r4) 152; CHECK-BE-NEXT: blr 153entry: 154 %cmp = icmp uge i32 %a, 1 155 %conv1 = sext i1 %cmp to i32 156 store i32 %conv1, i32* @globalVal2, align 4 157 ret void 158} 159 160define dso_local void @setnbcr11(i64 %a) { 161; CHECK-LE-LABEL: setnbcr11: 162; CHECK-LE: # %bb.0: # %entry 163; CHECK-LE-NEXT: cmpdi r3, 0 164; CHECK-LE-NEXT: setnbcr r3, eq 165; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1 166; CHECK-LE-NEXT: blr 167; 168; CHECK-BE-LABEL: setnbcr11: 169; CHECK-BE: # %bb.0: # %entry 170; CHECK-BE-NEXT: cmpdi r3, 0 171; CHECK-BE-NEXT: addis r4, r2, globalVal3@toc@ha 172; CHECK-BE-NEXT: setnbcr r3, eq 173; CHECK-BE-NEXT: std r3, globalVal3@toc@l(r4) 174; CHECK-BE-NEXT: blr 175entry: 176 %cmp = icmp uge i64 %a, 1 177 %conv1 = sext i1 %cmp to i64 178 store i64 %conv1, i64* @globalVal3, align 8 179 ret void 180} 181 182define dso_local void @setnbcr12(i16 %a) { 183; CHECK-LE-LABEL: setnbcr12: 184; CHECK-LE: # %bb.0: # %entry 185; CHECK-LE-NEXT: andi. r3, r3, 65535 186; CHECK-LE-NEXT: setnbcr r3, eq 187; CHECK-LE-NEXT: psth r3, globalVal4@PCREL(0), 1 188; CHECK-LE-NEXT: blr 189; 190; CHECK-BE-LABEL: setnbcr12: 191; CHECK-BE: # %bb.0: # %entry 192; CHECK-BE-NEXT: andi. r3, r3, 65535 193; CHECK-BE-NEXT: addis r4, r2, globalVal4@toc@ha 194; CHECK-BE-NEXT: setnbcr r3, eq 195; CHECK-BE-NEXT: sth r3, globalVal4@toc@l(r4) 196; CHECK-BE-NEXT: blr 197entry: 198 %cmp = icmp uge i16 %a, 1 199 %conv1 = sext i1 %cmp to i16 200 store i16 %conv1, i16* @globalVal4, align 2 201 ret void 202} 203 204define dso_local signext i32 @setnbcr13(i8 %a) { 205; CHECK-LABEL: setnbcr13: 206; CHECK: # %bb.0: # %entry 207; CHECK-NEXT: clrlwi r3, r3, 24 208; CHECK-NEXT: cmpwi r3, 1 209; CHECK-NEXT: setnbcr r3, eq 210; CHECK-NEXT: blr 211entry: 212 %cmp = icmp ne i8 %a, 1 213 %conv = sext i1 %cmp to i32 214 ret i32 %conv 215} 216 217define dso_local signext i32 @setnbcr14(i32 %a) { 218; CHECK-LABEL: setnbcr14: 219; CHECK: # %bb.0: # %entry 220; CHECK-NEXT: cmpwi r3, 1 221; CHECK-NEXT: setnbcr r3, eq 222; CHECK-NEXT: blr 223entry: 224 %cmp = icmp ne i32 %a, 1 225 %conv = sext i1 %cmp to i32 226 ret i32 %conv 227} 228 229define dso_local signext i32 @setnbcr15(i64 %a) { 230; CHECK-LABEL: setnbcr15: 231; CHECK: # %bb.0: # %entry 232; CHECK-NEXT: cmpdi r3, 1 233; CHECK-NEXT: setnbcr r3, eq 234; CHECK-NEXT: blr 235entry: 236 %cmp = icmp ne i64 %a, 1 237 %conv = sext i1 %cmp to i32 238 ret i32 %conv 239} 240 241define dso_local signext i32 @setnbcr16(i16 %a) { 242; CHECK-LABEL: setnbcr16: 243; CHECK: # %bb.0: # %entry 244; CHECK-NEXT: clrlwi r3, r3, 16 245; CHECK-NEXT: cmpwi r3, 1 246; CHECK-NEXT: setnbcr r3, eq 247; CHECK-NEXT: blr 248entry: 249 %cmp = icmp ne i16 %a, 1 250 %conv = sext i1 %cmp to i32 251 ret i32 %conv 252} 253 254define signext i64 @setnbcr17(i8 %a) { 255; CHECK-LABEL: setnbcr17: 256; CHECK: # %bb.0: # %entry 257; CHECK-NEXT: clrlwi r3, r3, 24 258; CHECK-NEXT: cmpwi r3, 1 259; CHECK-NEXT: setnbcr r3, eq 260; CHECK-NEXT: blr 261entry: 262 %cmp = icmp ne i8 %a, 1 263 %conv = sext i1 %cmp to i64 264 ret i64 %conv 265} 266 267define signext i64 @setnbcr18(i32 %a) { 268; CHECK-LABEL: setnbcr18: 269; CHECK: # %bb.0: # %entry 270; CHECK-NEXT: cmpwi r3, 1 271; CHECK-NEXT: setnbcr r3, eq 272; CHECK-NEXT: blr 273entry: 274 %cmp = icmp ne i32 %a, 1 275 %conv = sext i1 %cmp to i64 276 ret i64 %conv 277} 278 279define signext i64 @setnbcr19(i64 %a) { 280; CHECK-LABEL: setnbcr19: 281; CHECK: # %bb.0: # %entry 282; CHECK-NEXT: cmpdi r3, 1 283; CHECK-NEXT: setnbcr r3, eq 284; CHECK-NEXT: blr 285entry: 286 %cmp = icmp ne i64 %a, 1 287 %conv = sext i1 %cmp to i64 288 ret i64 %conv 289} 290 291define signext i64 @setnbcr20(i16 %a) { 292; CHECK-LABEL: setnbcr20: 293; CHECK: # %bb.0: # %entry 294; CHECK-NEXT: clrlwi r3, r3, 16 295; CHECK-NEXT: cmpwi r3, 1 296; CHECK-NEXT: setnbcr r3, eq 297; CHECK-NEXT: blr 298entry: 299 %cmp = icmp ne i16 %a, 1 300 %conv = sext i1 %cmp to i64 301 ret i64 %conv 302} 303 304define dso_local void @setnbcr21(i8 %a) { 305; CHECK-LE-LABEL: setnbcr21: 306; CHECK-LE: # %bb.0: # %entry 307; CHECK-LE-NEXT: clrlwi r3, r3, 24 308; CHECK-LE-NEXT: cmpwi r3, 1 309; CHECK-LE-NEXT: setnbcr r3, eq 310; CHECK-LE-NEXT: pstb r3, globalVal@PCREL(0), 1 311; CHECK-LE-NEXT: blr 312; 313; CHECK-BE-LABEL: setnbcr21: 314; CHECK-BE: # %bb.0: # %entry 315; CHECK-BE-NEXT: clrlwi r3, r3, 24 316; CHECK-BE-NEXT: addis r4, r2, globalVal@toc@ha 317; CHECK-BE-NEXT: cmpwi r3, 1 318; CHECK-BE-NEXT: setnbcr r3, eq 319; CHECK-BE-NEXT: stb r3, globalVal@toc@l(r4) 320; CHECK-BE-NEXT: blr 321entry: 322 %cmp = icmp ne i8 %a, 1 323 %conv1 = sext i1 %cmp to i8 324 store i8 %conv1, i8* @globalVal, align 1 325 ret void 326} 327 328define dso_local void @setnbcr22(i32 %a) { 329; CHECK-LE-LABEL: setnbcr22: 330; CHECK-LE: # %bb.0: # %entry 331; CHECK-LE-NEXT: cmpwi r3, 1 332; CHECK-LE-NEXT: setnbcr r3, eq 333; CHECK-LE-NEXT: pstw r3, globalVal2@PCREL(0), 1 334; CHECK-LE-NEXT: blr 335; 336; CHECK-BE-LABEL: setnbcr22: 337; CHECK-BE: # %bb.0: # %entry 338; CHECK-BE-NEXT: cmpwi r3, 1 339; CHECK-BE-NEXT: addis r4, r2, globalVal2@toc@ha 340; CHECK-BE-NEXT: setnbcr r3, eq 341; CHECK-BE-NEXT: stw r3, globalVal2@toc@l(r4) 342; CHECK-BE-NEXT: blr 343entry: 344 %cmp = icmp ne i32 %a, 1 345 %conv1 = sext i1 %cmp to i32 346 store i32 %conv1, i32* @globalVal2, align 4 347 ret void 348} 349 350define dso_local void @setnbcr23(i64 %a) { 351; CHECK-LE-LABEL: setnbcr23: 352; CHECK-LE: # %bb.0: # %entry 353; CHECK-LE-NEXT: cmpdi r3, 1 354; CHECK-LE-NEXT: setnbcr r3, eq 355; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1 356; CHECK-LE-NEXT: blr 357; 358; CHECK-BE-LABEL: setnbcr23: 359; CHECK-BE: # %bb.0: # %entry 360; CHECK-BE-NEXT: cmpdi r3, 1 361; CHECK-BE-NEXT: addis r4, r2, globalVal3@toc@ha 362; CHECK-BE-NEXT: setnbcr r3, eq 363; CHECK-BE-NEXT: std r3, globalVal3@toc@l(r4) 364; CHECK-BE-NEXT: blr 365entry: 366 %cmp = icmp ne i64 %a, 1 367 %conv1 = sext i1 %cmp to i64 368 store i64 %conv1, i64* @globalVal3, align 8 369 ret void 370} 371 372define dso_local void @setnbcr24(i16 %a) { 373; CHECK-LE-LABEL: setnbcr24: 374; CHECK-LE: # %bb.0: # %entry 375; CHECK-LE-NEXT: clrlwi r3, r3, 16 376; CHECK-LE-NEXT: cmpwi r3, 1 377; CHECK-LE-NEXT: setnbcr r3, eq 378; CHECK-LE-NEXT: psth r3, globalVal4@PCREL(0), 1 379; CHECK-LE-NEXT: blr 380; 381; CHECK-BE-LABEL: setnbcr24: 382; CHECK-BE: # %bb.0: # %entry 383; CHECK-BE-NEXT: clrlwi r3, r3, 16 384; CHECK-BE-NEXT: addis r4, r2, globalVal4@toc@ha 385; CHECK-BE-NEXT: cmpwi r3, 1 386; CHECK-BE-NEXT: setnbcr r3, eq 387; CHECK-BE-NEXT: sth r3, globalVal4@toc@l(r4) 388; CHECK-BE-NEXT: blr 389entry: 390 %cmp = icmp ne i16 %a, 1 391 %conv1 = sext i1 %cmp to i16 392 store i16 %conv1, i16* @globalVal4, align 2 393 ret void 394} 395 396