1# RUN: llc -mtriple=powerpc64le-unknown-unknown -start-before ppc-pre-emit-peephole \
2# RUN:   -verify-machineinstrs -ppc-asm-full-reg-names %s -o - | FileCheck %s
3--- |
4  ; ModuleID = 't.ll'
5  source_filename = "t.ll"
6  target datalayout = "e-m:e-i64:64-n32:64"
7
8  define signext i32 @test(i32 signext %a, i32 signext %b, i32 signext %c) {
9  entry:
10    %cmp = icmp slt i32 %a, %b
11    br i1 %cmp, label %return, label %if.end
12
13  if.end:                                           ; preds = %entry
14    %cmp1 = icmp slt i32 %b, %a
15    br i1 %cmp1, label %return, label %if.end3
16
17  if.end3:                                          ; preds = %if.end
18    %cmp4 = icmp eq i32 %a, %c
19    br i1 %cmp4, label %if.then5, label %if.end6
20
21  if.then5:                                         ; preds = %if.end3
22    %add = shl nsw i32 %a, 1
23    br label %return
24
25  if.end6:                                          ; preds = %if.end3
26    %cmp7 = icmp sgt i32 %c, %b
27    %add11 = add i32 %c, %b
28    %add12 = select i1 %cmp7, i32 %a, i32 0
29    %spec.select = add i32 %add11, %add12
30    ret i32 %spec.select
31
32  return:                                           ; preds = %if.then5, %if.end, %entry
33    %retval.0 = phi i32 [ %add, %if.then5 ], [ %c, %entry ], [ %b, %if.end ]
34    ret i32 %retval.0
35  }
36
37...
38---
39name:            test
40alignment:       16
41exposesReturnsTwice: false
42legalized:       false
43regBankSelected: false
44selected:        false
45failedISel:      false
46tracksRegLiveness: true
47registers:
48liveins:
49  - { reg: '$x3', virtual-reg: '' }
50  - { reg: '$x4', virtual-reg: '' }
51  - { reg: '$x5', virtual-reg: '' }
52frameInfo:
53  isFrameAddressTaken: false
54  isReturnAddressTaken: false
55  hasStackMap:     false
56  hasPatchPoint:   false
57  stackSize:       0
58  offsetAdjustment: 0
59  maxAlignment:    0
60  adjustsStack:    false
61  hasCalls:        false
62  stackProtector:  ''
63  maxCallFrameSize: 0
64  hasOpaqueSPAdjustment: false
65  hasVAStart:      false
66  hasMustTailInVarArgFunc: false
67  localFrameSize:  0
68  savePoint:       ''
69  restorePoint:    ''
70fixedStack:
71stack:
72constants:
73body:             |
74  bb.0.entry:
75    successors: %bb.4(0x40000000), %bb.1(0x40000000)
76    liveins: $x3, $x4, $x5
77
78    renamable $cr0 = CMPW renamable $r3, renamable $r4
79    BCC 12, renamable $cr0, %bb.4
80
81  bb.1.if.end:
82    successors: %bb.6(0x40000000), %bb.2(0x40000000)
83    liveins: $cr0, $x3, $x4, $x5
84
85    BCC 36, killed renamable $cr0, %bb.2
86
87  bb.6:
88    liveins: $x4
89
90    ; CHECK: mr r5, r4
91    ; CHECK-NOT: mr r5, r5
92    ; CHECK: extsw r3, r5
93    $r5 = OR killed $r4, $r4, implicit $x4, implicit-def $x5
94    $r5 = OR $r5, $r5, implicit-def $x5
95    renamable $x3 = EXTSW_32_64 killed renamable $r5, implicit $x5
96    BLR8 implicit $lr8, implicit $rm, implicit killed $x3
97
98  bb.2.if.end3:
99    successors: %bb.3(0x40000000), %bb.5(0x40000000)
100    liveins: $x3, $x4, $x5
101
102    renamable $cr0 = CMPLW renamable $r3, renamable $r5
103    BCC 68, killed renamable $cr0, %bb.5
104
105  bb.3.if.then5:
106    successors: %bb.4(0x80000000)
107    liveins: $x3
108
109    renamable $r5 = RLWINM killed renamable $r3, 1, 0, 30, implicit $x3, implicit-def $x5
110
111  bb.4.return:
112    liveins: $x5
113
114    renamable $x3 = EXTSW_32_64 killed renamable $r5, implicit $x5
115    BLR8 implicit $lr8, implicit $rm, implicit killed $x3
116
117  bb.5.if.end6:
118    liveins: $x3, $x4, $x5
119
120    renamable $cr0 = CMPW renamable $r5, renamable $r4
121    renamable $r6 = LI 0
122    renamable $r4 = ADD4 killed renamable $r5, killed renamable $r4, implicit $x4, implicit $x5
123    renamable $r3 = ISEL killed renamable $r3, killed renamable $r6, killed renamable $cr0gt, implicit $cr0, implicit $x3
124    renamable $r3 = ADD4 killed renamable $r4, killed renamable $r3
125    renamable $x3 = EXTSW_32_64 killed renamable $r3
126    BLR8 implicit $lr8, implicit $rm, implicit killed $x3
127
128...
129