1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-BE \
4; RUN:   --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
6; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-LE \
7; RUN:   --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
8@glob = dso_local local_unnamed_addr global i16 0, align 2
9
10define dso_local signext i32 @test_iless(i16 signext %a, i16 signext %b) {
11; CHECK-LABEL: test_iless:
12; CHECK:       # %bb.0: # %entry
13; CHECK-NEXT:    sub r3, r4, r3
14; CHECK-NEXT:    rldicl r3, r3, 1, 63
15; CHECK-NEXT:    xori r3, r3, 1
16; CHECK-NEXT:    blr
17; CHECK-BE-LABEL: test_iless:
18; CHECK-BE:       # %bb.0: # %entry
19; CHECK-BE-NEXT:    sub r3, r4, r3
20; CHECK-BE-NEXT:    rldicl r3, r3, 1, 63
21; CHECK-BE-NEXT:    xori r3, r3, 1
22; CHECK-BE-NEXT:    blr
23;
24; CHECK-LE-LABEL: test_iless:
25; CHECK-LE:       # %bb.0: # %entry
26; CHECK-LE-NEXT:    sub r3, r4, r3
27; CHECK-LE-NEXT:    rldicl r3, r3, 1, 63
28; CHECK-LE-NEXT:    xori r3, r3, 1
29; CHECK-LE-NEXT:    blr
30entry:
31  %cmp = icmp sle i16 %a, %b
32  %conv2 = zext i1 %cmp to i32
33  ret i32 %conv2
34}
35
36define dso_local signext i32 @test_iless_sext(i16 signext %a, i16 signext %b) {
37; CHECK-LABEL: test_iless_sext:
38; CHECK:       # %bb.0: # %entry
39; CHECK-NEXT:    sub r3, r4, r3
40; CHECK-NEXT:    rldicl r3, r3, 1, 63
41; CHECK-NEXT:    addi r3, r3, -1
42; CHECK-NEXT:    blr
43; CHECK-BE-LABEL: test_iless_sext:
44; CHECK-BE:       # %bb.0: # %entry
45; CHECK-BE-NEXT:    sub r3, r4, r3
46; CHECK-BE-NEXT:    rldicl r3, r3, 1, 63
47; CHECK-BE-NEXT:    addi r3, r3, -1
48; CHECK-BE-NEXT:    blr
49;
50; CHECK-LE-LABEL: test_iless_sext:
51; CHECK-LE:       # %bb.0: # %entry
52; CHECK-LE-NEXT:    sub r3, r4, r3
53; CHECK-LE-NEXT:    rldicl r3, r3, 1, 63
54; CHECK-LE-NEXT:    addi r3, r3, -1
55; CHECK-LE-NEXT:    blr
56entry:
57  %cmp = icmp sle i16 %a, %b
58  %sub = sext i1 %cmp to i32
59  ret i32 %sub
60}
61
62define dso_local void @test_iless_store(i16 signext %a, i16 signext %b) {
63; CHECK-LABEL: test_iless_store:
64; CHECK:       # %bb.0: # %entry
65; CHECK-NEXT:    sub r3, r4, r3
66; CHECK-NEXT:    addis r5, r2, glob@toc@ha
67; CHECK-NEXT:    rldicl r3, r3, 1, 63
68; CHECK-NEXT:    xori r3, r3, 1
69; CHECK-NEXT:    sth r3, glob@toc@l(r5)
70; CHECK-NEXT:    blr
71; CHECK-BE-LABEL: test_iless_store:
72; CHECK-BE:       # %bb.0: # %entry
73; CHECK-BE-NEXT:    sub r3, r4, r3
74; CHECK-BE-NEXT:    addis r5, r2, glob@toc@ha
75; CHECK-BE-NEXT:    rldicl r3, r3, 1, 63
76; CHECK-BE-NEXT:    xori r3, r3, 1
77; CHECK-BE-NEXT:    sth r3, glob@toc@l(r5)
78; CHECK-BE-NEXT:    blr
79;
80; CHECK-LE-LABEL: test_iless_store:
81; CHECK-LE:       # %bb.0: # %entry
82; CHECK-LE-NEXT:    sub r3, r4, r3
83; CHECK-LE-NEXT:    addis r5, r2, glob@toc@ha
84; CHECK-LE-NEXT:    rldicl r3, r3, 1, 63
85; CHECK-LE-NEXT:    xori r3, r3, 1
86; CHECK-LE-NEXT:    sth r3, glob@toc@l(r5)
87; CHECK-LE-NEXT:    blr
88entry:
89  %cmp = icmp sle i16 %a, %b
90  %conv3 = zext i1 %cmp to i16
91  store i16 %conv3, i16* @glob, align 2
92  ret void
93}
94
95define dso_local void @test_iless_sext_store(i16 signext %a, i16 signext %b) {
96; CHECK-LABEL: test_iless_sext_store:
97; CHECK:       # %bb.0: # %entry
98; CHECK-NEXT:    sub r3, r4, r3
99; CHECK-NEXT:    addis r5, r2, glob@toc@ha
100; CHECK-NEXT:    rldicl r3, r3, 1, 63
101; CHECK-NEXT:    addi r3, r3, -1
102; CHECK-NEXT:    sth r3, glob@toc@l(r5)
103; CHECK-NEXT:    blr
104; CHECK-BE-LABEL: test_iless_sext_store:
105; CHECK-BE:       # %bb.0: # %entry
106; CHECK-BE-NEXT:    sub r3, r4, r3
107; CHECK-BE-NEXT:    addis r5, r2, glob@toc@ha
108; CHECK-BE-NEXT:    rldicl r3, r3, 1, 63
109; CHECK-BE-NEXT:    addi r3, r3, -1
110; CHECK-BE-NEXT:    sth r3, glob@toc@l(r5)
111; CHECK-BE-NEXT:    blr
112;
113; CHECK-LE-LABEL: test_iless_sext_store:
114; CHECK-LE:       # %bb.0: # %entry
115; CHECK-LE-NEXT:    sub r3, r4, r3
116; CHECK-LE-NEXT:    addis r5, r2, glob@toc@ha
117; CHECK-LE-NEXT:    rldicl r3, r3, 1, 63
118; CHECK-LE-NEXT:    addi r3, r3, -1
119; CHECK-LE-NEXT:    sth r3, glob@toc@l(r5)
120; CHECK-LE-NEXT:    blr
121entry:
122  %cmp = icmp sle i16 %a, %b
123  %conv3 = sext i1 %cmp to i16
124  store i16 %conv3, i16* @glob, align 2
125  ret void
126}
127