1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ 3; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names < %s | FileCheck %s 4define dso_local <4 x i32> @test(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) { 5; CHECK-LABEL: test: 6; CHECK: # %bb.0: # %entry 7; CHECK-NEXT: xxsel vs34, vs34, vs35, vs36 8; CHECK-NEXT: blr 9entry: 10 %neg.i = xor <4 x i32> %c, <i32 -1, i32 -1, i32 -1, i32 -1> 11 %and.i = and <4 x i32> %neg.i, %a 12 %and1.i = and <4 x i32> %c, %b 13 %or.i = or <4 x i32> %and1.i, %and.i 14 ret <4 x i32> %or.i 15} 16 17define dso_local <8 x i16> @test2(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) { 18; CHECK-LABEL: test2: 19; CHECK: # %bb.0: # %entry 20; CHECK-NEXT: xxsel vs34, vs34, vs35, vs36 21; CHECK-NEXT: blr 22entry: 23 %neg.i = xor <8 x i16> %c, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> 24 %and.i = and <8 x i16> %a, %neg.i 25 %and1.i = and <8 x i16> %c, %b 26 %or.i = or <8 x i16> %and.i, %and1.i 27 ret <8 x i16> %or.i 28} 29 30define dso_local <16 x i8> @test3(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) { 31; CHECK-LABEL: test3: 32; CHECK: # %bb.0: # %entry 33; CHECK-NEXT: xxsel vs34, vs34, vs35, vs36 34; CHECK-NEXT: blr 35entry: 36 %neg.i = xor <16 x i8> %c, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> 37 %and.i = and <16 x i8> %neg.i, %a 38 %and1.i = and <16 x i8> %c, %b 39 %or.i = or <16 x i8> %and.i, %and1.i 40 ret <16 x i8> %or.i 41} 42 43define dso_local <2 x i64> @test4(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) { 44; CHECK-LABEL: test4: 45; CHECK: # %bb.0: # %entry 46; CHECK-NEXT: xxsel vs34, vs34, vs35, vs36 47; CHECK-NEXT: blr 48entry: 49 %neg.i = xor <2 x i64> %c, <i64 -1, i64 -1> 50 %and.i = and <2 x i64> %a, %neg.i 51 %and1.i = and <2 x i64> %c, %b 52 %or.i = or <2 x i64> %and.i, %and1.i 53 ret <2 x i64> %or.i 54} 55 56; Not valid to emit XXSEL for this illegal type. 57define dso_local <4 x i1> @test5(<4 x i1> %a, <4 x i1> %b, <4 x i1> %c) { 58; CHECK-LABEL: test5: 59; CHECK: # %bb.0: # %entry 60; CHECK-NEXT: vspltisw v5, 1 61; CHECK-NEXT: xxland vs0, vs36, vs35 62; CHECK-NEXT: xxlxor vs1, vs36, vs37 63; CHECK-NEXT: xxland vs1, vs34, vs1 64; CHECK-NEXT: xxlor vs34, vs1, vs0 65; CHECK-NEXT: blr 66entry: 67 %neg.i = xor <4 x i1> %c, <i1 -1, i1 -1, i1 -1, i1 -1> 68 %and.i = and <4 x i1> %a, %neg.i 69 %and1.i = and <4 x i1> %c, %b 70 %or.i = or <4 x i1> %and.i, %and1.i 71 ret <4 x i1> %or.i 72} 73