1// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
2
3v_cndmask_b32 v5, v1, v2, vcc
4// CHECK: [0x01,0x05,0x0a,0x00]
5
6v_cndmask_b32 v255, v1, v2, vcc
7// CHECK: [0x01,0x05,0xfe,0x01]
8
9v_cndmask_b32 v5, v255, v2, vcc
10// CHECK: [0xff,0x05,0x0a,0x00]
11
12v_cndmask_b32 v5, 0, v2, vcc
13// CHECK: [0x80,0x04,0x0a,0x00]
14
15v_cndmask_b32 v5, -1, v2, vcc
16// CHECK: [0xc1,0x04,0x0a,0x00]
17
18v_cndmask_b32 v5, 0.5, v2, vcc
19// CHECK: [0xf0,0x04,0x0a,0x00]
20
21v_cndmask_b32 v5, -4.0, v2, vcc
22// CHECK: [0xf7,0x04,0x0a,0x00]
23
24v_cndmask_b32 v5, src_lds_direct, v2, vcc
25// CHECK: [0xfe,0x04,0x0a,0x00]
26
27v_cndmask_b32 v5, v1, v255, vcc
28// CHECK: [0x01,0xff,0x0b,0x00]
29
30v_add_f32 v5, v1, v2
31// CHECK: [0x01,0x05,0x0a,0x02]
32
33v_add_f32 v255, v1, v2
34// CHECK: [0x01,0x05,0xfe,0x03]
35
36v_add_f32 v5, v255, v2
37// CHECK: [0xff,0x05,0x0a,0x02]
38
39v_add_f32 v5, s1, v2
40// CHECK: [0x01,0x04,0x0a,0x02]
41
42v_add_f32 v5, s101, v2
43// CHECK: [0x65,0x04,0x0a,0x02]
44
45v_add_f32 v5, flat_scratch_lo, v2
46// CHECK: [0x66,0x04,0x0a,0x02]
47
48v_add_f32 v5, flat_scratch_hi, v2
49// CHECK: [0x67,0x04,0x0a,0x02]
50
51v_add_f32 v5, vcc_lo, v2
52// CHECK: [0x6a,0x04,0x0a,0x02]
53
54v_add_f32 v5, vcc_hi, v2
55// CHECK: [0x6b,0x04,0x0a,0x02]
56
57v_add_f32 v5, tba_lo, v2
58// CHECK: [0x6c,0x04,0x0a,0x02]
59
60v_add_f32 v5, tba_hi, v2
61// CHECK: [0x6d,0x04,0x0a,0x02]
62
63v_add_f32 v5, tma_lo, v2
64// CHECK: [0x6e,0x04,0x0a,0x02]
65
66v_add_f32 v5, tma_hi, v2
67// CHECK: [0x6f,0x04,0x0a,0x02]
68
69v_add_f32 v5, ttmp11, v2
70// CHECK: [0x7b,0x04,0x0a,0x02]
71
72v_add_f32 v5, m0, v2
73// CHECK: [0x7c,0x04,0x0a,0x02]
74
75v_add_f32 v5, exec_lo, v2
76// CHECK: [0x7e,0x04,0x0a,0x02]
77
78v_add_f32 v5, exec_hi, v2
79// CHECK: [0x7f,0x04,0x0a,0x02]
80
81v_add_f32 v5, 0, v2
82// CHECK: [0x80,0x04,0x0a,0x02]
83
84v_add_f32 v5, -1, v2
85// CHECK: [0xc1,0x04,0x0a,0x02]
86
87v_add_f32 v5, 0.5, v2
88// CHECK: [0xf0,0x04,0x0a,0x02]
89
90v_add_f32 v5, -4.0, v2
91// CHECK: [0xf7,0x04,0x0a,0x02]
92
93v_add_f32 v5, src_vccz, v2
94// CHECK: [0xfb,0x04,0x0a,0x02]
95
96v_add_f32 v5, src_execz, v2
97// CHECK: [0xfc,0x04,0x0a,0x02]
98
99v_add_f32 v5, src_scc, v2
100// CHECK: [0xfd,0x04,0x0a,0x02]
101
102v_add_f32 v5, src_lds_direct, v2
103// CHECK: [0xfe,0x04,0x0a,0x02]
104
105v_add_f32 v5, 0xaf123456, v2
106// CHECK: [0xff,0x04,0x0a,0x02,0x56,0x34,0x12,0xaf]
107
108v_add_f32 v5, 0x3f717273, v2
109// CHECK: [0xff,0x04,0x0a,0x02,0x73,0x72,0x71,0x3f]
110
111v_add_f32 v5, v1, v255
112// CHECK: [0x01,0xff,0x0b,0x02]
113
114v_sub_f32 v5, v1, v2
115// CHECK: [0x01,0x05,0x0a,0x04]
116
117v_sub_f32 v255, v1, v2
118// CHECK: [0x01,0x05,0xfe,0x05]
119
120v_sub_f32 v5, v255, v2
121// CHECK: [0xff,0x05,0x0a,0x04]
122
123v_sub_f32 v5, s1, v2
124// CHECK: [0x01,0x04,0x0a,0x04]
125
126v_sub_f32 v5, s101, v2
127// CHECK: [0x65,0x04,0x0a,0x04]
128
129v_sub_f32 v5, flat_scratch_lo, v2
130// CHECK: [0x66,0x04,0x0a,0x04]
131
132v_sub_f32 v5, flat_scratch_hi, v2
133// CHECK: [0x67,0x04,0x0a,0x04]
134
135v_sub_f32 v5, vcc_lo, v2
136// CHECK: [0x6a,0x04,0x0a,0x04]
137
138v_sub_f32 v5, vcc_hi, v2
139// CHECK: [0x6b,0x04,0x0a,0x04]
140
141v_sub_f32 v5, tba_lo, v2
142// CHECK: [0x6c,0x04,0x0a,0x04]
143
144v_sub_f32 v5, tba_hi, v2
145// CHECK: [0x6d,0x04,0x0a,0x04]
146
147v_sub_f32 v5, tma_lo, v2
148// CHECK: [0x6e,0x04,0x0a,0x04]
149
150v_sub_f32 v5, tma_hi, v2
151// CHECK: [0x6f,0x04,0x0a,0x04]
152
153v_sub_f32 v5, ttmp11, v2
154// CHECK: [0x7b,0x04,0x0a,0x04]
155
156v_sub_f32 v5, m0, v2
157// CHECK: [0x7c,0x04,0x0a,0x04]
158
159v_sub_f32 v5, exec_lo, v2
160// CHECK: [0x7e,0x04,0x0a,0x04]
161
162v_sub_f32 v5, exec_hi, v2
163// CHECK: [0x7f,0x04,0x0a,0x04]
164
165v_sub_f32 v5, 0, v2
166// CHECK: [0x80,0x04,0x0a,0x04]
167
168v_sub_f32 v5, -1, v2
169// CHECK: [0xc1,0x04,0x0a,0x04]
170
171v_sub_f32 v5, 0.5, v2
172// CHECK: [0xf0,0x04,0x0a,0x04]
173
174v_sub_f32 v5, -4.0, v2
175// CHECK: [0xf7,0x04,0x0a,0x04]
176
177v_sub_f32 v5, src_vccz, v2
178// CHECK: [0xfb,0x04,0x0a,0x04]
179
180v_sub_f32 v5, src_execz, v2
181// CHECK: [0xfc,0x04,0x0a,0x04]
182
183v_sub_f32 v5, src_scc, v2
184// CHECK: [0xfd,0x04,0x0a,0x04]
185
186v_sub_f32 v5, src_lds_direct, v2
187// CHECK: [0xfe,0x04,0x0a,0x04]
188
189v_sub_f32 v5, 0xaf123456, v2
190// CHECK: [0xff,0x04,0x0a,0x04,0x56,0x34,0x12,0xaf]
191
192v_sub_f32 v5, 0x3f717273, v2
193// CHECK: [0xff,0x04,0x0a,0x04,0x73,0x72,0x71,0x3f]
194
195v_sub_f32 v5, v1, v255
196// CHECK: [0x01,0xff,0x0b,0x04]
197
198v_subrev_f32 v5, v1, v2
199// CHECK: [0x01,0x05,0x0a,0x06]
200
201v_subrev_f32 v255, v1, v2
202// CHECK: [0x01,0x05,0xfe,0x07]
203
204v_subrev_f32 v5, v255, v2
205// CHECK: [0xff,0x05,0x0a,0x06]
206
207v_subrev_f32 v5, s1, v2
208// CHECK: [0x01,0x04,0x0a,0x06]
209
210v_subrev_f32 v5, s101, v2
211// CHECK: [0x65,0x04,0x0a,0x06]
212
213v_subrev_f32 v5, flat_scratch_lo, v2
214// CHECK: [0x66,0x04,0x0a,0x06]
215
216v_subrev_f32 v5, flat_scratch_hi, v2
217// CHECK: [0x67,0x04,0x0a,0x06]
218
219v_subrev_f32 v5, vcc_lo, v2
220// CHECK: [0x6a,0x04,0x0a,0x06]
221
222v_subrev_f32 v5, vcc_hi, v2
223// CHECK: [0x6b,0x04,0x0a,0x06]
224
225v_subrev_f32 v5, tba_lo, v2
226// CHECK: [0x6c,0x04,0x0a,0x06]
227
228v_subrev_f32 v5, tba_hi, v2
229// CHECK: [0x6d,0x04,0x0a,0x06]
230
231v_subrev_f32 v5, tma_lo, v2
232// CHECK: [0x6e,0x04,0x0a,0x06]
233
234v_subrev_f32 v5, tma_hi, v2
235// CHECK: [0x6f,0x04,0x0a,0x06]
236
237v_subrev_f32 v5, ttmp11, v2
238// CHECK: [0x7b,0x04,0x0a,0x06]
239
240v_subrev_f32 v5, m0, v2
241// CHECK: [0x7c,0x04,0x0a,0x06]
242
243v_subrev_f32 v5, exec_lo, v2
244// CHECK: [0x7e,0x04,0x0a,0x06]
245
246v_subrev_f32 v5, exec_hi, v2
247// CHECK: [0x7f,0x04,0x0a,0x06]
248
249v_subrev_f32 v5, 0, v2
250// CHECK: [0x80,0x04,0x0a,0x06]
251
252v_subrev_f32 v5, -1, v2
253// CHECK: [0xc1,0x04,0x0a,0x06]
254
255v_subrev_f32 v5, 0.5, v2
256// CHECK: [0xf0,0x04,0x0a,0x06]
257
258v_subrev_f32 v5, -4.0, v2
259// CHECK: [0xf7,0x04,0x0a,0x06]
260
261v_subrev_f32 v5, src_vccz, v2
262// CHECK: [0xfb,0x04,0x0a,0x06]
263
264v_subrev_f32 v5, src_execz, v2
265// CHECK: [0xfc,0x04,0x0a,0x06]
266
267v_subrev_f32 v5, src_scc, v2
268// CHECK: [0xfd,0x04,0x0a,0x06]
269
270v_subrev_f32 v5, 0xaf123456, v2
271// CHECK: [0xff,0x04,0x0a,0x06,0x56,0x34,0x12,0xaf]
272
273v_subrev_f32 v5, 0x3f717273, v2
274// CHECK: [0xff,0x04,0x0a,0x06,0x73,0x72,0x71,0x3f]
275
276v_subrev_f32 v5, v1, v255
277// CHECK: [0x01,0xff,0x0b,0x06]
278
279v_mul_legacy_f32 v5, v1, v2
280// CHECK: [0x01,0x05,0x0a,0x08]
281
282v_mul_legacy_f32 v255, v1, v2
283// CHECK: [0x01,0x05,0xfe,0x09]
284
285v_mul_legacy_f32 v5, v255, v2
286// CHECK: [0xff,0x05,0x0a,0x08]
287
288v_mul_legacy_f32 v5, s1, v2
289// CHECK: [0x01,0x04,0x0a,0x08]
290
291v_mul_legacy_f32 v5, s101, v2
292// CHECK: [0x65,0x04,0x0a,0x08]
293
294v_mul_legacy_f32 v5, flat_scratch_lo, v2
295// CHECK: [0x66,0x04,0x0a,0x08]
296
297v_mul_legacy_f32 v5, flat_scratch_hi, v2
298// CHECK: [0x67,0x04,0x0a,0x08]
299
300v_mul_legacy_f32 v5, vcc_lo, v2
301// CHECK: [0x6a,0x04,0x0a,0x08]
302
303v_mul_legacy_f32 v5, vcc_hi, v2
304// CHECK: [0x6b,0x04,0x0a,0x08]
305
306v_mul_legacy_f32 v5, tba_lo, v2
307// CHECK: [0x6c,0x04,0x0a,0x08]
308
309v_mul_legacy_f32 v5, tba_hi, v2
310// CHECK: [0x6d,0x04,0x0a,0x08]
311
312v_mul_legacy_f32 v5, tma_lo, v2
313// CHECK: [0x6e,0x04,0x0a,0x08]
314
315v_mul_legacy_f32 v5, tma_hi, v2
316// CHECK: [0x6f,0x04,0x0a,0x08]
317
318v_mul_legacy_f32 v5, ttmp11, v2
319// CHECK: [0x7b,0x04,0x0a,0x08]
320
321v_mul_legacy_f32 v5, m0, v2
322// CHECK: [0x7c,0x04,0x0a,0x08]
323
324v_mul_legacy_f32 v5, exec_lo, v2
325// CHECK: [0x7e,0x04,0x0a,0x08]
326
327v_mul_legacy_f32 v5, exec_hi, v2
328// CHECK: [0x7f,0x04,0x0a,0x08]
329
330v_mul_legacy_f32 v5, 0, v2
331// CHECK: [0x80,0x04,0x0a,0x08]
332
333v_mul_legacy_f32 v5, -1, v2
334// CHECK: [0xc1,0x04,0x0a,0x08]
335
336v_mul_legacy_f32 v5, 0.5, v2
337// CHECK: [0xf0,0x04,0x0a,0x08]
338
339v_mul_legacy_f32 v5, -4.0, v2
340// CHECK: [0xf7,0x04,0x0a,0x08]
341
342v_mul_legacy_f32 v5, src_vccz, v2
343// CHECK: [0xfb,0x04,0x0a,0x08]
344
345v_mul_legacy_f32 v5, src_execz, v2
346// CHECK: [0xfc,0x04,0x0a,0x08]
347
348v_mul_legacy_f32 v5, src_scc, v2
349// CHECK: [0xfd,0x04,0x0a,0x08]
350
351v_mul_legacy_f32 v5, src_lds_direct, v2
352// CHECK: [0xfe,0x04,0x0a,0x08]
353
354v_mul_legacy_f32 v5, 0xaf123456, v2
355// CHECK: [0xff,0x04,0x0a,0x08,0x56,0x34,0x12,0xaf]
356
357v_mul_legacy_f32 v5, 0x3f717273, v2
358// CHECK: [0xff,0x04,0x0a,0x08,0x73,0x72,0x71,0x3f]
359
360v_mul_legacy_f32 v5, v1, v255
361// CHECK: [0x01,0xff,0x0b,0x08]
362
363v_mul_f32 v5, v1, v2
364// CHECK: [0x01,0x05,0x0a,0x0a]
365
366v_mul_f32 v255, v1, v2
367// CHECK: [0x01,0x05,0xfe,0x0b]
368
369v_mul_f32 v5, v255, v2
370// CHECK: [0xff,0x05,0x0a,0x0a]
371
372v_mul_f32 v5, s1, v2
373// CHECK: [0x01,0x04,0x0a,0x0a]
374
375v_mul_f32 v5, s101, v2
376// CHECK: [0x65,0x04,0x0a,0x0a]
377
378v_mul_f32 v5, flat_scratch_lo, v2
379// CHECK: [0x66,0x04,0x0a,0x0a]
380
381v_mul_f32 v5, flat_scratch_hi, v2
382// CHECK: [0x67,0x04,0x0a,0x0a]
383
384v_mul_f32 v5, vcc_lo, v2
385// CHECK: [0x6a,0x04,0x0a,0x0a]
386
387v_mul_f32 v5, vcc_hi, v2
388// CHECK: [0x6b,0x04,0x0a,0x0a]
389
390v_mul_f32 v5, tba_lo, v2
391// CHECK: [0x6c,0x04,0x0a,0x0a]
392
393v_mul_f32 v5, tba_hi, v2
394// CHECK: [0x6d,0x04,0x0a,0x0a]
395
396v_mul_f32 v5, tma_lo, v2
397// CHECK: [0x6e,0x04,0x0a,0x0a]
398
399v_mul_f32 v5, tma_hi, v2
400// CHECK: [0x6f,0x04,0x0a,0x0a]
401
402v_mul_f32 v5, ttmp11, v2
403// CHECK: [0x7b,0x04,0x0a,0x0a]
404
405v_mul_f32 v5, m0, v2
406// CHECK: [0x7c,0x04,0x0a,0x0a]
407
408v_mul_f32 v5, exec_lo, v2
409// CHECK: [0x7e,0x04,0x0a,0x0a]
410
411v_mul_f32 v5, exec_hi, v2
412// CHECK: [0x7f,0x04,0x0a,0x0a]
413
414v_mul_f32 v5, 0, v2
415// CHECK: [0x80,0x04,0x0a,0x0a]
416
417v_mul_f32 v5, -1, v2
418// CHECK: [0xc1,0x04,0x0a,0x0a]
419
420v_mul_f32 v5, 0.5, v2
421// CHECK: [0xf0,0x04,0x0a,0x0a]
422
423v_mul_f32 v5, -4.0, v2
424// CHECK: [0xf7,0x04,0x0a,0x0a]
425
426v_mul_f32 v5, src_vccz, v2
427// CHECK: [0xfb,0x04,0x0a,0x0a]
428
429v_mul_f32 v5, src_execz, v2
430// CHECK: [0xfc,0x04,0x0a,0x0a]
431
432v_mul_f32 v5, src_scc, v2
433// CHECK: [0xfd,0x04,0x0a,0x0a]
434
435v_mul_f32 v5, src_lds_direct, v2
436// CHECK: [0xfe,0x04,0x0a,0x0a]
437
438v_mul_f32 v5, 0xaf123456, v2
439// CHECK: [0xff,0x04,0x0a,0x0a,0x56,0x34,0x12,0xaf]
440
441v_mul_f32 v5, 0x3f717273, v2
442// CHECK: [0xff,0x04,0x0a,0x0a,0x73,0x72,0x71,0x3f]
443
444v_mul_f32 v5, v1, v255
445// CHECK: [0x01,0xff,0x0b,0x0a]
446
447v_mul_i32_i24 v5, v1, v2
448// CHECK: [0x01,0x05,0x0a,0x0c]
449
450v_mul_i32_i24 v255, v1, v2
451// CHECK: [0x01,0x05,0xfe,0x0d]
452
453v_mul_i32_i24 v5, v255, v2
454// CHECK: [0xff,0x05,0x0a,0x0c]
455
456v_mul_i32_i24 v5, s1, v2
457// CHECK: [0x01,0x04,0x0a,0x0c]
458
459v_mul_i32_i24 v5, s101, v2
460// CHECK: [0x65,0x04,0x0a,0x0c]
461
462v_mul_i32_i24 v5, flat_scratch_lo, v2
463// CHECK: [0x66,0x04,0x0a,0x0c]
464
465v_mul_i32_i24 v5, flat_scratch_hi, v2
466// CHECK: [0x67,0x04,0x0a,0x0c]
467
468v_mul_i32_i24 v5, vcc_lo, v2
469// CHECK: [0x6a,0x04,0x0a,0x0c]
470
471v_mul_i32_i24 v5, vcc_hi, v2
472// CHECK: [0x6b,0x04,0x0a,0x0c]
473
474v_mul_i32_i24 v5, tba_lo, v2
475// CHECK: [0x6c,0x04,0x0a,0x0c]
476
477v_mul_i32_i24 v5, tba_hi, v2
478// CHECK: [0x6d,0x04,0x0a,0x0c]
479
480v_mul_i32_i24 v5, tma_lo, v2
481// CHECK: [0x6e,0x04,0x0a,0x0c]
482
483v_mul_i32_i24 v5, tma_hi, v2
484// CHECK: [0x6f,0x04,0x0a,0x0c]
485
486v_mul_i32_i24 v5, ttmp11, v2
487// CHECK: [0x7b,0x04,0x0a,0x0c]
488
489v_mul_i32_i24 v5, m0, v2
490// CHECK: [0x7c,0x04,0x0a,0x0c]
491
492v_mul_i32_i24 v5, exec_lo, v2
493// CHECK: [0x7e,0x04,0x0a,0x0c]
494
495v_mul_i32_i24 v5, exec_hi, v2
496// CHECK: [0x7f,0x04,0x0a,0x0c]
497
498v_mul_i32_i24 v5, 0, v2
499// CHECK: [0x80,0x04,0x0a,0x0c]
500
501v_mul_i32_i24 v5, -1, v2
502// CHECK: [0xc1,0x04,0x0a,0x0c]
503
504v_mul_i32_i24 v5, 0.5, v2
505// CHECK: [0xf0,0x04,0x0a,0x0c]
506
507v_mul_i32_i24 v5, -4.0, v2
508// CHECK: [0xf7,0x04,0x0a,0x0c]
509
510v_mul_i32_i24 v5, src_vccz, v2
511// CHECK: [0xfb,0x04,0x0a,0x0c]
512
513v_mul_i32_i24 v5, src_execz, v2
514// CHECK: [0xfc,0x04,0x0a,0x0c]
515
516v_mul_i32_i24 v5, src_scc, v2
517// CHECK: [0xfd,0x04,0x0a,0x0c]
518
519v_mul_i32_i24 v5, src_lds_direct, v2
520// CHECK: [0xfe,0x04,0x0a,0x0c]
521
522v_mul_i32_i24 v5, 0xaf123456, v2
523// CHECK: [0xff,0x04,0x0a,0x0c,0x56,0x34,0x12,0xaf]
524
525v_mul_i32_i24 v5, 0x3f717273, v2
526// CHECK: [0xff,0x04,0x0a,0x0c,0x73,0x72,0x71,0x3f]
527
528v_mul_i32_i24 v5, v1, v255
529// CHECK: [0x01,0xff,0x0b,0x0c]
530
531v_mul_hi_i32_i24 v5, v1, v2
532// CHECK: [0x01,0x05,0x0a,0x0e]
533
534v_mul_hi_i32_i24 v255, v1, v2
535// CHECK: [0x01,0x05,0xfe,0x0f]
536
537v_mul_hi_i32_i24 v5, v255, v2
538// CHECK: [0xff,0x05,0x0a,0x0e]
539
540v_mul_hi_i32_i24 v5, s1, v2
541// CHECK: [0x01,0x04,0x0a,0x0e]
542
543v_mul_hi_i32_i24 v5, s101, v2
544// CHECK: [0x65,0x04,0x0a,0x0e]
545
546v_mul_hi_i32_i24 v5, flat_scratch_lo, v2
547// CHECK: [0x66,0x04,0x0a,0x0e]
548
549v_mul_hi_i32_i24 v5, flat_scratch_hi, v2
550// CHECK: [0x67,0x04,0x0a,0x0e]
551
552v_mul_hi_i32_i24 v5, vcc_lo, v2
553// CHECK: [0x6a,0x04,0x0a,0x0e]
554
555v_mul_hi_i32_i24 v5, vcc_hi, v2
556// CHECK: [0x6b,0x04,0x0a,0x0e]
557
558v_mul_hi_i32_i24 v5, tba_lo, v2
559// CHECK: [0x6c,0x04,0x0a,0x0e]
560
561v_mul_hi_i32_i24 v5, tba_hi, v2
562// CHECK: [0x6d,0x04,0x0a,0x0e]
563
564v_mul_hi_i32_i24 v5, tma_lo, v2
565// CHECK: [0x6e,0x04,0x0a,0x0e]
566
567v_mul_hi_i32_i24 v5, tma_hi, v2
568// CHECK: [0x6f,0x04,0x0a,0x0e]
569
570v_mul_hi_i32_i24 v5, ttmp11, v2
571// CHECK: [0x7b,0x04,0x0a,0x0e]
572
573v_mul_hi_i32_i24 v5, m0, v2
574// CHECK: [0x7c,0x04,0x0a,0x0e]
575
576v_mul_hi_i32_i24 v5, exec_lo, v2
577// CHECK: [0x7e,0x04,0x0a,0x0e]
578
579v_mul_hi_i32_i24 v5, exec_hi, v2
580// CHECK: [0x7f,0x04,0x0a,0x0e]
581
582v_mul_hi_i32_i24 v5, 0, v2
583// CHECK: [0x80,0x04,0x0a,0x0e]
584
585v_mul_hi_i32_i24 v5, -1, v2
586// CHECK: [0xc1,0x04,0x0a,0x0e]
587
588v_mul_hi_i32_i24 v5, 0.5, v2
589// CHECK: [0xf0,0x04,0x0a,0x0e]
590
591v_mul_hi_i32_i24 v5, -4.0, v2
592// CHECK: [0xf7,0x04,0x0a,0x0e]
593
594v_mul_hi_i32_i24 v5, src_vccz, v2
595// CHECK: [0xfb,0x04,0x0a,0x0e]
596
597v_mul_hi_i32_i24 v5, src_execz, v2
598// CHECK: [0xfc,0x04,0x0a,0x0e]
599
600v_mul_hi_i32_i24 v5, src_scc, v2
601// CHECK: [0xfd,0x04,0x0a,0x0e]
602
603v_mul_hi_i32_i24 v5, src_lds_direct, v2
604// CHECK: [0xfe,0x04,0x0a,0x0e]
605
606v_mul_hi_i32_i24 v5, 0xaf123456, v2
607// CHECK: [0xff,0x04,0x0a,0x0e,0x56,0x34,0x12,0xaf]
608
609v_mul_hi_i32_i24 v5, 0x3f717273, v2
610// CHECK: [0xff,0x04,0x0a,0x0e,0x73,0x72,0x71,0x3f]
611
612v_mul_hi_i32_i24 v5, v1, v255
613// CHECK: [0x01,0xff,0x0b,0x0e]
614
615v_mul_u32_u24 v5, v1, v2
616// CHECK: [0x01,0x05,0x0a,0x10]
617
618v_mul_u32_u24 v255, v1, v2
619// CHECK: [0x01,0x05,0xfe,0x11]
620
621v_mul_u32_u24 v5, v255, v2
622// CHECK: [0xff,0x05,0x0a,0x10]
623
624v_mul_u32_u24 v5, s1, v2
625// CHECK: [0x01,0x04,0x0a,0x10]
626
627v_mul_u32_u24 v5, s101, v2
628// CHECK: [0x65,0x04,0x0a,0x10]
629
630v_mul_u32_u24 v5, flat_scratch_lo, v2
631// CHECK: [0x66,0x04,0x0a,0x10]
632
633v_mul_u32_u24 v5, flat_scratch_hi, v2
634// CHECK: [0x67,0x04,0x0a,0x10]
635
636v_mul_u32_u24 v5, vcc_lo, v2
637// CHECK: [0x6a,0x04,0x0a,0x10]
638
639v_mul_u32_u24 v5, vcc_hi, v2
640// CHECK: [0x6b,0x04,0x0a,0x10]
641
642v_mul_u32_u24 v5, tba_lo, v2
643// CHECK: [0x6c,0x04,0x0a,0x10]
644
645v_mul_u32_u24 v5, tba_hi, v2
646// CHECK: [0x6d,0x04,0x0a,0x10]
647
648v_mul_u32_u24 v5, tma_lo, v2
649// CHECK: [0x6e,0x04,0x0a,0x10]
650
651v_mul_u32_u24 v5, tma_hi, v2
652// CHECK: [0x6f,0x04,0x0a,0x10]
653
654v_mul_u32_u24 v5, ttmp11, v2
655// CHECK: [0x7b,0x04,0x0a,0x10]
656
657v_mul_u32_u24 v5, m0, v2
658// CHECK: [0x7c,0x04,0x0a,0x10]
659
660v_mul_u32_u24 v5, exec_lo, v2
661// CHECK: [0x7e,0x04,0x0a,0x10]
662
663v_mul_u32_u24 v5, exec_hi, v2
664// CHECK: [0x7f,0x04,0x0a,0x10]
665
666v_mul_u32_u24 v5, 0, v2
667// CHECK: [0x80,0x04,0x0a,0x10]
668
669v_mul_u32_u24 v5, -1, v2
670// CHECK: [0xc1,0x04,0x0a,0x10]
671
672v_mul_u32_u24 v5, 0.5, v2
673// CHECK: [0xf0,0x04,0x0a,0x10]
674
675v_mul_u32_u24 v5, -4.0, v2
676// CHECK: [0xf7,0x04,0x0a,0x10]
677
678v_mul_u32_u24 v5, src_vccz, v2
679// CHECK: [0xfb,0x04,0x0a,0x10]
680
681v_mul_u32_u24 v5, src_execz, v2
682// CHECK: [0xfc,0x04,0x0a,0x10]
683
684v_mul_u32_u24 v5, src_scc, v2
685// CHECK: [0xfd,0x04,0x0a,0x10]
686
687v_mul_u32_u24 v5, src_lds_direct, v2
688// CHECK: [0xfe,0x04,0x0a,0x10]
689
690v_mul_u32_u24 v5, 0xaf123456, v2
691// CHECK: [0xff,0x04,0x0a,0x10,0x56,0x34,0x12,0xaf]
692
693v_mul_u32_u24 v5, 0x3f717273, v2
694// CHECK: [0xff,0x04,0x0a,0x10,0x73,0x72,0x71,0x3f]
695
696v_mul_u32_u24 v5, v1, v255
697// CHECK: [0x01,0xff,0x0b,0x10]
698
699v_mul_hi_u32_u24 v5, v1, v2
700// CHECK: [0x01,0x05,0x0a,0x12]
701
702v_mul_hi_u32_u24 v255, v1, v2
703// CHECK: [0x01,0x05,0xfe,0x13]
704
705v_mul_hi_u32_u24 v5, v255, v2
706// CHECK: [0xff,0x05,0x0a,0x12]
707
708v_mul_hi_u32_u24 v5, s1, v2
709// CHECK: [0x01,0x04,0x0a,0x12]
710
711v_mul_hi_u32_u24 v5, s101, v2
712// CHECK: [0x65,0x04,0x0a,0x12]
713
714v_mul_hi_u32_u24 v5, flat_scratch_lo, v2
715// CHECK: [0x66,0x04,0x0a,0x12]
716
717v_mul_hi_u32_u24 v5, flat_scratch_hi, v2
718// CHECK: [0x67,0x04,0x0a,0x12]
719
720v_mul_hi_u32_u24 v5, vcc_lo, v2
721// CHECK: [0x6a,0x04,0x0a,0x12]
722
723v_mul_hi_u32_u24 v5, vcc_hi, v2
724// CHECK: [0x6b,0x04,0x0a,0x12]
725
726v_mul_hi_u32_u24 v5, tba_lo, v2
727// CHECK: [0x6c,0x04,0x0a,0x12]
728
729v_mul_hi_u32_u24 v5, tba_hi, v2
730// CHECK: [0x6d,0x04,0x0a,0x12]
731
732v_mul_hi_u32_u24 v5, tma_lo, v2
733// CHECK: [0x6e,0x04,0x0a,0x12]
734
735v_mul_hi_u32_u24 v5, tma_hi, v2
736// CHECK: [0x6f,0x04,0x0a,0x12]
737
738v_mul_hi_u32_u24 v5, ttmp11, v2
739// CHECK: [0x7b,0x04,0x0a,0x12]
740
741v_mul_hi_u32_u24 v5, m0, v2
742// CHECK: [0x7c,0x04,0x0a,0x12]
743
744v_mul_hi_u32_u24 v5, exec_lo, v2
745// CHECK: [0x7e,0x04,0x0a,0x12]
746
747v_mul_hi_u32_u24 v5, exec_hi, v2
748// CHECK: [0x7f,0x04,0x0a,0x12]
749
750v_mul_hi_u32_u24 v5, 0, v2
751// CHECK: [0x80,0x04,0x0a,0x12]
752
753v_mul_hi_u32_u24 v5, -1, v2
754// CHECK: [0xc1,0x04,0x0a,0x12]
755
756v_mul_hi_u32_u24 v5, 0.5, v2
757// CHECK: [0xf0,0x04,0x0a,0x12]
758
759v_mul_hi_u32_u24 v5, -4.0, v2
760// CHECK: [0xf7,0x04,0x0a,0x12]
761
762v_mul_hi_u32_u24 v5, src_vccz, v2
763// CHECK: [0xfb,0x04,0x0a,0x12]
764
765v_mul_hi_u32_u24 v5, src_execz, v2
766// CHECK: [0xfc,0x04,0x0a,0x12]
767
768v_mul_hi_u32_u24 v5, src_scc, v2
769// CHECK: [0xfd,0x04,0x0a,0x12]
770
771v_mul_hi_u32_u24 v5, src_lds_direct, v2
772// CHECK: [0xfe,0x04,0x0a,0x12]
773
774v_mul_hi_u32_u24 v5, 0xaf123456, v2
775// CHECK: [0xff,0x04,0x0a,0x12,0x56,0x34,0x12,0xaf]
776
777v_mul_hi_u32_u24 v5, 0x3f717273, v2
778// CHECK: [0xff,0x04,0x0a,0x12,0x73,0x72,0x71,0x3f]
779
780v_mul_hi_u32_u24 v5, v1, v255
781// CHECK: [0x01,0xff,0x0b,0x12]
782
783v_min_f32 v5, v1, v2
784// CHECK: [0x01,0x05,0x0a,0x14]
785
786v_min_f32 v255, v1, v2
787// CHECK: [0x01,0x05,0xfe,0x15]
788
789v_min_f32 v5, v255, v2
790// CHECK: [0xff,0x05,0x0a,0x14]
791
792v_min_f32 v5, s1, v2
793// CHECK: [0x01,0x04,0x0a,0x14]
794
795v_min_f32 v5, s101, v2
796// CHECK: [0x65,0x04,0x0a,0x14]
797
798v_min_f32 v5, flat_scratch_lo, v2
799// CHECK: [0x66,0x04,0x0a,0x14]
800
801v_min_f32 v5, flat_scratch_hi, v2
802// CHECK: [0x67,0x04,0x0a,0x14]
803
804v_min_f32 v5, vcc_lo, v2
805// CHECK: [0x6a,0x04,0x0a,0x14]
806
807v_min_f32 v5, vcc_hi, v2
808// CHECK: [0x6b,0x04,0x0a,0x14]
809
810v_min_f32 v5, tba_lo, v2
811// CHECK: [0x6c,0x04,0x0a,0x14]
812
813v_min_f32 v5, tba_hi, v2
814// CHECK: [0x6d,0x04,0x0a,0x14]
815
816v_min_f32 v5, tma_lo, v2
817// CHECK: [0x6e,0x04,0x0a,0x14]
818
819v_min_f32 v5, tma_hi, v2
820// CHECK: [0x6f,0x04,0x0a,0x14]
821
822v_min_f32 v5, ttmp11, v2
823// CHECK: [0x7b,0x04,0x0a,0x14]
824
825v_min_f32 v5, m0, v2
826// CHECK: [0x7c,0x04,0x0a,0x14]
827
828v_min_f32 v5, exec_lo, v2
829// CHECK: [0x7e,0x04,0x0a,0x14]
830
831v_min_f32 v5, exec_hi, v2
832// CHECK: [0x7f,0x04,0x0a,0x14]
833
834v_min_f32 v5, 0, v2
835// CHECK: [0x80,0x04,0x0a,0x14]
836
837v_min_f32 v5, -1, v2
838// CHECK: [0xc1,0x04,0x0a,0x14]
839
840v_min_f32 v5, 0.5, v2
841// CHECK: [0xf0,0x04,0x0a,0x14]
842
843v_min_f32 v5, -4.0, v2
844// CHECK: [0xf7,0x04,0x0a,0x14]
845
846v_min_f32 v5, src_vccz, v2
847// CHECK: [0xfb,0x04,0x0a,0x14]
848
849v_min_f32 v5, src_execz, v2
850// CHECK: [0xfc,0x04,0x0a,0x14]
851
852v_min_f32 v5, src_scc, v2
853// CHECK: [0xfd,0x04,0x0a,0x14]
854
855v_min_f32 v5, src_lds_direct, v2
856// CHECK: [0xfe,0x04,0x0a,0x14]
857
858v_min_f32 v5, 0xaf123456, v2
859// CHECK: [0xff,0x04,0x0a,0x14,0x56,0x34,0x12,0xaf]
860
861v_min_f32 v5, 0x3f717273, v2
862// CHECK: [0xff,0x04,0x0a,0x14,0x73,0x72,0x71,0x3f]
863
864v_min_f32 v5, v1, v255
865// CHECK: [0x01,0xff,0x0b,0x14]
866
867v_max_f32 v5, v1, v2
868// CHECK: [0x01,0x05,0x0a,0x16]
869
870v_max_f32 v255, v1, v2
871// CHECK: [0x01,0x05,0xfe,0x17]
872
873v_max_f32 v5, v255, v2
874// CHECK: [0xff,0x05,0x0a,0x16]
875
876v_max_f32 v5, s1, v2
877// CHECK: [0x01,0x04,0x0a,0x16]
878
879v_max_f32 v5, s101, v2
880// CHECK: [0x65,0x04,0x0a,0x16]
881
882v_max_f32 v5, flat_scratch_lo, v2
883// CHECK: [0x66,0x04,0x0a,0x16]
884
885v_max_f32 v5, flat_scratch_hi, v2
886// CHECK: [0x67,0x04,0x0a,0x16]
887
888v_max_f32 v5, vcc_lo, v2
889// CHECK: [0x6a,0x04,0x0a,0x16]
890
891v_max_f32 v5, vcc_hi, v2
892// CHECK: [0x6b,0x04,0x0a,0x16]
893
894v_max_f32 v5, tba_lo, v2
895// CHECK: [0x6c,0x04,0x0a,0x16]
896
897v_max_f32 v5, tba_hi, v2
898// CHECK: [0x6d,0x04,0x0a,0x16]
899
900v_max_f32 v5, tma_lo, v2
901// CHECK: [0x6e,0x04,0x0a,0x16]
902
903v_max_f32 v5, tma_hi, v2
904// CHECK: [0x6f,0x04,0x0a,0x16]
905
906v_max_f32 v5, ttmp11, v2
907// CHECK: [0x7b,0x04,0x0a,0x16]
908
909v_max_f32 v5, m0, v2
910// CHECK: [0x7c,0x04,0x0a,0x16]
911
912v_max_f32 v5, exec_lo, v2
913// CHECK: [0x7e,0x04,0x0a,0x16]
914
915v_max_f32 v5, exec_hi, v2
916// CHECK: [0x7f,0x04,0x0a,0x16]
917
918v_max_f32 v5, 0, v2
919// CHECK: [0x80,0x04,0x0a,0x16]
920
921v_max_f32 v5, -1, v2
922// CHECK: [0xc1,0x04,0x0a,0x16]
923
924v_max_f32 v5, 0.5, v2
925// CHECK: [0xf0,0x04,0x0a,0x16]
926
927v_max_f32 v5, -4.0, v2
928// CHECK: [0xf7,0x04,0x0a,0x16]
929
930v_max_f32 v5, src_vccz, v2
931// CHECK: [0xfb,0x04,0x0a,0x16]
932
933v_max_f32 v5, src_execz, v2
934// CHECK: [0xfc,0x04,0x0a,0x16]
935
936v_max_f32 v5, src_scc, v2
937// CHECK: [0xfd,0x04,0x0a,0x16]
938
939v_max_f32 v5, src_lds_direct, v2
940// CHECK: [0xfe,0x04,0x0a,0x16]
941
942v_max_f32 v5, 0xaf123456, v2
943// CHECK: [0xff,0x04,0x0a,0x16,0x56,0x34,0x12,0xaf]
944
945v_max_f32 v5, 0x3f717273, v2
946// CHECK: [0xff,0x04,0x0a,0x16,0x73,0x72,0x71,0x3f]
947
948v_max_f32 v5, v1, v255
949// CHECK: [0x01,0xff,0x0b,0x16]
950
951v_min_i32 v5, v1, v2
952// CHECK: [0x01,0x05,0x0a,0x18]
953
954v_min_i32 v255, v1, v2
955// CHECK: [0x01,0x05,0xfe,0x19]
956
957v_min_i32 v5, v255, v2
958// CHECK: [0xff,0x05,0x0a,0x18]
959
960v_min_i32 v5, s1, v2
961// CHECK: [0x01,0x04,0x0a,0x18]
962
963v_min_i32 v5, s101, v2
964// CHECK: [0x65,0x04,0x0a,0x18]
965
966v_min_i32 v5, flat_scratch_lo, v2
967// CHECK: [0x66,0x04,0x0a,0x18]
968
969v_min_i32 v5, flat_scratch_hi, v2
970// CHECK: [0x67,0x04,0x0a,0x18]
971
972v_min_i32 v5, vcc_lo, v2
973// CHECK: [0x6a,0x04,0x0a,0x18]
974
975v_min_i32 v5, vcc_hi, v2
976// CHECK: [0x6b,0x04,0x0a,0x18]
977
978v_min_i32 v5, tba_lo, v2
979// CHECK: [0x6c,0x04,0x0a,0x18]
980
981v_min_i32 v5, tba_hi, v2
982// CHECK: [0x6d,0x04,0x0a,0x18]
983
984v_min_i32 v5, tma_lo, v2
985// CHECK: [0x6e,0x04,0x0a,0x18]
986
987v_min_i32 v5, tma_hi, v2
988// CHECK: [0x6f,0x04,0x0a,0x18]
989
990v_min_i32 v5, ttmp11, v2
991// CHECK: [0x7b,0x04,0x0a,0x18]
992
993v_min_i32 v5, m0, v2
994// CHECK: [0x7c,0x04,0x0a,0x18]
995
996v_min_i32 v5, exec_lo, v2
997// CHECK: [0x7e,0x04,0x0a,0x18]
998
999v_min_i32 v5, exec_hi, v2
1000// CHECK: [0x7f,0x04,0x0a,0x18]
1001
1002v_min_i32 v5, 0, v2
1003// CHECK: [0x80,0x04,0x0a,0x18]
1004
1005v_min_i32 v5, -1, v2
1006// CHECK: [0xc1,0x04,0x0a,0x18]
1007
1008v_min_i32 v5, 0.5, v2
1009// CHECK: [0xf0,0x04,0x0a,0x18]
1010
1011v_min_i32 v5, -4.0, v2
1012// CHECK: [0xf7,0x04,0x0a,0x18]
1013
1014v_min_i32 v5, src_vccz, v2
1015// CHECK: [0xfb,0x04,0x0a,0x18]
1016
1017v_min_i32 v5, src_execz, v2
1018// CHECK: [0xfc,0x04,0x0a,0x18]
1019
1020v_min_i32 v5, src_scc, v2
1021// CHECK: [0xfd,0x04,0x0a,0x18]
1022
1023v_min_i32 v5, src_lds_direct, v2
1024// CHECK: [0xfe,0x04,0x0a,0x18]
1025
1026v_min_i32 v5, 0xaf123456, v2
1027// CHECK: [0xff,0x04,0x0a,0x18,0x56,0x34,0x12,0xaf]
1028
1029v_min_i32 v5, 0x3f717273, v2
1030// CHECK: [0xff,0x04,0x0a,0x18,0x73,0x72,0x71,0x3f]
1031
1032v_min_i32 v5, v1, v255
1033// CHECK: [0x01,0xff,0x0b,0x18]
1034
1035v_max_i32 v5, v1, v2
1036// CHECK: [0x01,0x05,0x0a,0x1a]
1037
1038v_max_i32 v255, v1, v2
1039// CHECK: [0x01,0x05,0xfe,0x1b]
1040
1041v_max_i32 v5, v255, v2
1042// CHECK: [0xff,0x05,0x0a,0x1a]
1043
1044v_max_i32 v5, s1, v2
1045// CHECK: [0x01,0x04,0x0a,0x1a]
1046
1047v_max_i32 v5, s101, v2
1048// CHECK: [0x65,0x04,0x0a,0x1a]
1049
1050v_max_i32 v5, flat_scratch_lo, v2
1051// CHECK: [0x66,0x04,0x0a,0x1a]
1052
1053v_max_i32 v5, flat_scratch_hi, v2
1054// CHECK: [0x67,0x04,0x0a,0x1a]
1055
1056v_max_i32 v5, vcc_lo, v2
1057// CHECK: [0x6a,0x04,0x0a,0x1a]
1058
1059v_max_i32 v5, vcc_hi, v2
1060// CHECK: [0x6b,0x04,0x0a,0x1a]
1061
1062v_max_i32 v5, tba_lo, v2
1063// CHECK: [0x6c,0x04,0x0a,0x1a]
1064
1065v_max_i32 v5, tba_hi, v2
1066// CHECK: [0x6d,0x04,0x0a,0x1a]
1067
1068v_max_i32 v5, tma_lo, v2
1069// CHECK: [0x6e,0x04,0x0a,0x1a]
1070
1071v_max_i32 v5, tma_hi, v2
1072// CHECK: [0x6f,0x04,0x0a,0x1a]
1073
1074v_max_i32 v5, ttmp11, v2
1075// CHECK: [0x7b,0x04,0x0a,0x1a]
1076
1077v_max_i32 v5, m0, v2
1078// CHECK: [0x7c,0x04,0x0a,0x1a]
1079
1080v_max_i32 v5, exec_lo, v2
1081// CHECK: [0x7e,0x04,0x0a,0x1a]
1082
1083v_max_i32 v5, exec_hi, v2
1084// CHECK: [0x7f,0x04,0x0a,0x1a]
1085
1086v_max_i32 v5, 0, v2
1087// CHECK: [0x80,0x04,0x0a,0x1a]
1088
1089v_max_i32 v5, -1, v2
1090// CHECK: [0xc1,0x04,0x0a,0x1a]
1091
1092v_max_i32 v5, 0.5, v2
1093// CHECK: [0xf0,0x04,0x0a,0x1a]
1094
1095v_max_i32 v5, -4.0, v2
1096// CHECK: [0xf7,0x04,0x0a,0x1a]
1097
1098v_max_i32 v5, src_vccz, v2
1099// CHECK: [0xfb,0x04,0x0a,0x1a]
1100
1101v_max_i32 v5, src_execz, v2
1102// CHECK: [0xfc,0x04,0x0a,0x1a]
1103
1104v_max_i32 v5, src_scc, v2
1105// CHECK: [0xfd,0x04,0x0a,0x1a]
1106
1107v_max_i32 v5, src_lds_direct, v2
1108// CHECK: [0xfe,0x04,0x0a,0x1a]
1109
1110v_max_i32 v5, 0xaf123456, v2
1111// CHECK: [0xff,0x04,0x0a,0x1a,0x56,0x34,0x12,0xaf]
1112
1113v_max_i32 v5, 0x3f717273, v2
1114// CHECK: [0xff,0x04,0x0a,0x1a,0x73,0x72,0x71,0x3f]
1115
1116v_max_i32 v5, v1, v255
1117// CHECK: [0x01,0xff,0x0b,0x1a]
1118
1119v_min_u32 v5, v1, v2
1120// CHECK: [0x01,0x05,0x0a,0x1c]
1121
1122v_min_u32 v255, v1, v2
1123// CHECK: [0x01,0x05,0xfe,0x1d]
1124
1125v_min_u32 v5, v255, v2
1126// CHECK: [0xff,0x05,0x0a,0x1c]
1127
1128v_min_u32 v5, s1, v2
1129// CHECK: [0x01,0x04,0x0a,0x1c]
1130
1131v_min_u32 v5, s101, v2
1132// CHECK: [0x65,0x04,0x0a,0x1c]
1133
1134v_min_u32 v5, flat_scratch_lo, v2
1135// CHECK: [0x66,0x04,0x0a,0x1c]
1136
1137v_min_u32 v5, flat_scratch_hi, v2
1138// CHECK: [0x67,0x04,0x0a,0x1c]
1139
1140v_min_u32 v5, vcc_lo, v2
1141// CHECK: [0x6a,0x04,0x0a,0x1c]
1142
1143v_min_u32 v5, vcc_hi, v2
1144// CHECK: [0x6b,0x04,0x0a,0x1c]
1145
1146v_min_u32 v5, tba_lo, v2
1147// CHECK: [0x6c,0x04,0x0a,0x1c]
1148
1149v_min_u32 v5, tba_hi, v2
1150// CHECK: [0x6d,0x04,0x0a,0x1c]
1151
1152v_min_u32 v5, tma_lo, v2
1153// CHECK: [0x6e,0x04,0x0a,0x1c]
1154
1155v_min_u32 v5, tma_hi, v2
1156// CHECK: [0x6f,0x04,0x0a,0x1c]
1157
1158v_min_u32 v5, ttmp11, v2
1159// CHECK: [0x7b,0x04,0x0a,0x1c]
1160
1161v_min_u32 v5, m0, v2
1162// CHECK: [0x7c,0x04,0x0a,0x1c]
1163
1164v_min_u32 v5, exec_lo, v2
1165// CHECK: [0x7e,0x04,0x0a,0x1c]
1166
1167v_min_u32 v5, exec_hi, v2
1168// CHECK: [0x7f,0x04,0x0a,0x1c]
1169
1170v_min_u32 v5, 0, v2
1171// CHECK: [0x80,0x04,0x0a,0x1c]
1172
1173v_min_u32 v5, -1, v2
1174// CHECK: [0xc1,0x04,0x0a,0x1c]
1175
1176v_min_u32 v5, 0.5, v2
1177// CHECK: [0xf0,0x04,0x0a,0x1c]
1178
1179v_min_u32 v5, -4.0, v2
1180// CHECK: [0xf7,0x04,0x0a,0x1c]
1181
1182v_min_u32 v5, src_vccz, v2
1183// CHECK: [0xfb,0x04,0x0a,0x1c]
1184
1185v_min_u32 v5, src_execz, v2
1186// CHECK: [0xfc,0x04,0x0a,0x1c]
1187
1188v_min_u32 v5, src_scc, v2
1189// CHECK: [0xfd,0x04,0x0a,0x1c]
1190
1191v_min_u32 v5, src_lds_direct, v2
1192// CHECK: [0xfe,0x04,0x0a,0x1c]
1193
1194v_min_u32 v5, 0xaf123456, v2
1195// CHECK: [0xff,0x04,0x0a,0x1c,0x56,0x34,0x12,0xaf]
1196
1197v_min_u32 v5, 0x3f717273, v2
1198// CHECK: [0xff,0x04,0x0a,0x1c,0x73,0x72,0x71,0x3f]
1199
1200v_min_u32 v5, v1, v255
1201// CHECK: [0x01,0xff,0x0b,0x1c]
1202
1203v_max_u32 v5, v1, v2
1204// CHECK: [0x01,0x05,0x0a,0x1e]
1205
1206v_max_u32 v255, v1, v2
1207// CHECK: [0x01,0x05,0xfe,0x1f]
1208
1209v_max_u32 v5, v255, v2
1210// CHECK: [0xff,0x05,0x0a,0x1e]
1211
1212v_max_u32 v5, s1, v2
1213// CHECK: [0x01,0x04,0x0a,0x1e]
1214
1215v_max_u32 v5, s101, v2
1216// CHECK: [0x65,0x04,0x0a,0x1e]
1217
1218v_max_u32 v5, flat_scratch_lo, v2
1219// CHECK: [0x66,0x04,0x0a,0x1e]
1220
1221v_max_u32 v5, flat_scratch_hi, v2
1222// CHECK: [0x67,0x04,0x0a,0x1e]
1223
1224v_max_u32 v5, vcc_lo, v2
1225// CHECK: [0x6a,0x04,0x0a,0x1e]
1226
1227v_max_u32 v5, vcc_hi, v2
1228// CHECK: [0x6b,0x04,0x0a,0x1e]
1229
1230v_max_u32 v5, tba_lo, v2
1231// CHECK: [0x6c,0x04,0x0a,0x1e]
1232
1233v_max_u32 v5, tba_hi, v2
1234// CHECK: [0x6d,0x04,0x0a,0x1e]
1235
1236v_max_u32 v5, tma_lo, v2
1237// CHECK: [0x6e,0x04,0x0a,0x1e]
1238
1239v_max_u32 v5, tma_hi, v2
1240// CHECK: [0x6f,0x04,0x0a,0x1e]
1241
1242v_max_u32 v5, ttmp11, v2
1243// CHECK: [0x7b,0x04,0x0a,0x1e]
1244
1245v_max_u32 v5, m0, v2
1246// CHECK: [0x7c,0x04,0x0a,0x1e]
1247
1248v_max_u32 v5, exec_lo, v2
1249// CHECK: [0x7e,0x04,0x0a,0x1e]
1250
1251v_max_u32 v5, exec_hi, v2
1252// CHECK: [0x7f,0x04,0x0a,0x1e]
1253
1254v_max_u32 v5, 0, v2
1255// CHECK: [0x80,0x04,0x0a,0x1e]
1256
1257v_max_u32 v5, -1, v2
1258// CHECK: [0xc1,0x04,0x0a,0x1e]
1259
1260v_max_u32 v5, 0.5, v2
1261// CHECK: [0xf0,0x04,0x0a,0x1e]
1262
1263v_max_u32 v5, -4.0, v2
1264// CHECK: [0xf7,0x04,0x0a,0x1e]
1265
1266v_max_u32 v5, src_vccz, v2
1267// CHECK: [0xfb,0x04,0x0a,0x1e]
1268
1269v_max_u32 v5, src_execz, v2
1270// CHECK: [0xfc,0x04,0x0a,0x1e]
1271
1272v_max_u32 v5, src_scc, v2
1273// CHECK: [0xfd,0x04,0x0a,0x1e]
1274
1275v_max_u32 v5, src_lds_direct, v2
1276// CHECK: [0xfe,0x04,0x0a,0x1e]
1277
1278v_max_u32 v5, 0xaf123456, v2
1279// CHECK: [0xff,0x04,0x0a,0x1e,0x56,0x34,0x12,0xaf]
1280
1281v_max_u32 v5, 0x3f717273, v2
1282// CHECK: [0xff,0x04,0x0a,0x1e,0x73,0x72,0x71,0x3f]
1283
1284v_max_u32 v5, v1, v255
1285// CHECK: [0x01,0xff,0x0b,0x1e]
1286
1287v_lshrrev_b32 v5, v1, v2
1288// CHECK: [0x01,0x05,0x0a,0x20]
1289
1290v_lshrrev_b32 v255, v1, v2
1291// CHECK: [0x01,0x05,0xfe,0x21]
1292
1293v_lshrrev_b32 v5, v255, v2
1294// CHECK: [0xff,0x05,0x0a,0x20]
1295
1296v_lshrrev_b32 v5, s1, v2
1297// CHECK: [0x01,0x04,0x0a,0x20]
1298
1299v_lshrrev_b32 v5, s101, v2
1300// CHECK: [0x65,0x04,0x0a,0x20]
1301
1302v_lshrrev_b32 v5, flat_scratch_lo, v2
1303// CHECK: [0x66,0x04,0x0a,0x20]
1304
1305v_lshrrev_b32 v5, flat_scratch_hi, v2
1306// CHECK: [0x67,0x04,0x0a,0x20]
1307
1308v_lshrrev_b32 v5, vcc_lo, v2
1309// CHECK: [0x6a,0x04,0x0a,0x20]
1310
1311v_lshrrev_b32 v5, vcc_hi, v2
1312// CHECK: [0x6b,0x04,0x0a,0x20]
1313
1314v_lshrrev_b32 v5, tba_lo, v2
1315// CHECK: [0x6c,0x04,0x0a,0x20]
1316
1317v_lshrrev_b32 v5, tba_hi, v2
1318// CHECK: [0x6d,0x04,0x0a,0x20]
1319
1320v_lshrrev_b32 v5, tma_lo, v2
1321// CHECK: [0x6e,0x04,0x0a,0x20]
1322
1323v_lshrrev_b32 v5, tma_hi, v2
1324// CHECK: [0x6f,0x04,0x0a,0x20]
1325
1326v_lshrrev_b32 v5, ttmp11, v2
1327// CHECK: [0x7b,0x04,0x0a,0x20]
1328
1329v_lshrrev_b32 v5, m0, v2
1330// CHECK: [0x7c,0x04,0x0a,0x20]
1331
1332v_lshrrev_b32 v5, exec_lo, v2
1333// CHECK: [0x7e,0x04,0x0a,0x20]
1334
1335v_lshrrev_b32 v5, exec_hi, v2
1336// CHECK: [0x7f,0x04,0x0a,0x20]
1337
1338v_lshrrev_b32 v5, 0, v2
1339// CHECK: [0x80,0x04,0x0a,0x20]
1340
1341v_lshrrev_b32 v5, -1, v2
1342// CHECK: [0xc1,0x04,0x0a,0x20]
1343
1344v_lshrrev_b32 v5, 0.5, v2
1345// CHECK: [0xf0,0x04,0x0a,0x20]
1346
1347v_lshrrev_b32 v5, -4.0, v2
1348// CHECK: [0xf7,0x04,0x0a,0x20]
1349
1350v_lshrrev_b32 v5, src_vccz, v2
1351// CHECK: [0xfb,0x04,0x0a,0x20]
1352
1353v_lshrrev_b32 v5, src_execz, v2
1354// CHECK: [0xfc,0x04,0x0a,0x20]
1355
1356v_lshrrev_b32 v5, src_scc, v2
1357// CHECK: [0xfd,0x04,0x0a,0x20]
1358
1359v_lshrrev_b32 v5, 0xaf123456, v2
1360// CHECK: [0xff,0x04,0x0a,0x20,0x56,0x34,0x12,0xaf]
1361
1362v_lshrrev_b32 v5, 0x3f717273, v2
1363// CHECK: [0xff,0x04,0x0a,0x20,0x73,0x72,0x71,0x3f]
1364
1365v_lshrrev_b32 v5, v1, v255
1366// CHECK: [0x01,0xff,0x0b,0x20]
1367
1368v_ashrrev_i32 v5, v1, v2
1369// CHECK: [0x01,0x05,0x0a,0x22]
1370
1371v_ashrrev_i32 v255, v1, v2
1372// CHECK: [0x01,0x05,0xfe,0x23]
1373
1374v_ashrrev_i32 v5, v255, v2
1375// CHECK: [0xff,0x05,0x0a,0x22]
1376
1377v_ashrrev_i32 v5, s1, v2
1378// CHECK: [0x01,0x04,0x0a,0x22]
1379
1380v_ashrrev_i32 v5, s101, v2
1381// CHECK: [0x65,0x04,0x0a,0x22]
1382
1383v_ashrrev_i32 v5, flat_scratch_lo, v2
1384// CHECK: [0x66,0x04,0x0a,0x22]
1385
1386v_ashrrev_i32 v5, flat_scratch_hi, v2
1387// CHECK: [0x67,0x04,0x0a,0x22]
1388
1389v_ashrrev_i32 v5, vcc_lo, v2
1390// CHECK: [0x6a,0x04,0x0a,0x22]
1391
1392v_ashrrev_i32 v5, vcc_hi, v2
1393// CHECK: [0x6b,0x04,0x0a,0x22]
1394
1395v_ashrrev_i32 v5, tba_lo, v2
1396// CHECK: [0x6c,0x04,0x0a,0x22]
1397
1398v_ashrrev_i32 v5, tba_hi, v2
1399// CHECK: [0x6d,0x04,0x0a,0x22]
1400
1401v_ashrrev_i32 v5, tma_lo, v2
1402// CHECK: [0x6e,0x04,0x0a,0x22]
1403
1404v_ashrrev_i32 v5, tma_hi, v2
1405// CHECK: [0x6f,0x04,0x0a,0x22]
1406
1407v_ashrrev_i32 v5, ttmp11, v2
1408// CHECK: [0x7b,0x04,0x0a,0x22]
1409
1410v_ashrrev_i32 v5, m0, v2
1411// CHECK: [0x7c,0x04,0x0a,0x22]
1412
1413v_ashrrev_i32 v5, exec_lo, v2
1414// CHECK: [0x7e,0x04,0x0a,0x22]
1415
1416v_ashrrev_i32 v5, exec_hi, v2
1417// CHECK: [0x7f,0x04,0x0a,0x22]
1418
1419v_ashrrev_i32 v5, 0, v2
1420// CHECK: [0x80,0x04,0x0a,0x22]
1421
1422v_ashrrev_i32 v5, -1, v2
1423// CHECK: [0xc1,0x04,0x0a,0x22]
1424
1425v_ashrrev_i32 v5, 0.5, v2
1426// CHECK: [0xf0,0x04,0x0a,0x22]
1427
1428v_ashrrev_i32 v5, -4.0, v2
1429// CHECK: [0xf7,0x04,0x0a,0x22]
1430
1431v_ashrrev_i32 v5, src_vccz, v2
1432// CHECK: [0xfb,0x04,0x0a,0x22]
1433
1434v_ashrrev_i32 v5, src_execz, v2
1435// CHECK: [0xfc,0x04,0x0a,0x22]
1436
1437v_ashrrev_i32 v5, src_scc, v2
1438// CHECK: [0xfd,0x04,0x0a,0x22]
1439
1440v_ashrrev_i32 v5, 0xaf123456, v2
1441// CHECK: [0xff,0x04,0x0a,0x22,0x56,0x34,0x12,0xaf]
1442
1443v_ashrrev_i32 v5, 0x3f717273, v2
1444// CHECK: [0xff,0x04,0x0a,0x22,0x73,0x72,0x71,0x3f]
1445
1446v_ashrrev_i32 v5, v1, v255
1447// CHECK: [0x01,0xff,0x0b,0x22]
1448
1449v_lshlrev_b32 v5, v1, v2
1450// CHECK: [0x01,0x05,0x0a,0x24]
1451
1452v_lshlrev_b32 v255, v1, v2
1453// CHECK: [0x01,0x05,0xfe,0x25]
1454
1455v_lshlrev_b32 v5, v255, v2
1456// CHECK: [0xff,0x05,0x0a,0x24]
1457
1458v_lshlrev_b32 v5, s1, v2
1459// CHECK: [0x01,0x04,0x0a,0x24]
1460
1461v_lshlrev_b32 v5, s101, v2
1462// CHECK: [0x65,0x04,0x0a,0x24]
1463
1464v_lshlrev_b32 v5, flat_scratch_lo, v2
1465// CHECK: [0x66,0x04,0x0a,0x24]
1466
1467v_lshlrev_b32 v5, flat_scratch_hi, v2
1468// CHECK: [0x67,0x04,0x0a,0x24]
1469
1470v_lshlrev_b32 v5, vcc_lo, v2
1471// CHECK: [0x6a,0x04,0x0a,0x24]
1472
1473v_lshlrev_b32 v5, vcc_hi, v2
1474// CHECK: [0x6b,0x04,0x0a,0x24]
1475
1476v_lshlrev_b32 v5, tba_lo, v2
1477// CHECK: [0x6c,0x04,0x0a,0x24]
1478
1479v_lshlrev_b32 v5, tba_hi, v2
1480// CHECK: [0x6d,0x04,0x0a,0x24]
1481
1482v_lshlrev_b32 v5, tma_lo, v2
1483// CHECK: [0x6e,0x04,0x0a,0x24]
1484
1485v_lshlrev_b32 v5, tma_hi, v2
1486// CHECK: [0x6f,0x04,0x0a,0x24]
1487
1488v_lshlrev_b32 v5, ttmp11, v2
1489// CHECK: [0x7b,0x04,0x0a,0x24]
1490
1491v_lshlrev_b32 v5, m0, v2
1492// CHECK: [0x7c,0x04,0x0a,0x24]
1493
1494v_lshlrev_b32 v5, exec_lo, v2
1495// CHECK: [0x7e,0x04,0x0a,0x24]
1496
1497v_lshlrev_b32 v5, exec_hi, v2
1498// CHECK: [0x7f,0x04,0x0a,0x24]
1499
1500v_lshlrev_b32 v5, 0, v2
1501// CHECK: [0x80,0x04,0x0a,0x24]
1502
1503v_lshlrev_b32 v5, -1, v2
1504// CHECK: [0xc1,0x04,0x0a,0x24]
1505
1506v_lshlrev_b32 v5, 0.5, v2
1507// CHECK: [0xf0,0x04,0x0a,0x24]
1508
1509v_lshlrev_b32 v5, -4.0, v2
1510// CHECK: [0xf7,0x04,0x0a,0x24]
1511
1512v_lshlrev_b32 v5, src_vccz, v2
1513// CHECK: [0xfb,0x04,0x0a,0x24]
1514
1515v_lshlrev_b32 v5, src_execz, v2
1516// CHECK: [0xfc,0x04,0x0a,0x24]
1517
1518v_lshlrev_b32 v5, src_scc, v2
1519// CHECK: [0xfd,0x04,0x0a,0x24]
1520
1521v_lshlrev_b32 v5, 0xaf123456, v2
1522// CHECK: [0xff,0x04,0x0a,0x24,0x56,0x34,0x12,0xaf]
1523
1524v_lshlrev_b32 v5, 0x3f717273, v2
1525// CHECK: [0xff,0x04,0x0a,0x24,0x73,0x72,0x71,0x3f]
1526
1527v_lshlrev_b32 v5, v1, v255
1528// CHECK: [0x01,0xff,0x0b,0x24]
1529
1530v_and_b32 v5, v1, v2
1531// CHECK: [0x01,0x05,0x0a,0x26]
1532
1533v_and_b32 v255, v1, v2
1534// CHECK: [0x01,0x05,0xfe,0x27]
1535
1536v_and_b32 v5, v255, v2
1537// CHECK: [0xff,0x05,0x0a,0x26]
1538
1539v_and_b32 v5, s1, v2
1540// CHECK: [0x01,0x04,0x0a,0x26]
1541
1542v_and_b32 v5, s101, v2
1543// CHECK: [0x65,0x04,0x0a,0x26]
1544
1545v_and_b32 v5, flat_scratch_lo, v2
1546// CHECK: [0x66,0x04,0x0a,0x26]
1547
1548v_and_b32 v5, flat_scratch_hi, v2
1549// CHECK: [0x67,0x04,0x0a,0x26]
1550
1551v_and_b32 v5, vcc_lo, v2
1552// CHECK: [0x6a,0x04,0x0a,0x26]
1553
1554v_and_b32 v5, vcc_hi, v2
1555// CHECK: [0x6b,0x04,0x0a,0x26]
1556
1557v_and_b32 v5, tba_lo, v2
1558// CHECK: [0x6c,0x04,0x0a,0x26]
1559
1560v_and_b32 v5, tba_hi, v2
1561// CHECK: [0x6d,0x04,0x0a,0x26]
1562
1563v_and_b32 v5, tma_lo, v2
1564// CHECK: [0x6e,0x04,0x0a,0x26]
1565
1566v_and_b32 v5, tma_hi, v2
1567// CHECK: [0x6f,0x04,0x0a,0x26]
1568
1569v_and_b32 v5, ttmp11, v2
1570// CHECK: [0x7b,0x04,0x0a,0x26]
1571
1572v_and_b32 v5, m0, v2
1573// CHECK: [0x7c,0x04,0x0a,0x26]
1574
1575v_and_b32 v5, exec_lo, v2
1576// CHECK: [0x7e,0x04,0x0a,0x26]
1577
1578v_and_b32 v5, exec_hi, v2
1579// CHECK: [0x7f,0x04,0x0a,0x26]
1580
1581v_and_b32 v5, 0, v2
1582// CHECK: [0x80,0x04,0x0a,0x26]
1583
1584v_and_b32 v5, -1, v2
1585// CHECK: [0xc1,0x04,0x0a,0x26]
1586
1587v_and_b32 v5, 0.5, v2
1588// CHECK: [0xf0,0x04,0x0a,0x26]
1589
1590v_and_b32 v5, -4.0, v2
1591// CHECK: [0xf7,0x04,0x0a,0x26]
1592
1593v_and_b32 v5, src_vccz, v2
1594// CHECK: [0xfb,0x04,0x0a,0x26]
1595
1596v_and_b32 v5, src_execz, v2
1597// CHECK: [0xfc,0x04,0x0a,0x26]
1598
1599v_and_b32 v5, src_scc, v2
1600// CHECK: [0xfd,0x04,0x0a,0x26]
1601
1602v_and_b32 v5, src_lds_direct, v2
1603// CHECK: [0xfe,0x04,0x0a,0x26]
1604
1605v_and_b32 v5, 0xaf123456, v2
1606// CHECK: [0xff,0x04,0x0a,0x26,0x56,0x34,0x12,0xaf]
1607
1608v_and_b32 v5, 0x3f717273, v2
1609// CHECK: [0xff,0x04,0x0a,0x26,0x73,0x72,0x71,0x3f]
1610
1611v_and_b32 v5, v1, v255
1612// CHECK: [0x01,0xff,0x0b,0x26]
1613
1614v_or_b32 v5, v1, v2
1615// CHECK: [0x01,0x05,0x0a,0x28]
1616
1617v_or_b32 v255, v1, v2
1618// CHECK: [0x01,0x05,0xfe,0x29]
1619
1620v_or_b32 v5, v255, v2
1621// CHECK: [0xff,0x05,0x0a,0x28]
1622
1623v_or_b32 v5, s1, v2
1624// CHECK: [0x01,0x04,0x0a,0x28]
1625
1626v_or_b32 v5, s101, v2
1627// CHECK: [0x65,0x04,0x0a,0x28]
1628
1629v_or_b32 v5, flat_scratch_lo, v2
1630// CHECK: [0x66,0x04,0x0a,0x28]
1631
1632v_or_b32 v5, flat_scratch_hi, v2
1633// CHECK: [0x67,0x04,0x0a,0x28]
1634
1635v_or_b32 v5, vcc_lo, v2
1636// CHECK: [0x6a,0x04,0x0a,0x28]
1637
1638v_or_b32 v5, vcc_hi, v2
1639// CHECK: [0x6b,0x04,0x0a,0x28]
1640
1641v_or_b32 v5, tba_lo, v2
1642// CHECK: [0x6c,0x04,0x0a,0x28]
1643
1644v_or_b32 v5, tba_hi, v2
1645// CHECK: [0x6d,0x04,0x0a,0x28]
1646
1647v_or_b32 v5, tma_lo, v2
1648// CHECK: [0x6e,0x04,0x0a,0x28]
1649
1650v_or_b32 v5, tma_hi, v2
1651// CHECK: [0x6f,0x04,0x0a,0x28]
1652
1653v_or_b32 v5, ttmp11, v2
1654// CHECK: [0x7b,0x04,0x0a,0x28]
1655
1656v_or_b32 v5, m0, v2
1657// CHECK: [0x7c,0x04,0x0a,0x28]
1658
1659v_or_b32 v5, exec_lo, v2
1660// CHECK: [0x7e,0x04,0x0a,0x28]
1661
1662v_or_b32 v5, exec_hi, v2
1663// CHECK: [0x7f,0x04,0x0a,0x28]
1664
1665v_or_b32 v5, 0, v2
1666// CHECK: [0x80,0x04,0x0a,0x28]
1667
1668v_or_b32 v5, -1, v2
1669// CHECK: [0xc1,0x04,0x0a,0x28]
1670
1671v_or_b32 v5, 0.5, v2
1672// CHECK: [0xf0,0x04,0x0a,0x28]
1673
1674v_or_b32 v5, -4.0, v2
1675// CHECK: [0xf7,0x04,0x0a,0x28]
1676
1677v_or_b32 v5, src_vccz, v2
1678// CHECK: [0xfb,0x04,0x0a,0x28]
1679
1680v_or_b32 v5, src_execz, v2
1681// CHECK: [0xfc,0x04,0x0a,0x28]
1682
1683v_or_b32 v5, src_scc, v2
1684// CHECK: [0xfd,0x04,0x0a,0x28]
1685
1686v_or_b32 v5, src_lds_direct, v2
1687// CHECK: [0xfe,0x04,0x0a,0x28]
1688
1689v_or_b32 v5, 0xaf123456, v2
1690// CHECK: [0xff,0x04,0x0a,0x28,0x56,0x34,0x12,0xaf]
1691
1692v_or_b32 v5, 0x3f717273, v2
1693// CHECK: [0xff,0x04,0x0a,0x28,0x73,0x72,0x71,0x3f]
1694
1695v_or_b32 v5, v1, v255
1696// CHECK: [0x01,0xff,0x0b,0x28]
1697
1698v_xor_b32 v5, v1, v2
1699// CHECK: [0x01,0x05,0x0a,0x2a]
1700
1701v_xor_b32 v255, v1, v2
1702// CHECK: [0x01,0x05,0xfe,0x2b]
1703
1704v_xor_b32 v5, v255, v2
1705// CHECK: [0xff,0x05,0x0a,0x2a]
1706
1707v_xor_b32 v5, s1, v2
1708// CHECK: [0x01,0x04,0x0a,0x2a]
1709
1710v_xor_b32 v5, s101, v2
1711// CHECK: [0x65,0x04,0x0a,0x2a]
1712
1713v_xor_b32 v5, flat_scratch_lo, v2
1714// CHECK: [0x66,0x04,0x0a,0x2a]
1715
1716v_xor_b32 v5, flat_scratch_hi, v2
1717// CHECK: [0x67,0x04,0x0a,0x2a]
1718
1719v_xor_b32 v5, vcc_lo, v2
1720// CHECK: [0x6a,0x04,0x0a,0x2a]
1721
1722v_xor_b32 v5, vcc_hi, v2
1723// CHECK: [0x6b,0x04,0x0a,0x2a]
1724
1725v_xor_b32 v5, tba_lo, v2
1726// CHECK: [0x6c,0x04,0x0a,0x2a]
1727
1728v_xor_b32 v5, tba_hi, v2
1729// CHECK: [0x6d,0x04,0x0a,0x2a]
1730
1731v_xor_b32 v5, tma_lo, v2
1732// CHECK: [0x6e,0x04,0x0a,0x2a]
1733
1734v_xor_b32 v5, tma_hi, v2
1735// CHECK: [0x6f,0x04,0x0a,0x2a]
1736
1737v_xor_b32 v5, ttmp11, v2
1738// CHECK: [0x7b,0x04,0x0a,0x2a]
1739
1740v_xor_b32 v5, m0, v2
1741// CHECK: [0x7c,0x04,0x0a,0x2a]
1742
1743v_xor_b32 v5, exec_lo, v2
1744// CHECK: [0x7e,0x04,0x0a,0x2a]
1745
1746v_xor_b32 v5, exec_hi, v2
1747// CHECK: [0x7f,0x04,0x0a,0x2a]
1748
1749v_xor_b32 v5, 0, v2
1750// CHECK: [0x80,0x04,0x0a,0x2a]
1751
1752v_xor_b32 v5, -1, v2
1753// CHECK: [0xc1,0x04,0x0a,0x2a]
1754
1755v_xor_b32 v5, 0.5, v2
1756// CHECK: [0xf0,0x04,0x0a,0x2a]
1757
1758v_xor_b32 v5, -4.0, v2
1759// CHECK: [0xf7,0x04,0x0a,0x2a]
1760
1761v_xor_b32 v5, src_vccz, v2
1762// CHECK: [0xfb,0x04,0x0a,0x2a]
1763
1764v_xor_b32 v5, src_execz, v2
1765// CHECK: [0xfc,0x04,0x0a,0x2a]
1766
1767v_xor_b32 v5, src_scc, v2
1768// CHECK: [0xfd,0x04,0x0a,0x2a]
1769
1770v_xor_b32 v5, src_lds_direct, v2
1771// CHECK: [0xfe,0x04,0x0a,0x2a]
1772
1773v_xor_b32 v5, 0xaf123456, v2
1774// CHECK: [0xff,0x04,0x0a,0x2a,0x56,0x34,0x12,0xaf]
1775
1776v_xor_b32 v5, 0x3f717273, v2
1777// CHECK: [0xff,0x04,0x0a,0x2a,0x73,0x72,0x71,0x3f]
1778
1779v_xor_b32 v5, v1, v255
1780// CHECK: [0x01,0xff,0x0b,0x2a]
1781
1782v_mac_f32 v5, v1, v2
1783// CHECK: [0x01,0x05,0x0a,0x2c]
1784
1785v_mac_f32 v255, v1, v2
1786// CHECK: [0x01,0x05,0xfe,0x2d]
1787
1788v_mac_f32 v5, v255, v2
1789// CHECK: [0xff,0x05,0x0a,0x2c]
1790
1791v_mac_f32 v5, s1, v2
1792// CHECK: [0x01,0x04,0x0a,0x2c]
1793
1794v_mac_f32 v5, s101, v2
1795// CHECK: [0x65,0x04,0x0a,0x2c]
1796
1797v_mac_f32 v5, flat_scratch_lo, v2
1798// CHECK: [0x66,0x04,0x0a,0x2c]
1799
1800v_mac_f32 v5, flat_scratch_hi, v2
1801// CHECK: [0x67,0x04,0x0a,0x2c]
1802
1803v_mac_f32 v5, vcc_lo, v2
1804// CHECK: [0x6a,0x04,0x0a,0x2c]
1805
1806v_mac_f32 v5, vcc_hi, v2
1807// CHECK: [0x6b,0x04,0x0a,0x2c]
1808
1809v_mac_f32 v5, tba_lo, v2
1810// CHECK: [0x6c,0x04,0x0a,0x2c]
1811
1812v_mac_f32 v5, tba_hi, v2
1813// CHECK: [0x6d,0x04,0x0a,0x2c]
1814
1815v_mac_f32 v5, tma_lo, v2
1816// CHECK: [0x6e,0x04,0x0a,0x2c]
1817
1818v_mac_f32 v5, tma_hi, v2
1819// CHECK: [0x6f,0x04,0x0a,0x2c]
1820
1821v_mac_f32 v5, ttmp11, v2
1822// CHECK: [0x7b,0x04,0x0a,0x2c]
1823
1824v_mac_f32 v5, m0, v2
1825// CHECK: [0x7c,0x04,0x0a,0x2c]
1826
1827v_mac_f32 v5, exec_lo, v2
1828// CHECK: [0x7e,0x04,0x0a,0x2c]
1829
1830v_mac_f32 v5, exec_hi, v2
1831// CHECK: [0x7f,0x04,0x0a,0x2c]
1832
1833v_mac_f32 v5, 0, v2
1834// CHECK: [0x80,0x04,0x0a,0x2c]
1835
1836v_mac_f32 v5, -1, v2
1837// CHECK: [0xc1,0x04,0x0a,0x2c]
1838
1839v_mac_f32 v5, 0.5, v2
1840// CHECK: [0xf0,0x04,0x0a,0x2c]
1841
1842v_mac_f32 v5, -4.0, v2
1843// CHECK: [0xf7,0x04,0x0a,0x2c]
1844
1845v_mac_f32 v5, src_vccz, v2
1846// CHECK: [0xfb,0x04,0x0a,0x2c]
1847
1848v_mac_f32 v5, src_execz, v2
1849// CHECK: [0xfc,0x04,0x0a,0x2c]
1850
1851v_mac_f32 v5, src_scc, v2
1852// CHECK: [0xfd,0x04,0x0a,0x2c]
1853
1854v_mac_f32 v5, src_lds_direct, v2
1855// CHECK: [0xfe,0x04,0x0a,0x2c]
1856
1857v_mac_f32 v5, 0xaf123456, v2
1858// CHECK: [0xff,0x04,0x0a,0x2c,0x56,0x34,0x12,0xaf]
1859
1860v_mac_f32 v5, 0x3f717273, v2
1861// CHECK: [0xff,0x04,0x0a,0x2c,0x73,0x72,0x71,0x3f]
1862
1863v_mac_f32 v5, v1, v255
1864// CHECK: [0x01,0xff,0x0b,0x2c]
1865
1866v_madmk_f32 v5, v1, 0x11213141, v3
1867// CHECK: [0x01,0x07,0x0a,0x2e,0x41,0x31,0x21,0x11]
1868
1869v_madmk_f32 v255, v1, 0x11213141, v3
1870// CHECK: [0x01,0x07,0xfe,0x2f,0x41,0x31,0x21,0x11]
1871
1872v_madmk_f32 v5, v255, 0x11213141, v3
1873// CHECK: [0xff,0x07,0x0a,0x2e,0x41,0x31,0x21,0x11]
1874
1875v_madmk_f32 v5, 0, 0x11213141, v3
1876// CHECK: [0x80,0x06,0x0a,0x2e,0x41,0x31,0x21,0x11]
1877
1878v_madmk_f32 v5, -1, 0x11213141, v3
1879// CHECK: [0xc1,0x06,0x0a,0x2e,0x41,0x31,0x21,0x11]
1880
1881v_madmk_f32 v5, 0.5, 0x11213141, v3
1882// CHECK: [0xf0,0x06,0x0a,0x2e,0x41,0x31,0x21,0x11]
1883
1884v_madmk_f32 v5, -4.0, 0x11213141, v3
1885// CHECK: [0xf7,0x06,0x0a,0x2e,0x41,0x31,0x21,0x11]
1886
1887v_madmk_f32 v5, src_lds_direct, 0x11213141, v3
1888// CHECK: [0xfe,0x06,0x0a,0x2e,0x41,0x31,0x21,0x11]
1889
1890v_madmk_f32 v5, v1, 0xa1b1c1d1, v3
1891// CHECK: [0x01,0x07,0x0a,0x2e,0xd1,0xc1,0xb1,0xa1]
1892
1893v_madmk_f32 v5, v1, 0x11213141, v255
1894// CHECK: [0x01,0xff,0x0b,0x2e,0x41,0x31,0x21,0x11]
1895
1896v_madak_f32 v5, v1, v2, 0x11213141
1897// CHECK: [0x01,0x05,0x0a,0x30,0x41,0x31,0x21,0x11]
1898
1899v_madak_f32 v255, v1, v2, 0x11213141
1900// CHECK: [0x01,0x05,0xfe,0x31,0x41,0x31,0x21,0x11]
1901
1902v_madak_f32 v5, v255, v2, 0x11213141
1903// CHECK: [0xff,0x05,0x0a,0x30,0x41,0x31,0x21,0x11]
1904
1905v_madak_f32 v5, 0, v2, 0x11213141
1906// CHECK: [0x80,0x04,0x0a,0x30,0x41,0x31,0x21,0x11]
1907
1908v_madak_f32 v5, -1, v2, 0x11213141
1909// CHECK: [0xc1,0x04,0x0a,0x30,0x41,0x31,0x21,0x11]
1910
1911v_madak_f32 v5, 0.5, v2, 0x11213141
1912// CHECK: [0xf0,0x04,0x0a,0x30,0x41,0x31,0x21,0x11]
1913
1914v_madak_f32 v5, -4.0, v2, 0x11213141
1915// CHECK: [0xf7,0x04,0x0a,0x30,0x41,0x31,0x21,0x11]
1916
1917v_madak_f32 v5, src_lds_direct, v2, 0x11213141
1918// CHECK: [0xfe,0x04,0x0a,0x30,0x41,0x31,0x21,0x11]
1919
1920v_madak_f32 v5, v1, v255, 0x11213141
1921// CHECK: [0x01,0xff,0x0b,0x30,0x41,0x31,0x21,0x11]
1922
1923v_madak_f32 v5, v1, v2, 0xa1b1c1d1
1924// CHECK: [0x01,0x05,0x0a,0x30,0xd1,0xc1,0xb1,0xa1]
1925
1926v_add_u32 v5, vcc, v1, v2
1927// CHECK: [0x01,0x05,0x0a,0x32]
1928
1929v_add_u32 v255, vcc, v1, v2
1930// CHECK: [0x01,0x05,0xfe,0x33]
1931
1932v_add_u32 v5, vcc, v255, v2
1933// CHECK: [0xff,0x05,0x0a,0x32]
1934
1935v_add_u32 v5, vcc, s1, v2
1936// CHECK: [0x01,0x04,0x0a,0x32]
1937
1938v_add_u32 v5, vcc, s101, v2
1939// CHECK: [0x65,0x04,0x0a,0x32]
1940
1941v_add_u32 v5, vcc, flat_scratch_lo, v2
1942// CHECK: [0x66,0x04,0x0a,0x32]
1943
1944v_add_u32 v5, vcc, flat_scratch_hi, v2
1945// CHECK: [0x67,0x04,0x0a,0x32]
1946
1947v_add_u32 v5, vcc, vcc_lo, v2
1948// CHECK: [0x6a,0x04,0x0a,0x32]
1949
1950v_add_u32 v5, vcc, vcc_hi, v2
1951// CHECK: [0x6b,0x04,0x0a,0x32]
1952
1953v_add_u32 v5, vcc, tba_lo, v2
1954// CHECK: [0x6c,0x04,0x0a,0x32]
1955
1956v_add_u32 v5, vcc, tba_hi, v2
1957// CHECK: [0x6d,0x04,0x0a,0x32]
1958
1959v_add_u32 v5, vcc, tma_lo, v2
1960// CHECK: [0x6e,0x04,0x0a,0x32]
1961
1962v_add_u32 v5, vcc, tma_hi, v2
1963// CHECK: [0x6f,0x04,0x0a,0x32]
1964
1965v_add_u32 v5, vcc, ttmp11, v2
1966// CHECK: [0x7b,0x04,0x0a,0x32]
1967
1968v_add_u32 v5, vcc, m0, v2
1969// CHECK: [0x7c,0x04,0x0a,0x32]
1970
1971v_add_u32 v5, vcc, exec_lo, v2
1972// CHECK: [0x7e,0x04,0x0a,0x32]
1973
1974v_add_u32 v5, vcc, exec_hi, v2
1975// CHECK: [0x7f,0x04,0x0a,0x32]
1976
1977v_add_u32 v5, vcc, 0, v2
1978// CHECK: [0x80,0x04,0x0a,0x32]
1979
1980v_add_u32 v5, vcc, -1, v2
1981// CHECK: [0xc1,0x04,0x0a,0x32]
1982
1983v_add_u32 v5, vcc, 0.5, v2
1984// CHECK: [0xf0,0x04,0x0a,0x32]
1985
1986v_add_u32 v5, vcc, -4.0, v2
1987// CHECK: [0xf7,0x04,0x0a,0x32]
1988
1989v_add_u32 v5, vcc, src_vccz, v2
1990// CHECK: [0xfb,0x04,0x0a,0x32]
1991
1992v_add_u32 v5, vcc, src_execz, v2
1993// CHECK: [0xfc,0x04,0x0a,0x32]
1994
1995v_add_u32 v5, vcc, src_scc, v2
1996// CHECK: [0xfd,0x04,0x0a,0x32]
1997
1998v_add_u32 v5, vcc, src_lds_direct, v2
1999// CHECK: [0xfe,0x04,0x0a,0x32]
2000
2001v_add_u32 v5, vcc, 0xaf123456, v2
2002// CHECK: [0xff,0x04,0x0a,0x32,0x56,0x34,0x12,0xaf]
2003
2004v_add_u32 v5, vcc, 0x3f717273, v2
2005// CHECK: [0xff,0x04,0x0a,0x32,0x73,0x72,0x71,0x3f]
2006
2007v_add_u32 v5, vcc, v1, v255
2008// CHECK: [0x01,0xff,0x0b,0x32]
2009
2010v_sub_u32 v5, vcc, v1, v2
2011// CHECK: [0x01,0x05,0x0a,0x34]
2012
2013v_sub_u32 v255, vcc, v1, v2
2014// CHECK: [0x01,0x05,0xfe,0x35]
2015
2016v_sub_u32 v5, vcc, v255, v2
2017// CHECK: [0xff,0x05,0x0a,0x34]
2018
2019v_sub_u32 v5, vcc, s1, v2
2020// CHECK: [0x01,0x04,0x0a,0x34]
2021
2022v_sub_u32 v5, vcc, s101, v2
2023// CHECK: [0x65,0x04,0x0a,0x34]
2024
2025v_sub_u32 v5, vcc, flat_scratch_lo, v2
2026// CHECK: [0x66,0x04,0x0a,0x34]
2027
2028v_sub_u32 v5, vcc, flat_scratch_hi, v2
2029// CHECK: [0x67,0x04,0x0a,0x34]
2030
2031v_sub_u32 v5, vcc, vcc_lo, v2
2032// CHECK: [0x6a,0x04,0x0a,0x34]
2033
2034v_sub_u32 v5, vcc, vcc_hi, v2
2035// CHECK: [0x6b,0x04,0x0a,0x34]
2036
2037v_sub_u32 v5, vcc, tba_lo, v2
2038// CHECK: [0x6c,0x04,0x0a,0x34]
2039
2040v_sub_u32 v5, vcc, tba_hi, v2
2041// CHECK: [0x6d,0x04,0x0a,0x34]
2042
2043v_sub_u32 v5, vcc, tma_lo, v2
2044// CHECK: [0x6e,0x04,0x0a,0x34]
2045
2046v_sub_u32 v5, vcc, tma_hi, v2
2047// CHECK: [0x6f,0x04,0x0a,0x34]
2048
2049v_sub_u32 v5, vcc, ttmp11, v2
2050// CHECK: [0x7b,0x04,0x0a,0x34]
2051
2052v_sub_u32 v5, vcc, m0, v2
2053// CHECK: [0x7c,0x04,0x0a,0x34]
2054
2055v_sub_u32 v5, vcc, exec_lo, v2
2056// CHECK: [0x7e,0x04,0x0a,0x34]
2057
2058v_sub_u32 v5, vcc, exec_hi, v2
2059// CHECK: [0x7f,0x04,0x0a,0x34]
2060
2061v_sub_u32 v5, vcc, 0, v2
2062// CHECK: [0x80,0x04,0x0a,0x34]
2063
2064v_sub_u32 v5, vcc, -1, v2
2065// CHECK: [0xc1,0x04,0x0a,0x34]
2066
2067v_sub_u32 v5, vcc, 0.5, v2
2068// CHECK: [0xf0,0x04,0x0a,0x34]
2069
2070v_sub_u32 v5, vcc, -4.0, v2
2071// CHECK: [0xf7,0x04,0x0a,0x34]
2072
2073v_sub_u32 v5, vcc, src_vccz, v2
2074// CHECK: [0xfb,0x04,0x0a,0x34]
2075
2076v_sub_u32 v5, vcc, src_execz, v2
2077// CHECK: [0xfc,0x04,0x0a,0x34]
2078
2079v_sub_u32 v5, vcc, src_scc, v2
2080// CHECK: [0xfd,0x04,0x0a,0x34]
2081
2082v_sub_u32 v5, vcc, src_lds_direct, v2
2083// CHECK: [0xfe,0x04,0x0a,0x34]
2084
2085v_sub_u32 v5, vcc, 0xaf123456, v2
2086// CHECK: [0xff,0x04,0x0a,0x34,0x56,0x34,0x12,0xaf]
2087
2088v_sub_u32 v5, vcc, 0x3f717273, v2
2089// CHECK: [0xff,0x04,0x0a,0x34,0x73,0x72,0x71,0x3f]
2090
2091v_sub_u32 v5, vcc, v1, v255
2092// CHECK: [0x01,0xff,0x0b,0x34]
2093
2094v_subrev_u32 v5, vcc, v1, v2
2095// CHECK: [0x01,0x05,0x0a,0x36]
2096
2097v_subrev_u32 v255, vcc, v1, v2
2098// CHECK: [0x01,0x05,0xfe,0x37]
2099
2100v_subrev_u32 v5, vcc, v255, v2
2101// CHECK: [0xff,0x05,0x0a,0x36]
2102
2103v_subrev_u32 v5, vcc, s1, v2
2104// CHECK: [0x01,0x04,0x0a,0x36]
2105
2106v_subrev_u32 v5, vcc, s101, v2
2107// CHECK: [0x65,0x04,0x0a,0x36]
2108
2109v_subrev_u32 v5, vcc, flat_scratch_lo, v2
2110// CHECK: [0x66,0x04,0x0a,0x36]
2111
2112v_subrev_u32 v5, vcc, flat_scratch_hi, v2
2113// CHECK: [0x67,0x04,0x0a,0x36]
2114
2115v_subrev_u32 v5, vcc, vcc_lo, v2
2116// CHECK: [0x6a,0x04,0x0a,0x36]
2117
2118v_subrev_u32 v5, vcc, vcc_hi, v2
2119// CHECK: [0x6b,0x04,0x0a,0x36]
2120
2121v_subrev_u32 v5, vcc, tba_lo, v2
2122// CHECK: [0x6c,0x04,0x0a,0x36]
2123
2124v_subrev_u32 v5, vcc, tba_hi, v2
2125// CHECK: [0x6d,0x04,0x0a,0x36]
2126
2127v_subrev_u32 v5, vcc, tma_lo, v2
2128// CHECK: [0x6e,0x04,0x0a,0x36]
2129
2130v_subrev_u32 v5, vcc, tma_hi, v2
2131// CHECK: [0x6f,0x04,0x0a,0x36]
2132
2133v_subrev_u32 v5, vcc, ttmp11, v2
2134// CHECK: [0x7b,0x04,0x0a,0x36]
2135
2136v_subrev_u32 v5, vcc, m0, v2
2137// CHECK: [0x7c,0x04,0x0a,0x36]
2138
2139v_subrev_u32 v5, vcc, exec_lo, v2
2140// CHECK: [0x7e,0x04,0x0a,0x36]
2141
2142v_subrev_u32 v5, vcc, exec_hi, v2
2143// CHECK: [0x7f,0x04,0x0a,0x36]
2144
2145v_subrev_u32 v5, vcc, 0, v2
2146// CHECK: [0x80,0x04,0x0a,0x36]
2147
2148v_subrev_u32 v5, vcc, -1, v2
2149// CHECK: [0xc1,0x04,0x0a,0x36]
2150
2151v_subrev_u32 v5, vcc, 0.5, v2
2152// CHECK: [0xf0,0x04,0x0a,0x36]
2153
2154v_subrev_u32 v5, vcc, -4.0, v2
2155// CHECK: [0xf7,0x04,0x0a,0x36]
2156
2157v_subrev_u32 v5, vcc, src_vccz, v2
2158// CHECK: [0xfb,0x04,0x0a,0x36]
2159
2160v_subrev_u32 v5, vcc, src_execz, v2
2161// CHECK: [0xfc,0x04,0x0a,0x36]
2162
2163v_subrev_u32 v5, vcc, src_scc, v2
2164// CHECK: [0xfd,0x04,0x0a,0x36]
2165
2166v_subrev_u32 v5, vcc, 0xaf123456, v2
2167// CHECK: [0xff,0x04,0x0a,0x36,0x56,0x34,0x12,0xaf]
2168
2169v_subrev_u32 v5, vcc, 0x3f717273, v2
2170// CHECK: [0xff,0x04,0x0a,0x36,0x73,0x72,0x71,0x3f]
2171
2172v_subrev_u32 v5, vcc, v1, v255
2173// CHECK: [0x01,0xff,0x0b,0x36]
2174
2175v_addc_u32 v5, vcc, v1, v2, vcc
2176// CHECK: [0x01,0x05,0x0a,0x38]
2177
2178v_addc_u32 v255, vcc, v1, v2, vcc
2179// CHECK: [0x01,0x05,0xfe,0x39]
2180
2181v_addc_u32 v5, vcc, v255, v2, vcc
2182// CHECK: [0xff,0x05,0x0a,0x38]
2183
2184v_addc_u32 v5, vcc, 0, v2, vcc
2185// CHECK: [0x80,0x04,0x0a,0x38]
2186
2187v_addc_u32 v5, vcc, -1, v2, vcc
2188// CHECK: [0xc1,0x04,0x0a,0x38]
2189
2190v_addc_u32 v5, vcc, 0.5, v2, vcc
2191// CHECK: [0xf0,0x04,0x0a,0x38]
2192
2193v_addc_u32 v5, vcc, -4.0, v2, vcc
2194// CHECK: [0xf7,0x04,0x0a,0x38]
2195
2196v_addc_u32 v5, vcc, src_lds_direct, v2, vcc
2197// CHECK: [0xfe,0x04,0x0a,0x38]
2198
2199v_addc_u32 v5, vcc, v1, v255, vcc
2200// CHECK: [0x01,0xff,0x0b,0x38]
2201
2202v_subb_u32 v5, vcc, v1, v2, vcc
2203// CHECK: [0x01,0x05,0x0a,0x3a]
2204
2205v_subb_u32 v255, vcc, v1, v2, vcc
2206// CHECK: [0x01,0x05,0xfe,0x3b]
2207
2208v_subb_u32 v5, vcc, v255, v2, vcc
2209// CHECK: [0xff,0x05,0x0a,0x3a]
2210
2211v_subb_u32 v5, vcc, 0, v2, vcc
2212// CHECK: [0x80,0x04,0x0a,0x3a]
2213
2214v_subb_u32 v5, vcc, -1, v2, vcc
2215// CHECK: [0xc1,0x04,0x0a,0x3a]
2216
2217v_subb_u32 v5, vcc, 0.5, v2, vcc
2218// CHECK: [0xf0,0x04,0x0a,0x3a]
2219
2220v_subb_u32 v5, vcc, -4.0, v2, vcc
2221// CHECK: [0xf7,0x04,0x0a,0x3a]
2222
2223v_subb_u32 v5, vcc, src_lds_direct, v2, vcc
2224// CHECK: [0xfe,0x04,0x0a,0x3a]
2225
2226v_subb_u32 v5, vcc, v1, v255, vcc
2227// CHECK: [0x01,0xff,0x0b,0x3a]
2228
2229v_subbrev_u32 v5, vcc, v1, v2, vcc
2230// CHECK: [0x01,0x05,0x0a,0x3c]
2231
2232v_subbrev_u32 v255, vcc, v1, v2, vcc
2233// CHECK: [0x01,0x05,0xfe,0x3d]
2234
2235v_subbrev_u32 v5, vcc, v255, v2, vcc
2236// CHECK: [0xff,0x05,0x0a,0x3c]
2237
2238v_subbrev_u32 v5, vcc, 0, v2, vcc
2239// CHECK: [0x80,0x04,0x0a,0x3c]
2240
2241v_subbrev_u32 v5, vcc, -1, v2, vcc
2242// CHECK: [0xc1,0x04,0x0a,0x3c]
2243
2244v_subbrev_u32 v5, vcc, 0.5, v2, vcc
2245// CHECK: [0xf0,0x04,0x0a,0x3c]
2246
2247v_subbrev_u32 v5, vcc, -4.0, v2, vcc
2248// CHECK: [0xf7,0x04,0x0a,0x3c]
2249
2250v_subbrev_u32 v5, vcc, v1, v255, vcc
2251// CHECK: [0x01,0xff,0x0b,0x3c]
2252
2253v_add_f16 v5, v1, v2
2254// CHECK: [0x01,0x05,0x0a,0x3e]
2255
2256v_add_f16 v255, v1, v2
2257// CHECK: [0x01,0x05,0xfe,0x3f]
2258
2259v_add_f16 v5, v255, v2
2260// CHECK: [0xff,0x05,0x0a,0x3e]
2261
2262v_add_f16 v5, s1, v2
2263// CHECK: [0x01,0x04,0x0a,0x3e]
2264
2265v_add_f16 v5, s101, v2
2266// CHECK: [0x65,0x04,0x0a,0x3e]
2267
2268v_add_f16 v5, flat_scratch_lo, v2
2269// CHECK: [0x66,0x04,0x0a,0x3e]
2270
2271v_add_f16 v5, flat_scratch_hi, v2
2272// CHECK: [0x67,0x04,0x0a,0x3e]
2273
2274v_add_f16 v5, vcc_lo, v2
2275// CHECK: [0x6a,0x04,0x0a,0x3e]
2276
2277v_add_f16 v5, vcc_hi, v2
2278// CHECK: [0x6b,0x04,0x0a,0x3e]
2279
2280v_add_f16 v5, tba_lo, v2
2281// CHECK: [0x6c,0x04,0x0a,0x3e]
2282
2283v_add_f16 v5, tba_hi, v2
2284// CHECK: [0x6d,0x04,0x0a,0x3e]
2285
2286v_add_f16 v5, tma_lo, v2
2287// CHECK: [0x6e,0x04,0x0a,0x3e]
2288
2289v_add_f16 v5, tma_hi, v2
2290// CHECK: [0x6f,0x04,0x0a,0x3e]
2291
2292v_add_f16 v5, ttmp11, v2
2293// CHECK: [0x7b,0x04,0x0a,0x3e]
2294
2295v_add_f16 v5, m0, v2
2296// CHECK: [0x7c,0x04,0x0a,0x3e]
2297
2298v_add_f16 v5, exec_lo, v2
2299// CHECK: [0x7e,0x04,0x0a,0x3e]
2300
2301v_add_f16 v5, exec_hi, v2
2302// CHECK: [0x7f,0x04,0x0a,0x3e]
2303
2304v_add_f16 v5, 0, v2
2305// CHECK: [0x80,0x04,0x0a,0x3e]
2306
2307v_add_f16 v5, -1, v2
2308// CHECK: [0xc1,0x04,0x0a,0x3e]
2309
2310v_add_f16 v5, 0.5, v2
2311// CHECK: [0xf0,0x04,0x0a,0x3e]
2312
2313v_add_f16 v5, -4.0, v2
2314// CHECK: [0xf7,0x04,0x0a,0x3e]
2315
2316v_add_f16 v5, src_vccz, v2
2317// CHECK: [0xfb,0x04,0x0a,0x3e]
2318
2319v_add_f16 v5, src_execz, v2
2320// CHECK: [0xfc,0x04,0x0a,0x3e]
2321
2322v_add_f16 v5, src_scc, v2
2323// CHECK: [0xfd,0x04,0x0a,0x3e]
2324
2325v_add_f16 v5, src_lds_direct, v2
2326// CHECK: [0xfe,0x04,0x0a,0x3e]
2327
2328v_add_f16 v5, 0xfe0b, v2
2329// CHECK: [0xff,0x04,0x0a,0x3e,0x0b,0xfe,0x00,0x00]
2330
2331v_add_f16 v5, 0x3456, v2
2332// CHECK: [0xff,0x04,0x0a,0x3e,0x56,0x34,0x00,0x00]
2333
2334v_add_f16 v5, v1, v255
2335// CHECK: [0x01,0xff,0x0b,0x3e]
2336
2337v_sub_f16 v5, v1, v2
2338// CHECK: [0x01,0x05,0x0a,0x40]
2339
2340v_sub_f16 v255, v1, v2
2341// CHECK: [0x01,0x05,0xfe,0x41]
2342
2343v_sub_f16 v5, v255, v2
2344// CHECK: [0xff,0x05,0x0a,0x40]
2345
2346v_sub_f16 v5, s1, v2
2347// CHECK: [0x01,0x04,0x0a,0x40]
2348
2349v_sub_f16 v5, s101, v2
2350// CHECK: [0x65,0x04,0x0a,0x40]
2351
2352v_sub_f16 v5, flat_scratch_lo, v2
2353// CHECK: [0x66,0x04,0x0a,0x40]
2354
2355v_sub_f16 v5, flat_scratch_hi, v2
2356// CHECK: [0x67,0x04,0x0a,0x40]
2357
2358v_sub_f16 v5, vcc_lo, v2
2359// CHECK: [0x6a,0x04,0x0a,0x40]
2360
2361v_sub_f16 v5, vcc_hi, v2
2362// CHECK: [0x6b,0x04,0x0a,0x40]
2363
2364v_sub_f16 v5, tba_lo, v2
2365// CHECK: [0x6c,0x04,0x0a,0x40]
2366
2367v_sub_f16 v5, tba_hi, v2
2368// CHECK: [0x6d,0x04,0x0a,0x40]
2369
2370v_sub_f16 v5, tma_lo, v2
2371// CHECK: [0x6e,0x04,0x0a,0x40]
2372
2373v_sub_f16 v5, tma_hi, v2
2374// CHECK: [0x6f,0x04,0x0a,0x40]
2375
2376v_sub_f16 v5, ttmp11, v2
2377// CHECK: [0x7b,0x04,0x0a,0x40]
2378
2379v_sub_f16 v5, m0, v2
2380// CHECK: [0x7c,0x04,0x0a,0x40]
2381
2382v_sub_f16 v5, exec_lo, v2
2383// CHECK: [0x7e,0x04,0x0a,0x40]
2384
2385v_sub_f16 v5, exec_hi, v2
2386// CHECK: [0x7f,0x04,0x0a,0x40]
2387
2388v_sub_f16 v5, 0, v2
2389// CHECK: [0x80,0x04,0x0a,0x40]
2390
2391v_sub_f16 v5, -1, v2
2392// CHECK: [0xc1,0x04,0x0a,0x40]
2393
2394v_sub_f16 v5, 0.5, v2
2395// CHECK: [0xf0,0x04,0x0a,0x40]
2396
2397v_sub_f16 v5, -4.0, v2
2398// CHECK: [0xf7,0x04,0x0a,0x40]
2399
2400v_sub_f16 v5, src_vccz, v2
2401// CHECK: [0xfb,0x04,0x0a,0x40]
2402
2403v_sub_f16 v5, src_execz, v2
2404// CHECK: [0xfc,0x04,0x0a,0x40]
2405
2406v_sub_f16 v5, src_scc, v2
2407// CHECK: [0xfd,0x04,0x0a,0x40]
2408
2409v_sub_f16 v5, src_lds_direct, v2
2410// CHECK: [0xfe,0x04,0x0a,0x40]
2411
2412v_sub_f16 v5, 0xfe0b, v2
2413// CHECK: [0xff,0x04,0x0a,0x40,0x0b,0xfe,0x00,0x00]
2414
2415v_sub_f16 v5, 0x3456, v2
2416// CHECK: [0xff,0x04,0x0a,0x40,0x56,0x34,0x00,0x00]
2417
2418v_sub_f16 v5, v1, v255
2419// CHECK: [0x01,0xff,0x0b,0x40]
2420
2421v_subrev_f16 v5, v1, v2
2422// CHECK: [0x01,0x05,0x0a,0x42]
2423
2424v_subrev_f16 v255, v1, v2
2425// CHECK: [0x01,0x05,0xfe,0x43]
2426
2427v_subrev_f16 v5, v255, v2
2428// CHECK: [0xff,0x05,0x0a,0x42]
2429
2430v_subrev_f16 v5, s1, v2
2431// CHECK: [0x01,0x04,0x0a,0x42]
2432
2433v_subrev_f16 v5, s101, v2
2434// CHECK: [0x65,0x04,0x0a,0x42]
2435
2436v_subrev_f16 v5, flat_scratch_lo, v2
2437// CHECK: [0x66,0x04,0x0a,0x42]
2438
2439v_subrev_f16 v5, flat_scratch_hi, v2
2440// CHECK: [0x67,0x04,0x0a,0x42]
2441
2442v_subrev_f16 v5, vcc_lo, v2
2443// CHECK: [0x6a,0x04,0x0a,0x42]
2444
2445v_subrev_f16 v5, vcc_hi, v2
2446// CHECK: [0x6b,0x04,0x0a,0x42]
2447
2448v_subrev_f16 v5, tba_lo, v2
2449// CHECK: [0x6c,0x04,0x0a,0x42]
2450
2451v_subrev_f16 v5, tba_hi, v2
2452// CHECK: [0x6d,0x04,0x0a,0x42]
2453
2454v_subrev_f16 v5, tma_lo, v2
2455// CHECK: [0x6e,0x04,0x0a,0x42]
2456
2457v_subrev_f16 v5, tma_hi, v2
2458// CHECK: [0x6f,0x04,0x0a,0x42]
2459
2460v_subrev_f16 v5, ttmp11, v2
2461// CHECK: [0x7b,0x04,0x0a,0x42]
2462
2463v_subrev_f16 v5, m0, v2
2464// CHECK: [0x7c,0x04,0x0a,0x42]
2465
2466v_subrev_f16 v5, exec_lo, v2
2467// CHECK: [0x7e,0x04,0x0a,0x42]
2468
2469v_subrev_f16 v5, exec_hi, v2
2470// CHECK: [0x7f,0x04,0x0a,0x42]
2471
2472v_subrev_f16 v5, 0, v2
2473// CHECK: [0x80,0x04,0x0a,0x42]
2474
2475v_subrev_f16 v5, -1, v2
2476// CHECK: [0xc1,0x04,0x0a,0x42]
2477
2478v_subrev_f16 v5, 0.5, v2
2479// CHECK: [0xf0,0x04,0x0a,0x42]
2480
2481v_subrev_f16 v5, -4.0, v2
2482// CHECK: [0xf7,0x04,0x0a,0x42]
2483
2484v_subrev_f16 v5, src_vccz, v2
2485// CHECK: [0xfb,0x04,0x0a,0x42]
2486
2487v_subrev_f16 v5, src_execz, v2
2488// CHECK: [0xfc,0x04,0x0a,0x42]
2489
2490v_subrev_f16 v5, src_scc, v2
2491// CHECK: [0xfd,0x04,0x0a,0x42]
2492
2493v_subrev_f16 v5, 0xfe0b, v2
2494// CHECK: [0xff,0x04,0x0a,0x42,0x0b,0xfe,0x00,0x00]
2495
2496v_subrev_f16 v5, 0x3456, v2
2497// CHECK: [0xff,0x04,0x0a,0x42,0x56,0x34,0x00,0x00]
2498
2499v_subrev_f16 v5, v1, v255
2500// CHECK: [0x01,0xff,0x0b,0x42]
2501
2502v_mul_f16 v5, v1, v2
2503// CHECK: [0x01,0x05,0x0a,0x44]
2504
2505v_mul_f16 v255, v1, v2
2506// CHECK: [0x01,0x05,0xfe,0x45]
2507
2508v_mul_f16 v5, v255, v2
2509// CHECK: [0xff,0x05,0x0a,0x44]
2510
2511v_mul_f16 v5, s1, v2
2512// CHECK: [0x01,0x04,0x0a,0x44]
2513
2514v_mul_f16 v5, s101, v2
2515// CHECK: [0x65,0x04,0x0a,0x44]
2516
2517v_mul_f16 v5, flat_scratch_lo, v2
2518// CHECK: [0x66,0x04,0x0a,0x44]
2519
2520v_mul_f16 v5, flat_scratch_hi, v2
2521// CHECK: [0x67,0x04,0x0a,0x44]
2522
2523v_mul_f16 v5, vcc_lo, v2
2524// CHECK: [0x6a,0x04,0x0a,0x44]
2525
2526v_mul_f16 v5, vcc_hi, v2
2527// CHECK: [0x6b,0x04,0x0a,0x44]
2528
2529v_mul_f16 v5, tba_lo, v2
2530// CHECK: [0x6c,0x04,0x0a,0x44]
2531
2532v_mul_f16 v5, tba_hi, v2
2533// CHECK: [0x6d,0x04,0x0a,0x44]
2534
2535v_mul_f16 v5, tma_lo, v2
2536// CHECK: [0x6e,0x04,0x0a,0x44]
2537
2538v_mul_f16 v5, tma_hi, v2
2539// CHECK: [0x6f,0x04,0x0a,0x44]
2540
2541v_mul_f16 v5, ttmp11, v2
2542// CHECK: [0x7b,0x04,0x0a,0x44]
2543
2544v_mul_f16 v5, m0, v2
2545// CHECK: [0x7c,0x04,0x0a,0x44]
2546
2547v_mul_f16 v5, exec_lo, v2
2548// CHECK: [0x7e,0x04,0x0a,0x44]
2549
2550v_mul_f16 v5, exec_hi, v2
2551// CHECK: [0x7f,0x04,0x0a,0x44]
2552
2553v_mul_f16 v5, 0, v2
2554// CHECK: [0x80,0x04,0x0a,0x44]
2555
2556v_mul_f16 v5, -1, v2
2557// CHECK: [0xc1,0x04,0x0a,0x44]
2558
2559v_mul_f16 v5, 0.5, v2
2560// CHECK: [0xf0,0x04,0x0a,0x44]
2561
2562v_mul_f16 v5, -4.0, v2
2563// CHECK: [0xf7,0x04,0x0a,0x44]
2564
2565v_mul_f16 v5, src_vccz, v2
2566// CHECK: [0xfb,0x04,0x0a,0x44]
2567
2568v_mul_f16 v5, src_execz, v2
2569// CHECK: [0xfc,0x04,0x0a,0x44]
2570
2571v_mul_f16 v5, src_scc, v2
2572// CHECK: [0xfd,0x04,0x0a,0x44]
2573
2574v_mul_f16 v5, src_lds_direct, v2
2575// CHECK: [0xfe,0x04,0x0a,0x44]
2576
2577v_mul_f16 v5, 0xfe0b, v2
2578// CHECK: [0xff,0x04,0x0a,0x44,0x0b,0xfe,0x00,0x00]
2579
2580v_mul_f16 v5, 0x3456, v2
2581// CHECK: [0xff,0x04,0x0a,0x44,0x56,0x34,0x00,0x00]
2582
2583v_mul_f16 v5, v1, v255
2584// CHECK: [0x01,0xff,0x0b,0x44]
2585
2586v_mac_f16 v5, v1, v2
2587// CHECK: [0x01,0x05,0x0a,0x46]
2588
2589v_mac_f16 v255, v1, v2
2590// CHECK: [0x01,0x05,0xfe,0x47]
2591
2592v_mac_f16 v5, v255, v2
2593// CHECK: [0xff,0x05,0x0a,0x46]
2594
2595v_mac_f16 v5, s1, v2
2596// CHECK: [0x01,0x04,0x0a,0x46]
2597
2598v_mac_f16 v5, s101, v2
2599// CHECK: [0x65,0x04,0x0a,0x46]
2600
2601v_mac_f16 v5, flat_scratch_lo, v2
2602// CHECK: [0x66,0x04,0x0a,0x46]
2603
2604v_mac_f16 v5, flat_scratch_hi, v2
2605// CHECK: [0x67,0x04,0x0a,0x46]
2606
2607v_mac_f16 v5, vcc_lo, v2
2608// CHECK: [0x6a,0x04,0x0a,0x46]
2609
2610v_mac_f16 v5, vcc_hi, v2
2611// CHECK: [0x6b,0x04,0x0a,0x46]
2612
2613v_mac_f16 v5, tba_lo, v2
2614// CHECK: [0x6c,0x04,0x0a,0x46]
2615
2616v_mac_f16 v5, tba_hi, v2
2617// CHECK: [0x6d,0x04,0x0a,0x46]
2618
2619v_mac_f16 v5, tma_lo, v2
2620// CHECK: [0x6e,0x04,0x0a,0x46]
2621
2622v_mac_f16 v5, tma_hi, v2
2623// CHECK: [0x6f,0x04,0x0a,0x46]
2624
2625v_mac_f16 v5, ttmp11, v2
2626// CHECK: [0x7b,0x04,0x0a,0x46]
2627
2628v_mac_f16 v5, m0, v2
2629// CHECK: [0x7c,0x04,0x0a,0x46]
2630
2631v_mac_f16 v5, exec_lo, v2
2632// CHECK: [0x7e,0x04,0x0a,0x46]
2633
2634v_mac_f16 v5, exec_hi, v2
2635// CHECK: [0x7f,0x04,0x0a,0x46]
2636
2637v_mac_f16 v5, 0, v2
2638// CHECK: [0x80,0x04,0x0a,0x46]
2639
2640v_mac_f16 v5, -1, v2
2641// CHECK: [0xc1,0x04,0x0a,0x46]
2642
2643v_mac_f16 v5, 0.5, v2
2644// CHECK: [0xf0,0x04,0x0a,0x46]
2645
2646v_mac_f16 v5, -4.0, v2
2647// CHECK: [0xf7,0x04,0x0a,0x46]
2648
2649v_mac_f16 v5, src_vccz, v2
2650// CHECK: [0xfb,0x04,0x0a,0x46]
2651
2652v_mac_f16 v5, src_execz, v2
2653// CHECK: [0xfc,0x04,0x0a,0x46]
2654
2655v_mac_f16 v5, src_scc, v2
2656// CHECK: [0xfd,0x04,0x0a,0x46]
2657
2658v_mac_f16 v5, src_lds_direct, v2
2659// CHECK: [0xfe,0x04,0x0a,0x46]
2660
2661v_mac_f16 v5, 0xfe0b, v2
2662// CHECK: [0xff,0x04,0x0a,0x46,0x0b,0xfe,0x00,0x00]
2663
2664v_mac_f16 v5, 0x3456, v2
2665// CHECK: [0xff,0x04,0x0a,0x46,0x56,0x34,0x00,0x00]
2666
2667v_mac_f16 v5, v1, v255
2668// CHECK: [0x01,0xff,0x0b,0x46]
2669
2670v_madmk_f16 v5, v1, 0x1121, v3
2671// CHECK: [0x01,0x07,0x0a,0x48,0x21,0x11,0x00,0x00]
2672
2673v_madmk_f16 v255, v1, 0x1121, v3
2674// CHECK: [0x01,0x07,0xfe,0x49,0x21,0x11,0x00,0x00]
2675
2676v_madmk_f16 v5, v255, 0x1121, v3
2677// CHECK: [0xff,0x07,0x0a,0x48,0x21,0x11,0x00,0x00]
2678
2679v_madmk_f16 v5, 0, 0x1121, v3
2680// CHECK: [0x80,0x06,0x0a,0x48,0x21,0x11,0x00,0x00]
2681
2682v_madmk_f16 v5, -1, 0x1121, v3
2683// CHECK: [0xc1,0x06,0x0a,0x48,0x21,0x11,0x00,0x00]
2684
2685v_madmk_f16 v5, 0.5, 0x1121, v3
2686// CHECK: [0xf0,0x06,0x0a,0x48,0x21,0x11,0x00,0x00]
2687
2688v_madmk_f16 v5, -4.0, 0x1121, v3
2689// CHECK: [0xf7,0x06,0x0a,0x48,0x21,0x11,0x00,0x00]
2690
2691v_madmk_f16 v5, src_lds_direct, 0x1121, v3
2692// CHECK: [0xfe,0x06,0x0a,0x48,0x21,0x11,0x00,0x00]
2693
2694v_madmk_f16 v5, v1, 0xa1b1, v3
2695// CHECK: [0x01,0x07,0x0a,0x48,0xb1,0xa1,0x00,0x00]
2696
2697v_madmk_f16 v5, v1, 0x1121, v255
2698// CHECK: [0x01,0xff,0x0b,0x48,0x21,0x11,0x00,0x00]
2699
2700v_madak_f16 v5, v1, v2, 0x1121
2701// CHECK: [0x01,0x05,0x0a,0x4a,0x21,0x11,0x00,0x00]
2702
2703v_madak_f16 v255, v1, v2, 0x1121
2704// CHECK: [0x01,0x05,0xfe,0x4b,0x21,0x11,0x00,0x00]
2705
2706v_madak_f16 v5, v255, v2, 0x1121
2707// CHECK: [0xff,0x05,0x0a,0x4a,0x21,0x11,0x00,0x00]
2708
2709v_madak_f16 v5, 0, v2, 0x1121
2710// CHECK: [0x80,0x04,0x0a,0x4a,0x21,0x11,0x00,0x00]
2711
2712v_madak_f16 v5, -1, v2, 0x1121
2713// CHECK: [0xc1,0x04,0x0a,0x4a,0x21,0x11,0x00,0x00]
2714
2715v_madak_f16 v5, 0.5, v2, 0x1121
2716// CHECK: [0xf0,0x04,0x0a,0x4a,0x21,0x11,0x00,0x00]
2717
2718v_madak_f16 v5, -4.0, v2, 0x1121
2719// CHECK: [0xf7,0x04,0x0a,0x4a,0x21,0x11,0x00,0x00]
2720
2721v_madak_f16 v5, src_lds_direct, v2, 0x1121
2722// CHECK: [0xfe,0x04,0x0a,0x4a,0x21,0x11,0x00,0x00]
2723
2724v_madak_f16 v5, v1, v255, 0x1121
2725// CHECK: [0x01,0xff,0x0b,0x4a,0x21,0x11,0x00,0x00]
2726
2727v_madak_f16 v5, v1, v2, 0xa1b1
2728// CHECK: [0x01,0x05,0x0a,0x4a,0xb1,0xa1,0x00,0x00]
2729
2730v_add_u16 v5, v1, v2
2731// CHECK: [0x01,0x05,0x0a,0x4c]
2732
2733v_add_u16 v255, v1, v2
2734// CHECK: [0x01,0x05,0xfe,0x4d]
2735
2736v_add_u16 v5, v255, v2
2737// CHECK: [0xff,0x05,0x0a,0x4c]
2738
2739v_add_u16 v5, s1, v2
2740// CHECK: [0x01,0x04,0x0a,0x4c]
2741
2742v_add_u16 v5, s101, v2
2743// CHECK: [0x65,0x04,0x0a,0x4c]
2744
2745v_add_u16 v5, flat_scratch_lo, v2
2746// CHECK: [0x66,0x04,0x0a,0x4c]
2747
2748v_add_u16 v5, flat_scratch_hi, v2
2749// CHECK: [0x67,0x04,0x0a,0x4c]
2750
2751v_add_u16 v5, vcc_lo, v2
2752// CHECK: [0x6a,0x04,0x0a,0x4c]
2753
2754v_add_u16 v5, vcc_hi, v2
2755// CHECK: [0x6b,0x04,0x0a,0x4c]
2756
2757v_add_u16 v5, tba_lo, v2
2758// CHECK: [0x6c,0x04,0x0a,0x4c]
2759
2760v_add_u16 v5, tba_hi, v2
2761// CHECK: [0x6d,0x04,0x0a,0x4c]
2762
2763v_add_u16 v5, tma_lo, v2
2764// CHECK: [0x6e,0x04,0x0a,0x4c]
2765
2766v_add_u16 v5, tma_hi, v2
2767// CHECK: [0x6f,0x04,0x0a,0x4c]
2768
2769v_add_u16 v5, ttmp11, v2
2770// CHECK: [0x7b,0x04,0x0a,0x4c]
2771
2772v_add_u16 v5, m0, v2
2773// CHECK: [0x7c,0x04,0x0a,0x4c]
2774
2775v_add_u16 v5, exec_lo, v2
2776// CHECK: [0x7e,0x04,0x0a,0x4c]
2777
2778v_add_u16 v5, exec_hi, v2
2779// CHECK: [0x7f,0x04,0x0a,0x4c]
2780
2781v_add_u16 v5, 0, v2
2782// CHECK: [0x80,0x04,0x0a,0x4c]
2783
2784v_add_u16 v5, -1, v2
2785// CHECK: [0xc1,0x04,0x0a,0x4c]
2786
2787v_add_u16 v5, 0.5, v2
2788// CHECK: [0xff,0x04,0x0a,0x4c,0x00,0x38,0x00,0x00]
2789
2790v_add_u16 v5, -4.0, v2
2791// CHECK: [0xff,0x04,0x0a,0x4c,0x00,0xc4,0x00,0x00]
2792
2793v_add_u16 v5, src_vccz, v2
2794// CHECK: [0xfb,0x04,0x0a,0x4c]
2795
2796v_add_u16 v5, src_execz, v2
2797// CHECK: [0xfc,0x04,0x0a,0x4c]
2798
2799v_add_u16 v5, src_scc, v2
2800// CHECK: [0xfd,0x04,0x0a,0x4c]
2801
2802v_add_u16 v5, src_lds_direct, v2
2803// CHECK: [0xfe,0x04,0x0a,0x4c]
2804
2805v_add_u16 v5, 0xfe0b, v2
2806// CHECK: [0xff,0x04,0x0a,0x4c,0x0b,0xfe,0x00,0x00]
2807
2808v_add_u16 v5, 0x3456, v2
2809// CHECK: [0xff,0x04,0x0a,0x4c,0x56,0x34,0x00,0x00]
2810
2811v_add_u16 v5, v1, v255
2812// CHECK: [0x01,0xff,0x0b,0x4c]
2813
2814v_sub_u16 v5, v1, v2
2815// CHECK: [0x01,0x05,0x0a,0x4e]
2816
2817v_sub_u16 v255, v1, v2
2818// CHECK: [0x01,0x05,0xfe,0x4f]
2819
2820v_sub_u16 v5, v255, v2
2821// CHECK: [0xff,0x05,0x0a,0x4e]
2822
2823v_sub_u16 v5, s1, v2
2824// CHECK: [0x01,0x04,0x0a,0x4e]
2825
2826v_sub_u16 v5, s101, v2
2827// CHECK: [0x65,0x04,0x0a,0x4e]
2828
2829v_sub_u16 v5, flat_scratch_lo, v2
2830// CHECK: [0x66,0x04,0x0a,0x4e]
2831
2832v_sub_u16 v5, flat_scratch_hi, v2
2833// CHECK: [0x67,0x04,0x0a,0x4e]
2834
2835v_sub_u16 v5, vcc_lo, v2
2836// CHECK: [0x6a,0x04,0x0a,0x4e]
2837
2838v_sub_u16 v5, vcc_hi, v2
2839// CHECK: [0x6b,0x04,0x0a,0x4e]
2840
2841v_sub_u16 v5, tba_lo, v2
2842// CHECK: [0x6c,0x04,0x0a,0x4e]
2843
2844v_sub_u16 v5, tba_hi, v2
2845// CHECK: [0x6d,0x04,0x0a,0x4e]
2846
2847v_sub_u16 v5, tma_lo, v2
2848// CHECK: [0x6e,0x04,0x0a,0x4e]
2849
2850v_sub_u16 v5, tma_hi, v2
2851// CHECK: [0x6f,0x04,0x0a,0x4e]
2852
2853v_sub_u16 v5, ttmp11, v2
2854// CHECK: [0x7b,0x04,0x0a,0x4e]
2855
2856v_sub_u16 v5, m0, v2
2857// CHECK: [0x7c,0x04,0x0a,0x4e]
2858
2859v_sub_u16 v5, exec_lo, v2
2860// CHECK: [0x7e,0x04,0x0a,0x4e]
2861
2862v_sub_u16 v5, exec_hi, v2
2863// CHECK: [0x7f,0x04,0x0a,0x4e]
2864
2865v_sub_u16 v5, 0, v2
2866// CHECK: [0x80,0x04,0x0a,0x4e]
2867
2868v_sub_u16 v5, -1, v2
2869// CHECK: [0xc1,0x04,0x0a,0x4e]
2870
2871v_sub_u16 v5, 0.5, v2
2872// CHECK: [0xff,0x04,0x0a,0x4e,0x00,0x38,0x00,0x00]
2873
2874v_sub_u16 v5, -4.0, v2
2875// CHECK: [0xff,0x04,0x0a,0x4e,0x00,0xc4,0x00,0x00]
2876
2877v_sub_u16 v5, src_vccz, v2
2878// CHECK: [0xfb,0x04,0x0a,0x4e]
2879
2880v_sub_u16 v5, src_execz, v2
2881// CHECK: [0xfc,0x04,0x0a,0x4e]
2882
2883v_sub_u16 v5, src_scc, v2
2884// CHECK: [0xfd,0x04,0x0a,0x4e]
2885
2886v_sub_u16 v5, src_lds_direct, v2
2887// CHECK: [0xfe,0x04,0x0a,0x4e]
2888
2889v_sub_u16 v5, 0xfe0b, v2
2890// CHECK: [0xff,0x04,0x0a,0x4e,0x0b,0xfe,0x00,0x00]
2891
2892v_sub_u16 v5, 0x3456, v2
2893// CHECK: [0xff,0x04,0x0a,0x4e,0x56,0x34,0x00,0x00]
2894
2895v_sub_u16 v5, v1, v255
2896// CHECK: [0x01,0xff,0x0b,0x4e]
2897
2898v_subrev_u16 v5, v1, v2
2899// CHECK: [0x01,0x05,0x0a,0x50]
2900
2901v_subrev_u16 v255, v1, v2
2902// CHECK: [0x01,0x05,0xfe,0x51]
2903
2904v_subrev_u16 v5, v255, v2
2905// CHECK: [0xff,0x05,0x0a,0x50]
2906
2907v_subrev_u16 v5, s1, v2
2908// CHECK: [0x01,0x04,0x0a,0x50]
2909
2910v_subrev_u16 v5, s101, v2
2911// CHECK: [0x65,0x04,0x0a,0x50]
2912
2913v_subrev_u16 v5, flat_scratch_lo, v2
2914// CHECK: [0x66,0x04,0x0a,0x50]
2915
2916v_subrev_u16 v5, flat_scratch_hi, v2
2917// CHECK: [0x67,0x04,0x0a,0x50]
2918
2919v_subrev_u16 v5, vcc_lo, v2
2920// CHECK: [0x6a,0x04,0x0a,0x50]
2921
2922v_subrev_u16 v5, vcc_hi, v2
2923// CHECK: [0x6b,0x04,0x0a,0x50]
2924
2925v_subrev_u16 v5, tba_lo, v2
2926// CHECK: [0x6c,0x04,0x0a,0x50]
2927
2928v_subrev_u16 v5, tba_hi, v2
2929// CHECK: [0x6d,0x04,0x0a,0x50]
2930
2931v_subrev_u16 v5, tma_lo, v2
2932// CHECK: [0x6e,0x04,0x0a,0x50]
2933
2934v_subrev_u16 v5, tma_hi, v2
2935// CHECK: [0x6f,0x04,0x0a,0x50]
2936
2937v_subrev_u16 v5, ttmp11, v2
2938// CHECK: [0x7b,0x04,0x0a,0x50]
2939
2940v_subrev_u16 v5, m0, v2
2941// CHECK: [0x7c,0x04,0x0a,0x50]
2942
2943v_subrev_u16 v5, exec_lo, v2
2944// CHECK: [0x7e,0x04,0x0a,0x50]
2945
2946v_subrev_u16 v5, exec_hi, v2
2947// CHECK: [0x7f,0x04,0x0a,0x50]
2948
2949v_subrev_u16 v5, 0, v2
2950// CHECK: [0x80,0x04,0x0a,0x50]
2951
2952v_subrev_u16 v5, -1, v2
2953// CHECK: [0xc1,0x04,0x0a,0x50]
2954
2955v_subrev_u16 v5, 0.5, v2
2956// CHECK: [0xff,0x04,0x0a,0x50,0x00,0x38,0x00,0x00]
2957
2958v_subrev_u16 v5, -4.0, v2
2959// CHECK: [0xff,0x04,0x0a,0x50,0x00,0xc4,0x00,0x00]
2960
2961v_subrev_u16 v5, src_vccz, v2
2962// CHECK: [0xfb,0x04,0x0a,0x50]
2963
2964v_subrev_u16 v5, src_execz, v2
2965// CHECK: [0xfc,0x04,0x0a,0x50]
2966
2967v_subrev_u16 v5, src_scc, v2
2968// CHECK: [0xfd,0x04,0x0a,0x50]
2969
2970v_subrev_u16 v5, 0xfe0b, v2
2971// CHECK: [0xff,0x04,0x0a,0x50,0x0b,0xfe,0x00,0x00]
2972
2973v_subrev_u16 v5, 0x3456, v2
2974// CHECK: [0xff,0x04,0x0a,0x50,0x56,0x34,0x00,0x00]
2975
2976v_subrev_u16 v5, v1, v255
2977// CHECK: [0x01,0xff,0x0b,0x50]
2978
2979v_mul_lo_u16 v5, v1, v2
2980// CHECK: [0x01,0x05,0x0a,0x52]
2981
2982v_mul_lo_u16 v255, v1, v2
2983// CHECK: [0x01,0x05,0xfe,0x53]
2984
2985v_mul_lo_u16 v5, v255, v2
2986// CHECK: [0xff,0x05,0x0a,0x52]
2987
2988v_mul_lo_u16 v5, s1, v2
2989// CHECK: [0x01,0x04,0x0a,0x52]
2990
2991v_mul_lo_u16 v5, s101, v2
2992// CHECK: [0x65,0x04,0x0a,0x52]
2993
2994v_mul_lo_u16 v5, flat_scratch_lo, v2
2995// CHECK: [0x66,0x04,0x0a,0x52]
2996
2997v_mul_lo_u16 v5, flat_scratch_hi, v2
2998// CHECK: [0x67,0x04,0x0a,0x52]
2999
3000v_mul_lo_u16 v5, vcc_lo, v2
3001// CHECK: [0x6a,0x04,0x0a,0x52]
3002
3003v_mul_lo_u16 v5, vcc_hi, v2
3004// CHECK: [0x6b,0x04,0x0a,0x52]
3005
3006v_mul_lo_u16 v5, tba_lo, v2
3007// CHECK: [0x6c,0x04,0x0a,0x52]
3008
3009v_mul_lo_u16 v5, tba_hi, v2
3010// CHECK: [0x6d,0x04,0x0a,0x52]
3011
3012v_mul_lo_u16 v5, tma_lo, v2
3013// CHECK: [0x6e,0x04,0x0a,0x52]
3014
3015v_mul_lo_u16 v5, tma_hi, v2
3016// CHECK: [0x6f,0x04,0x0a,0x52]
3017
3018v_mul_lo_u16 v5, ttmp11, v2
3019// CHECK: [0x7b,0x04,0x0a,0x52]
3020
3021v_mul_lo_u16 v5, m0, v2
3022// CHECK: [0x7c,0x04,0x0a,0x52]
3023
3024v_mul_lo_u16 v5, exec_lo, v2
3025// CHECK: [0x7e,0x04,0x0a,0x52]
3026
3027v_mul_lo_u16 v5, exec_hi, v2
3028// CHECK: [0x7f,0x04,0x0a,0x52]
3029
3030v_mul_lo_u16 v5, 0, v2
3031// CHECK: [0x80,0x04,0x0a,0x52]
3032
3033v_mul_lo_u16 v5, -1, v2
3034// CHECK: [0xc1,0x04,0x0a,0x52]
3035
3036v_mul_lo_u16 v5, 0.5, v2
3037// CHECK: [0xff,0x04,0x0a,0x52,0x00,0x38,0x00,0x00]
3038
3039v_mul_lo_u16 v5, -4.0, v2
3040// CHECK: [0xff,0x04,0x0a,0x52,0x00,0xc4,0x00,0x00]
3041
3042v_mul_lo_u16 v5, src_vccz, v2
3043// CHECK: [0xfb,0x04,0x0a,0x52]
3044
3045v_mul_lo_u16 v5, src_execz, v2
3046// CHECK: [0xfc,0x04,0x0a,0x52]
3047
3048v_mul_lo_u16 v5, src_scc, v2
3049// CHECK: [0xfd,0x04,0x0a,0x52]
3050
3051v_mul_lo_u16 v5, src_lds_direct, v2
3052// CHECK: [0xfe,0x04,0x0a,0x52]
3053
3054v_mul_lo_u16 v5, 0xfe0b, v2
3055// CHECK: [0xff,0x04,0x0a,0x52,0x0b,0xfe,0x00,0x00]
3056
3057v_mul_lo_u16 v5, 0x3456, v2
3058// CHECK: [0xff,0x04,0x0a,0x52,0x56,0x34,0x00,0x00]
3059
3060v_mul_lo_u16 v5, v1, v255
3061// CHECK: [0x01,0xff,0x0b,0x52]
3062
3063v_lshlrev_b16 v5, v1, v2
3064// CHECK: [0x01,0x05,0x0a,0x54]
3065
3066v_lshlrev_b16 v255, v1, v2
3067// CHECK: [0x01,0x05,0xfe,0x55]
3068
3069v_lshlrev_b16 v5, v255, v2
3070// CHECK: [0xff,0x05,0x0a,0x54]
3071
3072v_lshlrev_b16 v5, s1, v2
3073// CHECK: [0x01,0x04,0x0a,0x54]
3074
3075v_lshlrev_b16 v5, s101, v2
3076// CHECK: [0x65,0x04,0x0a,0x54]
3077
3078v_lshlrev_b16 v5, flat_scratch_lo, v2
3079// CHECK: [0x66,0x04,0x0a,0x54]
3080
3081v_lshlrev_b16 v5, flat_scratch_hi, v2
3082// CHECK: [0x67,0x04,0x0a,0x54]
3083
3084v_lshlrev_b16 v5, vcc_lo, v2
3085// CHECK: [0x6a,0x04,0x0a,0x54]
3086
3087v_lshlrev_b16 v5, vcc_hi, v2
3088// CHECK: [0x6b,0x04,0x0a,0x54]
3089
3090v_lshlrev_b16 v5, tba_lo, v2
3091// CHECK: [0x6c,0x04,0x0a,0x54]
3092
3093v_lshlrev_b16 v5, tba_hi, v2
3094// CHECK: [0x6d,0x04,0x0a,0x54]
3095
3096v_lshlrev_b16 v5, tma_lo, v2
3097// CHECK: [0x6e,0x04,0x0a,0x54]
3098
3099v_lshlrev_b16 v5, tma_hi, v2
3100// CHECK: [0x6f,0x04,0x0a,0x54]
3101
3102v_lshlrev_b16 v5, ttmp11, v2
3103// CHECK: [0x7b,0x04,0x0a,0x54]
3104
3105v_lshlrev_b16 v5, m0, v2
3106// CHECK: [0x7c,0x04,0x0a,0x54]
3107
3108v_lshlrev_b16 v5, exec_lo, v2
3109// CHECK: [0x7e,0x04,0x0a,0x54]
3110
3111v_lshlrev_b16 v5, exec_hi, v2
3112// CHECK: [0x7f,0x04,0x0a,0x54]
3113
3114v_lshlrev_b16 v5, 0, v2
3115// CHECK: [0x80,0x04,0x0a,0x54]
3116
3117v_lshlrev_b16 v5, -1, v2
3118// CHECK: [0xc1,0x04,0x0a,0x54]
3119
3120v_lshlrev_b16 v5, 0.5, v2
3121// CHECK: [0xff,0x04,0x0a,0x54,0x00,0x38,0x00,0x00]
3122
3123v_lshlrev_b16 v5, -4.0, v2
3124// CHECK: [0xff,0x04,0x0a,0x54,0x00,0xc4,0x00,0x00]
3125
3126v_lshlrev_b16 v5, src_vccz, v2
3127// CHECK: [0xfb,0x04,0x0a,0x54]
3128
3129v_lshlrev_b16 v5, src_execz, v2
3130// CHECK: [0xfc,0x04,0x0a,0x54]
3131
3132v_lshlrev_b16 v5, src_scc, v2
3133// CHECK: [0xfd,0x04,0x0a,0x54]
3134
3135v_lshlrev_b16 v5, 0xfe0b, v2
3136// CHECK: [0xff,0x04,0x0a,0x54,0x0b,0xfe,0x00,0x00]
3137
3138v_lshlrev_b16 v5, 0x3456, v2
3139// CHECK: [0xff,0x04,0x0a,0x54,0x56,0x34,0x00,0x00]
3140
3141v_lshlrev_b16 v5, v1, v255
3142// CHECK: [0x01,0xff,0x0b,0x54]
3143
3144v_lshrrev_b16 v5, v1, v2
3145// CHECK: [0x01,0x05,0x0a,0x56]
3146
3147v_lshrrev_b16 v255, v1, v2
3148// CHECK: [0x01,0x05,0xfe,0x57]
3149
3150v_lshrrev_b16 v5, v255, v2
3151// CHECK: [0xff,0x05,0x0a,0x56]
3152
3153v_lshrrev_b16 v5, s1, v2
3154// CHECK: [0x01,0x04,0x0a,0x56]
3155
3156v_lshrrev_b16 v5, s101, v2
3157// CHECK: [0x65,0x04,0x0a,0x56]
3158
3159v_lshrrev_b16 v5, flat_scratch_lo, v2
3160// CHECK: [0x66,0x04,0x0a,0x56]
3161
3162v_lshrrev_b16 v5, flat_scratch_hi, v2
3163// CHECK: [0x67,0x04,0x0a,0x56]
3164
3165v_lshrrev_b16 v5, vcc_lo, v2
3166// CHECK: [0x6a,0x04,0x0a,0x56]
3167
3168v_lshrrev_b16 v5, vcc_hi, v2
3169// CHECK: [0x6b,0x04,0x0a,0x56]
3170
3171v_lshrrev_b16 v5, tba_lo, v2
3172// CHECK: [0x6c,0x04,0x0a,0x56]
3173
3174v_lshrrev_b16 v5, tba_hi, v2
3175// CHECK: [0x6d,0x04,0x0a,0x56]
3176
3177v_lshrrev_b16 v5, tma_lo, v2
3178// CHECK: [0x6e,0x04,0x0a,0x56]
3179
3180v_lshrrev_b16 v5, tma_hi, v2
3181// CHECK: [0x6f,0x04,0x0a,0x56]
3182
3183v_lshrrev_b16 v5, ttmp11, v2
3184// CHECK: [0x7b,0x04,0x0a,0x56]
3185
3186v_lshrrev_b16 v5, m0, v2
3187// CHECK: [0x7c,0x04,0x0a,0x56]
3188
3189v_lshrrev_b16 v5, exec_lo, v2
3190// CHECK: [0x7e,0x04,0x0a,0x56]
3191
3192v_lshrrev_b16 v5, exec_hi, v2
3193// CHECK: [0x7f,0x04,0x0a,0x56]
3194
3195v_lshrrev_b16 v5, 0, v2
3196// CHECK: [0x80,0x04,0x0a,0x56]
3197
3198v_lshrrev_b16 v5, -1, v2
3199// CHECK: [0xc1,0x04,0x0a,0x56]
3200
3201v_lshrrev_b16 v5, 0.5, v2
3202// CHECK: [0xff,0x04,0x0a,0x56,0x00,0x38,0x00,0x00]
3203
3204v_lshrrev_b16 v5, -4.0, v2
3205// CHECK: [0xff,0x04,0x0a,0x56,0x00,0xc4,0x00,0x00]
3206
3207v_lshrrev_b16 v5, src_vccz, v2
3208// CHECK: [0xfb,0x04,0x0a,0x56]
3209
3210v_lshrrev_b16 v5, src_execz, v2
3211// CHECK: [0xfc,0x04,0x0a,0x56]
3212
3213v_lshrrev_b16 v5, src_scc, v2
3214// CHECK: [0xfd,0x04,0x0a,0x56]
3215
3216v_lshrrev_b16 v5, 0xfe0b, v2
3217// CHECK: [0xff,0x04,0x0a,0x56,0x0b,0xfe,0x00,0x00]
3218
3219v_lshrrev_b16 v5, 0x3456, v2
3220// CHECK: [0xff,0x04,0x0a,0x56,0x56,0x34,0x00,0x00]
3221
3222v_lshrrev_b16 v5, v1, v255
3223// CHECK: [0x01,0xff,0x0b,0x56]
3224
3225v_ashrrev_i16 v5, v1, v2
3226// CHECK: [0x01,0x05,0x0a,0x58]
3227
3228v_ashrrev_i16 v255, v1, v2
3229// CHECK: [0x01,0x05,0xfe,0x59]
3230
3231v_ashrrev_i16 v5, v255, v2
3232// CHECK: [0xff,0x05,0x0a,0x58]
3233
3234v_ashrrev_i16 v5, s1, v2
3235// CHECK: [0x01,0x04,0x0a,0x58]
3236
3237v_ashrrev_i16 v5, s101, v2
3238// CHECK: [0x65,0x04,0x0a,0x58]
3239
3240v_ashrrev_i16 v5, flat_scratch_lo, v2
3241// CHECK: [0x66,0x04,0x0a,0x58]
3242
3243v_ashrrev_i16 v5, flat_scratch_hi, v2
3244// CHECK: [0x67,0x04,0x0a,0x58]
3245
3246v_ashrrev_i16 v5, vcc_lo, v2
3247// CHECK: [0x6a,0x04,0x0a,0x58]
3248
3249v_ashrrev_i16 v5, vcc_hi, v2
3250// CHECK: [0x6b,0x04,0x0a,0x58]
3251
3252v_ashrrev_i16 v5, tba_lo, v2
3253// CHECK: [0x6c,0x04,0x0a,0x58]
3254
3255v_ashrrev_i16 v5, tba_hi, v2
3256// CHECK: [0x6d,0x04,0x0a,0x58]
3257
3258v_ashrrev_i16 v5, tma_lo, v2
3259// CHECK: [0x6e,0x04,0x0a,0x58]
3260
3261v_ashrrev_i16 v5, tma_hi, v2
3262// CHECK: [0x6f,0x04,0x0a,0x58]
3263
3264v_ashrrev_i16 v5, ttmp11, v2
3265// CHECK: [0x7b,0x04,0x0a,0x58]
3266
3267v_ashrrev_i16 v5, m0, v2
3268// CHECK: [0x7c,0x04,0x0a,0x58]
3269
3270v_ashrrev_i16 v5, exec_lo, v2
3271// CHECK: [0x7e,0x04,0x0a,0x58]
3272
3273v_ashrrev_i16 v5, exec_hi, v2
3274// CHECK: [0x7f,0x04,0x0a,0x58]
3275
3276v_ashrrev_i16 v5, 0, v2
3277// CHECK: [0x80,0x04,0x0a,0x58]
3278
3279v_ashrrev_i16 v5, -1, v2
3280// CHECK: [0xc1,0x04,0x0a,0x58]
3281
3282v_ashrrev_i16 v5, 0.5, v2
3283// CHECK: [0xff,0x04,0x0a,0x58,0x00,0x38,0x00,0x00]
3284
3285v_ashrrev_i16 v5, -4.0, v2
3286// CHECK: [0xff,0x04,0x0a,0x58,0x00,0xc4,0x00,0x00]
3287
3288v_ashrrev_i16 v5, src_vccz, v2
3289// CHECK: [0xfb,0x04,0x0a,0x58]
3290
3291v_ashrrev_i16 v5, src_execz, v2
3292// CHECK: [0xfc,0x04,0x0a,0x58]
3293
3294v_ashrrev_i16 v5, src_scc, v2
3295// CHECK: [0xfd,0x04,0x0a,0x58]
3296
3297v_ashrrev_i16 v5, 0xfe0b, v2
3298// CHECK: [0xff,0x04,0x0a,0x58,0x0b,0xfe,0x00,0x00]
3299
3300v_ashrrev_i16 v5, 0x3456, v2
3301// CHECK: [0xff,0x04,0x0a,0x58,0x56,0x34,0x00,0x00]
3302
3303v_ashrrev_i16 v5, v1, v255
3304// CHECK: [0x01,0xff,0x0b,0x58]
3305
3306v_max_f16 v5, v1, v2
3307// CHECK: [0x01,0x05,0x0a,0x5a]
3308
3309v_max_f16 v255, v1, v2
3310// CHECK: [0x01,0x05,0xfe,0x5b]
3311
3312v_max_f16 v5, v255, v2
3313// CHECK: [0xff,0x05,0x0a,0x5a]
3314
3315v_max_f16 v5, s1, v2
3316// CHECK: [0x01,0x04,0x0a,0x5a]
3317
3318v_max_f16 v5, s101, v2
3319// CHECK: [0x65,0x04,0x0a,0x5a]
3320
3321v_max_f16 v5, flat_scratch_lo, v2
3322// CHECK: [0x66,0x04,0x0a,0x5a]
3323
3324v_max_f16 v5, flat_scratch_hi, v2
3325// CHECK: [0x67,0x04,0x0a,0x5a]
3326
3327v_max_f16 v5, vcc_lo, v2
3328// CHECK: [0x6a,0x04,0x0a,0x5a]
3329
3330v_max_f16 v5, vcc_hi, v2
3331// CHECK: [0x6b,0x04,0x0a,0x5a]
3332
3333v_max_f16 v5, tba_lo, v2
3334// CHECK: [0x6c,0x04,0x0a,0x5a]
3335
3336v_max_f16 v5, tba_hi, v2
3337// CHECK: [0x6d,0x04,0x0a,0x5a]
3338
3339v_max_f16 v5, tma_lo, v2
3340// CHECK: [0x6e,0x04,0x0a,0x5a]
3341
3342v_max_f16 v5, tma_hi, v2
3343// CHECK: [0x6f,0x04,0x0a,0x5a]
3344
3345v_max_f16 v5, ttmp11, v2
3346// CHECK: [0x7b,0x04,0x0a,0x5a]
3347
3348v_max_f16 v5, m0, v2
3349// CHECK: [0x7c,0x04,0x0a,0x5a]
3350
3351v_max_f16 v5, exec_lo, v2
3352// CHECK: [0x7e,0x04,0x0a,0x5a]
3353
3354v_max_f16 v5, exec_hi, v2
3355// CHECK: [0x7f,0x04,0x0a,0x5a]
3356
3357v_max_f16 v5, 0, v2
3358// CHECK: [0x80,0x04,0x0a,0x5a]
3359
3360v_max_f16 v5, -1, v2
3361// CHECK: [0xc1,0x04,0x0a,0x5a]
3362
3363v_max_f16 v5, 0.5, v2
3364// CHECK: [0xf0,0x04,0x0a,0x5a]
3365
3366v_max_f16 v5, -4.0, v2
3367// CHECK: [0xf7,0x04,0x0a,0x5a]
3368
3369v_max_f16 v5, src_vccz, v2
3370// CHECK: [0xfb,0x04,0x0a,0x5a]
3371
3372v_max_f16 v5, src_execz, v2
3373// CHECK: [0xfc,0x04,0x0a,0x5a]
3374
3375v_max_f16 v5, src_scc, v2
3376// CHECK: [0xfd,0x04,0x0a,0x5a]
3377
3378v_max_f16 v5, src_lds_direct, v2
3379// CHECK: [0xfe,0x04,0x0a,0x5a]
3380
3381v_max_f16 v5, 0xfe0b, v2
3382// CHECK: [0xff,0x04,0x0a,0x5a,0x0b,0xfe,0x00,0x00]
3383
3384v_max_f16 v5, 0x3456, v2
3385// CHECK: [0xff,0x04,0x0a,0x5a,0x56,0x34,0x00,0x00]
3386
3387v_max_f16 v5, v1, v255
3388// CHECK: [0x01,0xff,0x0b,0x5a]
3389
3390v_min_f16 v5, v1, v2
3391// CHECK: [0x01,0x05,0x0a,0x5c]
3392
3393v_min_f16 v255, v1, v2
3394// CHECK: [0x01,0x05,0xfe,0x5d]
3395
3396v_min_f16 v5, v255, v2
3397// CHECK: [0xff,0x05,0x0a,0x5c]
3398
3399v_min_f16 v5, s1, v2
3400// CHECK: [0x01,0x04,0x0a,0x5c]
3401
3402v_min_f16 v5, s101, v2
3403// CHECK: [0x65,0x04,0x0a,0x5c]
3404
3405v_min_f16 v5, flat_scratch_lo, v2
3406// CHECK: [0x66,0x04,0x0a,0x5c]
3407
3408v_min_f16 v5, flat_scratch_hi, v2
3409// CHECK: [0x67,0x04,0x0a,0x5c]
3410
3411v_min_f16 v5, vcc_lo, v2
3412// CHECK: [0x6a,0x04,0x0a,0x5c]
3413
3414v_min_f16 v5, vcc_hi, v2
3415// CHECK: [0x6b,0x04,0x0a,0x5c]
3416
3417v_min_f16 v5, tba_lo, v2
3418// CHECK: [0x6c,0x04,0x0a,0x5c]
3419
3420v_min_f16 v5, tba_hi, v2
3421// CHECK: [0x6d,0x04,0x0a,0x5c]
3422
3423v_min_f16 v5, tma_lo, v2
3424// CHECK: [0x6e,0x04,0x0a,0x5c]
3425
3426v_min_f16 v5, tma_hi, v2
3427// CHECK: [0x6f,0x04,0x0a,0x5c]
3428
3429v_min_f16 v5, ttmp11, v2
3430// CHECK: [0x7b,0x04,0x0a,0x5c]
3431
3432v_min_f16 v5, m0, v2
3433// CHECK: [0x7c,0x04,0x0a,0x5c]
3434
3435v_min_f16 v5, exec_lo, v2
3436// CHECK: [0x7e,0x04,0x0a,0x5c]
3437
3438v_min_f16 v5, exec_hi, v2
3439// CHECK: [0x7f,0x04,0x0a,0x5c]
3440
3441v_min_f16 v5, 0, v2
3442// CHECK: [0x80,0x04,0x0a,0x5c]
3443
3444v_min_f16 v5, -1, v2
3445// CHECK: [0xc1,0x04,0x0a,0x5c]
3446
3447v_min_f16 v5, 0.5, v2
3448// CHECK: [0xf0,0x04,0x0a,0x5c]
3449
3450v_min_f16 v5, -4.0, v2
3451// CHECK: [0xf7,0x04,0x0a,0x5c]
3452
3453v_min_f16 v5, src_vccz, v2
3454// CHECK: [0xfb,0x04,0x0a,0x5c]
3455
3456v_min_f16 v5, src_execz, v2
3457// CHECK: [0xfc,0x04,0x0a,0x5c]
3458
3459v_min_f16 v5, src_scc, v2
3460// CHECK: [0xfd,0x04,0x0a,0x5c]
3461
3462v_min_f16 v5, src_lds_direct, v2
3463// CHECK: [0xfe,0x04,0x0a,0x5c]
3464
3465v_min_f16 v5, 0xfe0b, v2
3466// CHECK: [0xff,0x04,0x0a,0x5c,0x0b,0xfe,0x00,0x00]
3467
3468v_min_f16 v5, 0x3456, v2
3469// CHECK: [0xff,0x04,0x0a,0x5c,0x56,0x34,0x00,0x00]
3470
3471v_min_f16 v5, v1, v255
3472// CHECK: [0x01,0xff,0x0b,0x5c]
3473
3474v_max_u16 v5, v1, v2
3475// CHECK: [0x01,0x05,0x0a,0x5e]
3476
3477v_max_u16 v255, v1, v2
3478// CHECK: [0x01,0x05,0xfe,0x5f]
3479
3480v_max_u16 v5, v255, v2
3481// CHECK: [0xff,0x05,0x0a,0x5e]
3482
3483v_max_u16 v5, s1, v2
3484// CHECK: [0x01,0x04,0x0a,0x5e]
3485
3486v_max_u16 v5, s101, v2
3487// CHECK: [0x65,0x04,0x0a,0x5e]
3488
3489v_max_u16 v5, flat_scratch_lo, v2
3490// CHECK: [0x66,0x04,0x0a,0x5e]
3491
3492v_max_u16 v5, flat_scratch_hi, v2
3493// CHECK: [0x67,0x04,0x0a,0x5e]
3494
3495v_max_u16 v5, vcc_lo, v2
3496// CHECK: [0x6a,0x04,0x0a,0x5e]
3497
3498v_max_u16 v5, vcc_hi, v2
3499// CHECK: [0x6b,0x04,0x0a,0x5e]
3500
3501v_max_u16 v5, tba_lo, v2
3502// CHECK: [0x6c,0x04,0x0a,0x5e]
3503
3504v_max_u16 v5, tba_hi, v2
3505// CHECK: [0x6d,0x04,0x0a,0x5e]
3506
3507v_max_u16 v5, tma_lo, v2
3508// CHECK: [0x6e,0x04,0x0a,0x5e]
3509
3510v_max_u16 v5, tma_hi, v2
3511// CHECK: [0x6f,0x04,0x0a,0x5e]
3512
3513v_max_u16 v5, ttmp11, v2
3514// CHECK: [0x7b,0x04,0x0a,0x5e]
3515
3516v_max_u16 v5, m0, v2
3517// CHECK: [0x7c,0x04,0x0a,0x5e]
3518
3519v_max_u16 v5, exec_lo, v2
3520// CHECK: [0x7e,0x04,0x0a,0x5e]
3521
3522v_max_u16 v5, exec_hi, v2
3523// CHECK: [0x7f,0x04,0x0a,0x5e]
3524
3525v_max_u16 v5, 0, v2
3526// CHECK: [0x80,0x04,0x0a,0x5e]
3527
3528v_max_u16 v5, -1, v2
3529// CHECK: [0xc1,0x04,0x0a,0x5e]
3530
3531v_max_u16 v5, 0.5, v2
3532// CHECK: [0xff,0x04,0x0a,0x5e,0x00,0x38,0x00,0x00]
3533
3534v_max_u16 v5, -4.0, v2
3535// CHECK: [0xff,0x04,0x0a,0x5e,0x00,0xc4,0x00,0x00]
3536
3537v_max_u16 v5, src_vccz, v2
3538// CHECK: [0xfb,0x04,0x0a,0x5e]
3539
3540v_max_u16 v5, src_execz, v2
3541// CHECK: [0xfc,0x04,0x0a,0x5e]
3542
3543v_max_u16 v5, src_scc, v2
3544// CHECK: [0xfd,0x04,0x0a,0x5e]
3545
3546v_max_u16 v5, src_lds_direct, v2
3547// CHECK: [0xfe,0x04,0x0a,0x5e]
3548
3549v_max_u16 v5, 0xfe0b, v2
3550// CHECK: [0xff,0x04,0x0a,0x5e,0x0b,0xfe,0x00,0x00]
3551
3552v_max_u16 v5, 0x3456, v2
3553// CHECK: [0xff,0x04,0x0a,0x5e,0x56,0x34,0x00,0x00]
3554
3555v_max_u16 v5, v1, v255
3556// CHECK: [0x01,0xff,0x0b,0x5e]
3557
3558v_max_i16 v5, v1, v2
3559// CHECK: [0x01,0x05,0x0a,0x60]
3560
3561v_max_i16 v255, v1, v2
3562// CHECK: [0x01,0x05,0xfe,0x61]
3563
3564v_max_i16 v5, v255, v2
3565// CHECK: [0xff,0x05,0x0a,0x60]
3566
3567v_max_i16 v5, s1, v2
3568// CHECK: [0x01,0x04,0x0a,0x60]
3569
3570v_max_i16 v5, s101, v2
3571// CHECK: [0x65,0x04,0x0a,0x60]
3572
3573v_max_i16 v5, flat_scratch_lo, v2
3574// CHECK: [0x66,0x04,0x0a,0x60]
3575
3576v_max_i16 v5, flat_scratch_hi, v2
3577// CHECK: [0x67,0x04,0x0a,0x60]
3578
3579v_max_i16 v5, vcc_lo, v2
3580// CHECK: [0x6a,0x04,0x0a,0x60]
3581
3582v_max_i16 v5, vcc_hi, v2
3583// CHECK: [0x6b,0x04,0x0a,0x60]
3584
3585v_max_i16 v5, tba_lo, v2
3586// CHECK: [0x6c,0x04,0x0a,0x60]
3587
3588v_max_i16 v5, tba_hi, v2
3589// CHECK: [0x6d,0x04,0x0a,0x60]
3590
3591v_max_i16 v5, tma_lo, v2
3592// CHECK: [0x6e,0x04,0x0a,0x60]
3593
3594v_max_i16 v5, tma_hi, v2
3595// CHECK: [0x6f,0x04,0x0a,0x60]
3596
3597v_max_i16 v5, ttmp11, v2
3598// CHECK: [0x7b,0x04,0x0a,0x60]
3599
3600v_max_i16 v5, m0, v2
3601// CHECK: [0x7c,0x04,0x0a,0x60]
3602
3603v_max_i16 v5, exec_lo, v2
3604// CHECK: [0x7e,0x04,0x0a,0x60]
3605
3606v_max_i16 v5, exec_hi, v2
3607// CHECK: [0x7f,0x04,0x0a,0x60]
3608
3609v_max_i16 v5, 0, v2
3610// CHECK: [0x80,0x04,0x0a,0x60]
3611
3612v_max_i16 v5, -1, v2
3613// CHECK: [0xc1,0x04,0x0a,0x60]
3614
3615v_max_i16 v5, 0.5, v2
3616// CHECK: [0xff,0x04,0x0a,0x60,0x00,0x38,0x00,0x00]
3617
3618v_max_i16 v5, -4.0, v2
3619// CHECK: [0xff,0x04,0x0a,0x60,0x00,0xc4,0x00,0x00]
3620
3621v_max_i16 v5, src_vccz, v2
3622// CHECK: [0xfb,0x04,0x0a,0x60]
3623
3624v_max_i16 v5, src_execz, v2
3625// CHECK: [0xfc,0x04,0x0a,0x60]
3626
3627v_max_i16 v5, src_scc, v2
3628// CHECK: [0xfd,0x04,0x0a,0x60]
3629
3630v_max_i16 v5, src_lds_direct, v2
3631// CHECK: [0xfe,0x04,0x0a,0x60]
3632
3633v_max_i16 v5, 0xfe0b, v2
3634// CHECK: [0xff,0x04,0x0a,0x60,0x0b,0xfe,0x00,0x00]
3635
3636v_max_i16 v5, 0x3456, v2
3637// CHECK: [0xff,0x04,0x0a,0x60,0x56,0x34,0x00,0x00]
3638
3639v_max_i16 v5, v1, v255
3640// CHECK: [0x01,0xff,0x0b,0x60]
3641
3642v_min_u16 v5, v1, v2
3643// CHECK: [0x01,0x05,0x0a,0x62]
3644
3645v_min_u16 v255, v1, v2
3646// CHECK: [0x01,0x05,0xfe,0x63]
3647
3648v_min_u16 v5, v255, v2
3649// CHECK: [0xff,0x05,0x0a,0x62]
3650
3651v_min_u16 v5, s1, v2
3652// CHECK: [0x01,0x04,0x0a,0x62]
3653
3654v_min_u16 v5, s101, v2
3655// CHECK: [0x65,0x04,0x0a,0x62]
3656
3657v_min_u16 v5, flat_scratch_lo, v2
3658// CHECK: [0x66,0x04,0x0a,0x62]
3659
3660v_min_u16 v5, flat_scratch_hi, v2
3661// CHECK: [0x67,0x04,0x0a,0x62]
3662
3663v_min_u16 v5, vcc_lo, v2
3664// CHECK: [0x6a,0x04,0x0a,0x62]
3665
3666v_min_u16 v5, vcc_hi, v2
3667// CHECK: [0x6b,0x04,0x0a,0x62]
3668
3669v_min_u16 v5, tba_lo, v2
3670// CHECK: [0x6c,0x04,0x0a,0x62]
3671
3672v_min_u16 v5, tba_hi, v2
3673// CHECK: [0x6d,0x04,0x0a,0x62]
3674
3675v_min_u16 v5, tma_lo, v2
3676// CHECK: [0x6e,0x04,0x0a,0x62]
3677
3678v_min_u16 v5, tma_hi, v2
3679// CHECK: [0x6f,0x04,0x0a,0x62]
3680
3681v_min_u16 v5, ttmp11, v2
3682// CHECK: [0x7b,0x04,0x0a,0x62]
3683
3684v_min_u16 v5, m0, v2
3685// CHECK: [0x7c,0x04,0x0a,0x62]
3686
3687v_min_u16 v5, exec_lo, v2
3688// CHECK: [0x7e,0x04,0x0a,0x62]
3689
3690v_min_u16 v5, exec_hi, v2
3691// CHECK: [0x7f,0x04,0x0a,0x62]
3692
3693v_min_u16 v5, 0, v2
3694// CHECK: [0x80,0x04,0x0a,0x62]
3695
3696v_min_u16 v5, -1, v2
3697// CHECK: [0xc1,0x04,0x0a,0x62]
3698
3699v_min_u16 v5, 0.5, v2
3700// CHECK: [0xff,0x04,0x0a,0x62,0x00,0x38,0x00,0x00]
3701
3702v_min_u16 v5, -4.0, v2
3703// CHECK: [0xff,0x04,0x0a,0x62,0x00,0xc4,0x00,0x00]
3704
3705v_min_u16 v5, src_vccz, v2
3706// CHECK: [0xfb,0x04,0x0a,0x62]
3707
3708v_min_u16 v5, src_execz, v2
3709// CHECK: [0xfc,0x04,0x0a,0x62]
3710
3711v_min_u16 v5, src_scc, v2
3712// CHECK: [0xfd,0x04,0x0a,0x62]
3713
3714v_min_u16 v5, src_lds_direct, v2
3715// CHECK: [0xfe,0x04,0x0a,0x62]
3716
3717v_min_u16 v5, 0xfe0b, v2
3718// CHECK: [0xff,0x04,0x0a,0x62,0x0b,0xfe,0x00,0x00]
3719
3720v_min_u16 v5, 0x3456, v2
3721// CHECK: [0xff,0x04,0x0a,0x62,0x56,0x34,0x00,0x00]
3722
3723v_min_u16 v5, v1, v255
3724// CHECK: [0x01,0xff,0x0b,0x62]
3725
3726v_min_i16 v5, v1, v2
3727// CHECK: [0x01,0x05,0x0a,0x64]
3728
3729v_min_i16 v255, v1, v2
3730// CHECK: [0x01,0x05,0xfe,0x65]
3731
3732v_min_i16 v5, v255, v2
3733// CHECK: [0xff,0x05,0x0a,0x64]
3734
3735v_min_i16 v5, s1, v2
3736// CHECK: [0x01,0x04,0x0a,0x64]
3737
3738v_min_i16 v5, s101, v2
3739// CHECK: [0x65,0x04,0x0a,0x64]
3740
3741v_min_i16 v5, flat_scratch_lo, v2
3742// CHECK: [0x66,0x04,0x0a,0x64]
3743
3744v_min_i16 v5, flat_scratch_hi, v2
3745// CHECK: [0x67,0x04,0x0a,0x64]
3746
3747v_min_i16 v5, vcc_lo, v2
3748// CHECK: [0x6a,0x04,0x0a,0x64]
3749
3750v_min_i16 v5, vcc_hi, v2
3751// CHECK: [0x6b,0x04,0x0a,0x64]
3752
3753v_min_i16 v5, tba_lo, v2
3754// CHECK: [0x6c,0x04,0x0a,0x64]
3755
3756v_min_i16 v5, tba_hi, v2
3757// CHECK: [0x6d,0x04,0x0a,0x64]
3758
3759v_min_i16 v5, tma_lo, v2
3760// CHECK: [0x6e,0x04,0x0a,0x64]
3761
3762v_min_i16 v5, tma_hi, v2
3763// CHECK: [0x6f,0x04,0x0a,0x64]
3764
3765v_min_i16 v5, ttmp11, v2
3766// CHECK: [0x7b,0x04,0x0a,0x64]
3767
3768v_min_i16 v5, m0, v2
3769// CHECK: [0x7c,0x04,0x0a,0x64]
3770
3771v_min_i16 v5, exec_lo, v2
3772// CHECK: [0x7e,0x04,0x0a,0x64]
3773
3774v_min_i16 v5, exec_hi, v2
3775// CHECK: [0x7f,0x04,0x0a,0x64]
3776
3777v_min_i16 v5, 0, v2
3778// CHECK: [0x80,0x04,0x0a,0x64]
3779
3780v_min_i16 v5, -1, v2
3781// CHECK: [0xc1,0x04,0x0a,0x64]
3782
3783v_min_i16 v5, 0.5, v2
3784// CHECK: [0xff,0x04,0x0a,0x64,0x00,0x38,0x00,0x00]
3785
3786v_min_i16 v5, -4.0, v2
3787// CHECK: [0xff,0x04,0x0a,0x64,0x00,0xc4,0x00,0x00]
3788
3789v_min_i16 v5, src_vccz, v2
3790// CHECK: [0xfb,0x04,0x0a,0x64]
3791
3792v_min_i16 v5, src_execz, v2
3793// CHECK: [0xfc,0x04,0x0a,0x64]
3794
3795v_min_i16 v5, src_scc, v2
3796// CHECK: [0xfd,0x04,0x0a,0x64]
3797
3798v_min_i16 v5, src_lds_direct, v2
3799// CHECK: [0xfe,0x04,0x0a,0x64]
3800
3801v_min_i16 v5, 0xfe0b, v2
3802// CHECK: [0xff,0x04,0x0a,0x64,0x0b,0xfe,0x00,0x00]
3803
3804v_min_i16 v5, 0x3456, v2
3805// CHECK: [0xff,0x04,0x0a,0x64,0x56,0x34,0x00,0x00]
3806
3807v_min_i16 v5, v1, v255
3808// CHECK: [0x01,0xff,0x0b,0x64]
3809
3810v_ldexp_f16 v5, v1, v2
3811// CHECK: [0x01,0x05,0x0a,0x66]
3812
3813v_ldexp_f16 v255, v1, v2
3814// CHECK: [0x01,0x05,0xfe,0x67]
3815
3816v_ldexp_f16 v5, v255, v2
3817// CHECK: [0xff,0x05,0x0a,0x66]
3818
3819v_ldexp_f16 v5, s1, v2
3820// CHECK: [0x01,0x04,0x0a,0x66]
3821
3822v_ldexp_f16 v5, s101, v2
3823// CHECK: [0x65,0x04,0x0a,0x66]
3824
3825v_ldexp_f16 v5, flat_scratch_lo, v2
3826// CHECK: [0x66,0x04,0x0a,0x66]
3827
3828v_ldexp_f16 v5, flat_scratch_hi, v2
3829// CHECK: [0x67,0x04,0x0a,0x66]
3830
3831v_ldexp_f16 v5, vcc_lo, v2
3832// CHECK: [0x6a,0x04,0x0a,0x66]
3833
3834v_ldexp_f16 v5, vcc_hi, v2
3835// CHECK: [0x6b,0x04,0x0a,0x66]
3836
3837v_ldexp_f16 v5, tba_lo, v2
3838// CHECK: [0x6c,0x04,0x0a,0x66]
3839
3840v_ldexp_f16 v5, tba_hi, v2
3841// CHECK: [0x6d,0x04,0x0a,0x66]
3842
3843v_ldexp_f16 v5, tma_lo, v2
3844// CHECK: [0x6e,0x04,0x0a,0x66]
3845
3846v_ldexp_f16 v5, tma_hi, v2
3847// CHECK: [0x6f,0x04,0x0a,0x66]
3848
3849v_ldexp_f16 v5, ttmp11, v2
3850// CHECK: [0x7b,0x04,0x0a,0x66]
3851
3852v_ldexp_f16 v5, m0, v2
3853// CHECK: [0x7c,0x04,0x0a,0x66]
3854
3855v_ldexp_f16 v5, exec_lo, v2
3856// CHECK: [0x7e,0x04,0x0a,0x66]
3857
3858v_ldexp_f16 v5, exec_hi, v2
3859// CHECK: [0x7f,0x04,0x0a,0x66]
3860
3861v_ldexp_f16 v5, 0, v2
3862// CHECK: [0x80,0x04,0x0a,0x66]
3863
3864v_ldexp_f16 v5, -1, v2
3865// CHECK: [0xc1,0x04,0x0a,0x66]
3866
3867v_ldexp_f16 v5, 0.5, v2
3868// CHECK: [0xf0,0x04,0x0a,0x66]
3869
3870v_ldexp_f16 v5, -4.0, v2
3871// CHECK: [0xf7,0x04,0x0a,0x66]
3872
3873v_ldexp_f16 v5, src_vccz, v2
3874// CHECK: [0xfb,0x04,0x0a,0x66]
3875
3876v_ldexp_f16 v5, src_execz, v2
3877// CHECK: [0xfc,0x04,0x0a,0x66]
3878
3879v_ldexp_f16 v5, src_scc, v2
3880// CHECK: [0xfd,0x04,0x0a,0x66]
3881
3882v_ldexp_f16 v5, src_lds_direct, v2
3883// CHECK: [0xfe,0x04,0x0a,0x66]
3884
3885v_ldexp_f16 v5, 0xfe0b, v2
3886// CHECK: [0xff,0x04,0x0a,0x66,0x0b,0xfe,0x00,0x00]
3887
3888v_ldexp_f16 v5, 0x3456, v2
3889// CHECK: [0xff,0x04,0x0a,0x66,0x56,0x34,0x00,0x00]
3890
3891v_ldexp_f16 v5, v1, v255
3892// CHECK: [0x01,0xff,0x0b,0x66]
3893
3894v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
3895// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x06]
3896
3897v_cndmask_b32_sdwa v255, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
3898// CHECK: [0xf9,0x04,0xfe,0x01,0x01,0x06,0x06,0x06]
3899
3900v_cndmask_b32_sdwa v5, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
3901// CHECK: [0xf9,0x04,0x0a,0x00,0xff,0x06,0x06,0x06]
3902
3903v_cndmask_b32_sdwa v5, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
3904// CHECK: [0xf9,0xfe,0x0b,0x00,0x01,0x06,0x06,0x06]
3905
3906v_cndmask_b32_sdwa v5, v1, v2, vcc dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
3907// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x06]
3908
3909v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
3910// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x00,0x06,0x06]
3911
3912v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
3913// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x01,0x06,0x06]
3914
3915v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
3916// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x02,0x06,0x06]
3917
3918v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
3919// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x03,0x06,0x06]
3920
3921v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
3922// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x04,0x06,0x06]
3923
3924v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
3925// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x05,0x06,0x06]
3926
3927v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
3928// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x0e,0x06,0x06]
3929
3930v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
3931// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x16,0x06,0x06]
3932
3933v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
3934// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x16,0x06,0x06]
3935
3936v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
3937// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x06]
3938
3939v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
3940// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x00,0x06]
3941
3942v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
3943// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x01,0x06]
3944
3945v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
3946// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x02,0x06]
3947
3948v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
3949// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x03,0x06]
3950
3951v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
3952// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x04,0x06]
3953
3954v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
3955// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x05,0x06]
3956
3957v_cndmask_b32_sdwa v5, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
3958// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x0e,0x06]
3959
3960v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
3961// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x06]
3962
3963v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
3964// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x00]
3965
3966v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
3967// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x01]
3968
3969v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
3970// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x02]
3971
3972v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
3973// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x03]
3974
3975v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
3976// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x04]
3977
3978v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
3979// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x05]
3980
3981v_cndmask_b32_sdwa v5, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
3982// CHECK: [0xf9,0x04,0x0a,0x00,0x01,0x06,0x06,0x0e]
3983
3984v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
3985// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0xe4,0x00,0x00]
3986
3987v_cndmask_b32_dpp v255, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
3988// CHECK: [0xfa,0x04,0xfe,0x01,0x01,0xe4,0x00,0x00]
3989
3990v_cndmask_b32_dpp v5, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
3991// CHECK: [0xfa,0x04,0x0a,0x00,0xff,0xe4,0x00,0x00]
3992
3993v_cndmask_b32_dpp v5, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
3994// CHECK: [0xfa,0xfe,0x0b,0x00,0x01,0xe4,0x00,0x00]
3995
3996v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
3997// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x1b,0x00,0x00]
3998
3999v_cndmask_b32_dpp v5, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0
4000// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x40,0x01,0x00]
4001
4002v_cndmask_b32_dpp v5, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0
4003// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x41,0x01,0x00]
4004
4005v_cndmask_b32_dpp v5, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0
4006// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x42,0x01,0x00]
4007
4008v_cndmask_b32_dpp v5, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0
4009// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x43,0x01,0x00]
4010
4011v_cndmask_b32_dpp v5, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0
4012// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x30,0x01,0x00]
4013
4014v_cndmask_b32_dpp v5, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0
4015// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x34,0x01,0x00]
4016
4017v_cndmask_b32_dpp v5, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0
4018// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x38,0x01,0x00]
4019
4020v_cndmask_b32_dpp v5, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0
4021// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x3c,0x01,0x00]
4022
4023v_cndmask_b32_dpp v5, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0
4024// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x01,0x01,0x00]
4025
4026v_cndmask_b32_dpp v5, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0
4027// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x0f,0x01,0x00]
4028
4029v_cndmask_b32_dpp v5, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0
4030// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x11,0x01,0x00]
4031
4032v_cndmask_b32_dpp v5, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0
4033// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x1f,0x01,0x00]
4034
4035v_cndmask_b32_dpp v5, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0
4036// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x21,0x01,0x00]
4037
4038v_cndmask_b32_dpp v5, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0
4039// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0x2f,0x01,0x00]
4040
4041v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
4042// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0xe4,0x00,0x10]
4043
4044v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
4045// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0xe4,0x00,0x30]
4046
4047v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
4048// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0xe4,0x00,0xf0]
4049
4050v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[0,1,2,3] bank_mask:0x0
4051// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0xe4,0x00,0xf0]
4052
4053v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
4054// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0xe4,0x00,0x01]
4055
4056v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
4057// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0xe4,0x00,0x03]
4058
4059v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
4060// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0xe4,0x00,0x0f]
4061
4062v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0
4063// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0xe4,0x00,0x0f]
4064
4065v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
4066// CHECK: [0xfa,0x04,0x0a,0x00,0x01,0xe4,0x08,0x00]
4067
4068v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4069// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x06]
4070
4071v_add_f32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4072// CHECK: [0xf9,0x04,0xfe,0x03,0x01,0x06,0x06,0x06]
4073
4074v_add_f32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4075// CHECK: [0xf9,0x04,0x0a,0x02,0xff,0x06,0x06,0x06]
4076
4077v_add_f32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4078// CHECK: [0xf9,0xfe,0x0b,0x02,0x01,0x06,0x06,0x06]
4079
4080v_add_f32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4081// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x26,0x06,0x06]
4082
4083v_add_f32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4084// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x06]
4085
4086v_add_f32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4087// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x00,0x06,0x06]
4088
4089v_add_f32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4090// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x01,0x06,0x06]
4091
4092v_add_f32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4093// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x02,0x06,0x06]
4094
4095v_add_f32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4096// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x03,0x06,0x06]
4097
4098v_add_f32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4099// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x04,0x06,0x06]
4100
4101v_add_f32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4102// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x05,0x06,0x06]
4103
4104v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
4105// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x0e,0x06,0x06]
4106
4107v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
4108// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x16,0x06,0x06]
4109
4110v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
4111// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x16,0x06,0x06]
4112
4113v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
4114// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x06]
4115
4116v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
4117// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x00,0x06]
4118
4119v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
4120// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x01,0x06]
4121
4122v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
4123// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x02,0x06]
4124
4125v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
4126// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x03,0x06]
4127
4128v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
4129// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x04,0x06]
4130
4131v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
4132// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x05,0x06]
4133
4134v_add_f32_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4135// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x16,0x06]
4136
4137v_add_f32_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4138// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x26,0x06]
4139
4140v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
4141// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x06]
4142
4143v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
4144// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x00]
4145
4146v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
4147// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x01]
4148
4149v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
4150// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x02]
4151
4152v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
4153// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x03]
4154
4155v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
4156// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x04]
4157
4158v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
4159// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x05]
4160
4161v_add_f32_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4162// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x16]
4163
4164v_add_f32_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4165// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x26]
4166
4167v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4168// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x00]
4169
4170v_add_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4171// CHECK: [0xfa,0x04,0xfe,0x03,0x01,0xe4,0x00,0x00]
4172
4173v_add_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4174// CHECK: [0xfa,0x04,0x0a,0x02,0xff,0xe4,0x00,0x00]
4175
4176v_add_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4177// CHECK: [0xfa,0xfe,0x0b,0x02,0x01,0xe4,0x00,0x00]
4178
4179v_add_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
4180// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x1b,0x00,0x00]
4181
4182v_add_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
4183// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x40,0x01,0x00]
4184
4185v_add_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
4186// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x41,0x01,0x00]
4187
4188v_add_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
4189// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x42,0x01,0x00]
4190
4191v_add_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
4192// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x43,0x01,0x00]
4193
4194v_add_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
4195// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x30,0x01,0x00]
4196
4197v_add_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
4198// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x34,0x01,0x00]
4199
4200v_add_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
4201// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x38,0x01,0x00]
4202
4203v_add_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
4204// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x3c,0x01,0x00]
4205
4206v_add_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
4207// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x01,0x01,0x00]
4208
4209v_add_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
4210// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x0f,0x01,0x00]
4211
4212v_add_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
4213// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x11,0x01,0x00]
4214
4215v_add_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
4216// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x1f,0x01,0x00]
4217
4218v_add_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
4219// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x21,0x01,0x00]
4220
4221v_add_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
4222// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x2f,0x01,0x00]
4223
4224v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
4225// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x10]
4226
4227v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
4228// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x30]
4229
4230v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
4231// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0xf0]
4232
4233v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
4234// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0xf0]
4235
4236v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
4237// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x01]
4238
4239v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
4240// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x03]
4241
4242v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
4243// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x0f]
4244
4245v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
4246// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x0f]
4247
4248v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
4249// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x08,0x00]
4250
4251v_add_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4252// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x10,0x00]
4253
4254v_add_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4255// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x20,0x00]
4256
4257v_add_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4258// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x40,0x00]
4259
4260v_add_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4261// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x80,0x00]
4262
4263v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4264// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x06]
4265
4266v_sub_f32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4267// CHECK: [0xf9,0x04,0xfe,0x05,0x01,0x06,0x06,0x06]
4268
4269v_sub_f32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4270// CHECK: [0xf9,0x04,0x0a,0x04,0xff,0x06,0x06,0x06]
4271
4272v_sub_f32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4273// CHECK: [0xf9,0xfe,0x0b,0x04,0x01,0x06,0x06,0x06]
4274
4275v_sub_f32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4276// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x26,0x06,0x06]
4277
4278v_sub_f32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4279// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x06]
4280
4281v_sub_f32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4282// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x00,0x06,0x06]
4283
4284v_sub_f32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4285// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x01,0x06,0x06]
4286
4287v_sub_f32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4288// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x02,0x06,0x06]
4289
4290v_sub_f32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4291// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x03,0x06,0x06]
4292
4293v_sub_f32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4294// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x04,0x06,0x06]
4295
4296v_sub_f32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4297// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x05,0x06,0x06]
4298
4299v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
4300// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x0e,0x06,0x06]
4301
4302v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
4303// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x16,0x06,0x06]
4304
4305v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
4306// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x16,0x06,0x06]
4307
4308v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
4309// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x06]
4310
4311v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
4312// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x00,0x06]
4313
4314v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
4315// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x01,0x06]
4316
4317v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
4318// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x02,0x06]
4319
4320v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
4321// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x03,0x06]
4322
4323v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
4324// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x04,0x06]
4325
4326v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
4327// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x05,0x06]
4328
4329v_sub_f32_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4330// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x16,0x06]
4331
4332v_sub_f32_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4333// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x26,0x06]
4334
4335v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
4336// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x06]
4337
4338v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
4339// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x00]
4340
4341v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
4342// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x01]
4343
4344v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
4345// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x02]
4346
4347v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
4348// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x03]
4349
4350v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
4351// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x04]
4352
4353v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
4354// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x05]
4355
4356v_sub_f32_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4357// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x16]
4358
4359v_sub_f32_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4360// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x26]
4361
4362v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4363// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x00]
4364
4365v_sub_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4366// CHECK: [0xfa,0x04,0xfe,0x05,0x01,0xe4,0x00,0x00]
4367
4368v_sub_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4369// CHECK: [0xfa,0x04,0x0a,0x04,0xff,0xe4,0x00,0x00]
4370
4371v_sub_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4372// CHECK: [0xfa,0xfe,0x0b,0x04,0x01,0xe4,0x00,0x00]
4373
4374v_sub_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
4375// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x1b,0x00,0x00]
4376
4377v_sub_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
4378// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x40,0x01,0x00]
4379
4380v_sub_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
4381// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x41,0x01,0x00]
4382
4383v_sub_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
4384// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x42,0x01,0x00]
4385
4386v_sub_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
4387// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x43,0x01,0x00]
4388
4389v_sub_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
4390// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x30,0x01,0x00]
4391
4392v_sub_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
4393// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x34,0x01,0x00]
4394
4395v_sub_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
4396// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x38,0x01,0x00]
4397
4398v_sub_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
4399// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x3c,0x01,0x00]
4400
4401v_sub_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
4402// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x01,0x01,0x00]
4403
4404v_sub_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
4405// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x0f,0x01,0x00]
4406
4407v_sub_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
4408// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x11,0x01,0x00]
4409
4410v_sub_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
4411// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x1f,0x01,0x00]
4412
4413v_sub_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
4414// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x21,0x01,0x00]
4415
4416v_sub_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
4417// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x2f,0x01,0x00]
4418
4419v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
4420// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x10]
4421
4422v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
4423// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x30]
4424
4425v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
4426// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0xf0]
4427
4428v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
4429// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0xf0]
4430
4431v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
4432// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x01]
4433
4434v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
4435// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x03]
4436
4437v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
4438// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x0f]
4439
4440v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
4441// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x0f]
4442
4443v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
4444// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x08,0x00]
4445
4446v_sub_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4447// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x10,0x00]
4448
4449v_sub_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4450// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x20,0x00]
4451
4452v_sub_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4453// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x40,0x00]
4454
4455v_sub_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4456// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x80,0x00]
4457
4458v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4459// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x06]
4460
4461v_subrev_f32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4462// CHECK: [0xf9,0x04,0xfe,0x07,0x01,0x06,0x06,0x06]
4463
4464v_subrev_f32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4465// CHECK: [0xf9,0x04,0x0a,0x06,0xff,0x06,0x06,0x06]
4466
4467v_subrev_f32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4468// CHECK: [0xf9,0xfe,0x0b,0x06,0x01,0x06,0x06,0x06]
4469
4470v_subrev_f32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4471// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x26,0x06,0x06]
4472
4473v_subrev_f32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4474// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x06]
4475
4476v_subrev_f32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4477// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x00,0x06,0x06]
4478
4479v_subrev_f32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4480// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x01,0x06,0x06]
4481
4482v_subrev_f32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4483// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x02,0x06,0x06]
4484
4485v_subrev_f32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4486// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x03,0x06,0x06]
4487
4488v_subrev_f32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4489// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x04,0x06,0x06]
4490
4491v_subrev_f32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4492// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x05,0x06,0x06]
4493
4494v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
4495// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x0e,0x06,0x06]
4496
4497v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
4498// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x16,0x06,0x06]
4499
4500v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
4501// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x16,0x06,0x06]
4502
4503v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
4504// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x06]
4505
4506v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
4507// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x00,0x06]
4508
4509v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
4510// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x01,0x06]
4511
4512v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
4513// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x02,0x06]
4514
4515v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
4516// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x03,0x06]
4517
4518v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
4519// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x04,0x06]
4520
4521v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
4522// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x05,0x06]
4523
4524v_subrev_f32_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4525// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x16,0x06]
4526
4527v_subrev_f32_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4528// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x26,0x06]
4529
4530v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
4531// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x06]
4532
4533v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
4534// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x00]
4535
4536v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
4537// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x01]
4538
4539v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
4540// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x02]
4541
4542v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
4543// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x03]
4544
4545v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
4546// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x04]
4547
4548v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
4549// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x05]
4550
4551v_subrev_f32_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4552// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x16]
4553
4554v_subrev_f32_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4555// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x26]
4556
4557v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4558// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x00]
4559
4560v_subrev_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4561// CHECK: [0xfa,0x04,0xfe,0x07,0x01,0xe4,0x00,0x00]
4562
4563v_subrev_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4564// CHECK: [0xfa,0x04,0x0a,0x06,0xff,0xe4,0x00,0x00]
4565
4566v_subrev_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4567// CHECK: [0xfa,0xfe,0x0b,0x06,0x01,0xe4,0x00,0x00]
4568
4569v_subrev_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
4570// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x00,0x00]
4571
4572v_subrev_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
4573// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x40,0x01,0x00]
4574
4575v_subrev_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
4576// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x41,0x01,0x00]
4577
4578v_subrev_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
4579// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x42,0x01,0x00]
4580
4581v_subrev_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
4582// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x43,0x01,0x00]
4583
4584v_subrev_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
4585// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x30,0x01,0x00]
4586
4587v_subrev_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
4588// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x34,0x01,0x00]
4589
4590v_subrev_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
4591// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x38,0x01,0x00]
4592
4593v_subrev_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
4594// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x3c,0x01,0x00]
4595
4596v_subrev_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
4597// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x01,0x01,0x00]
4598
4599v_subrev_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
4600// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x0f,0x01,0x00]
4601
4602v_subrev_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
4603// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x11,0x01,0x00]
4604
4605v_subrev_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
4606// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x1f,0x01,0x00]
4607
4608v_subrev_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
4609// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x21,0x01,0x00]
4610
4611v_subrev_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
4612// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x2f,0x01,0x00]
4613
4614v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
4615// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x10]
4616
4617v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
4618// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x30]
4619
4620v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
4621// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0xf0]
4622
4623v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
4624// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0xf0]
4625
4626v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
4627// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x01]
4628
4629v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
4630// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x03]
4631
4632v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
4633// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x0f]
4634
4635v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
4636// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x0f]
4637
4638v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
4639// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x08,0x00]
4640
4641v_subrev_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4642// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x10,0x00]
4643
4644v_subrev_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4645// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x20,0x00]
4646
4647v_subrev_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4648// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x40,0x00]
4649
4650v_subrev_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4651// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x80,0x00]
4652
4653v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4654// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x06]
4655
4656v_mul_legacy_f32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4657// CHECK: [0xf9,0x04,0xfe,0x09,0x01,0x06,0x06,0x06]
4658
4659v_mul_legacy_f32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4660// CHECK: [0xf9,0x04,0x0a,0x08,0xff,0x06,0x06,0x06]
4661
4662v_mul_legacy_f32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4663// CHECK: [0xf9,0xfe,0x0b,0x08,0x01,0x06,0x06,0x06]
4664
4665v_mul_legacy_f32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4666// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x26,0x06,0x06]
4667
4668v_mul_legacy_f32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4669// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x06]
4670
4671v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4672// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x00,0x06,0x06]
4673
4674v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4675// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x01,0x06,0x06]
4676
4677v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4678// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x02,0x06,0x06]
4679
4680v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4681// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x03,0x06,0x06]
4682
4683v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4684// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x04,0x06,0x06]
4685
4686v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4687// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x05,0x06,0x06]
4688
4689v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
4690// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x0e,0x06,0x06]
4691
4692v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
4693// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x16,0x06,0x06]
4694
4695v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
4696// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x16,0x06,0x06]
4697
4698v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
4699// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x06]
4700
4701v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
4702// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x00,0x06]
4703
4704v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
4705// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x01,0x06]
4706
4707v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
4708// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x02,0x06]
4709
4710v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
4711// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x03,0x06]
4712
4713v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
4714// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x04,0x06]
4715
4716v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
4717// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x05,0x06]
4718
4719v_mul_legacy_f32_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4720// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x16,0x06]
4721
4722v_mul_legacy_f32_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4723// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x26,0x06]
4724
4725v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
4726// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x06]
4727
4728v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
4729// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x00]
4730
4731v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
4732// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x01]
4733
4734v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
4735// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x02]
4736
4737v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
4738// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x03]
4739
4740v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
4741// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x04]
4742
4743v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
4744// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x05]
4745
4746v_mul_legacy_f32_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4747// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x16]
4748
4749v_mul_legacy_f32_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4750// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x26]
4751
4752v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4753// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x00]
4754
4755v_mul_legacy_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4756// CHECK: [0xfa,0x04,0xfe,0x09,0x01,0xe4,0x00,0x00]
4757
4758v_mul_legacy_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4759// CHECK: [0xfa,0x04,0x0a,0x08,0xff,0xe4,0x00,0x00]
4760
4761v_mul_legacy_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4762// CHECK: [0xfa,0xfe,0x0b,0x08,0x01,0xe4,0x00,0x00]
4763
4764v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
4765// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x1b,0x00,0x00]
4766
4767v_mul_legacy_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
4768// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x40,0x01,0x00]
4769
4770v_mul_legacy_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
4771// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x41,0x01,0x00]
4772
4773v_mul_legacy_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
4774// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x42,0x01,0x00]
4775
4776v_mul_legacy_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
4777// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x43,0x01,0x00]
4778
4779v_mul_legacy_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
4780// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x30,0x01,0x00]
4781
4782v_mul_legacy_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
4783// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x34,0x01,0x00]
4784
4785v_mul_legacy_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
4786// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x38,0x01,0x00]
4787
4788v_mul_legacy_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
4789// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x3c,0x01,0x00]
4790
4791v_mul_legacy_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
4792// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x01,0x01,0x00]
4793
4794v_mul_legacy_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
4795// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x0f,0x01,0x00]
4796
4797v_mul_legacy_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
4798// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x11,0x01,0x00]
4799
4800v_mul_legacy_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
4801// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x1f,0x01,0x00]
4802
4803v_mul_legacy_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
4804// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x21,0x01,0x00]
4805
4806v_mul_legacy_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
4807// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x2f,0x01,0x00]
4808
4809v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
4810// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x10]
4811
4812v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
4813// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x30]
4814
4815v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
4816// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0xf0]
4817
4818v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
4819// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0xf0]
4820
4821v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
4822// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x01]
4823
4824v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
4825// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x03]
4826
4827v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
4828// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x0f]
4829
4830v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
4831// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x0f]
4832
4833v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
4834// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x08,0x00]
4835
4836v_mul_legacy_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4837// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x10,0x00]
4838
4839v_mul_legacy_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4840// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x20,0x00]
4841
4842v_mul_legacy_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4843// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x40,0x00]
4844
4845v_mul_legacy_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4846// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x80,0x00]
4847
4848v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4849// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x06]
4850
4851v_mul_f32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4852// CHECK: [0xf9,0x04,0xfe,0x0b,0x01,0x06,0x06,0x06]
4853
4854v_mul_f32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4855// CHECK: [0xf9,0x04,0x0a,0x0a,0xff,0x06,0x06,0x06]
4856
4857v_mul_f32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4858// CHECK: [0xf9,0xfe,0x0b,0x0a,0x01,0x06,0x06,0x06]
4859
4860v_mul_f32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4861// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x26,0x06,0x06]
4862
4863v_mul_f32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4864// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x06]
4865
4866v_mul_f32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4867// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x00,0x06,0x06]
4868
4869v_mul_f32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4870// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x01,0x06,0x06]
4871
4872v_mul_f32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4873// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x02,0x06,0x06]
4874
4875v_mul_f32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4876// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x03,0x06,0x06]
4877
4878v_mul_f32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4879// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x04,0x06,0x06]
4880
4881v_mul_f32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4882// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x05,0x06,0x06]
4883
4884v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
4885// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x0e,0x06,0x06]
4886
4887v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
4888// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x16,0x06,0x06]
4889
4890v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
4891// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x16,0x06,0x06]
4892
4893v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
4894// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x06]
4895
4896v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
4897// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x00,0x06]
4898
4899v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
4900// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x01,0x06]
4901
4902v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
4903// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x02,0x06]
4904
4905v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
4906// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x03,0x06]
4907
4908v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
4909// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x04,0x06]
4910
4911v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
4912// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x05,0x06]
4913
4914v_mul_f32_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4915// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x16,0x06]
4916
4917v_mul_f32_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4918// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x26,0x06]
4919
4920v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
4921// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x06]
4922
4923v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
4924// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x00]
4925
4926v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
4927// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x01]
4928
4929v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
4930// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x02]
4931
4932v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
4933// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x03]
4934
4935v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
4936// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x04]
4937
4938v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
4939// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x05]
4940
4941v_mul_f32_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4942// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x16]
4943
4944v_mul_f32_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
4945// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x26]
4946
4947v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4948// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x00]
4949
4950v_mul_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4951// CHECK: [0xfa,0x04,0xfe,0x0b,0x01,0xe4,0x00,0x00]
4952
4953v_mul_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4954// CHECK: [0xfa,0x04,0x0a,0x0a,0xff,0xe4,0x00,0x00]
4955
4956v_mul_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
4957// CHECK: [0xfa,0xfe,0x0b,0x0a,0x01,0xe4,0x00,0x00]
4958
4959v_mul_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
4960// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x1b,0x00,0x00]
4961
4962v_mul_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
4963// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x40,0x01,0x00]
4964
4965v_mul_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
4966// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x41,0x01,0x00]
4967
4968v_mul_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
4969// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x42,0x01,0x00]
4970
4971v_mul_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
4972// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x43,0x01,0x00]
4973
4974v_mul_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
4975// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x30,0x01,0x00]
4976
4977v_mul_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
4978// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x34,0x01,0x00]
4979
4980v_mul_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
4981// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x38,0x01,0x00]
4982
4983v_mul_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
4984// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x3c,0x01,0x00]
4985
4986v_mul_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
4987// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x01,0x01,0x00]
4988
4989v_mul_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
4990// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x0f,0x01,0x00]
4991
4992v_mul_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
4993// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x11,0x01,0x00]
4994
4995v_mul_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
4996// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x1f,0x01,0x00]
4997
4998v_mul_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
4999// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x21,0x01,0x00]
5000
5001v_mul_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
5002// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x2f,0x01,0x00]
5003
5004v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
5005// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x10]
5006
5007v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
5008// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x30]
5009
5010v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
5011// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0xf0]
5012
5013v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
5014// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0xf0]
5015
5016v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
5017// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x01]
5018
5019v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
5020// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x03]
5021
5022v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
5023// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x0f]
5024
5025v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
5026// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x0f]
5027
5028v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
5029// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x08,0x00]
5030
5031v_mul_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5032// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x10,0x00]
5033
5034v_mul_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5035// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x20,0x00]
5036
5037v_mul_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5038// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x40,0x00]
5039
5040v_mul_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5041// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x80,0x00]
5042
5043v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5044// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x06]
5045
5046v_mul_i32_i24_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5047// CHECK: [0xf9,0x04,0xfe,0x0d,0x01,0x06,0x06,0x06]
5048
5049v_mul_i32_i24_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5050// CHECK: [0xf9,0x04,0x0a,0x0c,0xff,0x06,0x06,0x06]
5051
5052v_mul_i32_i24_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5053// CHECK: [0xf9,0xfe,0x0b,0x0c,0x01,0x06,0x06,0x06]
5054
5055v_mul_i32_i24_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5056// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x26,0x06,0x06]
5057
5058v_mul_i32_i24_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5059// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x06]
5060
5061v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5062// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x00,0x06,0x06]
5063
5064v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5065// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x01,0x06,0x06]
5066
5067v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5068// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x02,0x06,0x06]
5069
5070v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5071// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x03,0x06,0x06]
5072
5073v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5074// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x04,0x06,0x06]
5075
5076v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5077// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x05,0x06,0x06]
5078
5079v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
5080// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x0e,0x06,0x06]
5081
5082v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
5083// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x16,0x06,0x06]
5084
5085v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
5086// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x16,0x06,0x06]
5087
5088v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
5089// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x06]
5090
5091v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
5092// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x00,0x06]
5093
5094v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
5095// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x01,0x06]
5096
5097v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
5098// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x02,0x06]
5099
5100v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
5101// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x03,0x06]
5102
5103v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
5104// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x04,0x06]
5105
5106v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
5107// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x05,0x06]
5108
5109v_mul_i32_i24_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5110// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x0e,0x06]
5111
5112v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5113// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x06]
5114
5115v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
5116// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x00]
5117
5118v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
5119// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x01]
5120
5121v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
5122// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x02]
5123
5124v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
5125// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x03]
5126
5127v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
5128// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x04]
5129
5130v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
5131// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x05]
5132
5133v_mul_i32_i24_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5134// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x0e]
5135
5136v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5137// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x00]
5138
5139v_mul_i32_i24_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5140// CHECK: [0xfa,0x04,0xfe,0x0d,0x01,0xe4,0x00,0x00]
5141
5142v_mul_i32_i24_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5143// CHECK: [0xfa,0x04,0x0a,0x0c,0xff,0xe4,0x00,0x00]
5144
5145v_mul_i32_i24_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5146// CHECK: [0xfa,0xfe,0x0b,0x0c,0x01,0xe4,0x00,0x00]
5147
5148v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
5149// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x1b,0x00,0x00]
5150
5151v_mul_i32_i24_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
5152// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x40,0x01,0x00]
5153
5154v_mul_i32_i24_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
5155// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x41,0x01,0x00]
5156
5157v_mul_i32_i24_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
5158// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x42,0x01,0x00]
5159
5160v_mul_i32_i24_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
5161// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x43,0x01,0x00]
5162
5163v_mul_i32_i24_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
5164// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x30,0x01,0x00]
5165
5166v_mul_i32_i24_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
5167// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x34,0x01,0x00]
5168
5169v_mul_i32_i24_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
5170// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x38,0x01,0x00]
5171
5172v_mul_i32_i24_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
5173// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x3c,0x01,0x00]
5174
5175v_mul_i32_i24_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
5176// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x01,0x01,0x00]
5177
5178v_mul_i32_i24_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
5179// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x0f,0x01,0x00]
5180
5181v_mul_i32_i24_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
5182// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x11,0x01,0x00]
5183
5184v_mul_i32_i24_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
5185// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x1f,0x01,0x00]
5186
5187v_mul_i32_i24_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
5188// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x21,0x01,0x00]
5189
5190v_mul_i32_i24_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
5191// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x2f,0x01,0x00]
5192
5193v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
5194// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x10]
5195
5196v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
5197// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x30]
5198
5199v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
5200// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0xf0]
5201
5202v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
5203// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0xf0]
5204
5205v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
5206// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x01]
5207
5208v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
5209// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x03]
5210
5211v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
5212// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x0f]
5213
5214v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
5215// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x0f]
5216
5217v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
5218// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x08,0x00]
5219
5220v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5221// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x06]
5222
5223v_mul_hi_i32_i24_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5224// CHECK: [0xf9,0x04,0xfe,0x0f,0x01,0x06,0x06,0x06]
5225
5226v_mul_hi_i32_i24_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5227// CHECK: [0xf9,0x04,0x0a,0x0e,0xff,0x06,0x06,0x06]
5228
5229v_mul_hi_i32_i24_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5230// CHECK: [0xf9,0xfe,0x0b,0x0e,0x01,0x06,0x06,0x06]
5231
5232v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5233// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x06]
5234
5235v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5236// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x00,0x06,0x06]
5237
5238v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5239// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x01,0x06,0x06]
5240
5241v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5242// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x02,0x06,0x06]
5243
5244v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5245// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x03,0x06,0x06]
5246
5247v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5248// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x04,0x06,0x06]
5249
5250v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5251// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x05,0x06,0x06]
5252
5253v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
5254// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x0e,0x06,0x06]
5255
5256v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
5257// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x16,0x06,0x06]
5258
5259v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
5260// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x16,0x06,0x06]
5261
5262v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
5263// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x06]
5264
5265v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
5266// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x00,0x06]
5267
5268v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
5269// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x01,0x06]
5270
5271v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
5272// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x02,0x06]
5273
5274v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
5275// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x03,0x06]
5276
5277v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
5278// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x04,0x06]
5279
5280v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
5281// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x05,0x06]
5282
5283v_mul_hi_i32_i24_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5284// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x0e,0x06]
5285
5286v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5287// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x06]
5288
5289v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
5290// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x00]
5291
5292v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
5293// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x01]
5294
5295v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
5296// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x02]
5297
5298v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
5299// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x03]
5300
5301v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
5302// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x04]
5303
5304v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
5305// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x05]
5306
5307v_mul_hi_i32_i24_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5308// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x0e]
5309
5310v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5311// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x00]
5312
5313v_mul_hi_i32_i24_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5314// CHECK: [0xfa,0x04,0xfe,0x0f,0x01,0xe4,0x00,0x00]
5315
5316v_mul_hi_i32_i24_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5317// CHECK: [0xfa,0x04,0x0a,0x0e,0xff,0xe4,0x00,0x00]
5318
5319v_mul_hi_i32_i24_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5320// CHECK: [0xfa,0xfe,0x0b,0x0e,0x01,0xe4,0x00,0x00]
5321
5322v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
5323// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x1b,0x00,0x00]
5324
5325v_mul_hi_i32_i24_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
5326// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x40,0x01,0x00]
5327
5328v_mul_hi_i32_i24_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
5329// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x41,0x01,0x00]
5330
5331v_mul_hi_i32_i24_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
5332// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x42,0x01,0x00]
5333
5334v_mul_hi_i32_i24_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
5335// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x43,0x01,0x00]
5336
5337v_mul_hi_i32_i24_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
5338// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x30,0x01,0x00]
5339
5340v_mul_hi_i32_i24_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
5341// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x34,0x01,0x00]
5342
5343v_mul_hi_i32_i24_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
5344// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x38,0x01,0x00]
5345
5346v_mul_hi_i32_i24_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
5347// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x3c,0x01,0x00]
5348
5349v_mul_hi_i32_i24_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
5350// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x01,0x01,0x00]
5351
5352v_mul_hi_i32_i24_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
5353// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x0f,0x01,0x00]
5354
5355v_mul_hi_i32_i24_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
5356// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x11,0x01,0x00]
5357
5358v_mul_hi_i32_i24_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
5359// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x1f,0x01,0x00]
5360
5361v_mul_hi_i32_i24_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
5362// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x21,0x01,0x00]
5363
5364v_mul_hi_i32_i24_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
5365// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x2f,0x01,0x00]
5366
5367v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
5368// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x10]
5369
5370v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
5371// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x30]
5372
5373v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
5374// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0xf0]
5375
5376v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
5377// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0xf0]
5378
5379v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
5380// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x01]
5381
5382v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
5383// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x03]
5384
5385v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
5386// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x0f]
5387
5388v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
5389// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x0f]
5390
5391v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
5392// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x08,0x00]
5393
5394v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5395// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x06]
5396
5397v_mul_u32_u24_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5398// CHECK: [0xf9,0x04,0xfe,0x11,0x01,0x06,0x06,0x06]
5399
5400v_mul_u32_u24_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5401// CHECK: [0xf9,0x04,0x0a,0x10,0xff,0x06,0x06,0x06]
5402
5403v_mul_u32_u24_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5404// CHECK: [0xf9,0xfe,0x0b,0x10,0x01,0x06,0x06,0x06]
5405
5406v_mul_u32_u24_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5407// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x26,0x06,0x06]
5408
5409v_mul_u32_u24_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5410// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x06]
5411
5412v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5413// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x00,0x06,0x06]
5414
5415v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5416// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x01,0x06,0x06]
5417
5418v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5419// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x02,0x06,0x06]
5420
5421v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5422// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x03,0x06,0x06]
5423
5424v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5425// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x04,0x06,0x06]
5426
5427v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5428// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x05,0x06,0x06]
5429
5430v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
5431// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x0e,0x06,0x06]
5432
5433v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
5434// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x16,0x06,0x06]
5435
5436v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
5437// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x16,0x06,0x06]
5438
5439v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
5440// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x06]
5441
5442v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
5443// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x00,0x06]
5444
5445v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
5446// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x01,0x06]
5447
5448v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
5449// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x02,0x06]
5450
5451v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
5452// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x03,0x06]
5453
5454v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
5455// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x04,0x06]
5456
5457v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
5458// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x05,0x06]
5459
5460v_mul_u32_u24_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5461// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x0e,0x06]
5462
5463v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5464// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x06]
5465
5466v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
5467// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x00]
5468
5469v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
5470// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x01]
5471
5472v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
5473// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x02]
5474
5475v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
5476// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x03]
5477
5478v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
5479// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x04]
5480
5481v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
5482// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x05]
5483
5484v_mul_u32_u24_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5485// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x0e]
5486
5487v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5488// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x00]
5489
5490v_mul_u32_u24_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5491// CHECK: [0xfa,0x04,0xfe,0x11,0x01,0xe4,0x00,0x00]
5492
5493v_mul_u32_u24_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5494// CHECK: [0xfa,0x04,0x0a,0x10,0xff,0xe4,0x00,0x00]
5495
5496v_mul_u32_u24_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5497// CHECK: [0xfa,0xfe,0x0b,0x10,0x01,0xe4,0x00,0x00]
5498
5499v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
5500// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x1b,0x00,0x00]
5501
5502v_mul_u32_u24_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
5503// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x40,0x01,0x00]
5504
5505v_mul_u32_u24_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
5506// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x41,0x01,0x00]
5507
5508v_mul_u32_u24_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
5509// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x42,0x01,0x00]
5510
5511v_mul_u32_u24_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
5512// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x43,0x01,0x00]
5513
5514v_mul_u32_u24_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
5515// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x30,0x01,0x00]
5516
5517v_mul_u32_u24_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
5518// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x34,0x01,0x00]
5519
5520v_mul_u32_u24_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
5521// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x38,0x01,0x00]
5522
5523v_mul_u32_u24_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
5524// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x3c,0x01,0x00]
5525
5526v_mul_u32_u24_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
5527// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x01,0x01,0x00]
5528
5529v_mul_u32_u24_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
5530// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x0f,0x01,0x00]
5531
5532v_mul_u32_u24_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
5533// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x11,0x01,0x00]
5534
5535v_mul_u32_u24_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
5536// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x1f,0x01,0x00]
5537
5538v_mul_u32_u24_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
5539// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x21,0x01,0x00]
5540
5541v_mul_u32_u24_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
5542// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x2f,0x01,0x00]
5543
5544v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
5545// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x10]
5546
5547v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
5548// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x30]
5549
5550v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
5551// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0xf0]
5552
5553v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
5554// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0xf0]
5555
5556v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
5557// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x01]
5558
5559v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
5560// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x03]
5561
5562v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
5563// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x0f]
5564
5565v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
5566// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x0f]
5567
5568v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
5569// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x08,0x00]
5570
5571v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5572// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x06]
5573
5574v_mul_hi_u32_u24_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5575// CHECK: [0xf9,0x04,0xfe,0x13,0x01,0x06,0x06,0x06]
5576
5577v_mul_hi_u32_u24_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5578// CHECK: [0xf9,0x04,0x0a,0x12,0xff,0x06,0x06,0x06]
5579
5580v_mul_hi_u32_u24_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5581// CHECK: [0xf9,0xfe,0x0b,0x12,0x01,0x06,0x06,0x06]
5582
5583v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5584// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x06]
5585
5586v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5587// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x00,0x06,0x06]
5588
5589v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5590// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x01,0x06,0x06]
5591
5592v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5593// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x02,0x06,0x06]
5594
5595v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5596// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x03,0x06,0x06]
5597
5598v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5599// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x04,0x06,0x06]
5600
5601v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5602// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x05,0x06,0x06]
5603
5604v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
5605// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x0e,0x06,0x06]
5606
5607v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
5608// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x16,0x06,0x06]
5609
5610v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
5611// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x16,0x06,0x06]
5612
5613v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
5614// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x06]
5615
5616v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
5617// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x00,0x06]
5618
5619v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
5620// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x01,0x06]
5621
5622v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
5623// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x02,0x06]
5624
5625v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
5626// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x03,0x06]
5627
5628v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
5629// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x04,0x06]
5630
5631v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
5632// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x05,0x06]
5633
5634v_mul_hi_u32_u24_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5635// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x0e,0x06]
5636
5637v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5638// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x06]
5639
5640v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
5641// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x00]
5642
5643v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
5644// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x01]
5645
5646v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
5647// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x02]
5648
5649v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
5650// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x03]
5651
5652v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
5653// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x04]
5654
5655v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
5656// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x05]
5657
5658v_mul_hi_u32_u24_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5659// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x0e]
5660
5661v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5662// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x00]
5663
5664v_mul_hi_u32_u24_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5665// CHECK: [0xfa,0x04,0xfe,0x13,0x01,0xe4,0x00,0x00]
5666
5667v_mul_hi_u32_u24_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5668// CHECK: [0xfa,0x04,0x0a,0x12,0xff,0xe4,0x00,0x00]
5669
5670v_mul_hi_u32_u24_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5671// CHECK: [0xfa,0xfe,0x0b,0x12,0x01,0xe4,0x00,0x00]
5672
5673v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
5674// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x1b,0x00,0x00]
5675
5676v_mul_hi_u32_u24_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
5677// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x40,0x01,0x00]
5678
5679v_mul_hi_u32_u24_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
5680// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x41,0x01,0x00]
5681
5682v_mul_hi_u32_u24_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
5683// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x42,0x01,0x00]
5684
5685v_mul_hi_u32_u24_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
5686// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x43,0x01,0x00]
5687
5688v_mul_hi_u32_u24_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
5689// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x30,0x01,0x00]
5690
5691v_mul_hi_u32_u24_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
5692// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x34,0x01,0x00]
5693
5694v_mul_hi_u32_u24_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
5695// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x38,0x01,0x00]
5696
5697v_mul_hi_u32_u24_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
5698// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x3c,0x01,0x00]
5699
5700v_mul_hi_u32_u24_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
5701// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x01,0x01,0x00]
5702
5703v_mul_hi_u32_u24_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
5704// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x0f,0x01,0x00]
5705
5706v_mul_hi_u32_u24_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
5707// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x11,0x01,0x00]
5708
5709v_mul_hi_u32_u24_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
5710// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x1f,0x01,0x00]
5711
5712v_mul_hi_u32_u24_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
5713// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x21,0x01,0x00]
5714
5715v_mul_hi_u32_u24_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
5716// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x2f,0x01,0x00]
5717
5718v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
5719// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x10]
5720
5721v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
5722// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x30]
5723
5724v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
5725// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0xf0]
5726
5727v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
5728// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0xf0]
5729
5730v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
5731// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x01]
5732
5733v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
5734// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x03]
5735
5736v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
5737// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x0f]
5738
5739v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
5740// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x0f]
5741
5742v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
5743// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x08,0x00]
5744
5745v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5746// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x06]
5747
5748v_min_f32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5749// CHECK: [0xf9,0x04,0xfe,0x15,0x01,0x06,0x06,0x06]
5750
5751v_min_f32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5752// CHECK: [0xf9,0x04,0x0a,0x14,0xff,0x06,0x06,0x06]
5753
5754v_min_f32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5755// CHECK: [0xf9,0xfe,0x0b,0x14,0x01,0x06,0x06,0x06]
5756
5757v_min_f32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5758// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x26,0x06,0x06]
5759
5760v_min_f32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5761// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x06]
5762
5763v_min_f32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5764// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x00,0x06,0x06]
5765
5766v_min_f32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5767// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x01,0x06,0x06]
5768
5769v_min_f32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5770// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x02,0x06,0x06]
5771
5772v_min_f32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5773// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x03,0x06,0x06]
5774
5775v_min_f32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5776// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x04,0x06,0x06]
5777
5778v_min_f32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5779// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x05,0x06,0x06]
5780
5781v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
5782// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x0e,0x06,0x06]
5783
5784v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
5785// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x16,0x06,0x06]
5786
5787v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
5788// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x16,0x06,0x06]
5789
5790v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
5791// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x06]
5792
5793v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
5794// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x00,0x06]
5795
5796v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
5797// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x01,0x06]
5798
5799v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
5800// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x02,0x06]
5801
5802v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
5803// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x03,0x06]
5804
5805v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
5806// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x04,0x06]
5807
5808v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
5809// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x05,0x06]
5810
5811v_min_f32_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5812// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x16,0x06]
5813
5814v_min_f32_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5815// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x26,0x06]
5816
5817v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5818// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x06]
5819
5820v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
5821// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x00]
5822
5823v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
5824// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x01]
5825
5826v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
5827// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x02]
5828
5829v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
5830// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x03]
5831
5832v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
5833// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x04]
5834
5835v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
5836// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x05]
5837
5838v_min_f32_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5839// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x16]
5840
5841v_min_f32_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5842// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x26]
5843
5844v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5845// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x00]
5846
5847v_min_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5848// CHECK: [0xfa,0x04,0xfe,0x15,0x01,0xe4,0x00,0x00]
5849
5850v_min_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5851// CHECK: [0xfa,0x04,0x0a,0x14,0xff,0xe4,0x00,0x00]
5852
5853v_min_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5854// CHECK: [0xfa,0xfe,0x0b,0x14,0x01,0xe4,0x00,0x00]
5855
5856v_min_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
5857// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x1b,0x00,0x00]
5858
5859v_min_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
5860// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x40,0x01,0x00]
5861
5862v_min_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
5863// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x41,0x01,0x00]
5864
5865v_min_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
5866// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x42,0x01,0x00]
5867
5868v_min_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
5869// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x43,0x01,0x00]
5870
5871v_min_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
5872// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x30,0x01,0x00]
5873
5874v_min_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
5875// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x34,0x01,0x00]
5876
5877v_min_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
5878// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x38,0x01,0x00]
5879
5880v_min_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
5881// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x3c,0x01,0x00]
5882
5883v_min_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
5884// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x01,0x01,0x00]
5885
5886v_min_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
5887// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x0f,0x01,0x00]
5888
5889v_min_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
5890// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x11,0x01,0x00]
5891
5892v_min_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
5893// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x1f,0x01,0x00]
5894
5895v_min_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
5896// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x21,0x01,0x00]
5897
5898v_min_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
5899// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x2f,0x01,0x00]
5900
5901v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
5902// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x10]
5903
5904v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
5905// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x30]
5906
5907v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
5908// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0xf0]
5909
5910v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
5911// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0xf0]
5912
5913v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
5914// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x01]
5915
5916v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
5917// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x03]
5918
5919v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
5920// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x0f]
5921
5922v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
5923// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x0f]
5924
5925v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
5926// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x08,0x00]
5927
5928v_min_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5929// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x10,0x00]
5930
5931v_min_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5932// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x20,0x00]
5933
5934v_min_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5935// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x40,0x00]
5936
5937v_min_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5938// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x80,0x00]
5939
5940v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5941// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x06]
5942
5943v_max_f32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5944// CHECK: [0xf9,0x04,0xfe,0x17,0x01,0x06,0x06,0x06]
5945
5946v_max_f32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5947// CHECK: [0xf9,0x04,0x0a,0x16,0xff,0x06,0x06,0x06]
5948
5949v_max_f32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5950// CHECK: [0xf9,0xfe,0x0b,0x16,0x01,0x06,0x06,0x06]
5951
5952v_max_f32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5953// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x26,0x06,0x06]
5954
5955v_max_f32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5956// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x06]
5957
5958v_max_f32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5959// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x00,0x06,0x06]
5960
5961v_max_f32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5962// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x01,0x06,0x06]
5963
5964v_max_f32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5965// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x02,0x06,0x06]
5966
5967v_max_f32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5968// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x03,0x06,0x06]
5969
5970v_max_f32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5971// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x04,0x06,0x06]
5972
5973v_max_f32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
5974// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x05,0x06,0x06]
5975
5976v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
5977// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x0e,0x06,0x06]
5978
5979v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
5980// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x16,0x06,0x06]
5981
5982v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
5983// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x16,0x06,0x06]
5984
5985v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
5986// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x06]
5987
5988v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
5989// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x00,0x06]
5990
5991v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
5992// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x01,0x06]
5993
5994v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
5995// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x02,0x06]
5996
5997v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
5998// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x03,0x06]
5999
6000v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
6001// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x04,0x06]
6002
6003v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
6004// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x05,0x06]
6005
6006v_max_f32_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6007// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x16,0x06]
6008
6009v_max_f32_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6010// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x26,0x06]
6011
6012v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6013// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x06]
6014
6015v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
6016// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x00]
6017
6018v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
6019// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x01]
6020
6021v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
6022// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x02]
6023
6024v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
6025// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x03]
6026
6027v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
6028// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x04]
6029
6030v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
6031// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x05]
6032
6033v_max_f32_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6034// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x16]
6035
6036v_max_f32_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6037// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x26]
6038
6039v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6040// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x00]
6041
6042v_max_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6043// CHECK: [0xfa,0x04,0xfe,0x17,0x01,0xe4,0x00,0x00]
6044
6045v_max_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6046// CHECK: [0xfa,0x04,0x0a,0x16,0xff,0xe4,0x00,0x00]
6047
6048v_max_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6049// CHECK: [0xfa,0xfe,0x0b,0x16,0x01,0xe4,0x00,0x00]
6050
6051v_max_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
6052// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x1b,0x00,0x00]
6053
6054v_max_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
6055// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x40,0x01,0x00]
6056
6057v_max_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
6058// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x41,0x01,0x00]
6059
6060v_max_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
6061// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x42,0x01,0x00]
6062
6063v_max_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
6064// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x43,0x01,0x00]
6065
6066v_max_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
6067// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x30,0x01,0x00]
6068
6069v_max_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
6070// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x34,0x01,0x00]
6071
6072v_max_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
6073// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x38,0x01,0x00]
6074
6075v_max_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
6076// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x3c,0x01,0x00]
6077
6078v_max_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
6079// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x01,0x01,0x00]
6080
6081v_max_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
6082// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x0f,0x01,0x00]
6083
6084v_max_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
6085// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x11,0x01,0x00]
6086
6087v_max_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
6088// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x1f,0x01,0x00]
6089
6090v_max_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
6091// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x21,0x01,0x00]
6092
6093v_max_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
6094// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x2f,0x01,0x00]
6095
6096v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
6097// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x10]
6098
6099v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
6100// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x30]
6101
6102v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
6103// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0xf0]
6104
6105v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
6106// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0xf0]
6107
6108v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
6109// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x01]
6110
6111v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
6112// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x03]
6113
6114v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
6115// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x0f]
6116
6117v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
6118// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x0f]
6119
6120v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
6121// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x08,0x00]
6122
6123v_max_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6124// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x10,0x00]
6125
6126v_max_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6127// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x20,0x00]
6128
6129v_max_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6130// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x40,0x00]
6131
6132v_max_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6133// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x80,0x00]
6134
6135v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6136// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x06]
6137
6138v_min_i32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6139// CHECK: [0xf9,0x04,0xfe,0x19,0x01,0x06,0x06,0x06]
6140
6141v_min_i32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6142// CHECK: [0xf9,0x04,0x0a,0x18,0xff,0x06,0x06,0x06]
6143
6144v_min_i32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6145// CHECK: [0xf9,0xfe,0x0b,0x18,0x01,0x06,0x06,0x06]
6146
6147v_min_i32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6148// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x06]
6149
6150v_min_i32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6151// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x00,0x06,0x06]
6152
6153v_min_i32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6154// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x01,0x06,0x06]
6155
6156v_min_i32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6157// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x02,0x06,0x06]
6158
6159v_min_i32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6160// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x03,0x06,0x06]
6161
6162v_min_i32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6163// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x04,0x06,0x06]
6164
6165v_min_i32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6166// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x05,0x06,0x06]
6167
6168v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
6169// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x0e,0x06,0x06]
6170
6171v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
6172// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x16,0x06,0x06]
6173
6174v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
6175// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x16,0x06,0x06]
6176
6177v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
6178// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x06]
6179
6180v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
6181// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x00,0x06]
6182
6183v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
6184// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x01,0x06]
6185
6186v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
6187// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x02,0x06]
6188
6189v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
6190// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x03,0x06]
6191
6192v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
6193// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x04,0x06]
6194
6195v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
6196// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x05,0x06]
6197
6198v_min_i32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6199// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x0e,0x06]
6200
6201v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6202// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x06]
6203
6204v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
6205// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x00]
6206
6207v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
6208// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x01]
6209
6210v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
6211// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x02]
6212
6213v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
6214// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x03]
6215
6216v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
6217// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x04]
6218
6219v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
6220// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x05]
6221
6222v_min_i32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6223// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x0e]
6224
6225v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6226// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x00]
6227
6228v_min_i32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6229// CHECK: [0xfa,0x04,0xfe,0x19,0x01,0xe4,0x00,0x00]
6230
6231v_min_i32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6232// CHECK: [0xfa,0x04,0x0a,0x18,0xff,0xe4,0x00,0x00]
6233
6234v_min_i32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6235// CHECK: [0xfa,0xfe,0x0b,0x18,0x01,0xe4,0x00,0x00]
6236
6237v_min_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
6238// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x1b,0x00,0x00]
6239
6240v_min_i32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
6241// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x40,0x01,0x00]
6242
6243v_min_i32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
6244// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x41,0x01,0x00]
6245
6246v_min_i32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
6247// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x42,0x01,0x00]
6248
6249v_min_i32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
6250// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x43,0x01,0x00]
6251
6252v_min_i32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
6253// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x30,0x01,0x00]
6254
6255v_min_i32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
6256// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x34,0x01,0x00]
6257
6258v_min_i32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
6259// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x38,0x01,0x00]
6260
6261v_min_i32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
6262// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x3c,0x01,0x00]
6263
6264v_min_i32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
6265// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x01,0x01,0x00]
6266
6267v_min_i32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
6268// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x0f,0x01,0x00]
6269
6270v_min_i32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
6271// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x11,0x01,0x00]
6272
6273v_min_i32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
6274// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x1f,0x01,0x00]
6275
6276v_min_i32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
6277// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x21,0x01,0x00]
6278
6279v_min_i32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
6280// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x2f,0x01,0x00]
6281
6282v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
6283// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x10]
6284
6285v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
6286// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x30]
6287
6288v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
6289// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0xf0]
6290
6291v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
6292// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0xf0]
6293
6294v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
6295// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x01]
6296
6297v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
6298// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x03]
6299
6300v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
6301// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x0f]
6302
6303v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
6304// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x0f]
6305
6306v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
6307// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x08,0x00]
6308
6309v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6310// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x06]
6311
6312v_max_i32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6313// CHECK: [0xf9,0x04,0xfe,0x1b,0x01,0x06,0x06,0x06]
6314
6315v_max_i32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6316// CHECK: [0xf9,0x04,0x0a,0x1a,0xff,0x06,0x06,0x06]
6317
6318v_max_i32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6319// CHECK: [0xf9,0xfe,0x0b,0x1a,0x01,0x06,0x06,0x06]
6320
6321v_max_i32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6322// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x06]
6323
6324v_max_i32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6325// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x00,0x06,0x06]
6326
6327v_max_i32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6328// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x01,0x06,0x06]
6329
6330v_max_i32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6331// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x02,0x06,0x06]
6332
6333v_max_i32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6334// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x03,0x06,0x06]
6335
6336v_max_i32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6337// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x04,0x06,0x06]
6338
6339v_max_i32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6340// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x05,0x06,0x06]
6341
6342v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
6343// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x0e,0x06,0x06]
6344
6345v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
6346// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x16,0x06,0x06]
6347
6348v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
6349// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x16,0x06,0x06]
6350
6351v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
6352// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x06]
6353
6354v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
6355// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x00,0x06]
6356
6357v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
6358// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x01,0x06]
6359
6360v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
6361// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x02,0x06]
6362
6363v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
6364// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x03,0x06]
6365
6366v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
6367// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x04,0x06]
6368
6369v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
6370// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x05,0x06]
6371
6372v_max_i32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6373// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x0e,0x06]
6374
6375v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6376// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x06]
6377
6378v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
6379// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x00]
6380
6381v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
6382// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x01]
6383
6384v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
6385// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x02]
6386
6387v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
6388// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x03]
6389
6390v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
6391// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x04]
6392
6393v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
6394// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x05]
6395
6396v_max_i32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6397// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x0e]
6398
6399v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6400// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x00]
6401
6402v_max_i32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6403// CHECK: [0xfa,0x04,0xfe,0x1b,0x01,0xe4,0x00,0x00]
6404
6405v_max_i32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6406// CHECK: [0xfa,0x04,0x0a,0x1a,0xff,0xe4,0x00,0x00]
6407
6408v_max_i32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6409// CHECK: [0xfa,0xfe,0x0b,0x1a,0x01,0xe4,0x00,0x00]
6410
6411v_max_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
6412// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x1b,0x00,0x00]
6413
6414v_max_i32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
6415// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x40,0x01,0x00]
6416
6417v_max_i32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
6418// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x41,0x01,0x00]
6419
6420v_max_i32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
6421// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x42,0x01,0x00]
6422
6423v_max_i32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
6424// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x43,0x01,0x00]
6425
6426v_max_i32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
6427// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x30,0x01,0x00]
6428
6429v_max_i32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
6430// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x34,0x01,0x00]
6431
6432v_max_i32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
6433// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x38,0x01,0x00]
6434
6435v_max_i32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
6436// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x3c,0x01,0x00]
6437
6438v_max_i32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
6439// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x01,0x01,0x00]
6440
6441v_max_i32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
6442// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x0f,0x01,0x00]
6443
6444v_max_i32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
6445// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x11,0x01,0x00]
6446
6447v_max_i32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
6448// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x1f,0x01,0x00]
6449
6450v_max_i32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
6451// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x21,0x01,0x00]
6452
6453v_max_i32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
6454// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x2f,0x01,0x00]
6455
6456v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
6457// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x10]
6458
6459v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
6460// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x30]
6461
6462v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
6463// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0xf0]
6464
6465v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
6466// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0xf0]
6467
6468v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
6469// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x01]
6470
6471v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
6472// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x03]
6473
6474v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
6475// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x0f]
6476
6477v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
6478// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x0f]
6479
6480v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
6481// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x08,0x00]
6482
6483v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6484// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x06]
6485
6486v_min_u32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6487// CHECK: [0xf9,0x04,0xfe,0x1d,0x01,0x06,0x06,0x06]
6488
6489v_min_u32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6490// CHECK: [0xf9,0x04,0x0a,0x1c,0xff,0x06,0x06,0x06]
6491
6492v_min_u32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6493// CHECK: [0xf9,0xfe,0x0b,0x1c,0x01,0x06,0x06,0x06]
6494
6495v_min_u32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6496// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x06]
6497
6498v_min_u32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6499// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x00,0x06,0x06]
6500
6501v_min_u32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6502// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x01,0x06,0x06]
6503
6504v_min_u32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6505// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x02,0x06,0x06]
6506
6507v_min_u32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6508// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x03,0x06,0x06]
6509
6510v_min_u32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6511// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x04,0x06,0x06]
6512
6513v_min_u32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6514// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x05,0x06,0x06]
6515
6516v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
6517// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x0e,0x06,0x06]
6518
6519v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
6520// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x16,0x06,0x06]
6521
6522v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
6523// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x16,0x06,0x06]
6524
6525v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
6526// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x06]
6527
6528v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
6529// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x00,0x06]
6530
6531v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
6532// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x01,0x06]
6533
6534v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
6535// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x02,0x06]
6536
6537v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
6538// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x03,0x06]
6539
6540v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
6541// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x04,0x06]
6542
6543v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
6544// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x05,0x06]
6545
6546v_min_u32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6547// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x0e,0x06]
6548
6549v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6550// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x06]
6551
6552v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
6553// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x00]
6554
6555v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
6556// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x01]
6557
6558v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
6559// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x02]
6560
6561v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
6562// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x03]
6563
6564v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
6565// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x04]
6566
6567v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
6568// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x05]
6569
6570v_min_u32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6571// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x0e]
6572
6573v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6574// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x00]
6575
6576v_min_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6577// CHECK: [0xfa,0x04,0xfe,0x1d,0x01,0xe4,0x00,0x00]
6578
6579v_min_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6580// CHECK: [0xfa,0x04,0x0a,0x1c,0xff,0xe4,0x00,0x00]
6581
6582v_min_u32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6583// CHECK: [0xfa,0xfe,0x0b,0x1c,0x01,0xe4,0x00,0x00]
6584
6585v_min_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
6586// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x1b,0x00,0x00]
6587
6588v_min_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
6589// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x40,0x01,0x00]
6590
6591v_min_u32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
6592// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x41,0x01,0x00]
6593
6594v_min_u32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
6595// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x42,0x01,0x00]
6596
6597v_min_u32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
6598// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x43,0x01,0x00]
6599
6600v_min_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
6601// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x30,0x01,0x00]
6602
6603v_min_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
6604// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x34,0x01,0x00]
6605
6606v_min_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
6607// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x38,0x01,0x00]
6608
6609v_min_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
6610// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x3c,0x01,0x00]
6611
6612v_min_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
6613// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x01,0x01,0x00]
6614
6615v_min_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
6616// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x0f,0x01,0x00]
6617
6618v_min_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
6619// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x11,0x01,0x00]
6620
6621v_min_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
6622// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x1f,0x01,0x00]
6623
6624v_min_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
6625// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x21,0x01,0x00]
6626
6627v_min_u32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
6628// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x2f,0x01,0x00]
6629
6630v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
6631// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x10]
6632
6633v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
6634// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x30]
6635
6636v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
6637// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0xf0]
6638
6639v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
6640// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0xf0]
6641
6642v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
6643// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x01]
6644
6645v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
6646// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x03]
6647
6648v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
6649// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x0f]
6650
6651v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
6652// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x0f]
6653
6654v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
6655// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x08,0x00]
6656
6657v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6658// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x06]
6659
6660v_max_u32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6661// CHECK: [0xf9,0x04,0xfe,0x1f,0x01,0x06,0x06,0x06]
6662
6663v_max_u32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6664// CHECK: [0xf9,0x04,0x0a,0x1e,0xff,0x06,0x06,0x06]
6665
6666v_max_u32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6667// CHECK: [0xf9,0xfe,0x0b,0x1e,0x01,0x06,0x06,0x06]
6668
6669v_max_u32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6670// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x06]
6671
6672v_max_u32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6673// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x00,0x06,0x06]
6674
6675v_max_u32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6676// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x01,0x06,0x06]
6677
6678v_max_u32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6679// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x02,0x06,0x06]
6680
6681v_max_u32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6682// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x03,0x06,0x06]
6683
6684v_max_u32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6685// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x04,0x06,0x06]
6686
6687v_max_u32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6688// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x05,0x06,0x06]
6689
6690v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
6691// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x0e,0x06,0x06]
6692
6693v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
6694// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x16,0x06,0x06]
6695
6696v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
6697// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x16,0x06,0x06]
6698
6699v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
6700// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x06]
6701
6702v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
6703// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x00,0x06]
6704
6705v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
6706// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x01,0x06]
6707
6708v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
6709// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x02,0x06]
6710
6711v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
6712// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x03,0x06]
6713
6714v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
6715// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x04,0x06]
6716
6717v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
6718// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x05,0x06]
6719
6720v_max_u32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6721// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x0e,0x06]
6722
6723v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6724// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x06]
6725
6726v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
6727// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x00]
6728
6729v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
6730// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x01]
6731
6732v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
6733// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x02]
6734
6735v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
6736// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x03]
6737
6738v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
6739// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x04]
6740
6741v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
6742// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x05]
6743
6744v_max_u32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6745// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x0e]
6746
6747v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6748// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x00]
6749
6750v_max_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6751// CHECK: [0xfa,0x04,0xfe,0x1f,0x01,0xe4,0x00,0x00]
6752
6753v_max_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6754// CHECK: [0xfa,0x04,0x0a,0x1e,0xff,0xe4,0x00,0x00]
6755
6756v_max_u32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6757// CHECK: [0xfa,0xfe,0x0b,0x1e,0x01,0xe4,0x00,0x00]
6758
6759v_max_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
6760// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x1b,0x00,0x00]
6761
6762v_max_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
6763// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x40,0x01,0x00]
6764
6765v_max_u32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
6766// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x41,0x01,0x00]
6767
6768v_max_u32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
6769// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x42,0x01,0x00]
6770
6771v_max_u32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
6772// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x43,0x01,0x00]
6773
6774v_max_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
6775// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x30,0x01,0x00]
6776
6777v_max_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
6778// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x34,0x01,0x00]
6779
6780v_max_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
6781// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x38,0x01,0x00]
6782
6783v_max_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
6784// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x3c,0x01,0x00]
6785
6786v_max_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
6787// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x01,0x01,0x00]
6788
6789v_max_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
6790// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x0f,0x01,0x00]
6791
6792v_max_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
6793// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x11,0x01,0x00]
6794
6795v_max_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
6796// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x1f,0x01,0x00]
6797
6798v_max_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
6799// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x21,0x01,0x00]
6800
6801v_max_u32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
6802// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x2f,0x01,0x00]
6803
6804v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
6805// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x10]
6806
6807v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
6808// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x30]
6809
6810v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
6811// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0xf0]
6812
6813v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
6814// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0xf0]
6815
6816v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
6817// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x01]
6818
6819v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
6820// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x03]
6821
6822v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
6823// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x0f]
6824
6825v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
6826// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x0f]
6827
6828v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
6829// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x08,0x00]
6830
6831v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6832// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x06]
6833
6834v_lshrrev_b32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6835// CHECK: [0xf9,0x04,0xfe,0x21,0x01,0x06,0x06,0x06]
6836
6837v_lshrrev_b32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6838// CHECK: [0xf9,0x04,0x0a,0x20,0xff,0x06,0x06,0x06]
6839
6840v_lshrrev_b32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6841// CHECK: [0xf9,0xfe,0x0b,0x20,0x01,0x06,0x06,0x06]
6842
6843v_lshrrev_b32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6844// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x06]
6845
6846v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6847// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x00,0x06,0x06]
6848
6849v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6850// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x01,0x06,0x06]
6851
6852v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6853// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x02,0x06,0x06]
6854
6855v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6856// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x03,0x06,0x06]
6857
6858v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6859// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x04,0x06,0x06]
6860
6861v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6862// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x05,0x06,0x06]
6863
6864v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
6865// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x0e,0x06,0x06]
6866
6867v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
6868// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x16,0x06,0x06]
6869
6870v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
6871// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x16,0x06,0x06]
6872
6873v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
6874// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x06]
6875
6876v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
6877// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x00,0x06]
6878
6879v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
6880// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x01,0x06]
6881
6882v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
6883// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x02,0x06]
6884
6885v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
6886// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x03,0x06]
6887
6888v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
6889// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x04,0x06]
6890
6891v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
6892// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x05,0x06]
6893
6894v_lshrrev_b32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6895// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x0e,0x06]
6896
6897v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6898// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x06]
6899
6900v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
6901// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x00]
6902
6903v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
6904// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x01]
6905
6906v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
6907// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x02]
6908
6909v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
6910// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x03]
6911
6912v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
6913// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x04]
6914
6915v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
6916// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x05]
6917
6918v_lshrrev_b32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6919// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x0e]
6920
6921v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6922// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x00]
6923
6924v_lshrrev_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6925// CHECK: [0xfa,0x04,0xfe,0x21,0x01,0xe4,0x00,0x00]
6926
6927v_lshrrev_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6928// CHECK: [0xfa,0x04,0x0a,0x20,0xff,0xe4,0x00,0x00]
6929
6930v_lshrrev_b32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6931// CHECK: [0xfa,0xfe,0x0b,0x20,0x01,0xe4,0x00,0x00]
6932
6933v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
6934// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x1b,0x00,0x00]
6935
6936v_lshrrev_b32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
6937// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x40,0x01,0x00]
6938
6939v_lshrrev_b32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
6940// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x41,0x01,0x00]
6941
6942v_lshrrev_b32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
6943// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x42,0x01,0x00]
6944
6945v_lshrrev_b32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
6946// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x43,0x01,0x00]
6947
6948v_lshrrev_b32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
6949// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x30,0x01,0x00]
6950
6951v_lshrrev_b32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
6952// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x34,0x01,0x00]
6953
6954v_lshrrev_b32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
6955// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x38,0x01,0x00]
6956
6957v_lshrrev_b32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
6958// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x3c,0x01,0x00]
6959
6960v_lshrrev_b32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
6961// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x01,0x01,0x00]
6962
6963v_lshrrev_b32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
6964// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x0f,0x01,0x00]
6965
6966v_lshrrev_b32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
6967// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x11,0x01,0x00]
6968
6969v_lshrrev_b32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
6970// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x1f,0x01,0x00]
6971
6972v_lshrrev_b32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
6973// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x21,0x01,0x00]
6974
6975v_lshrrev_b32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
6976// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x2f,0x01,0x00]
6977
6978v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
6979// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x10]
6980
6981v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
6982// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x30]
6983
6984v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
6985// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0xf0]
6986
6987v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
6988// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0xf0]
6989
6990v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
6991// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x01]
6992
6993v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
6994// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x03]
6995
6996v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
6997// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x0f]
6998
6999v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
7000// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x0f]
7001
7002v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
7003// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x08,0x00]
7004
7005v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7006// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x06]
7007
7008v_ashrrev_i32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7009// CHECK: [0xf9,0x04,0xfe,0x23,0x01,0x06,0x06,0x06]
7010
7011v_ashrrev_i32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7012// CHECK: [0xf9,0x04,0x0a,0x22,0xff,0x06,0x06,0x06]
7013
7014v_ashrrev_i32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7015// CHECK: [0xf9,0xfe,0x0b,0x22,0x01,0x06,0x06,0x06]
7016
7017v_ashrrev_i32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7018// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x06]
7019
7020v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7021// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x00,0x06,0x06]
7022
7023v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7024// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x01,0x06,0x06]
7025
7026v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7027// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x02,0x06,0x06]
7028
7029v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7030// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x03,0x06,0x06]
7031
7032v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7033// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x04,0x06,0x06]
7034
7035v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7036// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x05,0x06,0x06]
7037
7038v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
7039// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x0e,0x06,0x06]
7040
7041v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
7042// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x16,0x06,0x06]
7043
7044v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
7045// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x16,0x06,0x06]
7046
7047v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
7048// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x06]
7049
7050v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
7051// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x00,0x06]
7052
7053v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
7054// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x01,0x06]
7055
7056v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
7057// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x02,0x06]
7058
7059v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
7060// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x03,0x06]
7061
7062v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
7063// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x04,0x06]
7064
7065v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
7066// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x05,0x06]
7067
7068v_ashrrev_i32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7069// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x0e,0x06]
7070
7071v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7072// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x06]
7073
7074v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
7075// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x00]
7076
7077v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
7078// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x01]
7079
7080v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
7081// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x02]
7082
7083v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
7084// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x03]
7085
7086v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
7087// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x04]
7088
7089v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
7090// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x05]
7091
7092v_ashrrev_i32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7093// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x0e]
7094
7095v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7096// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x00]
7097
7098v_ashrrev_i32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7099// CHECK: [0xfa,0x04,0xfe,0x23,0x01,0xe4,0x00,0x00]
7100
7101v_ashrrev_i32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7102// CHECK: [0xfa,0x04,0x0a,0x22,0xff,0xe4,0x00,0x00]
7103
7104v_ashrrev_i32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7105// CHECK: [0xfa,0xfe,0x0b,0x22,0x01,0xe4,0x00,0x00]
7106
7107v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
7108// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x1b,0x00,0x00]
7109
7110v_ashrrev_i32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
7111// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x40,0x01,0x00]
7112
7113v_ashrrev_i32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
7114// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x41,0x01,0x00]
7115
7116v_ashrrev_i32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
7117// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x42,0x01,0x00]
7118
7119v_ashrrev_i32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
7120// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x43,0x01,0x00]
7121
7122v_ashrrev_i32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
7123// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x30,0x01,0x00]
7124
7125v_ashrrev_i32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
7126// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x34,0x01,0x00]
7127
7128v_ashrrev_i32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
7129// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x38,0x01,0x00]
7130
7131v_ashrrev_i32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
7132// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x3c,0x01,0x00]
7133
7134v_ashrrev_i32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
7135// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x01,0x01,0x00]
7136
7137v_ashrrev_i32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
7138// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x0f,0x01,0x00]
7139
7140v_ashrrev_i32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
7141// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x11,0x01,0x00]
7142
7143v_ashrrev_i32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
7144// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x1f,0x01,0x00]
7145
7146v_ashrrev_i32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
7147// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x21,0x01,0x00]
7148
7149v_ashrrev_i32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
7150// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x2f,0x01,0x00]
7151
7152v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
7153// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x10]
7154
7155v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
7156// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x30]
7157
7158v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
7159// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0xf0]
7160
7161v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
7162// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0xf0]
7163
7164v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
7165// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x01]
7166
7167v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
7168// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x03]
7169
7170v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
7171// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x0f]
7172
7173v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
7174// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x0f]
7175
7176v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
7177// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x08,0x00]
7178
7179v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7180// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x06]
7181
7182v_lshlrev_b32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7183// CHECK: [0xf9,0x04,0xfe,0x25,0x01,0x06,0x06,0x06]
7184
7185v_lshlrev_b32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7186// CHECK: [0xf9,0x04,0x0a,0x24,0xff,0x06,0x06,0x06]
7187
7188v_lshlrev_b32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7189// CHECK: [0xf9,0xfe,0x0b,0x24,0x01,0x06,0x06,0x06]
7190
7191v_lshlrev_b32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7192// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x06]
7193
7194v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7195// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x00,0x06,0x06]
7196
7197v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7198// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x01,0x06,0x06]
7199
7200v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7201// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x02,0x06,0x06]
7202
7203v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7204// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x03,0x06,0x06]
7205
7206v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7207// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x04,0x06,0x06]
7208
7209v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7210// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x05,0x06,0x06]
7211
7212v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
7213// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x0e,0x06,0x06]
7214
7215v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
7216// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x16,0x06,0x06]
7217
7218v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
7219// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x16,0x06,0x06]
7220
7221v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
7222// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x06]
7223
7224v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
7225// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x00,0x06]
7226
7227v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
7228// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x01,0x06]
7229
7230v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
7231// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x02,0x06]
7232
7233v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
7234// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x03,0x06]
7235
7236v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
7237// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x04,0x06]
7238
7239v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
7240// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x05,0x06]
7241
7242v_lshlrev_b32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7243// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x0e,0x06]
7244
7245v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7246// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x06]
7247
7248v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
7249// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x00]
7250
7251v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
7252// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x01]
7253
7254v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
7255// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x02]
7256
7257v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
7258// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x03]
7259
7260v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
7261// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x04]
7262
7263v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
7264// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x05]
7265
7266v_lshlrev_b32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7267// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x0e]
7268
7269v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7270// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x00]
7271
7272v_lshlrev_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7273// CHECK: [0xfa,0x04,0xfe,0x25,0x01,0xe4,0x00,0x00]
7274
7275v_lshlrev_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7276// CHECK: [0xfa,0x04,0x0a,0x24,0xff,0xe4,0x00,0x00]
7277
7278v_lshlrev_b32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7279// CHECK: [0xfa,0xfe,0x0b,0x24,0x01,0xe4,0x00,0x00]
7280
7281v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
7282// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x1b,0x00,0x00]
7283
7284v_lshlrev_b32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
7285// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x40,0x01,0x00]
7286
7287v_lshlrev_b32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
7288// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x41,0x01,0x00]
7289
7290v_lshlrev_b32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
7291// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x42,0x01,0x00]
7292
7293v_lshlrev_b32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
7294// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x43,0x01,0x00]
7295
7296v_lshlrev_b32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
7297// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x30,0x01,0x00]
7298
7299v_lshlrev_b32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
7300// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x34,0x01,0x00]
7301
7302v_lshlrev_b32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
7303// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x38,0x01,0x00]
7304
7305v_lshlrev_b32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
7306// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x3c,0x01,0x00]
7307
7308v_lshlrev_b32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
7309// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x01,0x01,0x00]
7310
7311v_lshlrev_b32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
7312// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x0f,0x01,0x00]
7313
7314v_lshlrev_b32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
7315// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x11,0x01,0x00]
7316
7317v_lshlrev_b32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
7318// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x1f,0x01,0x00]
7319
7320v_lshlrev_b32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
7321// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x21,0x01,0x00]
7322
7323v_lshlrev_b32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
7324// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x2f,0x01,0x00]
7325
7326v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
7327// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x10]
7328
7329v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
7330// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x30]
7331
7332v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
7333// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0xf0]
7334
7335v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
7336// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0xf0]
7337
7338v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
7339// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x01]
7340
7341v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
7342// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x03]
7343
7344v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
7345// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x0f]
7346
7347v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
7348// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x0f]
7349
7350v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
7351// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x08,0x00]
7352
7353v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7354// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x06]
7355
7356v_and_b32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7357// CHECK: [0xf9,0x04,0xfe,0x27,0x01,0x06,0x06,0x06]
7358
7359v_and_b32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7360// CHECK: [0xf9,0x04,0x0a,0x26,0xff,0x06,0x06,0x06]
7361
7362v_and_b32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7363// CHECK: [0xf9,0xfe,0x0b,0x26,0x01,0x06,0x06,0x06]
7364
7365v_and_b32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7366// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x06]
7367
7368v_and_b32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7369// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x00,0x06,0x06]
7370
7371v_and_b32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7372// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x01,0x06,0x06]
7373
7374v_and_b32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7375// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x02,0x06,0x06]
7376
7377v_and_b32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7378// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x03,0x06,0x06]
7379
7380v_and_b32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7381// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x04,0x06,0x06]
7382
7383v_and_b32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7384// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x05,0x06,0x06]
7385
7386v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
7387// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x0e,0x06,0x06]
7388
7389v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
7390// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x16,0x06,0x06]
7391
7392v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
7393// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x16,0x06,0x06]
7394
7395v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
7396// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x06]
7397
7398v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
7399// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x00,0x06]
7400
7401v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
7402// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x01,0x06]
7403
7404v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
7405// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x02,0x06]
7406
7407v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
7408// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x03,0x06]
7409
7410v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
7411// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x04,0x06]
7412
7413v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
7414// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x05,0x06]
7415
7416v_and_b32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7417// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x0e,0x06]
7418
7419v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7420// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x06]
7421
7422v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
7423// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x00]
7424
7425v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
7426// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x01]
7427
7428v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
7429// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x02]
7430
7431v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
7432// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x03]
7433
7434v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
7435// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x04]
7436
7437v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
7438// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x05]
7439
7440v_and_b32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7441// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x0e]
7442
7443v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7444// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x00]
7445
7446v_and_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7447// CHECK: [0xfa,0x04,0xfe,0x27,0x01,0xe4,0x00,0x00]
7448
7449v_and_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7450// CHECK: [0xfa,0x04,0x0a,0x26,0xff,0xe4,0x00,0x00]
7451
7452v_and_b32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7453// CHECK: [0xfa,0xfe,0x0b,0x26,0x01,0xe4,0x00,0x00]
7454
7455v_and_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
7456// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x1b,0x00,0x00]
7457
7458v_and_b32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
7459// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x40,0x01,0x00]
7460
7461v_and_b32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
7462// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x41,0x01,0x00]
7463
7464v_and_b32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
7465// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x42,0x01,0x00]
7466
7467v_and_b32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
7468// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x43,0x01,0x00]
7469
7470v_and_b32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
7471// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x30,0x01,0x00]
7472
7473v_and_b32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
7474// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x34,0x01,0x00]
7475
7476v_and_b32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
7477// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x38,0x01,0x00]
7478
7479v_and_b32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
7480// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x3c,0x01,0x00]
7481
7482v_and_b32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
7483// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x01,0x01,0x00]
7484
7485v_and_b32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
7486// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x0f,0x01,0x00]
7487
7488v_and_b32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
7489// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x11,0x01,0x00]
7490
7491v_and_b32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
7492// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x1f,0x01,0x00]
7493
7494v_and_b32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
7495// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x21,0x01,0x00]
7496
7497v_and_b32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
7498// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x2f,0x01,0x00]
7499
7500v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
7501// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x10]
7502
7503v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
7504// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x30]
7505
7506v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
7507// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0xf0]
7508
7509v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
7510// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0xf0]
7511
7512v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
7513// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x01]
7514
7515v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
7516// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x03]
7517
7518v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
7519// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x0f]
7520
7521v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
7522// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x0f]
7523
7524v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
7525// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x08,0x00]
7526
7527v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7528// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x06]
7529
7530v_or_b32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7531// CHECK: [0xf9,0x04,0xfe,0x29,0x01,0x06,0x06,0x06]
7532
7533v_or_b32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7534// CHECK: [0xf9,0x04,0x0a,0x28,0xff,0x06,0x06,0x06]
7535
7536v_or_b32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7537// CHECK: [0xf9,0xfe,0x0b,0x28,0x01,0x06,0x06,0x06]
7538
7539v_or_b32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7540// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x06]
7541
7542v_or_b32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7543// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x00,0x06,0x06]
7544
7545v_or_b32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7546// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x01,0x06,0x06]
7547
7548v_or_b32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7549// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x02,0x06,0x06]
7550
7551v_or_b32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7552// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x03,0x06,0x06]
7553
7554v_or_b32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7555// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x04,0x06,0x06]
7556
7557v_or_b32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7558// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x05,0x06,0x06]
7559
7560v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
7561// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x0e,0x06,0x06]
7562
7563v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
7564// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x16,0x06,0x06]
7565
7566v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
7567// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x16,0x06,0x06]
7568
7569v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
7570// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x06]
7571
7572v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
7573// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x00,0x06]
7574
7575v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
7576// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x01,0x06]
7577
7578v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
7579// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x02,0x06]
7580
7581v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
7582// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x03,0x06]
7583
7584v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
7585// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x04,0x06]
7586
7587v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
7588// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x05,0x06]
7589
7590v_or_b32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7591// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x0e,0x06]
7592
7593v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7594// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x06]
7595
7596v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
7597// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x00]
7598
7599v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
7600// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x01]
7601
7602v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
7603// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x02]
7604
7605v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
7606// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x03]
7607
7608v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
7609// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x04]
7610
7611v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
7612// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x05]
7613
7614v_or_b32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7615// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x0e]
7616
7617v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7618// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x00]
7619
7620v_or_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7621// CHECK: [0xfa,0x04,0xfe,0x29,0x01,0xe4,0x00,0x00]
7622
7623v_or_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7624// CHECK: [0xfa,0x04,0x0a,0x28,0xff,0xe4,0x00,0x00]
7625
7626v_or_b32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7627// CHECK: [0xfa,0xfe,0x0b,0x28,0x01,0xe4,0x00,0x00]
7628
7629v_or_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
7630// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x1b,0x00,0x00]
7631
7632v_or_b32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
7633// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x40,0x01,0x00]
7634
7635v_or_b32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
7636// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x41,0x01,0x00]
7637
7638v_or_b32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
7639// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x42,0x01,0x00]
7640
7641v_or_b32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
7642// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x43,0x01,0x00]
7643
7644v_or_b32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
7645// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x30,0x01,0x00]
7646
7647v_or_b32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
7648// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x34,0x01,0x00]
7649
7650v_or_b32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
7651// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x38,0x01,0x00]
7652
7653v_or_b32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
7654// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x3c,0x01,0x00]
7655
7656v_or_b32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
7657// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x01,0x01,0x00]
7658
7659v_or_b32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
7660// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x0f,0x01,0x00]
7661
7662v_or_b32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
7663// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x11,0x01,0x00]
7664
7665v_or_b32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
7666// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x1f,0x01,0x00]
7667
7668v_or_b32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
7669// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x21,0x01,0x00]
7670
7671v_or_b32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
7672// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x2f,0x01,0x00]
7673
7674v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
7675// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x10]
7676
7677v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
7678// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x30]
7679
7680v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
7681// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0xf0]
7682
7683v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
7684// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0xf0]
7685
7686v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
7687// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x01]
7688
7689v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
7690// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x03]
7691
7692v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
7693// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x0f]
7694
7695v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
7696// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x0f]
7697
7698v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
7699// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x08,0x00]
7700
7701v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7702// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x06]
7703
7704v_xor_b32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7705// CHECK: [0xf9,0x04,0xfe,0x2b,0x01,0x06,0x06,0x06]
7706
7707v_xor_b32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7708// CHECK: [0xf9,0x04,0x0a,0x2a,0xff,0x06,0x06,0x06]
7709
7710v_xor_b32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7711// CHECK: [0xf9,0xfe,0x0b,0x2a,0x01,0x06,0x06,0x06]
7712
7713v_xor_b32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7714// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x06]
7715
7716v_xor_b32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7717// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x00,0x06,0x06]
7718
7719v_xor_b32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7720// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x01,0x06,0x06]
7721
7722v_xor_b32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7723// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x02,0x06,0x06]
7724
7725v_xor_b32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7726// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x03,0x06,0x06]
7727
7728v_xor_b32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7729// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x04,0x06,0x06]
7730
7731v_xor_b32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7732// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x05,0x06,0x06]
7733
7734v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
7735// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x0e,0x06,0x06]
7736
7737v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
7738// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x16,0x06,0x06]
7739
7740v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
7741// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x16,0x06,0x06]
7742
7743v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
7744// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x06]
7745
7746v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
7747// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x00,0x06]
7748
7749v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
7750// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x01,0x06]
7751
7752v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
7753// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x02,0x06]
7754
7755v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
7756// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x03,0x06]
7757
7758v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
7759// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x04,0x06]
7760
7761v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
7762// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x05,0x06]
7763
7764v_xor_b32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7765// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x0e,0x06]
7766
7767v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7768// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x06]
7769
7770v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
7771// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x00]
7772
7773v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
7774// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x01]
7775
7776v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
7777// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x02]
7778
7779v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
7780// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x03]
7781
7782v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
7783// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x04]
7784
7785v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
7786// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x05]
7787
7788v_xor_b32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7789// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x0e]
7790
7791v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7792// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x00]
7793
7794v_xor_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7795// CHECK: [0xfa,0x04,0xfe,0x2b,0x01,0xe4,0x00,0x00]
7796
7797v_xor_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7798// CHECK: [0xfa,0x04,0x0a,0x2a,0xff,0xe4,0x00,0x00]
7799
7800v_xor_b32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7801// CHECK: [0xfa,0xfe,0x0b,0x2a,0x01,0xe4,0x00,0x00]
7802
7803v_xor_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
7804// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x1b,0x00,0x00]
7805
7806v_xor_b32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
7807// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x40,0x01,0x00]
7808
7809v_xor_b32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
7810// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x41,0x01,0x00]
7811
7812v_xor_b32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
7813// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x42,0x01,0x00]
7814
7815v_xor_b32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
7816// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x43,0x01,0x00]
7817
7818v_xor_b32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
7819// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x30,0x01,0x00]
7820
7821v_xor_b32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
7822// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x34,0x01,0x00]
7823
7824v_xor_b32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
7825// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x38,0x01,0x00]
7826
7827v_xor_b32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
7828// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x3c,0x01,0x00]
7829
7830v_xor_b32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
7831// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x01,0x01,0x00]
7832
7833v_xor_b32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
7834// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x0f,0x01,0x00]
7835
7836v_xor_b32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
7837// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x11,0x01,0x00]
7838
7839v_xor_b32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
7840// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x1f,0x01,0x00]
7841
7842v_xor_b32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
7843// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x21,0x01,0x00]
7844
7845v_xor_b32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
7846// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x2f,0x01,0x00]
7847
7848v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
7849// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x10]
7850
7851v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
7852// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x30]
7853
7854v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
7855// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0xf0]
7856
7857v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
7858// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0xf0]
7859
7860v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
7861// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x01]
7862
7863v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
7864// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x03]
7865
7866v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
7867// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x0f]
7868
7869v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
7870// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x0f]
7871
7872v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
7873// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x08,0x00]
7874
7875v_mac_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7876// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x06,0x06,0x06]
7877
7878v_mac_f32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7879// CHECK: [0xf9,0x04,0xfe,0x2d,0x01,0x06,0x06,0x06]
7880
7881v_mac_f32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7882// CHECK: [0xf9,0x04,0x0a,0x2c,0xff,0x06,0x06,0x06]
7883
7884v_mac_f32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7885// CHECK: [0xf9,0xfe,0x0b,0x2c,0x01,0x06,0x06,0x06]
7886
7887v_mac_f32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7888// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x26,0x06,0x06]
7889
7890v_mac_f32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7891// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x06,0x06,0x06]
7892
7893v_mac_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
7894// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x0e,0x06,0x06]
7895
7896v_mac_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
7897// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x16,0x06,0x06]
7898
7899v_mac_f32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
7900// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x16,0x06,0x06]
7901
7902v_mac_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
7903// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x06,0x06,0x06]
7904
7905v_mac_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
7906// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x06,0x00,0x06]
7907
7908v_mac_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
7909// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x06,0x01,0x06]
7910
7911v_mac_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
7912// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x06,0x02,0x06]
7913
7914v_mac_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
7915// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x06,0x03,0x06]
7916
7917v_mac_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
7918// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x06,0x04,0x06]
7919
7920v_mac_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
7921// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x06,0x05,0x06]
7922
7923v_mac_f32_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7924// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x06,0x16,0x06]
7925
7926v_mac_f32_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7927// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x06,0x26,0x06]
7928
7929v_mac_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7930// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x06,0x06,0x06]
7931
7932v_mac_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
7933// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x06,0x06,0x00]
7934
7935v_mac_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
7936// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x06,0x06,0x01]
7937
7938v_mac_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
7939// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x06,0x06,0x02]
7940
7941v_mac_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
7942// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x06,0x06,0x03]
7943
7944v_mac_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
7945// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x06,0x06,0x04]
7946
7947v_mac_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
7948// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x06,0x06,0x05]
7949
7950v_mac_f32_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7951// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x06,0x06,0x16]
7952
7953v_mac_f32_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7954// CHECK: [0xf9,0x04,0x0a,0x2c,0x01,0x06,0x06,0x26]
7955
7956v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7957// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x00]
7958
7959v_mac_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7960// CHECK: [0xfa,0x04,0xfe,0x2d,0x01,0xe4,0x00,0x00]
7961
7962v_mac_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7963// CHECK: [0xfa,0x04,0x0a,0x2c,0xff,0xe4,0x00,0x00]
7964
7965v_mac_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7966// CHECK: [0xfa,0xfe,0x0b,0x2c,0x01,0xe4,0x00,0x00]
7967
7968v_mac_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
7969// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x1b,0x00,0x00]
7970
7971v_mac_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
7972// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x40,0x01,0x00]
7973
7974v_mac_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
7975// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x41,0x01,0x00]
7976
7977v_mac_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
7978// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x42,0x01,0x00]
7979
7980v_mac_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
7981// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x43,0x01,0x00]
7982
7983v_mac_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
7984// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x30,0x01,0x00]
7985
7986v_mac_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
7987// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x34,0x01,0x00]
7988
7989v_mac_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
7990// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x38,0x01,0x00]
7991
7992v_mac_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
7993// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x3c,0x01,0x00]
7994
7995v_mac_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
7996// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x01,0x01,0x00]
7997
7998v_mac_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
7999// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x0f,0x01,0x00]
8000
8001v_mac_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
8002// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x11,0x01,0x00]
8003
8004v_mac_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
8005// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x1f,0x01,0x00]
8006
8007v_mac_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
8008// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x21,0x01,0x00]
8009
8010v_mac_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
8011// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x2f,0x01,0x00]
8012
8013v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
8014// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x10]
8015
8016v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
8017// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x30]
8018
8019v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
8020// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0xf0]
8021
8022v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
8023// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0xf0]
8024
8025v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
8026// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x01]
8027
8028v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
8029// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x03]
8030
8031v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
8032// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x0f]
8033
8034v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
8035// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x0f]
8036
8037v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
8038// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x08,0x00]
8039
8040v_mac_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8041// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x10,0x00]
8042
8043v_mac_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8044// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x20,0x00]
8045
8046v_mac_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8047// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x40,0x00]
8048
8049v_mac_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8050// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x80,0x00]
8051
8052v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8053// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06]
8054
8055v_add_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8056// CHECK: [0xf9,0x04,0xfe,0x33,0x01,0x06,0x06,0x06]
8057
8058v_add_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8059// CHECK: [0xf9,0x04,0x0a,0x32,0xff,0x06,0x06,0x06]
8060
8061v_add_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8062// CHECK: [0xf9,0xfe,0x0b,0x32,0x01,0x06,0x06,0x06]
8063
8064v_add_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8065// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x26,0x06,0x06]
8066
8067v_add_u32_sdwa v5, vcc, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8068// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06]
8069
8070v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8071// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x00,0x06,0x06]
8072
8073v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8074// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x01,0x06,0x06]
8075
8076v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8077// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x02,0x06,0x06]
8078
8079v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8080// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x03,0x06,0x06]
8081
8082v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8083// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x04,0x06,0x06]
8084
8085v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8086// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x05,0x06,0x06]
8087
8088v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
8089// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x0e,0x06,0x06]
8090
8091v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
8092// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x16,0x06,0x06]
8093
8094v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
8095// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x16,0x06,0x06]
8096
8097v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
8098// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06]
8099
8100v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
8101// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x00,0x06]
8102
8103v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
8104// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x01,0x06]
8105
8106v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
8107// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x02,0x06]
8108
8109v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
8110// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x03,0x06]
8111
8112v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
8113// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x04,0x06]
8114
8115v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
8116// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x05,0x06]
8117
8118v_add_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8119// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x0e,0x06]
8120
8121v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8122// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06]
8123
8124v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
8125// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x00]
8126
8127v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
8128// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x01]
8129
8130v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
8131// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x02]
8132
8133v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
8134// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x03]
8135
8136v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
8137// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x04]
8138
8139v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
8140// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x05]
8141
8142v_add_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8143// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x0e]
8144
8145v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8146// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x00]
8147
8148v_add_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8149// CHECK: [0xfa,0x04,0xfe,0x33,0x01,0xe4,0x00,0x00]
8150
8151v_add_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8152// CHECK: [0xfa,0x04,0x0a,0x32,0xff,0xe4,0x00,0x00]
8153
8154v_add_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8155// CHECK: [0xfa,0xfe,0x0b,0x32,0x01,0xe4,0x00,0x00]
8156
8157v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
8158// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x1b,0x00,0x00]
8159
8160v_add_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
8161// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x40,0x01,0x00]
8162
8163v_add_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
8164// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x41,0x01,0x00]
8165
8166v_add_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
8167// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x42,0x01,0x00]
8168
8169v_add_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
8170// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x43,0x01,0x00]
8171
8172v_add_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
8173// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x30,0x01,0x00]
8174
8175v_add_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
8176// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x34,0x01,0x00]
8177
8178v_add_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
8179// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x38,0x01,0x00]
8180
8181v_add_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
8182// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x3c,0x01,0x00]
8183
8184v_add_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
8185// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x01,0x01,0x00]
8186
8187v_add_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
8188// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x0f,0x01,0x00]
8189
8190v_add_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
8191// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x11,0x01,0x00]
8192
8193v_add_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
8194// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x1f,0x01,0x00]
8195
8196v_add_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
8197// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x21,0x01,0x00]
8198
8199v_add_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
8200// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x2f,0x01,0x00]
8201
8202v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
8203// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x10]
8204
8205v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
8206// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x30]
8207
8208v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
8209// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0xf0]
8210
8211v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
8212// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0xf0]
8213
8214v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
8215// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x01]
8216
8217v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
8218// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x03]
8219
8220v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
8221// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x0f]
8222
8223v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
8224// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x0f]
8225
8226v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
8227// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x08,0x00]
8228
8229v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8230// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06]
8231
8232v_sub_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8233// CHECK: [0xf9,0x04,0xfe,0x35,0x01,0x06,0x06,0x06]
8234
8235v_sub_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8236// CHECK: [0xf9,0x04,0x0a,0x34,0xff,0x06,0x06,0x06]
8237
8238v_sub_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8239// CHECK: [0xf9,0xfe,0x0b,0x34,0x01,0x06,0x06,0x06]
8240
8241v_sub_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8242// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x26,0x06,0x06]
8243
8244v_sub_u32_sdwa v5, vcc, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8245// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06]
8246
8247v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8248// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x00,0x06,0x06]
8249
8250v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8251// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x01,0x06,0x06]
8252
8253v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8254// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x02,0x06,0x06]
8255
8256v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8257// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x03,0x06,0x06]
8258
8259v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8260// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x04,0x06,0x06]
8261
8262v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8263// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x05,0x06,0x06]
8264
8265v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
8266// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x0e,0x06,0x06]
8267
8268v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
8269// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x16,0x06,0x06]
8270
8271v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
8272// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x16,0x06,0x06]
8273
8274v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
8275// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06]
8276
8277v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
8278// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x00,0x06]
8279
8280v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
8281// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x01,0x06]
8282
8283v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
8284// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x02,0x06]
8285
8286v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
8287// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x03,0x06]
8288
8289v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
8290// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x04,0x06]
8291
8292v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
8293// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x05,0x06]
8294
8295v_sub_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8296// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x0e,0x06]
8297
8298v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8299// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06]
8300
8301v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
8302// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x00]
8303
8304v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
8305// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x01]
8306
8307v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
8308// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x02]
8309
8310v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
8311// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x03]
8312
8313v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
8314// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x04]
8315
8316v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
8317// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x05]
8318
8319v_sub_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8320// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x0e]
8321
8322v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8323// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x00]
8324
8325v_sub_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8326// CHECK: [0xfa,0x04,0xfe,0x35,0x01,0xe4,0x00,0x00]
8327
8328v_sub_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8329// CHECK: [0xfa,0x04,0x0a,0x34,0xff,0xe4,0x00,0x00]
8330
8331v_sub_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8332// CHECK: [0xfa,0xfe,0x0b,0x34,0x01,0xe4,0x00,0x00]
8333
8334v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
8335// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x1b,0x00,0x00]
8336
8337v_sub_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
8338// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x40,0x01,0x00]
8339
8340v_sub_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
8341// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x41,0x01,0x00]
8342
8343v_sub_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
8344// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x42,0x01,0x00]
8345
8346v_sub_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
8347// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x43,0x01,0x00]
8348
8349v_sub_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
8350// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x30,0x01,0x00]
8351
8352v_sub_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
8353// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x34,0x01,0x00]
8354
8355v_sub_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
8356// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x38,0x01,0x00]
8357
8358v_sub_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
8359// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x3c,0x01,0x00]
8360
8361v_sub_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
8362// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x01,0x01,0x00]
8363
8364v_sub_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
8365// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x0f,0x01,0x00]
8366
8367v_sub_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
8368// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x11,0x01,0x00]
8369
8370v_sub_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
8371// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x1f,0x01,0x00]
8372
8373v_sub_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
8374// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x21,0x01,0x00]
8375
8376v_sub_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
8377// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x2f,0x01,0x00]
8378
8379v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
8380// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x10]
8381
8382v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
8383// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x30]
8384
8385v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
8386// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0xf0]
8387
8388v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
8389// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0xf0]
8390
8391v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
8392// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x01]
8393
8394v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
8395// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x03]
8396
8397v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
8398// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x0f]
8399
8400v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
8401// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x0f]
8402
8403v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
8404// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x08,0x00]
8405
8406v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8407// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06]
8408
8409v_subrev_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8410// CHECK: [0xf9,0x04,0xfe,0x37,0x01,0x06,0x06,0x06]
8411
8412v_subrev_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8413// CHECK: [0xf9,0x04,0x0a,0x36,0xff,0x06,0x06,0x06]
8414
8415v_subrev_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8416// CHECK: [0xf9,0xfe,0x0b,0x36,0x01,0x06,0x06,0x06]
8417
8418v_subrev_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8419// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x26,0x06,0x06]
8420
8421v_subrev_u32_sdwa v5, vcc, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8422// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06]
8423
8424v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8425// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x00,0x06,0x06]
8426
8427v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8428// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x01,0x06,0x06]
8429
8430v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8431// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x02,0x06,0x06]
8432
8433v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8434// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x03,0x06,0x06]
8435
8436v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8437// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x04,0x06,0x06]
8438
8439v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8440// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x05,0x06,0x06]
8441
8442v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
8443// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x0e,0x06,0x06]
8444
8445v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
8446// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x16,0x06,0x06]
8447
8448v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
8449// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x16,0x06,0x06]
8450
8451v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
8452// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06]
8453
8454v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
8455// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x00,0x06]
8456
8457v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
8458// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x01,0x06]
8459
8460v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
8461// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x02,0x06]
8462
8463v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
8464// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x03,0x06]
8465
8466v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
8467// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x04,0x06]
8468
8469v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
8470// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x05,0x06]
8471
8472v_subrev_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8473// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x0e,0x06]
8474
8475v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8476// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06]
8477
8478v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
8479// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x00]
8480
8481v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
8482// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x01]
8483
8484v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
8485// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x02]
8486
8487v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
8488// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x03]
8489
8490v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
8491// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x04]
8492
8493v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
8494// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x05]
8495
8496v_subrev_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8497// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x0e]
8498
8499v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8500// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x00]
8501
8502v_subrev_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8503// CHECK: [0xfa,0x04,0xfe,0x37,0x01,0xe4,0x00,0x00]
8504
8505v_subrev_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8506// CHECK: [0xfa,0x04,0x0a,0x36,0xff,0xe4,0x00,0x00]
8507
8508v_subrev_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8509// CHECK: [0xfa,0xfe,0x0b,0x36,0x01,0xe4,0x00,0x00]
8510
8511v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
8512// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x1b,0x00,0x00]
8513
8514v_subrev_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
8515// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x40,0x01,0x00]
8516
8517v_subrev_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
8518// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x41,0x01,0x00]
8519
8520v_subrev_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
8521// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x42,0x01,0x00]
8522
8523v_subrev_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
8524// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x43,0x01,0x00]
8525
8526v_subrev_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
8527// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x30,0x01,0x00]
8528
8529v_subrev_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
8530// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x34,0x01,0x00]
8531
8532v_subrev_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
8533// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x38,0x01,0x00]
8534
8535v_subrev_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
8536// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x3c,0x01,0x00]
8537
8538v_subrev_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
8539// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x01,0x01,0x00]
8540
8541v_subrev_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
8542// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x0f,0x01,0x00]
8543
8544v_subrev_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
8545// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x11,0x01,0x00]
8546
8547v_subrev_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
8548// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x1f,0x01,0x00]
8549
8550v_subrev_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
8551// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x21,0x01,0x00]
8552
8553v_subrev_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
8554// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x2f,0x01,0x00]
8555
8556v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
8557// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x10]
8558
8559v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
8560// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x30]
8561
8562v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
8563// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0xf0]
8564
8565v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
8566// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0xf0]
8567
8568v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
8569// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x01]
8570
8571v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
8572// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x03]
8573
8574v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
8575// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x0f]
8576
8577v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
8578// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x0f]
8579
8580v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
8581// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x08,0x00]
8582
8583v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8584// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
8585
8586v_addc_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8587// CHECK: [0xf9,0x04,0xfe,0x39,0x01,0x06,0x06,0x06]
8588
8589v_addc_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8590// CHECK: [0xf9,0x04,0x0a,0x38,0xff,0x06,0x06,0x06]
8591
8592v_addc_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8593// CHECK: [0xf9,0xfe,0x0b,0x38,0x01,0x06,0x06,0x06]
8594
8595v_addc_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8596// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x26,0x06,0x06]
8597
8598v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8599// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
8600
8601v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8602// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x00,0x06,0x06]
8603
8604v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8605// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x01,0x06,0x06]
8606
8607v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8608// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x02,0x06,0x06]
8609
8610v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8611// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x03,0x06,0x06]
8612
8613v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8614// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x04,0x06,0x06]
8615
8616v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8617// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x05,0x06,0x06]
8618
8619v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
8620// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x0e,0x06,0x06]
8621
8622v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
8623// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x16,0x06,0x06]
8624
8625v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
8626// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x16,0x06,0x06]
8627
8628v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
8629// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
8630
8631v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
8632// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x00,0x06]
8633
8634v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
8635// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x01,0x06]
8636
8637v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
8638// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x02,0x06]
8639
8640v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
8641// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x03,0x06]
8642
8643v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
8644// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x04,0x06]
8645
8646v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
8647// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x05,0x06]
8648
8649v_addc_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8650// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x0e,0x06]
8651
8652v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8653// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
8654
8655v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
8656// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x00]
8657
8658v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
8659// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x01]
8660
8661v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
8662// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x02]
8663
8664v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
8665// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x03]
8666
8667v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
8668// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x04]
8669
8670v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
8671// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x05]
8672
8673v_addc_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8674// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x0e]
8675
8676v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8677// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x00]
8678
8679v_addc_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8680// CHECK: [0xfa,0x04,0xfe,0x39,0x01,0xe4,0x00,0x00]
8681
8682v_addc_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8683// CHECK: [0xfa,0x04,0x0a,0x38,0xff,0xe4,0x00,0x00]
8684
8685v_addc_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8686// CHECK: [0xfa,0xfe,0x0b,0x38,0x01,0xe4,0x00,0x00]
8687
8688v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
8689// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x1b,0x00,0x00]
8690
8691v_addc_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0
8692// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x40,0x01,0x00]
8693
8694v_addc_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0
8695// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x41,0x01,0x00]
8696
8697v_addc_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0
8698// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x42,0x01,0x00]
8699
8700v_addc_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0
8701// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x43,0x01,0x00]
8702
8703v_addc_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0
8704// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x30,0x01,0x00]
8705
8706v_addc_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0
8707// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x34,0x01,0x00]
8708
8709v_addc_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0
8710// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x38,0x01,0x00]
8711
8712v_addc_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0
8713// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x3c,0x01,0x00]
8714
8715v_addc_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0
8716// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x01,0x01,0x00]
8717
8718v_addc_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0
8719// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x0f,0x01,0x00]
8720
8721v_addc_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0
8722// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x11,0x01,0x00]
8723
8724v_addc_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0
8725// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x1f,0x01,0x00]
8726
8727v_addc_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0
8728// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x21,0x01,0x00]
8729
8730v_addc_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0
8731// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x2f,0x01,0x00]
8732
8733v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
8734// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x10]
8735
8736v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
8737// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x30]
8738
8739v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
8740// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0xf0]
8741
8742v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] bank_mask:0x0
8743// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0xf0]
8744
8745v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
8746// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x01]
8747
8748v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
8749// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x03]
8750
8751v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
8752// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x0f]
8753
8754v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0
8755// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x0f]
8756
8757v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
8758// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x08,0x00]
8759
8760v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8761// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
8762
8763v_subb_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8764// CHECK: [0xf9,0x04,0xfe,0x3b,0x01,0x06,0x06,0x06]
8765
8766v_subb_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8767// CHECK: [0xf9,0x04,0x0a,0x3a,0xff,0x06,0x06,0x06]
8768
8769v_subb_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8770// CHECK: [0xf9,0xfe,0x0b,0x3a,0x01,0x06,0x06,0x06]
8771
8772v_subb_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8773// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x26,0x06,0x06]
8774
8775v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8776// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
8777
8778v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8779// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x00,0x06,0x06]
8780
8781v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8782// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x01,0x06,0x06]
8783
8784v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8785// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x02,0x06,0x06]
8786
8787v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8788// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x03,0x06,0x06]
8789
8790v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8791// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x04,0x06,0x06]
8792
8793v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8794// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x05,0x06,0x06]
8795
8796v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
8797// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x0e,0x06,0x06]
8798
8799v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
8800// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x16,0x06,0x06]
8801
8802v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
8803// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x16,0x06,0x06]
8804
8805v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
8806// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
8807
8808v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
8809// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x00,0x06]
8810
8811v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
8812// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x01,0x06]
8813
8814v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
8815// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x02,0x06]
8816
8817v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
8818// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x03,0x06]
8819
8820v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
8821// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x04,0x06]
8822
8823v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
8824// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x05,0x06]
8825
8826v_subb_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8827// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x0e,0x06]
8828
8829v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8830// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
8831
8832v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
8833// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x00]
8834
8835v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
8836// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x01]
8837
8838v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
8839// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x02]
8840
8841v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
8842// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x03]
8843
8844v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
8845// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x04]
8846
8847v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
8848// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x05]
8849
8850v_subb_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8851// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x0e]
8852
8853v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8854// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x00]
8855
8856v_subb_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8857// CHECK: [0xfa,0x04,0xfe,0x3b,0x01,0xe4,0x00,0x00]
8858
8859v_subb_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8860// CHECK: [0xfa,0x04,0x0a,0x3a,0xff,0xe4,0x00,0x00]
8861
8862v_subb_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8863// CHECK: [0xfa,0xfe,0x0b,0x3a,0x01,0xe4,0x00,0x00]
8864
8865v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
8866// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x00,0x00]
8867
8868v_subb_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0
8869// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x40,0x01,0x00]
8870
8871v_subb_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0
8872// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x41,0x01,0x00]
8873
8874v_subb_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0
8875// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x42,0x01,0x00]
8876
8877v_subb_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0
8878// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x43,0x01,0x00]
8879
8880v_subb_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0
8881// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x30,0x01,0x00]
8882
8883v_subb_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0
8884// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x34,0x01,0x00]
8885
8886v_subb_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0
8887// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x38,0x01,0x00]
8888
8889v_subb_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0
8890// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x3c,0x01,0x00]
8891
8892v_subb_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0
8893// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x01,0x01,0x00]
8894
8895v_subb_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0
8896// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x0f,0x01,0x00]
8897
8898v_subb_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0
8899// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x11,0x01,0x00]
8900
8901v_subb_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0
8902// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x1f,0x01,0x00]
8903
8904v_subb_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0
8905// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x21,0x01,0x00]
8906
8907v_subb_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0
8908// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x2f,0x01,0x00]
8909
8910v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
8911// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x10]
8912
8913v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
8914// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x30]
8915
8916v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
8917// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0xf0]
8918
8919v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] bank_mask:0x0
8920// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0xf0]
8921
8922v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
8923// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x01]
8924
8925v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
8926// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x03]
8927
8928v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
8929// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x0f]
8930
8931v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0
8932// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x0f]
8933
8934v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
8935// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x08,0x00]
8936
8937v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8938// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
8939
8940v_subbrev_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8941// CHECK: [0xf9,0x04,0xfe,0x3d,0x01,0x06,0x06,0x06]
8942
8943v_subbrev_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8944// CHECK: [0xf9,0x04,0x0a,0x3c,0xff,0x06,0x06,0x06]
8945
8946v_subbrev_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8947// CHECK: [0xf9,0xfe,0x0b,0x3c,0x01,0x06,0x06,0x06]
8948
8949v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8950// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x26,0x06,0x06]
8951
8952v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8953// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
8954
8955v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8956// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x00,0x06,0x06]
8957
8958v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8959// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x01,0x06,0x06]
8960
8961v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8962// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x02,0x06,0x06]
8963
8964v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8965// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x03,0x06,0x06]
8966
8967v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8968// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x04,0x06,0x06]
8969
8970v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
8971// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x05,0x06,0x06]
8972
8973v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
8974// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x0e,0x06,0x06]
8975
8976v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
8977// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x16,0x06,0x06]
8978
8979v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
8980// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x16,0x06,0x06]
8981
8982v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
8983// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
8984
8985v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
8986// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x00,0x06]
8987
8988v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
8989// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x01,0x06]
8990
8991v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
8992// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x02,0x06]
8993
8994v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
8995// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x03,0x06]
8996
8997v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
8998// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x04,0x06]
8999
9000v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
9001// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x05,0x06]
9002
9003v_subbrev_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9004// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x0e,0x06]
9005
9006v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9007// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
9008
9009v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
9010// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x00]
9011
9012v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
9013// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x01]
9014
9015v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
9016// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x02]
9017
9018v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
9019// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x03]
9020
9021v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
9022// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x04]
9023
9024v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
9025// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x05]
9026
9027v_subbrev_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9028// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x0e]
9029
9030v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9031// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x00]
9032
9033v_subbrev_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9034// CHECK: [0xfa,0x04,0xfe,0x3d,0x01,0xe4,0x00,0x00]
9035
9036v_subbrev_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9037// CHECK: [0xfa,0x04,0x0a,0x3c,0xff,0xe4,0x00,0x00]
9038
9039v_subbrev_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9040// CHECK: [0xfa,0xfe,0x0b,0x3c,0x01,0xe4,0x00,0x00]
9041
9042v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
9043// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x00,0x00]
9044
9045v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0
9046// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x40,0x01,0x00]
9047
9048v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0
9049// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x41,0x01,0x00]
9050
9051v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0
9052// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x42,0x01,0x00]
9053
9054v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0
9055// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x43,0x01,0x00]
9056
9057v_subbrev_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0
9058// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x30,0x01,0x00]
9059
9060v_subbrev_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0
9061// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x34,0x01,0x00]
9062
9063v_subbrev_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0
9064// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x38,0x01,0x00]
9065
9066v_subbrev_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0
9067// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x3c,0x01,0x00]
9068
9069v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0
9070// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x01,0x01,0x00]
9071
9072v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0
9073// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x0f,0x01,0x00]
9074
9075v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0
9076// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x11,0x01,0x00]
9077
9078v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0
9079// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x1f,0x01,0x00]
9080
9081v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0
9082// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x21,0x01,0x00]
9083
9084v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0
9085// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x2f,0x01,0x00]
9086
9087v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
9088// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x10]
9089
9090v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
9091// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x30]
9092
9093v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
9094// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0xf0]
9095
9096v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] bank_mask:0x0
9097// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0xf0]
9098
9099v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
9100// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x01]
9101
9102v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
9103// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x03]
9104
9105v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
9106// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x0f]
9107
9108v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0
9109// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x0f]
9110
9111v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
9112// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x08,0x00]
9113
9114v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9115// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x06]
9116
9117v_add_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9118// CHECK: [0xf9,0x04,0xfe,0x3f,0x01,0x06,0x06,0x06]
9119
9120v_add_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9121// CHECK: [0xf9,0x04,0x0a,0x3e,0xff,0x06,0x06,0x06]
9122
9123v_add_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9124// CHECK: [0xf9,0xfe,0x0b,0x3e,0x01,0x06,0x06,0x06]
9125
9126v_add_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9127// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x26,0x06,0x06]
9128
9129v_add_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9130// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x06]
9131
9132v_add_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9133// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x00,0x06,0x06]
9134
9135v_add_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9136// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x01,0x06,0x06]
9137
9138v_add_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9139// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x02,0x06,0x06]
9140
9141v_add_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9142// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x03,0x06,0x06]
9143
9144v_add_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9145// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x04,0x06,0x06]
9146
9147v_add_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9148// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x05,0x06,0x06]
9149
9150v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
9151// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x0e,0x06,0x06]
9152
9153v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
9154// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x16,0x06,0x06]
9155
9156v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
9157// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x16,0x06,0x06]
9158
9159v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
9160// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x06]
9161
9162v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
9163// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x00,0x06]
9164
9165v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
9166// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x01,0x06]
9167
9168v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
9169// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x02,0x06]
9170
9171v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
9172// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x03,0x06]
9173
9174v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
9175// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x04,0x06]
9176
9177v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
9178// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x05,0x06]
9179
9180v_add_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9181// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x16,0x06]
9182
9183v_add_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9184// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x26,0x06]
9185
9186v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9187// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x06]
9188
9189v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
9190// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x00]
9191
9192v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
9193// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x01]
9194
9195v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
9196// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x02]
9197
9198v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
9199// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x03]
9200
9201v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
9202// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x04]
9203
9204v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
9205// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x05]
9206
9207v_add_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9208// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x16]
9209
9210v_add_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9211// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x26]
9212
9213v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9214// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x00]
9215
9216v_add_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9217// CHECK: [0xfa,0x04,0xfe,0x3f,0x01,0xe4,0x00,0x00]
9218
9219v_add_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9220// CHECK: [0xfa,0x04,0x0a,0x3e,0xff,0xe4,0x00,0x00]
9221
9222v_add_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9223// CHECK: [0xfa,0xfe,0x0b,0x3e,0x01,0xe4,0x00,0x00]
9224
9225v_add_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
9226// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x1b,0x00,0x00]
9227
9228v_add_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
9229// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x40,0x01,0x00]
9230
9231v_add_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
9232// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x41,0x01,0x00]
9233
9234v_add_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
9235// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x42,0x01,0x00]
9236
9237v_add_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
9238// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x43,0x01,0x00]
9239
9240v_add_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
9241// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x30,0x01,0x00]
9242
9243v_add_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
9244// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x34,0x01,0x00]
9245
9246v_add_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
9247// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x38,0x01,0x00]
9248
9249v_add_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
9250// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x3c,0x01,0x00]
9251
9252v_add_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
9253// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x01,0x01,0x00]
9254
9255v_add_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
9256// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x0f,0x01,0x00]
9257
9258v_add_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
9259// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x11,0x01,0x00]
9260
9261v_add_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
9262// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x1f,0x01,0x00]
9263
9264v_add_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
9265// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x21,0x01,0x00]
9266
9267v_add_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
9268// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x2f,0x01,0x00]
9269
9270v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
9271// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x10]
9272
9273v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
9274// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x30]
9275
9276v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
9277// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0xf0]
9278
9279v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
9280// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0xf0]
9281
9282v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
9283// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x01]
9284
9285v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
9286// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x03]
9287
9288v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
9289// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x0f]
9290
9291v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
9292// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x0f]
9293
9294v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
9295// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x08,0x00]
9296
9297v_add_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9298// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x10,0x00]
9299
9300v_add_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9301// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x20,0x00]
9302
9303v_add_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9304// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x40,0x00]
9305
9306v_add_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9307// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x80,0x00]
9308
9309v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9310// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x06]
9311
9312v_sub_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9313// CHECK: [0xf9,0x04,0xfe,0x41,0x01,0x06,0x06,0x06]
9314
9315v_sub_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9316// CHECK: [0xf9,0x04,0x0a,0x40,0xff,0x06,0x06,0x06]
9317
9318v_sub_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9319// CHECK: [0xf9,0xfe,0x0b,0x40,0x01,0x06,0x06,0x06]
9320
9321v_sub_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9322// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x26,0x06,0x06]
9323
9324v_sub_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9325// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x06]
9326
9327v_sub_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9328// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x00,0x06,0x06]
9329
9330v_sub_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9331// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x01,0x06,0x06]
9332
9333v_sub_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9334// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x02,0x06,0x06]
9335
9336v_sub_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9337// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x03,0x06,0x06]
9338
9339v_sub_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9340// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x04,0x06,0x06]
9341
9342v_sub_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9343// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x05,0x06,0x06]
9344
9345v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
9346// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x0e,0x06,0x06]
9347
9348v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
9349// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x16,0x06,0x06]
9350
9351v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
9352// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x16,0x06,0x06]
9353
9354v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
9355// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x06]
9356
9357v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
9358// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x00,0x06]
9359
9360v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
9361// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x01,0x06]
9362
9363v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
9364// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x02,0x06]
9365
9366v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
9367// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x03,0x06]
9368
9369v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
9370// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x04,0x06]
9371
9372v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
9373// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x05,0x06]
9374
9375v_sub_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9376// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x16,0x06]
9377
9378v_sub_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9379// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x26,0x06]
9380
9381v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9382// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x06]
9383
9384v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
9385// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x00]
9386
9387v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
9388// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x01]
9389
9390v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
9391// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x02]
9392
9393v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
9394// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x03]
9395
9396v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
9397// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x04]
9398
9399v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
9400// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x05]
9401
9402v_sub_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9403// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x16]
9404
9405v_sub_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9406// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x26]
9407
9408v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9409// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x00]
9410
9411v_sub_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9412// CHECK: [0xfa,0x04,0xfe,0x41,0x01,0xe4,0x00,0x00]
9413
9414v_sub_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9415// CHECK: [0xfa,0x04,0x0a,0x40,0xff,0xe4,0x00,0x00]
9416
9417v_sub_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9418// CHECK: [0xfa,0xfe,0x0b,0x40,0x01,0xe4,0x00,0x00]
9419
9420v_sub_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
9421// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x1b,0x00,0x00]
9422
9423v_sub_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
9424// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x40,0x01,0x00]
9425
9426v_sub_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
9427// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x41,0x01,0x00]
9428
9429v_sub_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
9430// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x42,0x01,0x00]
9431
9432v_sub_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
9433// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x43,0x01,0x00]
9434
9435v_sub_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
9436// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x30,0x01,0x00]
9437
9438v_sub_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
9439// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x34,0x01,0x00]
9440
9441v_sub_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
9442// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x38,0x01,0x00]
9443
9444v_sub_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
9445// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x3c,0x01,0x00]
9446
9447v_sub_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
9448// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x01,0x01,0x00]
9449
9450v_sub_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
9451// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x0f,0x01,0x00]
9452
9453v_sub_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
9454// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x11,0x01,0x00]
9455
9456v_sub_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
9457// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x1f,0x01,0x00]
9458
9459v_sub_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
9460// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x21,0x01,0x00]
9461
9462v_sub_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
9463// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x2f,0x01,0x00]
9464
9465v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
9466// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x10]
9467
9468v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
9469// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x30]
9470
9471v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
9472// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0xf0]
9473
9474v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
9475// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0xf0]
9476
9477v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
9478// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x01]
9479
9480v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
9481// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x03]
9482
9483v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
9484// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x0f]
9485
9486v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
9487// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x0f]
9488
9489v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
9490// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x08,0x00]
9491
9492v_sub_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9493// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x10,0x00]
9494
9495v_sub_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9496// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x20,0x00]
9497
9498v_sub_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9499// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x40,0x00]
9500
9501v_sub_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9502// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x80,0x00]
9503
9504v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9505// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x06]
9506
9507v_subrev_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9508// CHECK: [0xf9,0x04,0xfe,0x43,0x01,0x06,0x06,0x06]
9509
9510v_subrev_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9511// CHECK: [0xf9,0x04,0x0a,0x42,0xff,0x06,0x06,0x06]
9512
9513v_subrev_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9514// CHECK: [0xf9,0xfe,0x0b,0x42,0x01,0x06,0x06,0x06]
9515
9516v_subrev_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9517// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x26,0x06,0x06]
9518
9519v_subrev_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9520// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x06]
9521
9522v_subrev_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9523// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x00,0x06,0x06]
9524
9525v_subrev_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9526// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x01,0x06,0x06]
9527
9528v_subrev_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9529// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x02,0x06,0x06]
9530
9531v_subrev_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9532// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x03,0x06,0x06]
9533
9534v_subrev_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9535// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x04,0x06,0x06]
9536
9537v_subrev_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9538// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x05,0x06,0x06]
9539
9540v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
9541// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x0e,0x06,0x06]
9542
9543v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
9544// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x16,0x06,0x06]
9545
9546v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
9547// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x16,0x06,0x06]
9548
9549v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
9550// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x06]
9551
9552v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
9553// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x00,0x06]
9554
9555v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
9556// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x01,0x06]
9557
9558v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
9559// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x02,0x06]
9560
9561v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
9562// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x03,0x06]
9563
9564v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
9565// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x04,0x06]
9566
9567v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
9568// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x05,0x06]
9569
9570v_subrev_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9571// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x16,0x06]
9572
9573v_subrev_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9574// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x26,0x06]
9575
9576v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9577// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x06]
9578
9579v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
9580// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x00]
9581
9582v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
9583// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x01]
9584
9585v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
9586// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x02]
9587
9588v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
9589// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x03]
9590
9591v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
9592// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x04]
9593
9594v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
9595// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x05]
9596
9597v_subrev_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9598// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x16]
9599
9600v_subrev_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9601// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x26]
9602
9603v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9604// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x00]
9605
9606v_subrev_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9607// CHECK: [0xfa,0x04,0xfe,0x43,0x01,0xe4,0x00,0x00]
9608
9609v_subrev_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9610// CHECK: [0xfa,0x04,0x0a,0x42,0xff,0xe4,0x00,0x00]
9611
9612v_subrev_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9613// CHECK: [0xfa,0xfe,0x0b,0x42,0x01,0xe4,0x00,0x00]
9614
9615v_subrev_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
9616// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x1b,0x00,0x00]
9617
9618v_subrev_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
9619// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x40,0x01,0x00]
9620
9621v_subrev_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
9622// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x41,0x01,0x00]
9623
9624v_subrev_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
9625// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x42,0x01,0x00]
9626
9627v_subrev_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
9628// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x43,0x01,0x00]
9629
9630v_subrev_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
9631// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x30,0x01,0x00]
9632
9633v_subrev_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
9634// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x34,0x01,0x00]
9635
9636v_subrev_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
9637// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x38,0x01,0x00]
9638
9639v_subrev_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
9640// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x3c,0x01,0x00]
9641
9642v_subrev_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
9643// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x01,0x01,0x00]
9644
9645v_subrev_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
9646// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x0f,0x01,0x00]
9647
9648v_subrev_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
9649// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x11,0x01,0x00]
9650
9651v_subrev_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
9652// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x1f,0x01,0x00]
9653
9654v_subrev_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
9655// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x21,0x01,0x00]
9656
9657v_subrev_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
9658// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x2f,0x01,0x00]
9659
9660v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
9661// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x10]
9662
9663v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
9664// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x30]
9665
9666v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
9667// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0xf0]
9668
9669v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
9670// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0xf0]
9671
9672v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
9673// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x01]
9674
9675v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
9676// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x03]
9677
9678v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
9679// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x0f]
9680
9681v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
9682// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x0f]
9683
9684v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
9685// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x08,0x00]
9686
9687v_subrev_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9688// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x10,0x00]
9689
9690v_subrev_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9691// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x20,0x00]
9692
9693v_subrev_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9694// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x40,0x00]
9695
9696v_subrev_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9697// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x80,0x00]
9698
9699v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9700// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x06]
9701
9702v_mul_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9703// CHECK: [0xf9,0x04,0xfe,0x45,0x01,0x06,0x06,0x06]
9704
9705v_mul_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9706// CHECK: [0xf9,0x04,0x0a,0x44,0xff,0x06,0x06,0x06]
9707
9708v_mul_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9709// CHECK: [0xf9,0xfe,0x0b,0x44,0x01,0x06,0x06,0x06]
9710
9711v_mul_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9712// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x26,0x06,0x06]
9713
9714v_mul_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9715// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x06]
9716
9717v_mul_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9718// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x00,0x06,0x06]
9719
9720v_mul_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9721// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x01,0x06,0x06]
9722
9723v_mul_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9724// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x02,0x06,0x06]
9725
9726v_mul_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9727// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x03,0x06,0x06]
9728
9729v_mul_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9730// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x04,0x06,0x06]
9731
9732v_mul_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9733// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x05,0x06,0x06]
9734
9735v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
9736// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x0e,0x06,0x06]
9737
9738v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
9739// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x16,0x06,0x06]
9740
9741v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
9742// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x16,0x06,0x06]
9743
9744v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
9745// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x06]
9746
9747v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
9748// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x00,0x06]
9749
9750v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
9751// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x01,0x06]
9752
9753v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
9754// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x02,0x06]
9755
9756v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
9757// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x03,0x06]
9758
9759v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
9760// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x04,0x06]
9761
9762v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
9763// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x05,0x06]
9764
9765v_mul_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9766// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x16,0x06]
9767
9768v_mul_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9769// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x26,0x06]
9770
9771v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9772// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x06]
9773
9774v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
9775// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x00]
9776
9777v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
9778// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x01]
9779
9780v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
9781// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x02]
9782
9783v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
9784// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x03]
9785
9786v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
9787// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x04]
9788
9789v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
9790// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x05]
9791
9792v_mul_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9793// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x16]
9794
9795v_mul_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9796// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x26]
9797
9798v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9799// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x00]
9800
9801v_mul_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9802// CHECK: [0xfa,0x04,0xfe,0x45,0x01,0xe4,0x00,0x00]
9803
9804v_mul_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9805// CHECK: [0xfa,0x04,0x0a,0x44,0xff,0xe4,0x00,0x00]
9806
9807v_mul_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9808// CHECK: [0xfa,0xfe,0x0b,0x44,0x01,0xe4,0x00,0x00]
9809
9810v_mul_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
9811// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x1b,0x00,0x00]
9812
9813v_mul_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
9814// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x40,0x01,0x00]
9815
9816v_mul_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
9817// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x41,0x01,0x00]
9818
9819v_mul_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
9820// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x42,0x01,0x00]
9821
9822v_mul_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
9823// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x43,0x01,0x00]
9824
9825v_mul_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
9826// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x30,0x01,0x00]
9827
9828v_mul_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
9829// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x34,0x01,0x00]
9830
9831v_mul_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
9832// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x38,0x01,0x00]
9833
9834v_mul_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
9835// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x3c,0x01,0x00]
9836
9837v_mul_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
9838// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x01,0x01,0x00]
9839
9840v_mul_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
9841// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x0f,0x01,0x00]
9842
9843v_mul_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
9844// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x11,0x01,0x00]
9845
9846v_mul_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
9847// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x1f,0x01,0x00]
9848
9849v_mul_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
9850// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x21,0x01,0x00]
9851
9852v_mul_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
9853// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x2f,0x01,0x00]
9854
9855v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
9856// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x10]
9857
9858v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
9859// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x30]
9860
9861v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
9862// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0xf0]
9863
9864v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
9865// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0xf0]
9866
9867v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
9868// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x01]
9869
9870v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
9871// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x03]
9872
9873v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
9874// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x0f]
9875
9876v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
9877// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x0f]
9878
9879v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
9880// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x08,0x00]
9881
9882v_mul_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9883// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x10,0x00]
9884
9885v_mul_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9886// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x20,0x00]
9887
9888v_mul_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9889// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x40,0x00]
9890
9891v_mul_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9892// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x80,0x00]
9893
9894v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9895// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x06]
9896
9897v_mac_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9898// CHECK: [0xf9,0x04,0xfe,0x47,0x01,0x06,0x06,0x06]
9899
9900v_mac_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9901// CHECK: [0xf9,0x04,0x0a,0x46,0xff,0x06,0x06,0x06]
9902
9903v_mac_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9904// CHECK: [0xf9,0xfe,0x0b,0x46,0x01,0x06,0x06,0x06]
9905
9906v_mac_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9907// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x26,0x06,0x06]
9908
9909v_mac_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9910// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x06]
9911
9912v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
9913// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x0e,0x06,0x06]
9914
9915v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
9916// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x16,0x06,0x06]
9917
9918v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
9919// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x16,0x06,0x06]
9920
9921v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
9922// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x06]
9923
9924v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
9925// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x00,0x06]
9926
9927v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
9928// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x01,0x06]
9929
9930v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
9931// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x02,0x06]
9932
9933v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
9934// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x03,0x06]
9935
9936v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
9937// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x04,0x06]
9938
9939v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
9940// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x05,0x06]
9941
9942v_mac_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9943// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x16,0x06]
9944
9945v_mac_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9946// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x26,0x06]
9947
9948v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9949// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x06]
9950
9951v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
9952// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x00]
9953
9954v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
9955// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x01]
9956
9957v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
9958// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x02]
9959
9960v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
9961// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x03]
9962
9963v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
9964// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x04]
9965
9966v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
9967// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x05]
9968
9969v_mac_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9970// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x16]
9971
9972v_mac_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
9973// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x26]
9974
9975v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9976// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x00]
9977
9978v_mac_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9979// CHECK: [0xfa,0x04,0xfe,0x47,0x01,0xe4,0x00,0x00]
9980
9981v_mac_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9982// CHECK: [0xfa,0x04,0x0a,0x46,0xff,0xe4,0x00,0x00]
9983
9984v_mac_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9985// CHECK: [0xfa,0xfe,0x0b,0x46,0x01,0xe4,0x00,0x00]
9986
9987v_mac_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
9988// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x1b,0x00,0x00]
9989
9990v_mac_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
9991// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x40,0x01,0x00]
9992
9993v_mac_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
9994// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x41,0x01,0x00]
9995
9996v_mac_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
9997// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x42,0x01,0x00]
9998
9999v_mac_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
10000// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x43,0x01,0x00]
10001
10002v_mac_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
10003// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x30,0x01,0x00]
10004
10005v_mac_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
10006// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x34,0x01,0x00]
10007
10008v_mac_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
10009// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x38,0x01,0x00]
10010
10011v_mac_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
10012// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x3c,0x01,0x00]
10013
10014v_mac_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
10015// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x01,0x01,0x00]
10016
10017v_mac_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
10018// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x0f,0x01,0x00]
10019
10020v_mac_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
10021// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x11,0x01,0x00]
10022
10023v_mac_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
10024// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x1f,0x01,0x00]
10025
10026v_mac_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
10027// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x21,0x01,0x00]
10028
10029v_mac_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
10030// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x2f,0x01,0x00]
10031
10032v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
10033// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x10]
10034
10035v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
10036// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x30]
10037
10038v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
10039// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0xf0]
10040
10041v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
10042// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0xf0]
10043
10044v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
10045// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x01]
10046
10047v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
10048// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x03]
10049
10050v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
10051// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x0f]
10052
10053v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
10054// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x0f]
10055
10056v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
10057// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x08,0x00]
10058
10059v_mac_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10060// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x10,0x00]
10061
10062v_mac_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10063// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x20,0x00]
10064
10065v_mac_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10066// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x40,0x00]
10067
10068v_mac_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10069// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x80,0x00]
10070
10071v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10072// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x06]
10073
10074v_add_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10075// CHECK: [0xf9,0x04,0xfe,0x4d,0x01,0x06,0x06,0x06]
10076
10077v_add_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10078// CHECK: [0xf9,0x04,0x0a,0x4c,0xff,0x06,0x06,0x06]
10079
10080v_add_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10081// CHECK: [0xf9,0xfe,0x0b,0x4c,0x01,0x06,0x06,0x06]
10082
10083v_add_u16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10084// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x26,0x06,0x06]
10085
10086v_add_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10087// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x06]
10088
10089v_add_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10090// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x00,0x06,0x06]
10091
10092v_add_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10093// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x01,0x06,0x06]
10094
10095v_add_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10096// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x02,0x06,0x06]
10097
10098v_add_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10099// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x03,0x06,0x06]
10100
10101v_add_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10102// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x04,0x06,0x06]
10103
10104v_add_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10105// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x05,0x06,0x06]
10106
10107v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
10108// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x0e,0x06,0x06]
10109
10110v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
10111// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x16,0x06,0x06]
10112
10113v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
10114// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x16,0x06,0x06]
10115
10116v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
10117// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x06]
10118
10119v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
10120// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x00,0x06]
10121
10122v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
10123// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x01,0x06]
10124
10125v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
10126// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x02,0x06]
10127
10128v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
10129// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x03,0x06]
10130
10131v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
10132// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x04,0x06]
10133
10134v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
10135// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x05,0x06]
10136
10137v_add_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10138// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x0e,0x06]
10139
10140v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10141// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x06]
10142
10143v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
10144// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x00]
10145
10146v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
10147// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x01]
10148
10149v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
10150// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x02]
10151
10152v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
10153// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x03]
10154
10155v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
10156// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x04]
10157
10158v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
10159// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x05]
10160
10161v_add_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10162// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x0e]
10163
10164v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10165// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x00]
10166
10167v_add_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10168// CHECK: [0xfa,0x04,0xfe,0x4d,0x01,0xe4,0x00,0x00]
10169
10170v_add_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10171// CHECK: [0xfa,0x04,0x0a,0x4c,0xff,0xe4,0x00,0x00]
10172
10173v_add_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10174// CHECK: [0xfa,0xfe,0x0b,0x4c,0x01,0xe4,0x00,0x00]
10175
10176v_add_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
10177// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x1b,0x00,0x00]
10178
10179v_add_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
10180// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x40,0x01,0x00]
10181
10182v_add_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
10183// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x41,0x01,0x00]
10184
10185v_add_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
10186// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x42,0x01,0x00]
10187
10188v_add_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
10189// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x43,0x01,0x00]
10190
10191v_add_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
10192// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x30,0x01,0x00]
10193
10194v_add_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
10195// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x34,0x01,0x00]
10196
10197v_add_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
10198// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x38,0x01,0x00]
10199
10200v_add_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
10201// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x3c,0x01,0x00]
10202
10203v_add_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
10204// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x01,0x01,0x00]
10205
10206v_add_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
10207// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x0f,0x01,0x00]
10208
10209v_add_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
10210// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x11,0x01,0x00]
10211
10212v_add_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
10213// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x1f,0x01,0x00]
10214
10215v_add_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
10216// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x21,0x01,0x00]
10217
10218v_add_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
10219// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x2f,0x01,0x00]
10220
10221v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
10222// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x10]
10223
10224v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
10225// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x30]
10226
10227v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
10228// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0xf0]
10229
10230v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
10231// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0xf0]
10232
10233v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
10234// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x01]
10235
10236v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
10237// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x03]
10238
10239v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
10240// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x0f]
10241
10242v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
10243// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x0f]
10244
10245v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
10246// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x08,0x00]
10247
10248v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10249// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x06]
10250
10251v_sub_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10252// CHECK: [0xf9,0x04,0xfe,0x4f,0x01,0x06,0x06,0x06]
10253
10254v_sub_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10255// CHECK: [0xf9,0x04,0x0a,0x4e,0xff,0x06,0x06,0x06]
10256
10257v_sub_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10258// CHECK: [0xf9,0xfe,0x0b,0x4e,0x01,0x06,0x06,0x06]
10259
10260v_sub_u16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10261// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x26,0x06,0x06]
10262
10263v_sub_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10264// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x06]
10265
10266v_sub_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10267// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x00,0x06,0x06]
10268
10269v_sub_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10270// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x01,0x06,0x06]
10271
10272v_sub_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10273// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x02,0x06,0x06]
10274
10275v_sub_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10276// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x03,0x06,0x06]
10277
10278v_sub_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10279// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x04,0x06,0x06]
10280
10281v_sub_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10282// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x05,0x06,0x06]
10283
10284v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
10285// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x0e,0x06,0x06]
10286
10287v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
10288// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x16,0x06,0x06]
10289
10290v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
10291// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x16,0x06,0x06]
10292
10293v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
10294// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x06]
10295
10296v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
10297// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x00,0x06]
10298
10299v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
10300// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x01,0x06]
10301
10302v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
10303// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x02,0x06]
10304
10305v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
10306// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x03,0x06]
10307
10308v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
10309// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x04,0x06]
10310
10311v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
10312// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x05,0x06]
10313
10314v_sub_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10315// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x0e,0x06]
10316
10317v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10318// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x06]
10319
10320v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
10321// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x00]
10322
10323v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
10324// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x01]
10325
10326v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
10327// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x02]
10328
10329v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
10330// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x03]
10331
10332v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
10333// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x04]
10334
10335v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
10336// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x05]
10337
10338v_sub_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10339// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x0e]
10340
10341v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10342// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x00]
10343
10344v_sub_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10345// CHECK: [0xfa,0x04,0xfe,0x4f,0x01,0xe4,0x00,0x00]
10346
10347v_sub_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10348// CHECK: [0xfa,0x04,0x0a,0x4e,0xff,0xe4,0x00,0x00]
10349
10350v_sub_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10351// CHECK: [0xfa,0xfe,0x0b,0x4e,0x01,0xe4,0x00,0x00]
10352
10353v_sub_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
10354// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x1b,0x00,0x00]
10355
10356v_sub_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
10357// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x40,0x01,0x00]
10358
10359v_sub_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
10360// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x41,0x01,0x00]
10361
10362v_sub_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
10363// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x42,0x01,0x00]
10364
10365v_sub_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
10366// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x43,0x01,0x00]
10367
10368v_sub_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
10369// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x30,0x01,0x00]
10370
10371v_sub_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
10372// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x34,0x01,0x00]
10373
10374v_sub_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
10375// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x38,0x01,0x00]
10376
10377v_sub_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
10378// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x3c,0x01,0x00]
10379
10380v_sub_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
10381// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x01,0x01,0x00]
10382
10383v_sub_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
10384// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x0f,0x01,0x00]
10385
10386v_sub_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
10387// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x11,0x01,0x00]
10388
10389v_sub_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
10390// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x1f,0x01,0x00]
10391
10392v_sub_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
10393// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x21,0x01,0x00]
10394
10395v_sub_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
10396// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x2f,0x01,0x00]
10397
10398v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
10399// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x10]
10400
10401v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
10402// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x30]
10403
10404v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
10405// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0xf0]
10406
10407v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
10408// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0xf0]
10409
10410v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
10411// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x01]
10412
10413v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
10414// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x03]
10415
10416v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
10417// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x0f]
10418
10419v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
10420// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x0f]
10421
10422v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
10423// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x08,0x00]
10424
10425v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10426// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x06]
10427
10428v_subrev_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10429// CHECK: [0xf9,0x04,0xfe,0x51,0x01,0x06,0x06,0x06]
10430
10431v_subrev_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10432// CHECK: [0xf9,0x04,0x0a,0x50,0xff,0x06,0x06,0x06]
10433
10434v_subrev_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10435// CHECK: [0xf9,0xfe,0x0b,0x50,0x01,0x06,0x06,0x06]
10436
10437v_subrev_u16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10438// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x26,0x06,0x06]
10439
10440v_subrev_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10441// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x06]
10442
10443v_subrev_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10444// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x00,0x06,0x06]
10445
10446v_subrev_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10447// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x01,0x06,0x06]
10448
10449v_subrev_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10450// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x02,0x06,0x06]
10451
10452v_subrev_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10453// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x03,0x06,0x06]
10454
10455v_subrev_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10456// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x04,0x06,0x06]
10457
10458v_subrev_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10459// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x05,0x06,0x06]
10460
10461v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
10462// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x0e,0x06,0x06]
10463
10464v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
10465// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x16,0x06,0x06]
10466
10467v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
10468// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x16,0x06,0x06]
10469
10470v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
10471// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x06]
10472
10473v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
10474// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x00,0x06]
10475
10476v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
10477// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x01,0x06]
10478
10479v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
10480// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x02,0x06]
10481
10482v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
10483// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x03,0x06]
10484
10485v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
10486// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x04,0x06]
10487
10488v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
10489// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x05,0x06]
10490
10491v_subrev_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10492// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x0e,0x06]
10493
10494v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10495// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x06]
10496
10497v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
10498// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x00]
10499
10500v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
10501// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x01]
10502
10503v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
10504// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x02]
10505
10506v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
10507// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x03]
10508
10509v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
10510// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x04]
10511
10512v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
10513// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x05]
10514
10515v_subrev_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10516// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x0e]
10517
10518v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10519// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x00]
10520
10521v_subrev_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10522// CHECK: [0xfa,0x04,0xfe,0x51,0x01,0xe4,0x00,0x00]
10523
10524v_subrev_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10525// CHECK: [0xfa,0x04,0x0a,0x50,0xff,0xe4,0x00,0x00]
10526
10527v_subrev_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10528// CHECK: [0xfa,0xfe,0x0b,0x50,0x01,0xe4,0x00,0x00]
10529
10530v_subrev_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
10531// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x1b,0x00,0x00]
10532
10533v_subrev_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
10534// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x40,0x01,0x00]
10535
10536v_subrev_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
10537// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x41,0x01,0x00]
10538
10539v_subrev_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
10540// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x42,0x01,0x00]
10541
10542v_subrev_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
10543// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x43,0x01,0x00]
10544
10545v_subrev_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
10546// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x30,0x01,0x00]
10547
10548v_subrev_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
10549// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x34,0x01,0x00]
10550
10551v_subrev_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
10552// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x38,0x01,0x00]
10553
10554v_subrev_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
10555// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x3c,0x01,0x00]
10556
10557v_subrev_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
10558// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x01,0x01,0x00]
10559
10560v_subrev_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
10561// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x0f,0x01,0x00]
10562
10563v_subrev_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
10564// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x11,0x01,0x00]
10565
10566v_subrev_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
10567// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x1f,0x01,0x00]
10568
10569v_subrev_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
10570// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x21,0x01,0x00]
10571
10572v_subrev_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
10573// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x2f,0x01,0x00]
10574
10575v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
10576// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x10]
10577
10578v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
10579// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x30]
10580
10581v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
10582// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0xf0]
10583
10584v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
10585// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0xf0]
10586
10587v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
10588// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x01]
10589
10590v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
10591// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x03]
10592
10593v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
10594// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x0f]
10595
10596v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
10597// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x0f]
10598
10599v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
10600// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x08,0x00]
10601
10602v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10603// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x06]
10604
10605v_mul_lo_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10606// CHECK: [0xf9,0x04,0xfe,0x53,0x01,0x06,0x06,0x06]
10607
10608v_mul_lo_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10609// CHECK: [0xf9,0x04,0x0a,0x52,0xff,0x06,0x06,0x06]
10610
10611v_mul_lo_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10612// CHECK: [0xf9,0xfe,0x0b,0x52,0x01,0x06,0x06,0x06]
10613
10614v_mul_lo_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10615// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x06]
10616
10617v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10618// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x00,0x06,0x06]
10619
10620v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10621// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x01,0x06,0x06]
10622
10623v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10624// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x02,0x06,0x06]
10625
10626v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10627// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x03,0x06,0x06]
10628
10629v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10630// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x04,0x06,0x06]
10631
10632v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10633// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x05,0x06,0x06]
10634
10635v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
10636// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x0e,0x06,0x06]
10637
10638v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
10639// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x16,0x06,0x06]
10640
10641v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
10642// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x16,0x06,0x06]
10643
10644v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
10645// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x06]
10646
10647v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
10648// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x00,0x06]
10649
10650v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
10651// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x01,0x06]
10652
10653v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
10654// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x02,0x06]
10655
10656v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
10657// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x03,0x06]
10658
10659v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
10660// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x04,0x06]
10661
10662v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
10663// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x05,0x06]
10664
10665v_mul_lo_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10666// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x0e,0x06]
10667
10668v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10669// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x06]
10670
10671v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
10672// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x00]
10673
10674v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
10675// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x01]
10676
10677v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
10678// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x02]
10679
10680v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
10681// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x03]
10682
10683v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
10684// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x04]
10685
10686v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
10687// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x05]
10688
10689v_mul_lo_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10690// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x0e]
10691
10692v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10693// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x00]
10694
10695v_mul_lo_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10696// CHECK: [0xfa,0x04,0xfe,0x53,0x01,0xe4,0x00,0x00]
10697
10698v_mul_lo_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10699// CHECK: [0xfa,0x04,0x0a,0x52,0xff,0xe4,0x00,0x00]
10700
10701v_mul_lo_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10702// CHECK: [0xfa,0xfe,0x0b,0x52,0x01,0xe4,0x00,0x00]
10703
10704v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
10705// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x1b,0x00,0x00]
10706
10707v_mul_lo_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
10708// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x40,0x01,0x00]
10709
10710v_mul_lo_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
10711// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x41,0x01,0x00]
10712
10713v_mul_lo_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
10714// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x42,0x01,0x00]
10715
10716v_mul_lo_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
10717// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x43,0x01,0x00]
10718
10719v_mul_lo_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
10720// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x30,0x01,0x00]
10721
10722v_mul_lo_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
10723// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x34,0x01,0x00]
10724
10725v_mul_lo_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
10726// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x38,0x01,0x00]
10727
10728v_mul_lo_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
10729// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x3c,0x01,0x00]
10730
10731v_mul_lo_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
10732// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x01,0x01,0x00]
10733
10734v_mul_lo_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
10735// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x0f,0x01,0x00]
10736
10737v_mul_lo_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
10738// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x11,0x01,0x00]
10739
10740v_mul_lo_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
10741// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x1f,0x01,0x00]
10742
10743v_mul_lo_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
10744// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x21,0x01,0x00]
10745
10746v_mul_lo_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
10747// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x2f,0x01,0x00]
10748
10749v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
10750// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x10]
10751
10752v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
10753// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x30]
10754
10755v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
10756// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0xf0]
10757
10758v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
10759// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0xf0]
10760
10761v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
10762// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x01]
10763
10764v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
10765// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x03]
10766
10767v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
10768// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x0f]
10769
10770v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
10771// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x0f]
10772
10773v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
10774// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x08,0x00]
10775
10776v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10777// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x06]
10778
10779v_lshlrev_b16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10780// CHECK: [0xf9,0x04,0xfe,0x55,0x01,0x06,0x06,0x06]
10781
10782v_lshlrev_b16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10783// CHECK: [0xf9,0x04,0x0a,0x54,0xff,0x06,0x06,0x06]
10784
10785v_lshlrev_b16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10786// CHECK: [0xf9,0xfe,0x0b,0x54,0x01,0x06,0x06,0x06]
10787
10788v_lshlrev_b16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10789// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x06]
10790
10791v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10792// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x00,0x06,0x06]
10793
10794v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10795// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x01,0x06,0x06]
10796
10797v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10798// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x02,0x06,0x06]
10799
10800v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10801// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x03,0x06,0x06]
10802
10803v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10804// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x04,0x06,0x06]
10805
10806v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10807// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x05,0x06,0x06]
10808
10809v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
10810// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x0e,0x06,0x06]
10811
10812v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
10813// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x16,0x06,0x06]
10814
10815v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
10816// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x16,0x06,0x06]
10817
10818v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
10819// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x06]
10820
10821v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
10822// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x00,0x06]
10823
10824v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
10825// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x01,0x06]
10826
10827v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
10828// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x02,0x06]
10829
10830v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
10831// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x03,0x06]
10832
10833v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
10834// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x04,0x06]
10835
10836v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
10837// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x05,0x06]
10838
10839v_lshlrev_b16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10840// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x0e,0x06]
10841
10842v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10843// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x06]
10844
10845v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
10846// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x00]
10847
10848v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
10849// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x01]
10850
10851v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
10852// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x02]
10853
10854v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
10855// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x03]
10856
10857v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
10858// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x04]
10859
10860v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
10861// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x05]
10862
10863v_lshlrev_b16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10864// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x0e]
10865
10866v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10867// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x00]
10868
10869v_lshlrev_b16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10870// CHECK: [0xfa,0x04,0xfe,0x55,0x01,0xe4,0x00,0x00]
10871
10872v_lshlrev_b16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10873// CHECK: [0xfa,0x04,0x0a,0x54,0xff,0xe4,0x00,0x00]
10874
10875v_lshlrev_b16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10876// CHECK: [0xfa,0xfe,0x0b,0x54,0x01,0xe4,0x00,0x00]
10877
10878v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
10879// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x1b,0x00,0x00]
10880
10881v_lshlrev_b16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
10882// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x40,0x01,0x00]
10883
10884v_lshlrev_b16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
10885// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x41,0x01,0x00]
10886
10887v_lshlrev_b16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
10888// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x42,0x01,0x00]
10889
10890v_lshlrev_b16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
10891// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x43,0x01,0x00]
10892
10893v_lshlrev_b16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
10894// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x30,0x01,0x00]
10895
10896v_lshlrev_b16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
10897// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x34,0x01,0x00]
10898
10899v_lshlrev_b16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
10900// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x38,0x01,0x00]
10901
10902v_lshlrev_b16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
10903// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x3c,0x01,0x00]
10904
10905v_lshlrev_b16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
10906// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x01,0x01,0x00]
10907
10908v_lshlrev_b16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
10909// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x0f,0x01,0x00]
10910
10911v_lshlrev_b16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
10912// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x11,0x01,0x00]
10913
10914v_lshlrev_b16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
10915// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x1f,0x01,0x00]
10916
10917v_lshlrev_b16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
10918// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x21,0x01,0x00]
10919
10920v_lshlrev_b16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
10921// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x2f,0x01,0x00]
10922
10923v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
10924// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x10]
10925
10926v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
10927// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x30]
10928
10929v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
10930// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0xf0]
10931
10932v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
10933// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0xf0]
10934
10935v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
10936// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x01]
10937
10938v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
10939// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x03]
10940
10941v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
10942// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x0f]
10943
10944v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
10945// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x0f]
10946
10947v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
10948// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x08,0x00]
10949
10950v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10951// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x06]
10952
10953v_lshrrev_b16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10954// CHECK: [0xf9,0x04,0xfe,0x57,0x01,0x06,0x06,0x06]
10955
10956v_lshrrev_b16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10957// CHECK: [0xf9,0x04,0x0a,0x56,0xff,0x06,0x06,0x06]
10958
10959v_lshrrev_b16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10960// CHECK: [0xf9,0xfe,0x0b,0x56,0x01,0x06,0x06,0x06]
10961
10962v_lshrrev_b16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10963// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x06]
10964
10965v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10966// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x00,0x06,0x06]
10967
10968v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10969// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x01,0x06,0x06]
10970
10971v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10972// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x02,0x06,0x06]
10973
10974v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10975// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x03,0x06,0x06]
10976
10977v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10978// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x04,0x06,0x06]
10979
10980v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
10981// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x05,0x06,0x06]
10982
10983v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
10984// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x0e,0x06,0x06]
10985
10986v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
10987// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x16,0x06,0x06]
10988
10989v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
10990// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x16,0x06,0x06]
10991
10992v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
10993// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x06]
10994
10995v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
10996// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x00,0x06]
10997
10998v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
10999// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x01,0x06]
11000
11001v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
11002// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x02,0x06]
11003
11004v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
11005// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x03,0x06]
11006
11007v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
11008// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x04,0x06]
11009
11010v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
11011// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x05,0x06]
11012
11013v_lshrrev_b16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11014// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x0e,0x06]
11015
11016v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11017// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x06]
11018
11019v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
11020// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x00]
11021
11022v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
11023// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x01]
11024
11025v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
11026// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x02]
11027
11028v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
11029// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x03]
11030
11031v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
11032// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x04]
11033
11034v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
11035// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x05]
11036
11037v_lshrrev_b16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11038// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x0e]
11039
11040v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11041// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x00]
11042
11043v_lshrrev_b16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11044// CHECK: [0xfa,0x04,0xfe,0x57,0x01,0xe4,0x00,0x00]
11045
11046v_lshrrev_b16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11047// CHECK: [0xfa,0x04,0x0a,0x56,0xff,0xe4,0x00,0x00]
11048
11049v_lshrrev_b16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11050// CHECK: [0xfa,0xfe,0x0b,0x56,0x01,0xe4,0x00,0x00]
11051
11052v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
11053// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x1b,0x00,0x00]
11054
11055v_lshrrev_b16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
11056// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x40,0x01,0x00]
11057
11058v_lshrrev_b16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
11059// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x41,0x01,0x00]
11060
11061v_lshrrev_b16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
11062// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x42,0x01,0x00]
11063
11064v_lshrrev_b16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
11065// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x43,0x01,0x00]
11066
11067v_lshrrev_b16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
11068// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x30,0x01,0x00]
11069
11070v_lshrrev_b16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
11071// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x34,0x01,0x00]
11072
11073v_lshrrev_b16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
11074// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x38,0x01,0x00]
11075
11076v_lshrrev_b16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
11077// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x3c,0x01,0x00]
11078
11079v_lshrrev_b16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
11080// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x01,0x01,0x00]
11081
11082v_lshrrev_b16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
11083// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x0f,0x01,0x00]
11084
11085v_lshrrev_b16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
11086// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x11,0x01,0x00]
11087
11088v_lshrrev_b16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
11089// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x1f,0x01,0x00]
11090
11091v_lshrrev_b16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
11092// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x21,0x01,0x00]
11093
11094v_lshrrev_b16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
11095// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x2f,0x01,0x00]
11096
11097v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
11098// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x10]
11099
11100v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
11101// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x30]
11102
11103v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
11104// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0xf0]
11105
11106v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
11107// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0xf0]
11108
11109v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
11110// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x01]
11111
11112v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
11113// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x03]
11114
11115v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
11116// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x0f]
11117
11118v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
11119// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x0f]
11120
11121v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
11122// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x08,0x00]
11123
11124v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11125// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x06]
11126
11127v_ashrrev_i16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11128// CHECK: [0xf9,0x04,0xfe,0x59,0x01,0x06,0x06,0x06]
11129
11130v_ashrrev_i16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11131// CHECK: [0xf9,0x04,0x0a,0x58,0xff,0x06,0x06,0x06]
11132
11133v_ashrrev_i16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11134// CHECK: [0xf9,0xfe,0x0b,0x58,0x01,0x06,0x06,0x06]
11135
11136v_ashrrev_i16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11137// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x06]
11138
11139v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11140// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x00,0x06,0x06]
11141
11142v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11143// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x01,0x06,0x06]
11144
11145v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11146// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x02,0x06,0x06]
11147
11148v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11149// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x03,0x06,0x06]
11150
11151v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11152// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x04,0x06,0x06]
11153
11154v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11155// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x05,0x06,0x06]
11156
11157v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
11158// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x0e,0x06,0x06]
11159
11160v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
11161// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x16,0x06,0x06]
11162
11163v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
11164// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x16,0x06,0x06]
11165
11166v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
11167// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x06]
11168
11169v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
11170// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x00,0x06]
11171
11172v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
11173// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x01,0x06]
11174
11175v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
11176// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x02,0x06]
11177
11178v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
11179// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x03,0x06]
11180
11181v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
11182// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x04,0x06]
11183
11184v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
11185// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x05,0x06]
11186
11187v_ashrrev_i16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11188// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x0e,0x06]
11189
11190v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11191// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x06]
11192
11193v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
11194// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x00]
11195
11196v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
11197// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x01]
11198
11199v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
11200// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x02]
11201
11202v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
11203// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x03]
11204
11205v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
11206// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x04]
11207
11208v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
11209// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x05]
11210
11211v_ashrrev_i16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11212// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x0e]
11213
11214v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11215// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x00]
11216
11217v_ashrrev_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11218// CHECK: [0xfa,0x04,0xfe,0x59,0x01,0xe4,0x00,0x00]
11219
11220v_ashrrev_i16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11221// CHECK: [0xfa,0x04,0x0a,0x58,0xff,0xe4,0x00,0x00]
11222
11223v_ashrrev_i16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11224// CHECK: [0xfa,0xfe,0x0b,0x58,0x01,0xe4,0x00,0x00]
11225
11226v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
11227// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x1b,0x00,0x00]
11228
11229v_ashrrev_i16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
11230// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x40,0x01,0x00]
11231
11232v_ashrrev_i16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
11233// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x41,0x01,0x00]
11234
11235v_ashrrev_i16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
11236// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x42,0x01,0x00]
11237
11238v_ashrrev_i16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
11239// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x43,0x01,0x00]
11240
11241v_ashrrev_i16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
11242// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x30,0x01,0x00]
11243
11244v_ashrrev_i16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
11245// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x34,0x01,0x00]
11246
11247v_ashrrev_i16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
11248// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x38,0x01,0x00]
11249
11250v_ashrrev_i16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
11251// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x3c,0x01,0x00]
11252
11253v_ashrrev_i16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
11254// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x01,0x01,0x00]
11255
11256v_ashrrev_i16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
11257// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x0f,0x01,0x00]
11258
11259v_ashrrev_i16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
11260// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x11,0x01,0x00]
11261
11262v_ashrrev_i16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
11263// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x1f,0x01,0x00]
11264
11265v_ashrrev_i16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
11266// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x21,0x01,0x00]
11267
11268v_ashrrev_i16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
11269// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x2f,0x01,0x00]
11270
11271v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
11272// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x10]
11273
11274v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
11275// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x30]
11276
11277v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
11278// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0xf0]
11279
11280v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
11281// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0xf0]
11282
11283v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
11284// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x01]
11285
11286v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
11287// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x03]
11288
11289v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
11290// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x0f]
11291
11292v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
11293// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x0f]
11294
11295v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
11296// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x08,0x00]
11297
11298v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11299// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x06]
11300
11301v_max_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11302// CHECK: [0xf9,0x04,0xfe,0x5b,0x01,0x06,0x06,0x06]
11303
11304v_max_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11305// CHECK: [0xf9,0x04,0x0a,0x5a,0xff,0x06,0x06,0x06]
11306
11307v_max_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11308// CHECK: [0xf9,0xfe,0x0b,0x5a,0x01,0x06,0x06,0x06]
11309
11310v_max_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11311// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x26,0x06,0x06]
11312
11313v_max_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11314// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x06]
11315
11316v_max_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11317// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x00,0x06,0x06]
11318
11319v_max_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11320// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x01,0x06,0x06]
11321
11322v_max_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11323// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x02,0x06,0x06]
11324
11325v_max_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11326// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x03,0x06,0x06]
11327
11328v_max_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11329// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x04,0x06,0x06]
11330
11331v_max_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11332// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x05,0x06,0x06]
11333
11334v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
11335// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x0e,0x06,0x06]
11336
11337v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
11338// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x16,0x06,0x06]
11339
11340v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
11341// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x16,0x06,0x06]
11342
11343v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
11344// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x06]
11345
11346v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
11347// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x00,0x06]
11348
11349v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
11350// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x01,0x06]
11351
11352v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
11353// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x02,0x06]
11354
11355v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
11356// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x03,0x06]
11357
11358v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
11359// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x04,0x06]
11360
11361v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
11362// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x05,0x06]
11363
11364v_max_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11365// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x16,0x06]
11366
11367v_max_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11368// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x26,0x06]
11369
11370v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11371// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x06]
11372
11373v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
11374// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x00]
11375
11376v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
11377// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x01]
11378
11379v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
11380// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x02]
11381
11382v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
11383// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x03]
11384
11385v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
11386// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x04]
11387
11388v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
11389// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x05]
11390
11391v_max_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11392// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x16]
11393
11394v_max_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11395// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x26]
11396
11397v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11398// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x00]
11399
11400v_max_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11401// CHECK: [0xfa,0x04,0xfe,0x5b,0x01,0xe4,0x00,0x00]
11402
11403v_max_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11404// CHECK: [0xfa,0x04,0x0a,0x5a,0xff,0xe4,0x00,0x00]
11405
11406v_max_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11407// CHECK: [0xfa,0xfe,0x0b,0x5a,0x01,0xe4,0x00,0x00]
11408
11409v_max_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
11410// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x1b,0x00,0x00]
11411
11412v_max_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
11413// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x40,0x01,0x00]
11414
11415v_max_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
11416// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x41,0x01,0x00]
11417
11418v_max_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
11419// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x42,0x01,0x00]
11420
11421v_max_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
11422// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x43,0x01,0x00]
11423
11424v_max_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
11425// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x30,0x01,0x00]
11426
11427v_max_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
11428// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x34,0x01,0x00]
11429
11430v_max_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
11431// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x38,0x01,0x00]
11432
11433v_max_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
11434// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x3c,0x01,0x00]
11435
11436v_max_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
11437// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x01,0x01,0x00]
11438
11439v_max_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
11440// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x0f,0x01,0x00]
11441
11442v_max_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
11443// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x11,0x01,0x00]
11444
11445v_max_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
11446// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x1f,0x01,0x00]
11447
11448v_max_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
11449// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x21,0x01,0x00]
11450
11451v_max_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
11452// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x2f,0x01,0x00]
11453
11454v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
11455// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x10]
11456
11457v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
11458// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x30]
11459
11460v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
11461// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0xf0]
11462
11463v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
11464// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0xf0]
11465
11466v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
11467// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x01]
11468
11469v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
11470// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x03]
11471
11472v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
11473// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x0f]
11474
11475v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
11476// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x0f]
11477
11478v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
11479// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x08,0x00]
11480
11481v_max_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11482// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x10,0x00]
11483
11484v_max_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11485// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x20,0x00]
11486
11487v_max_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11488// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x40,0x00]
11489
11490v_max_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11491// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x80,0x00]
11492
11493v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11494// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x06]
11495
11496v_min_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11497// CHECK: [0xf9,0x04,0xfe,0x5d,0x01,0x06,0x06,0x06]
11498
11499v_min_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11500// CHECK: [0xf9,0x04,0x0a,0x5c,0xff,0x06,0x06,0x06]
11501
11502v_min_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11503// CHECK: [0xf9,0xfe,0x0b,0x5c,0x01,0x06,0x06,0x06]
11504
11505v_min_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11506// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x26,0x06,0x06]
11507
11508v_min_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11509// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x06]
11510
11511v_min_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11512// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x00,0x06,0x06]
11513
11514v_min_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11515// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x01,0x06,0x06]
11516
11517v_min_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11518// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x02,0x06,0x06]
11519
11520v_min_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11521// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x03,0x06,0x06]
11522
11523v_min_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11524// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x04,0x06,0x06]
11525
11526v_min_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11527// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x05,0x06,0x06]
11528
11529v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
11530// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x0e,0x06,0x06]
11531
11532v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
11533// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x16,0x06,0x06]
11534
11535v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
11536// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x16,0x06,0x06]
11537
11538v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
11539// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x06]
11540
11541v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
11542// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x00,0x06]
11543
11544v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
11545// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x01,0x06]
11546
11547v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
11548// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x02,0x06]
11549
11550v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
11551// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x03,0x06]
11552
11553v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
11554// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x04,0x06]
11555
11556v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
11557// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x05,0x06]
11558
11559v_min_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11560// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x16,0x06]
11561
11562v_min_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11563// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x26,0x06]
11564
11565v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11566// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x06]
11567
11568v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
11569// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x00]
11570
11571v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
11572// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x01]
11573
11574v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
11575// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x02]
11576
11577v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
11578// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x03]
11579
11580v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
11581// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x04]
11582
11583v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
11584// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x05]
11585
11586v_min_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11587// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x16]
11588
11589v_min_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11590// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x26]
11591
11592v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11593// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x00]
11594
11595v_min_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11596// CHECK: [0xfa,0x04,0xfe,0x5d,0x01,0xe4,0x00,0x00]
11597
11598v_min_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11599// CHECK: [0xfa,0x04,0x0a,0x5c,0xff,0xe4,0x00,0x00]
11600
11601v_min_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11602// CHECK: [0xfa,0xfe,0x0b,0x5c,0x01,0xe4,0x00,0x00]
11603
11604v_min_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
11605// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x1b,0x00,0x00]
11606
11607v_min_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
11608// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x40,0x01,0x00]
11609
11610v_min_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
11611// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x41,0x01,0x00]
11612
11613v_min_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
11614// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x42,0x01,0x00]
11615
11616v_min_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
11617// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x43,0x01,0x00]
11618
11619v_min_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
11620// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x30,0x01,0x00]
11621
11622v_min_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
11623// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x34,0x01,0x00]
11624
11625v_min_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
11626// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x38,0x01,0x00]
11627
11628v_min_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
11629// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x3c,0x01,0x00]
11630
11631v_min_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
11632// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x01,0x01,0x00]
11633
11634v_min_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
11635// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x0f,0x01,0x00]
11636
11637v_min_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
11638// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x11,0x01,0x00]
11639
11640v_min_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
11641// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x1f,0x01,0x00]
11642
11643v_min_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
11644// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x21,0x01,0x00]
11645
11646v_min_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
11647// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x2f,0x01,0x00]
11648
11649v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
11650// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x10]
11651
11652v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
11653// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x30]
11654
11655v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
11656// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0xf0]
11657
11658v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
11659// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0xf0]
11660
11661v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
11662// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x01]
11663
11664v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
11665// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x03]
11666
11667v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
11668// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x0f]
11669
11670v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
11671// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x0f]
11672
11673v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
11674// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x08,0x00]
11675
11676v_min_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11677// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x10,0x00]
11678
11679v_min_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11680// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x20,0x00]
11681
11682v_min_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11683// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x40,0x00]
11684
11685v_min_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11686// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x80,0x00]
11687
11688v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11689// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x06]
11690
11691v_max_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11692// CHECK: [0xf9,0x04,0xfe,0x5f,0x01,0x06,0x06,0x06]
11693
11694v_max_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11695// CHECK: [0xf9,0x04,0x0a,0x5e,0xff,0x06,0x06,0x06]
11696
11697v_max_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11698// CHECK: [0xf9,0xfe,0x0b,0x5e,0x01,0x06,0x06,0x06]
11699
11700v_max_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11701// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x06]
11702
11703v_max_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11704// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x00,0x06,0x06]
11705
11706v_max_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11707// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x01,0x06,0x06]
11708
11709v_max_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11710// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x02,0x06,0x06]
11711
11712v_max_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11713// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x03,0x06,0x06]
11714
11715v_max_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11716// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x04,0x06,0x06]
11717
11718v_max_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11719// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x05,0x06,0x06]
11720
11721v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
11722// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x0e,0x06,0x06]
11723
11724v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
11725// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x16,0x06,0x06]
11726
11727v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
11728// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x16,0x06,0x06]
11729
11730v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
11731// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x06]
11732
11733v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
11734// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x00,0x06]
11735
11736v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
11737// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x01,0x06]
11738
11739v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
11740// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x02,0x06]
11741
11742v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
11743// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x03,0x06]
11744
11745v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
11746// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x04,0x06]
11747
11748v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
11749// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x05,0x06]
11750
11751v_max_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11752// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x0e,0x06]
11753
11754v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11755// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x06]
11756
11757v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
11758// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x00]
11759
11760v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
11761// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x01]
11762
11763v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
11764// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x02]
11765
11766v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
11767// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x03]
11768
11769v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
11770// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x04]
11771
11772v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
11773// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x05]
11774
11775v_max_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11776// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x0e]
11777
11778v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11779// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x00]
11780
11781v_max_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11782// CHECK: [0xfa,0x04,0xfe,0x5f,0x01,0xe4,0x00,0x00]
11783
11784v_max_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11785// CHECK: [0xfa,0x04,0x0a,0x5e,0xff,0xe4,0x00,0x00]
11786
11787v_max_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11788// CHECK: [0xfa,0xfe,0x0b,0x5e,0x01,0xe4,0x00,0x00]
11789
11790v_max_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
11791// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x1b,0x00,0x00]
11792
11793v_max_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
11794// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x40,0x01,0x00]
11795
11796v_max_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
11797// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x41,0x01,0x00]
11798
11799v_max_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
11800// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x42,0x01,0x00]
11801
11802v_max_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
11803// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x43,0x01,0x00]
11804
11805v_max_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
11806// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x30,0x01,0x00]
11807
11808v_max_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
11809// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x34,0x01,0x00]
11810
11811v_max_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
11812// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x38,0x01,0x00]
11813
11814v_max_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
11815// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x3c,0x01,0x00]
11816
11817v_max_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
11818// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x01,0x01,0x00]
11819
11820v_max_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
11821// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x0f,0x01,0x00]
11822
11823v_max_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
11824// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x11,0x01,0x00]
11825
11826v_max_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
11827// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x1f,0x01,0x00]
11828
11829v_max_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
11830// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x21,0x01,0x00]
11831
11832v_max_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
11833// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x2f,0x01,0x00]
11834
11835v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
11836// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x10]
11837
11838v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
11839// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x30]
11840
11841v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
11842// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0xf0]
11843
11844v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
11845// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0xf0]
11846
11847v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
11848// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x01]
11849
11850v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
11851// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x03]
11852
11853v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
11854// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x0f]
11855
11856v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
11857// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x0f]
11858
11859v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
11860// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x08,0x00]
11861
11862v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11863// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x06]
11864
11865v_max_i16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11866// CHECK: [0xf9,0x04,0xfe,0x61,0x01,0x06,0x06,0x06]
11867
11868v_max_i16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11869// CHECK: [0xf9,0x04,0x0a,0x60,0xff,0x06,0x06,0x06]
11870
11871v_max_i16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11872// CHECK: [0xf9,0xfe,0x0b,0x60,0x01,0x06,0x06,0x06]
11873
11874v_max_i16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11875// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x06]
11876
11877v_max_i16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11878// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x00,0x06,0x06]
11879
11880v_max_i16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11881// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x01,0x06,0x06]
11882
11883v_max_i16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11884// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x02,0x06,0x06]
11885
11886v_max_i16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11887// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x03,0x06,0x06]
11888
11889v_max_i16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11890// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x04,0x06,0x06]
11891
11892v_max_i16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11893// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x05,0x06,0x06]
11894
11895v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
11896// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x0e,0x06,0x06]
11897
11898v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
11899// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x16,0x06,0x06]
11900
11901v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
11902// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x16,0x06,0x06]
11903
11904v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
11905// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x06]
11906
11907v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
11908// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x00,0x06]
11909
11910v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
11911// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x01,0x06]
11912
11913v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
11914// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x02,0x06]
11915
11916v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
11917// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x03,0x06]
11918
11919v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
11920// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x04,0x06]
11921
11922v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
11923// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x05,0x06]
11924
11925v_max_i16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11926// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x0e,0x06]
11927
11928v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11929// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x06]
11930
11931v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
11932// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x00]
11933
11934v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
11935// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x01]
11936
11937v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
11938// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x02]
11939
11940v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
11941// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x03]
11942
11943v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
11944// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x04]
11945
11946v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
11947// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x05]
11948
11949v_max_i16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
11950// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x0e]
11951
11952v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11953// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x00]
11954
11955v_max_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11956// CHECK: [0xfa,0x04,0xfe,0x61,0x01,0xe4,0x00,0x00]
11957
11958v_max_i16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11959// CHECK: [0xfa,0x04,0x0a,0x60,0xff,0xe4,0x00,0x00]
11960
11961v_max_i16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11962// CHECK: [0xfa,0xfe,0x0b,0x60,0x01,0xe4,0x00,0x00]
11963
11964v_max_i16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
11965// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x1b,0x00,0x00]
11966
11967v_max_i16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
11968// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x40,0x01,0x00]
11969
11970v_max_i16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
11971// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x41,0x01,0x00]
11972
11973v_max_i16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
11974// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x42,0x01,0x00]
11975
11976v_max_i16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
11977// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x43,0x01,0x00]
11978
11979v_max_i16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
11980// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x30,0x01,0x00]
11981
11982v_max_i16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
11983// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x34,0x01,0x00]
11984
11985v_max_i16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
11986// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x38,0x01,0x00]
11987
11988v_max_i16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
11989// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x3c,0x01,0x00]
11990
11991v_max_i16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
11992// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x01,0x01,0x00]
11993
11994v_max_i16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
11995// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x0f,0x01,0x00]
11996
11997v_max_i16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
11998// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x11,0x01,0x00]
11999
12000v_max_i16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
12001// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x1f,0x01,0x00]
12002
12003v_max_i16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
12004// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x21,0x01,0x00]
12005
12006v_max_i16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
12007// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x2f,0x01,0x00]
12008
12009v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
12010// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x10]
12011
12012v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
12013// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x30]
12014
12015v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
12016// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0xf0]
12017
12018v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
12019// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0xf0]
12020
12021v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
12022// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x01]
12023
12024v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
12025// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x03]
12026
12027v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
12028// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x0f]
12029
12030v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
12031// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x0f]
12032
12033v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
12034// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x08,0x00]
12035
12036v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12037// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x06]
12038
12039v_min_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12040// CHECK: [0xf9,0x04,0xfe,0x63,0x01,0x06,0x06,0x06]
12041
12042v_min_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12043// CHECK: [0xf9,0x04,0x0a,0x62,0xff,0x06,0x06,0x06]
12044
12045v_min_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12046// CHECK: [0xf9,0xfe,0x0b,0x62,0x01,0x06,0x06,0x06]
12047
12048v_min_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12049// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x06]
12050
12051v_min_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12052// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x00,0x06,0x06]
12053
12054v_min_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12055// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x01,0x06,0x06]
12056
12057v_min_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12058// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x02,0x06,0x06]
12059
12060v_min_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12061// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x03,0x06,0x06]
12062
12063v_min_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12064// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x04,0x06,0x06]
12065
12066v_min_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12067// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x05,0x06,0x06]
12068
12069v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
12070// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x0e,0x06,0x06]
12071
12072v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
12073// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x16,0x06,0x06]
12074
12075v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
12076// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x16,0x06,0x06]
12077
12078v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
12079// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x06]
12080
12081v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
12082// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x00,0x06]
12083
12084v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
12085// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x01,0x06]
12086
12087v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
12088// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x02,0x06]
12089
12090v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
12091// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x03,0x06]
12092
12093v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
12094// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x04,0x06]
12095
12096v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
12097// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x05,0x06]
12098
12099v_min_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12100// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x0e,0x06]
12101
12102v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12103// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x06]
12104
12105v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
12106// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x00]
12107
12108v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
12109// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x01]
12110
12111v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
12112// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x02]
12113
12114v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
12115// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x03]
12116
12117v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
12118// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x04]
12119
12120v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
12121// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x05]
12122
12123v_min_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12124// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x0e]
12125
12126v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12127// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x00]
12128
12129v_min_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12130// CHECK: [0xfa,0x04,0xfe,0x63,0x01,0xe4,0x00,0x00]
12131
12132v_min_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12133// CHECK: [0xfa,0x04,0x0a,0x62,0xff,0xe4,0x00,0x00]
12134
12135v_min_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12136// CHECK: [0xfa,0xfe,0x0b,0x62,0x01,0xe4,0x00,0x00]
12137
12138v_min_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
12139// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x1b,0x00,0x00]
12140
12141v_min_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
12142// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x40,0x01,0x00]
12143
12144v_min_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
12145// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x41,0x01,0x00]
12146
12147v_min_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
12148// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x42,0x01,0x00]
12149
12150v_min_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
12151// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x43,0x01,0x00]
12152
12153v_min_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
12154// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x30,0x01,0x00]
12155
12156v_min_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
12157// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x34,0x01,0x00]
12158
12159v_min_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
12160// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x38,0x01,0x00]
12161
12162v_min_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
12163// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x3c,0x01,0x00]
12164
12165v_min_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
12166// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x01,0x01,0x00]
12167
12168v_min_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
12169// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x0f,0x01,0x00]
12170
12171v_min_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
12172// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x11,0x01,0x00]
12173
12174v_min_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
12175// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x1f,0x01,0x00]
12176
12177v_min_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
12178// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x21,0x01,0x00]
12179
12180v_min_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
12181// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x2f,0x01,0x00]
12182
12183v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
12184// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x10]
12185
12186v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
12187// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x30]
12188
12189v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
12190// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0xf0]
12191
12192v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
12193// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0xf0]
12194
12195v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
12196// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x01]
12197
12198v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
12199// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x03]
12200
12201v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
12202// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x0f]
12203
12204v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
12205// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x0f]
12206
12207v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
12208// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x08,0x00]
12209
12210v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12211// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x06]
12212
12213v_min_i16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12214// CHECK: [0xf9,0x04,0xfe,0x65,0x01,0x06,0x06,0x06]
12215
12216v_min_i16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12217// CHECK: [0xf9,0x04,0x0a,0x64,0xff,0x06,0x06,0x06]
12218
12219v_min_i16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12220// CHECK: [0xf9,0xfe,0x0b,0x64,0x01,0x06,0x06,0x06]
12221
12222v_min_i16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12223// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x06]
12224
12225v_min_i16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12226// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x00,0x06,0x06]
12227
12228v_min_i16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12229// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x01,0x06,0x06]
12230
12231v_min_i16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12232// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x02,0x06,0x06]
12233
12234v_min_i16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12235// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x03,0x06,0x06]
12236
12237v_min_i16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12238// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x04,0x06,0x06]
12239
12240v_min_i16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12241// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x05,0x06,0x06]
12242
12243v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
12244// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x0e,0x06,0x06]
12245
12246v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
12247// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x16,0x06,0x06]
12248
12249v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
12250// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x16,0x06,0x06]
12251
12252v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
12253// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x06]
12254
12255v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
12256// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x00,0x06]
12257
12258v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
12259// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x01,0x06]
12260
12261v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
12262// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x02,0x06]
12263
12264v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
12265// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x03,0x06]
12266
12267v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
12268// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x04,0x06]
12269
12270v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
12271// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x05,0x06]
12272
12273v_min_i16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12274// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x0e,0x06]
12275
12276v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12277// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x06]
12278
12279v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
12280// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x00]
12281
12282v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
12283// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x01]
12284
12285v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
12286// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x02]
12287
12288v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
12289// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x03]
12290
12291v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
12292// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x04]
12293
12294v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
12295// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x05]
12296
12297v_min_i16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12298// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x0e]
12299
12300v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12301// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x00]
12302
12303v_min_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12304// CHECK: [0xfa,0x04,0xfe,0x65,0x01,0xe4,0x00,0x00]
12305
12306v_min_i16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12307// CHECK: [0xfa,0x04,0x0a,0x64,0xff,0xe4,0x00,0x00]
12308
12309v_min_i16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12310// CHECK: [0xfa,0xfe,0x0b,0x64,0x01,0xe4,0x00,0x00]
12311
12312v_min_i16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
12313// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x1b,0x00,0x00]
12314
12315v_min_i16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
12316// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x40,0x01,0x00]
12317
12318v_min_i16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
12319// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x41,0x01,0x00]
12320
12321v_min_i16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
12322// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x42,0x01,0x00]
12323
12324v_min_i16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
12325// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x43,0x01,0x00]
12326
12327v_min_i16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
12328// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x30,0x01,0x00]
12329
12330v_min_i16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
12331// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x34,0x01,0x00]
12332
12333v_min_i16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
12334// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x38,0x01,0x00]
12335
12336v_min_i16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
12337// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x3c,0x01,0x00]
12338
12339v_min_i16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
12340// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x01,0x01,0x00]
12341
12342v_min_i16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
12343// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x0f,0x01,0x00]
12344
12345v_min_i16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
12346// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x11,0x01,0x00]
12347
12348v_min_i16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
12349// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x1f,0x01,0x00]
12350
12351v_min_i16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
12352// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x21,0x01,0x00]
12353
12354v_min_i16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
12355// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x2f,0x01,0x00]
12356
12357v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
12358// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x10]
12359
12360v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
12361// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x30]
12362
12363v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
12364// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0xf0]
12365
12366v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
12367// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0xf0]
12368
12369v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
12370// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x01]
12371
12372v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
12373// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x03]
12374
12375v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
12376// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x0f]
12377
12378v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
12379// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x0f]
12380
12381v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
12382// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x08,0x00]
12383
12384v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12385// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x06]
12386
12387v_ldexp_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12388// CHECK: [0xf9,0x04,0xfe,0x67,0x01,0x06,0x06,0x06]
12389
12390v_ldexp_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12391// CHECK: [0xf9,0x04,0x0a,0x66,0xff,0x06,0x06,0x06]
12392
12393v_ldexp_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12394// CHECK: [0xf9,0xfe,0x0b,0x66,0x01,0x06,0x06,0x06]
12395
12396v_ldexp_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12397// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x26,0x06,0x06]
12398
12399v_ldexp_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12400// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x06]
12401
12402v_ldexp_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12403// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x00,0x06,0x06]
12404
12405v_ldexp_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12406// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x01,0x06,0x06]
12407
12408v_ldexp_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12409// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x02,0x06,0x06]
12410
12411v_ldexp_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12412// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x03,0x06,0x06]
12413
12414v_ldexp_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12415// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x04,0x06,0x06]
12416
12417v_ldexp_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12418// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x05,0x06,0x06]
12419
12420v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
12421// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x0e,0x06,0x06]
12422
12423v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
12424// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x16,0x06,0x06]
12425
12426v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
12427// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x16,0x06,0x06]
12428
12429v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
12430// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x06]
12431
12432v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
12433// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x00,0x06]
12434
12435v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
12436// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x01,0x06]
12437
12438v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
12439// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x02,0x06]
12440
12441v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
12442// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x03,0x06]
12443
12444v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
12445// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x04,0x06]
12446
12447v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
12448// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x05,0x06]
12449
12450v_ldexp_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12451// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x16,0x06]
12452
12453v_ldexp_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12454// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x26,0x06]
12455
12456v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12457// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x06]
12458
12459v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
12460// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x00]
12461
12462v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
12463// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x01]
12464
12465v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
12466// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x02]
12467
12468v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
12469// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x03]
12470
12471v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
12472// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x04]
12473
12474v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
12475// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x05]
12476
12477v_ldexp_f16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
12478// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x0e]
12479
12480v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12481// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x00]
12482
12483v_ldexp_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12484// CHECK: [0xfa,0x04,0xfe,0x67,0x01,0xe4,0x00,0x00]
12485
12486v_ldexp_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12487// CHECK: [0xfa,0x04,0x0a,0x66,0xff,0xe4,0x00,0x00]
12488
12489v_ldexp_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12490// CHECK: [0xfa,0xfe,0x0b,0x66,0x01,0xe4,0x00,0x00]
12491
12492v_ldexp_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
12493// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x1b,0x00,0x00]
12494
12495v_ldexp_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
12496// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x40,0x01,0x00]
12497
12498v_ldexp_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
12499// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x41,0x01,0x00]
12500
12501v_ldexp_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
12502// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x42,0x01,0x00]
12503
12504v_ldexp_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
12505// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x43,0x01,0x00]
12506
12507v_ldexp_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
12508// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x30,0x01,0x00]
12509
12510v_ldexp_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
12511// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x34,0x01,0x00]
12512
12513v_ldexp_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
12514// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x38,0x01,0x00]
12515
12516v_ldexp_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
12517// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x3c,0x01,0x00]
12518
12519v_ldexp_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
12520// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x01,0x01,0x00]
12521
12522v_ldexp_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
12523// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x0f,0x01,0x00]
12524
12525v_ldexp_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
12526// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x11,0x01,0x00]
12527
12528v_ldexp_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
12529// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x1f,0x01,0x00]
12530
12531v_ldexp_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
12532// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x21,0x01,0x00]
12533
12534v_ldexp_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
12535// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x2f,0x01,0x00]
12536
12537v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
12538// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x10]
12539
12540v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
12541// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x30]
12542
12543v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
12544// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0xf0]
12545
12546v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
12547// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0xf0]
12548
12549v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
12550// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x01]
12551
12552v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
12553// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x03]
12554
12555v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
12556// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x0f]
12557
12558v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
12559// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x0f]
12560
12561v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
12562// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x08,0x00]
12563
12564v_ldexp_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12565// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x10,0x00]
12566
12567v_ldexp_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12568// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x20,0x00]
12569