1 // REQUIRES: aarch64-registered-target
2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s
4 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
5 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s
6 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null
7 #include <arm_sve.h>
8
9 #ifdef SVE_OVERLOADED_FORMS
10 // A simple used,unused... macro, long enough to represent any SVE builtin.
11 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
12 #else
13 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
14 #endif
15
test_svmaxnm_f16_z(svbool_t pg,svfloat16_t op1,svfloat16_t op2)16 svfloat16_t test_svmaxnm_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
17 {
18 // CHECK-LABEL: test_svmaxnm_f16_z
19 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
20 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
21 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2)
22 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
23 return SVE_ACLE_FUNC(svmaxnm,_f16,_z,)(pg, op1, op2);
24 }
25
test_svmaxnm_f32_z(svbool_t pg,svfloat32_t op1,svfloat32_t op2)26 svfloat32_t test_svmaxnm_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
27 {
28 // CHECK-LABEL: test_svmaxnm_f32_z
29 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
30 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
31 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %op2)
32 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
33 return SVE_ACLE_FUNC(svmaxnm,_f32,_z,)(pg, op1, op2);
34 }
35
test_svmaxnm_f64_z(svbool_t pg,svfloat64_t op1,svfloat64_t op2)36 svfloat64_t test_svmaxnm_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
37 {
38 // CHECK-LABEL: test_svmaxnm_f64_z
39 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
40 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
41 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %op2)
42 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
43 return SVE_ACLE_FUNC(svmaxnm,_f64,_z,)(pg, op1, op2);
44 }
45
test_svmaxnm_f16_m(svbool_t pg,svfloat16_t op1,svfloat16_t op2)46 svfloat16_t test_svmaxnm_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
47 {
48 // CHECK-LABEL: test_svmaxnm_f16_m
49 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
50 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
51 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
52 return SVE_ACLE_FUNC(svmaxnm,_f16,_m,)(pg, op1, op2);
53 }
54
test_svmaxnm_f32_m(svbool_t pg,svfloat32_t op1,svfloat32_t op2)55 svfloat32_t test_svmaxnm_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
56 {
57 // CHECK-LABEL: test_svmaxnm_f32_m
58 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
59 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
60 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
61 return SVE_ACLE_FUNC(svmaxnm,_f32,_m,)(pg, op1, op2);
62 }
63
test_svmaxnm_f64_m(svbool_t pg,svfloat64_t op1,svfloat64_t op2)64 svfloat64_t test_svmaxnm_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
65 {
66 // CHECK-LABEL: test_svmaxnm_f64_m
67 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
68 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
69 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
70 return SVE_ACLE_FUNC(svmaxnm,_f64,_m,)(pg, op1, op2);
71 }
72
test_svmaxnm_f16_x(svbool_t pg,svfloat16_t op1,svfloat16_t op2)73 svfloat16_t test_svmaxnm_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
74 {
75 // CHECK-LABEL: test_svmaxnm_f16_x
76 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
77 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
78 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
79 return SVE_ACLE_FUNC(svmaxnm,_f16,_x,)(pg, op1, op2);
80 }
81
test_svmaxnm_f32_x(svbool_t pg,svfloat32_t op1,svfloat32_t op2)82 svfloat32_t test_svmaxnm_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
83 {
84 // CHECK-LABEL: test_svmaxnm_f32_x
85 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
86 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
87 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
88 return SVE_ACLE_FUNC(svmaxnm,_f32,_x,)(pg, op1, op2);
89 }
90
test_svmaxnm_f64_x(svbool_t pg,svfloat64_t op1,svfloat64_t op2)91 svfloat64_t test_svmaxnm_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
92 {
93 // CHECK-LABEL: test_svmaxnm_f64_x
94 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
95 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
96 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
97 return SVE_ACLE_FUNC(svmaxnm,_f64,_x,)(pg, op1, op2);
98 }
99
test_svmaxnm_n_f16_z(svbool_t pg,svfloat16_t op1,float16_t op2)100 svfloat16_t test_svmaxnm_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2)
101 {
102 // CHECK-LABEL: test_svmaxnm_n_f16_z
103 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
104 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
105 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %[[DUP]])
106 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
107 return SVE_ACLE_FUNC(svmaxnm,_n_f16,_z,)(pg, op1, op2);
108 }
109
test_svmaxnm_n_f32_z(svbool_t pg,svfloat32_t op1,float32_t op2)110 svfloat32_t test_svmaxnm_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2)
111 {
112 // CHECK-LABEL: test_svmaxnm_n_f32_z
113 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
114 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
115 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
116 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %[[DUP]])
117 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
118 return SVE_ACLE_FUNC(svmaxnm,_n_f32,_z,)(pg, op1, op2);
119 }
120
test_svmaxnm_n_f64_z(svbool_t pg,svfloat64_t op1,float64_t op2)121 svfloat64_t test_svmaxnm_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2)
122 {
123 // CHECK-LABEL: test_svmaxnm_n_f64_z
124 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
125 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
126 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
127 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %[[DUP]])
128 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
129 return SVE_ACLE_FUNC(svmaxnm,_n_f64,_z,)(pg, op1, op2);
130 }
131
test_svmaxnm_n_f16_m(svbool_t pg,svfloat16_t op1,float16_t op2)132 svfloat16_t test_svmaxnm_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2)
133 {
134 // CHECK-LABEL: test_svmaxnm_n_f16_m
135 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
136 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
137 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
138 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
139 return SVE_ACLE_FUNC(svmaxnm,_n_f16,_m,)(pg, op1, op2);
140 }
141
test_svmaxnm_n_f32_m(svbool_t pg,svfloat32_t op1,float32_t op2)142 svfloat32_t test_svmaxnm_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2)
143 {
144 // CHECK-LABEL: test_svmaxnm_n_f32_m
145 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
146 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
147 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
148 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
149 return SVE_ACLE_FUNC(svmaxnm,_n_f32,_m,)(pg, op1, op2);
150 }
151
test_svmaxnm_n_f64_m(svbool_t pg,svfloat64_t op1,float64_t op2)152 svfloat64_t test_svmaxnm_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2)
153 {
154 // CHECK-LABEL: test_svmaxnm_n_f64_m
155 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
156 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
157 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
158 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
159 return SVE_ACLE_FUNC(svmaxnm,_n_f64,_m,)(pg, op1, op2);
160 }
161
test_svmaxnm_n_f16_x(svbool_t pg,svfloat16_t op1,float16_t op2)162 svfloat16_t test_svmaxnm_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2)
163 {
164 // CHECK-LABEL: test_svmaxnm_n_f16_x
165 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
166 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
167 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
168 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
169 return SVE_ACLE_FUNC(svmaxnm,_n_f16,_x,)(pg, op1, op2);
170 }
171
test_svmaxnm_n_f32_x(svbool_t pg,svfloat32_t op1,float32_t op2)172 svfloat32_t test_svmaxnm_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2)
173 {
174 // CHECK-LABEL: test_svmaxnm_n_f32_x
175 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
176 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
177 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
178 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
179 return SVE_ACLE_FUNC(svmaxnm,_n_f32,_x,)(pg, op1, op2);
180 }
181
test_svmaxnm_n_f64_x(svbool_t pg,svfloat64_t op1,float64_t op2)182 svfloat64_t test_svmaxnm_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2)
183 {
184 // CHECK-LABEL: test_svmaxnm_n_f64_x
185 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
186 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
187 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
188 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
189 return SVE_ACLE_FUNC(svmaxnm,_n_f64,_x,)(pg, op1, op2);
190 }
191