1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s 3 4; shift left 5 6define i32 @and_signbit_select_shl(i32 %x, i1 %cond, i32* %dst) { 7; CHECK-LABEL: and_signbit_select_shl: 8; CHECK: // %bb.0: 9; CHECK-NEXT: and w8, w0, #0xff0000 10; CHECK-NEXT: tst w1, #0x1 11; CHECK-NEXT: csel w8, w8, w0, ne 12; CHECK-NEXT: lsl w0, w8, #8 13; CHECK-NEXT: str w0, [x2] 14; CHECK-NEXT: ret 15 %t0 = and i32 %x, 4294901760 ; 0xFFFF0000 16 %t1 = select i1 %cond, i32 %t0, i32 %x 17 %r = shl i32 %t1, 8 18 store i32 %r, i32* %dst 19 ret i32 %r 20} 21define i32 @and_nosignbit_select_shl(i32 %x, i1 %cond, i32* %dst) { 22; CHECK-LABEL: and_nosignbit_select_shl: 23; CHECK: // %bb.0: 24; CHECK-NEXT: and w8, w0, #0xff0000 25; CHECK-NEXT: tst w1, #0x1 26; CHECK-NEXT: csel w8, w8, w0, ne 27; CHECK-NEXT: lsl w0, w8, #8 28; CHECK-NEXT: str w0, [x2] 29; CHECK-NEXT: ret 30 %t0 = and i32 %x, 2147418112 ; 0x7FFF0000 31 %t1 = select i1 %cond, i32 %t0, i32 %x 32 %r = shl i32 %t1, 8 33 store i32 %r, i32* %dst 34 ret i32 %r 35} 36 37define i32 @or_signbit_select_shl(i32 %x, i1 %cond, i32* %dst) { 38; CHECK-LABEL: or_signbit_select_shl: 39; CHECK: // %bb.0: 40; CHECK-NEXT: orr w8, w0, #0xff0000 41; CHECK-NEXT: tst w1, #0x1 42; CHECK-NEXT: csel w8, w8, w0, ne 43; CHECK-NEXT: lsl w0, w8, #8 44; CHECK-NEXT: str w0, [x2] 45; CHECK-NEXT: ret 46 %t0 = or i32 %x, 4294901760 ; 0xFFFF0000 47 %t1 = select i1 %cond, i32 %t0, i32 %x 48 %r = shl i32 %t1, 8 49 store i32 %r, i32* %dst 50 ret i32 %r 51} 52define i32 @or_nosignbit_select_shl(i32 %x, i1 %cond, i32* %dst) { 53; CHECK-LABEL: or_nosignbit_select_shl: 54; CHECK: // %bb.0: 55; CHECK-NEXT: orr w8, w0, #0xff0000 56; CHECK-NEXT: tst w1, #0x1 57; CHECK-NEXT: csel w8, w8, w0, ne 58; CHECK-NEXT: lsl w0, w8, #8 59; CHECK-NEXT: str w0, [x2] 60; CHECK-NEXT: ret 61 %t0 = or i32 %x, 2147418112 ; 0x7FFF0000 62 %t1 = select i1 %cond, i32 %t0, i32 %x 63 %r = shl i32 %t1, 8 64 store i32 %r, i32* %dst 65 ret i32 %r 66} 67 68define i32 @xor_signbit_select_shl(i32 %x, i1 %cond, i32* %dst) { 69; CHECK-LABEL: xor_signbit_select_shl: 70; CHECK: // %bb.0: 71; CHECK-NEXT: eor w8, w0, #0xff0000 72; CHECK-NEXT: tst w1, #0x1 73; CHECK-NEXT: csel w8, w8, w0, ne 74; CHECK-NEXT: lsl w0, w8, #8 75; CHECK-NEXT: str w0, [x2] 76; CHECK-NEXT: ret 77 %t0 = xor i32 %x, 4294901760 ; 0xFFFF0000 78 %t1 = select i1 %cond, i32 %t0, i32 %x 79 %r = shl i32 %t1, 8 80 store i32 %r, i32* %dst 81 ret i32 %r 82} 83define i32 @xor_nosignbit_select_shl(i32 %x, i1 %cond, i32* %dst) { 84; CHECK-LABEL: xor_nosignbit_select_shl: 85; CHECK: // %bb.0: 86; CHECK-NEXT: eor w8, w0, #0xff0000 87; CHECK-NEXT: tst w1, #0x1 88; CHECK-NEXT: csel w8, w8, w0, ne 89; CHECK-NEXT: lsl w0, w8, #8 90; CHECK-NEXT: str w0, [x2] 91; CHECK-NEXT: ret 92 %t0 = xor i32 %x, 2147418112 ; 0x7FFF0000 93 %t1 = select i1 %cond, i32 %t0, i32 %x 94 %r = shl i32 %t1, 8 95 store i32 %r, i32* %dst 96 ret i32 %r 97} 98 99define i32 @add_signbit_select_shl(i32 %x, i1 %cond, i32* %dst) { 100; CHECK-LABEL: add_signbit_select_shl: 101; CHECK: // %bb.0: 102; CHECK-NEXT: sub w8, w0, #16, lsl #12 // =65536 103; CHECK-NEXT: tst w1, #0x1 104; CHECK-NEXT: csel w8, w8, w0, ne 105; CHECK-NEXT: lsl w0, w8, #8 106; CHECK-NEXT: str w0, [x2] 107; CHECK-NEXT: ret 108 %t0 = add i32 %x, 4294901760 ; 0xFFFF0000 109 %t1 = select i1 %cond, i32 %t0, i32 %x 110 %r = shl i32 %t1, 8 111 store i32 %r, i32* %dst 112 ret i32 %r 113} 114define i32 @add_nosignbit_select_shl(i32 %x, i1 %cond, i32* %dst) { 115; CHECK-LABEL: add_nosignbit_select_shl: 116; CHECK: // %bb.0: 117; CHECK-NEXT: mov w8, #2147418112 118; CHECK-NEXT: add w8, w0, w8 119; CHECK-NEXT: tst w1, #0x1 120; CHECK-NEXT: csel w8, w8, w0, ne 121; CHECK-NEXT: lsl w0, w8, #8 122; CHECK-NEXT: str w0, [x2] 123; CHECK-NEXT: ret 124 %t0 = add i32 %x, 2147418112 ; 0x7FFF0000 125 %t1 = select i1 %cond, i32 %t0, i32 %x 126 %r = shl i32 %t1, 8 127 store i32 %r, i32* %dst 128 ret i32 %r 129} 130 131; logical shift right 132 133define i32 @and_signbit_select_lshr(i32 %x, i1 %cond, i32* %dst) { 134; CHECK-LABEL: and_signbit_select_lshr: 135; CHECK: // %bb.0: 136; CHECK-NEXT: and w8, w0, #0xffff0000 137; CHECK-NEXT: tst w1, #0x1 138; CHECK-NEXT: csel w8, w8, w0, ne 139; CHECK-NEXT: lsr w0, w8, #8 140; CHECK-NEXT: str w0, [x2] 141; CHECK-NEXT: ret 142 %t0 = and i32 %x, 4294901760 ; 0xFFFF0000 143 %t1 = select i1 %cond, i32 %t0, i32 %x 144 %r = lshr i32 %t1, 8 145 store i32 %r, i32* %dst 146 ret i32 %r 147} 148define i32 @and_nosignbit_select_lshr(i32 %x, i1 %cond, i32* %dst) { 149; CHECK-LABEL: and_nosignbit_select_lshr: 150; CHECK: // %bb.0: 151; CHECK-NEXT: and w8, w0, #0x7fff0000 152; CHECK-NEXT: tst w1, #0x1 153; CHECK-NEXT: csel w8, w8, w0, ne 154; CHECK-NEXT: lsr w0, w8, #8 155; CHECK-NEXT: str w0, [x2] 156; CHECK-NEXT: ret 157 %t0 = and i32 %x, 2147418112 ; 0x7FFF0000 158 %t1 = select i1 %cond, i32 %t0, i32 %x 159 %r = lshr i32 %t1, 8 160 store i32 %r, i32* %dst 161 ret i32 %r 162} 163 164define i32 @or_signbit_select_lshr(i32 %x, i1 %cond, i32* %dst) { 165; CHECK-LABEL: or_signbit_select_lshr: 166; CHECK: // %bb.0: 167; CHECK-NEXT: orr w8, w0, #0xffff0000 168; CHECK-NEXT: tst w1, #0x1 169; CHECK-NEXT: csel w8, w8, w0, ne 170; CHECK-NEXT: lsr w0, w8, #8 171; CHECK-NEXT: str w0, [x2] 172; CHECK-NEXT: ret 173 %t0 = or i32 %x, 4294901760 ; 0xFFFF0000 174 %t1 = select i1 %cond, i32 %t0, i32 %x 175 %r = lshr i32 %t1, 8 176 store i32 %r, i32* %dst 177 ret i32 %r 178} 179define i32 @or_nosignbit_select_lshr(i32 %x, i1 %cond, i32* %dst) { 180; CHECK-LABEL: or_nosignbit_select_lshr: 181; CHECK: // %bb.0: 182; CHECK-NEXT: orr w8, w0, #0x7fff0000 183; CHECK-NEXT: tst w1, #0x1 184; CHECK-NEXT: csel w8, w8, w0, ne 185; CHECK-NEXT: lsr w0, w8, #8 186; CHECK-NEXT: str w0, [x2] 187; CHECK-NEXT: ret 188 %t0 = or i32 %x, 2147418112 ; 0x7FFF0000 189 %t1 = select i1 %cond, i32 %t0, i32 %x 190 %r = lshr i32 %t1, 8 191 store i32 %r, i32* %dst 192 ret i32 %r 193} 194 195define i32 @xor_signbit_select_lshr(i32 %x, i1 %cond, i32* %dst) { 196; CHECK-LABEL: xor_signbit_select_lshr: 197; CHECK: // %bb.0: 198; CHECK-NEXT: eor w8, w0, #0xffff0000 199; CHECK-NEXT: tst w1, #0x1 200; CHECK-NEXT: csel w8, w8, w0, ne 201; CHECK-NEXT: lsr w0, w8, #8 202; CHECK-NEXT: str w0, [x2] 203; CHECK-NEXT: ret 204 %t0 = xor i32 %x, 4294901760 ; 0xFFFF0000 205 %t1 = select i1 %cond, i32 %t0, i32 %x 206 %r = lshr i32 %t1, 8 207 store i32 %r, i32* %dst 208 ret i32 %r 209} 210define i32 @xor_nosignbit_select_lshr(i32 %x, i1 %cond, i32* %dst) { 211; CHECK-LABEL: xor_nosignbit_select_lshr: 212; CHECK: // %bb.0: 213; CHECK-NEXT: eor w8, w0, #0x7fff0000 214; CHECK-NEXT: tst w1, #0x1 215; CHECK-NEXT: csel w8, w8, w0, ne 216; CHECK-NEXT: lsr w0, w8, #8 217; CHECK-NEXT: str w0, [x2] 218; CHECK-NEXT: ret 219 %t0 = xor i32 %x, 2147418112 ; 0x7FFF0000 220 %t1 = select i1 %cond, i32 %t0, i32 %x 221 %r = lshr i32 %t1, 8 222 store i32 %r, i32* %dst 223 ret i32 %r 224} 225 226define i32 @add_signbit_select_lshr(i32 %x, i1 %cond, i32* %dst) { 227; CHECK-LABEL: add_signbit_select_lshr: 228; CHECK: // %bb.0: 229; CHECK-NEXT: sub w8, w0, #16, lsl #12 // =65536 230; CHECK-NEXT: tst w1, #0x1 231; CHECK-NEXT: csel w8, w8, w0, ne 232; CHECK-NEXT: lsr w0, w8, #8 233; CHECK-NEXT: str w0, [x2] 234; CHECK-NEXT: ret 235 %t0 = add i32 %x, 4294901760 ; 0xFFFF0000 236 %t1 = select i1 %cond, i32 %t0, i32 %x 237 %r = lshr i32 %t1, 8 238 store i32 %r, i32* %dst 239 ret i32 %r 240} 241define i32 @add_nosignbit_select_lshr(i32 %x, i1 %cond, i32* %dst) { 242; CHECK-LABEL: add_nosignbit_select_lshr: 243; CHECK: // %bb.0: 244; CHECK-NEXT: mov w8, #2147418112 245; CHECK-NEXT: add w8, w0, w8 246; CHECK-NEXT: tst w1, #0x1 247; CHECK-NEXT: csel w8, w8, w0, ne 248; CHECK-NEXT: lsr w0, w8, #8 249; CHECK-NEXT: str w0, [x2] 250; CHECK-NEXT: ret 251 %t0 = add i32 %x, 2147418112 ; 0x7FFF0000 252 %t1 = select i1 %cond, i32 %t0, i32 %x 253 %r = lshr i32 %t1, 8 254 store i32 %r, i32* %dst 255 ret i32 %r 256} 257 258; arithmetic shift right 259 260define i32 @and_signbit_select_ashr(i32 %x, i1 %cond, i32* %dst) { 261; CHECK-LABEL: and_signbit_select_ashr: 262; CHECK: // %bb.0: 263; CHECK-NEXT: and w8, w0, #0xffff0000 264; CHECK-NEXT: tst w1, #0x1 265; CHECK-NEXT: csel w8, w8, w0, ne 266; CHECK-NEXT: asr w0, w8, #8 267; CHECK-NEXT: str w0, [x2] 268; CHECK-NEXT: ret 269 %t0 = and i32 %x, 4294901760 ; 0xFFFF0000 270 %t1 = select i1 %cond, i32 %t0, i32 %x 271 %r = ashr i32 %t1, 8 272 store i32 %r, i32* %dst 273 ret i32 %r 274} 275define i32 @and_nosignbit_select_ashr(i32 %x, i1 %cond, i32* %dst) { 276; CHECK-LABEL: and_nosignbit_select_ashr: 277; CHECK: // %bb.0: 278; CHECK-NEXT: and w8, w0, #0x7fff0000 279; CHECK-NEXT: tst w1, #0x1 280; CHECK-NEXT: csel w8, w8, w0, ne 281; CHECK-NEXT: asr w0, w8, #8 282; CHECK-NEXT: str w0, [x2] 283; CHECK-NEXT: ret 284 %t0 = and i32 %x, 2147418112 ; 0x7FFF0000 285 %t1 = select i1 %cond, i32 %t0, i32 %x 286 %r = ashr i32 %t1, 8 287 store i32 %r, i32* %dst 288 ret i32 %r 289} 290 291define i32 @or_signbit_select_ashr(i32 %x, i1 %cond, i32* %dst) { 292; CHECK-LABEL: or_signbit_select_ashr: 293; CHECK: // %bb.0: 294; CHECK-NEXT: orr w8, w0, #0xffff0000 295; CHECK-NEXT: tst w1, #0x1 296; CHECK-NEXT: csel w8, w8, w0, ne 297; CHECK-NEXT: asr w0, w8, #8 298; CHECK-NEXT: str w0, [x2] 299; CHECK-NEXT: ret 300 %t0 = or i32 %x, 4294901760 ; 0xFFFF0000 301 %t1 = select i1 %cond, i32 %t0, i32 %x 302 %r = ashr i32 %t1, 8 303 store i32 %r, i32* %dst 304 ret i32 %r 305} 306define i32 @or_nosignbit_select_ashr(i32 %x, i1 %cond, i32* %dst) { 307; CHECK-LABEL: or_nosignbit_select_ashr: 308; CHECK: // %bb.0: 309; CHECK-NEXT: orr w8, w0, #0x7fff0000 310; CHECK-NEXT: tst w1, #0x1 311; CHECK-NEXT: csel w8, w8, w0, ne 312; CHECK-NEXT: asr w0, w8, #8 313; CHECK-NEXT: str w0, [x2] 314; CHECK-NEXT: ret 315 %t0 = or i32 %x, 2147418112 ; 0x7FFF0000 316 %t1 = select i1 %cond, i32 %t0, i32 %x 317 %r = ashr i32 %t1, 8 318 store i32 %r, i32* %dst 319 ret i32 %r 320} 321 322define i32 @xor_signbit_select_ashr(i32 %x, i1 %cond, i32* %dst) { 323; CHECK-LABEL: xor_signbit_select_ashr: 324; CHECK: // %bb.0: 325; CHECK-NEXT: eor w8, w0, #0xffff0000 326; CHECK-NEXT: tst w1, #0x1 327; CHECK-NEXT: csel w8, w8, w0, ne 328; CHECK-NEXT: asr w0, w8, #8 329; CHECK-NEXT: str w0, [x2] 330; CHECK-NEXT: ret 331 %t0 = xor i32 %x, 4294901760 ; 0xFFFF0000 332 %t1 = select i1 %cond, i32 %t0, i32 %x 333 %r = ashr i32 %t1, 8 334 store i32 %r, i32* %dst 335 ret i32 %r 336} 337define i32 @xor_nosignbit_select_ashr(i32 %x, i1 %cond, i32* %dst) { 338; CHECK-LABEL: xor_nosignbit_select_ashr: 339; CHECK: // %bb.0: 340; CHECK-NEXT: eor w8, w0, #0x7fff0000 341; CHECK-NEXT: tst w1, #0x1 342; CHECK-NEXT: csel w8, w8, w0, ne 343; CHECK-NEXT: asr w0, w8, #8 344; CHECK-NEXT: str w0, [x2] 345; CHECK-NEXT: ret 346 %t0 = xor i32 %x, 2147418112 ; 0x7FFF0000 347 %t1 = select i1 %cond, i32 %t0, i32 %x 348 %r = ashr i32 %t1, 8 349 store i32 %r, i32* %dst 350 ret i32 %r 351} 352 353define i32 @add_signbit_select_ashr(i32 %x, i1 %cond, i32* %dst) { 354; CHECK-LABEL: add_signbit_select_ashr: 355; CHECK: // %bb.0: 356; CHECK-NEXT: sub w8, w0, #16, lsl #12 // =65536 357; CHECK-NEXT: tst w1, #0x1 358; CHECK-NEXT: csel w8, w8, w0, ne 359; CHECK-NEXT: asr w0, w8, #8 360; CHECK-NEXT: str w0, [x2] 361; CHECK-NEXT: ret 362 %t0 = add i32 %x, 4294901760 ; 0xFFFF0000 363 %t1 = select i1 %cond, i32 %t0, i32 %x 364 %r = ashr i32 %t1, 8 365 store i32 %r, i32* %dst 366 ret i32 %r 367} 368define i32 @add_nosignbit_select_ashr(i32 %x, i1 %cond, i32* %dst) { 369; CHECK-LABEL: add_nosignbit_select_ashr: 370; CHECK: // %bb.0: 371; CHECK-NEXT: mov w8, #2147418112 372; CHECK-NEXT: add w8, w0, w8 373; CHECK-NEXT: tst w1, #0x1 374; CHECK-NEXT: csel w8, w8, w0, ne 375; CHECK-NEXT: asr w0, w8, #8 376; CHECK-NEXT: str w0, [x2] 377; CHECK-NEXT: ret 378 %t0 = add i32 %x, 2147418112 ; 0x7FFF0000 379 %t1 = select i1 %cond, i32 %t0, i32 %x 380 %r = ashr i32 %t1, 8 381 store i32 %r, i32* %dst 382 ret i32 %r 383} 384