1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
3# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
4
5---
6name: and_s32_ss
7legalized: true
8
9body: |
10  bb.0:
11    liveins: $sgpr0, $sgpr1
12    ; CHECK-LABEL: name: and_s32_ss
13    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
14    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
15    ; CHECK: [[AND:%[0-9]+]]:sgpr(s32) = G_AND [[COPY]], [[COPY1]]
16    %0:_(s32) = COPY $sgpr0
17    %1:_(s32) = COPY $sgpr1
18    %2:_(s32) = G_AND %0, %1
19...
20
21---
22name: and_s32_sv
23legalized: true
24
25body: |
26  bb.0:
27    liveins: $sgpr0, $vgpr0
28    ; CHECK-LABEL: name: and_s32_sv
29    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
30    ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
31    ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
32    ; CHECK: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[COPY2]], [[COPY1]]
33    %0:_(s32) = COPY $sgpr0
34    %1:_(s32) = COPY $vgpr0
35    %2:_(s32) = G_AND %0, %1
36...
37
38---
39name: and_s32_vs
40legalized: true
41
42body: |
43  bb.0:
44    liveins: $sgpr0, $vgpr0
45    ; CHECK-LABEL: name: and_s32_vs
46    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
47    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
48    ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
49    ; CHECK: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[COPY]], [[COPY2]]
50    %0:_(s32) = COPY $vgpr0
51    %1:_(s32) = COPY $sgpr0
52    %2:_(s32) = G_AND %0, %1
53...
54
55---
56name: and_s32_vv
57legalized: true
58
59body: |
60  bb.0:
61    liveins: $vgpr0, $vgpr1
62    ; CHECK-LABEL: name: and_s32_vv
63    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
64    ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
65    ; CHECK: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[COPY]], [[COPY1]]
66    %0:_(s32) = COPY $vgpr0
67    %1:_(s32) = COPY $vgpr1
68    %2:_(s32) = G_AND %0, %1
69...
70
71---
72name: and_s64_ss
73legalized: true
74
75body: |
76  bb.0:
77    liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
78    ; CHECK-LABEL: name: and_s64_ss
79    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
80    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s64) = COPY $sgpr2_sgpr3
81    ; CHECK: [[AND:%[0-9]+]]:sgpr(s64) = G_AND [[COPY]], [[COPY1]]
82    %0:_(s64) = COPY $sgpr0_sgpr1
83    %1:_(s64) = COPY $sgpr2_sgpr3
84    %2:_(s64) = G_AND %0, %1
85...
86
87---
88name: and_s64_sv
89legalized: true
90
91body: |
92  bb.0:
93    liveins: $sgpr0_sgpr1, $vgpr0_vgpr1
94    ; CHECK-LABEL: name: and_s64_sv
95    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
96    ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
97    ; CHECK: [[UV:%[0-9]+]]:sgpr(s32), [[UV1:%[0-9]+]]:sgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)
98    ; CHECK: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY1]](s64)
99    ; CHECK: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UV]], [[UV2]]
100    ; CHECK: [[AND1:%[0-9]+]]:vgpr(s32) = G_AND [[UV1]], [[UV3]]
101    ; CHECK: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[AND]](s32), [[AND1]](s32)
102    %0:_(s64) = COPY $sgpr0_sgpr1
103    %1:_(s64) = COPY $vgpr0_vgpr1
104    %2:_(s64) = G_AND %0, %1
105...
106
107---
108name: and_s64_vs
109legalized: true
110
111body: |
112  bb.0:
113    liveins: $sgpr0_sgpr1, $vgpr0_vgpr1
114    ; CHECK-LABEL: name: and_s64_vs
115    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
116    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
117    ; CHECK: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)
118    ; CHECK: [[UV2:%[0-9]+]]:sgpr(s32), [[UV3:%[0-9]+]]:sgpr(s32) = G_UNMERGE_VALUES [[COPY1]](s64)
119    ; CHECK: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UV]], [[UV2]]
120    ; CHECK: [[AND1:%[0-9]+]]:vgpr(s32) = G_AND [[UV1]], [[UV3]]
121    ; CHECK: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[AND]](s32), [[AND1]](s32)
122    %0:_(s64) = COPY $vgpr0_vgpr1
123    %1:_(s64) = COPY $sgpr0_sgpr1
124    %2:_(s64) = G_AND %0, %1
125...
126
127---
128name: and_s64_vv
129legalized: true
130
131body: |
132  bb.0:
133    liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
134    ; CHECK-LABEL: name: and_s64_vv
135    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
136    ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr2_vgpr3
137    ; CHECK: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)
138    ; CHECK: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY1]](s64)
139    ; CHECK: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UV]], [[UV2]]
140    ; CHECK: [[AND1:%[0-9]+]]:vgpr(s32) = G_AND [[UV1]], [[UV3]]
141    ; CHECK: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[AND]](s32), [[AND1]](s32)
142    %0:_(s64) = COPY $vgpr0_vgpr1
143    %1:_(s64) = COPY $vgpr2_vgpr3
144    %2:_(s64) = G_AND %0, %1
145...
146
147---
148name: and_s64_vv_user
149legalized: true
150
151body: |
152  bb.0:
153    liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
154    ; CHECK-LABEL: name: and_s64_vv_user
155    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
156    ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr2_vgpr3
157    ; CHECK: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)
158    ; CHECK: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY1]](s64)
159    ; CHECK: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UV]], [[UV2]]
160    ; CHECK: [[AND1:%[0-9]+]]:vgpr(s32) = G_AND [[UV1]], [[UV3]]
161    ; CHECK: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[AND]](s32), [[AND1]](s32)
162    ; CHECK: S_NOP 0, implicit [[MV]](s64)
163    %0:_(s64) = COPY $vgpr0_vgpr1
164    %1:_(s64) = COPY $vgpr2_vgpr3
165    %2:_(s64) = G_AND %0, %1
166    S_NOP 0, implicit %2
167...
168---
169name: and_s64_ss_ss_merge
170legalized: true
171
172body: |
173  bb.0:
174    liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3
175    ; CHECK-LABEL: name: and_s64_ss_ss_merge
176    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
177    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
178    ; CHECK: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2
179    ; CHECK: [[COPY3:%[0-9]+]]:sgpr(s32) = COPY $sgpr3
180    ; CHECK: [[MV:%[0-9]+]]:sgpr(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
181    ; CHECK: [[MV1:%[0-9]+]]:sgpr(s64) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
182    ; CHECK: [[AND:%[0-9]+]]:sgpr(s64) = G_AND [[MV]], [[MV1]]
183    ; CHECK: S_NOP 0, implicit [[AND]](s64)
184    %0:_(s32) = COPY $sgpr0
185    %1:_(s32) = COPY $sgpr1
186    %2:_(s32) = COPY $sgpr2
187    %3:_(s32) = COPY $sgpr3
188    %4:_(s64) = G_MERGE_VALUES %0, %1
189    %5:_(s64) = G_MERGE_VALUES %2, %3
190    %6:_(s64) = G_AND %4, %5
191    S_NOP 0, implicit %6
192...
193
194---
195name: and_s64_vv_vv_merge
196legalized: true
197
198body: |
199  bb.0:
200    liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
201    ; CHECK-LABEL: name: and_s64_vv_vv_merge
202    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
203    ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
204    ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr2
205    ; CHECK: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY $vgpr3
206    ; CHECK: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
207    ; CHECK: [[MV1:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
208    ; CHECK: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[MV]](s64)
209    ; CHECK: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[MV1]](s64)
210    ; CHECK: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UV]], [[UV2]]
211    ; CHECK: [[AND1:%[0-9]+]]:vgpr(s32) = G_AND [[UV1]], [[UV3]]
212    ; CHECK: [[MV2:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[AND]](s32), [[AND1]](s32)
213    ; CHECK: S_NOP 0, implicit [[MV2]](s64)
214    %0:_(s32) = COPY $vgpr0
215    %1:_(s32) = COPY $vgpr1
216    %2:_(s32) = COPY $vgpr2
217    %3:_(s32) = COPY $vgpr3
218    %4:_(s64) = G_MERGE_VALUES %0, %1
219    %5:_(s64) = G_MERGE_VALUES %2, %3
220    %6:_(s64) = G_AND %4, %5
221    S_NOP 0, implicit %6
222...
223
224---
225name: and_s64_s_sv_merge
226legalized: true
227
228body: |
229  bb.0:
230    liveins: $sgpr0_sgpr1, $sgpr2, $vgpr0
231    ; CHECK-LABEL: name: and_s64_s_sv_merge
232    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
233    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr2
234    ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
235    ; CHECK: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
236    ; CHECK: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[COPY3]](s32), [[COPY2]](s32)
237    ; CHECK: [[UV:%[0-9]+]]:sgpr(s32), [[UV1:%[0-9]+]]:sgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)
238    ; CHECK: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[MV]](s64)
239    ; CHECK: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UV]], [[UV2]]
240    ; CHECK: [[AND1:%[0-9]+]]:vgpr(s32) = G_AND [[UV1]], [[UV3]]
241    ; CHECK: [[MV1:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[AND]](s32), [[AND1]](s32)
242    ; CHECK: S_NOP 0, implicit [[MV1]](s64)
243    %0:_(s64) = COPY $sgpr0_sgpr1
244    %1:_(s32) = COPY $sgpr2
245    %2:_(s32) = COPY $vgpr0
246    %3:_(s64) = G_MERGE_VALUES %1, %2
247    %4:_(s64) = G_AND %0, %3
248    S_NOP 0, implicit %4
249...
250
251---
252name: and_s64_s_vs_merge
253legalized: true
254
255body: |
256  bb.0:
257    liveins: $sgpr0_sgpr1, $sgpr2, $vgpr0
258    ; CHECK-LABEL: name: and_s64_s_vs_merge
259    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
260    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr2
261    ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
262    ; CHECK: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
263    ; CHECK: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
264    ; CHECK: [[UV:%[0-9]+]]:sgpr(s32), [[UV1:%[0-9]+]]:sgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)
265    ; CHECK: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[MV]](s64)
266    ; CHECK: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UV]], [[UV2]]
267    ; CHECK: [[AND1:%[0-9]+]]:vgpr(s32) = G_AND [[UV1]], [[UV3]]
268    ; CHECK: [[MV1:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[AND]](s32), [[AND1]](s32)
269    ; CHECK: S_NOP 0, implicit [[MV1]](s64)
270    %0:_(s64) = COPY $sgpr0_sgpr1
271    %1:_(s32) = COPY $sgpr2
272    %2:_(s32) = COPY $vgpr0
273    %3:_(s64) = G_MERGE_VALUES %2, %1
274    %4:_(s64) = G_AND %0, %3
275    S_NOP 0, implicit %4
276...
277
278---
279name: and_s64_sv_sv_merge
280legalized: true
281
282body: |
283  bb.0:
284    liveins: $sgpr0, $sgpr1, $vgpr0, $vgpr1
285    ; CHECK-LABEL: name: and_s64_sv_sv_merge
286    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
287    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
288    ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
289    ; CHECK: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
290    ; CHECK: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
291    ; CHECK: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[COPY4]](s32), [[COPY2]](s32)
292    ; CHECK: [[COPY5:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
293    ; CHECK: [[MV1:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[COPY5]](s32), [[COPY3]](s32)
294    ; CHECK: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[MV]](s64)
295    ; CHECK: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[MV1]](s64)
296    ; CHECK: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UV]], [[UV2]]
297    ; CHECK: [[AND1:%[0-9]+]]:vgpr(s32) = G_AND [[UV1]], [[UV3]]
298    ; CHECK: [[MV2:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[AND]](s32), [[AND1]](s32)
299    ; CHECK: S_NOP 0, implicit [[MV2]](s64)
300    %0:_(s32) = COPY $sgpr0
301    %1:_(s32) = COPY $sgpr1
302    %2:_(s32) = COPY $vgpr0
303    %3:_(s32) = COPY $vgpr1
304    %4:_(s64) = G_MERGE_VALUES %0, %2
305    %5:_(s64) = G_MERGE_VALUES %1, %3
306    %6:_(s64) = G_AND %4, %5
307    S_NOP 0, implicit %6
308...
309
310---
311name: and_s64_sv_vs_merge
312legalized: true
313
314body: |
315  bb.0:
316    liveins: $sgpr0, $sgpr1, $vgpr0, $vgpr1
317    ; CHECK-LABEL: name: and_s64_sv_vs_merge
318    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
319    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
320    ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
321    ; CHECK: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
322    ; CHECK: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
323    ; CHECK: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[COPY4]](s32), [[COPY2]](s32)
324    ; CHECK: [[COPY5:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
325    ; CHECK: [[MV1:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[COPY3]](s32), [[COPY5]](s32)
326    ; CHECK: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[MV]](s64)
327    ; CHECK: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[MV1]](s64)
328    ; CHECK: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UV]], [[UV2]]
329    ; CHECK: [[AND1:%[0-9]+]]:vgpr(s32) = G_AND [[UV1]], [[UV3]]
330    ; CHECK: [[MV2:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[AND]](s32), [[AND1]](s32)
331    ; CHECK: S_NOP 0, implicit [[MV2]](s64)
332    %0:_(s32) = COPY $sgpr0
333    %1:_(s32) = COPY $sgpr1
334    %2:_(s32) = COPY $vgpr0
335    %3:_(s32) = COPY $vgpr1
336    %4:_(s64) = G_MERGE_VALUES %0, %2
337    %5:_(s64) = G_MERGE_VALUES %3, %1
338    %6:_(s64) = G_AND %4, %5
339    S_NOP 0, implicit %6
340...
341
342---
343name: and_chain_s64_sv
344legalized: true
345
346body: |
347  bb.0:
348    liveins: $sgpr0_sgpr1, $sgpr2_sgpr3, $vgpr0_vgpr1
349    ; CHECK-LABEL: name: and_chain_s64_sv
350    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
351    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s64) = COPY $sgpr2_sgpr3
352    ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
353    ; CHECK: [[UV:%[0-9]+]]:sgpr(s32), [[UV1:%[0-9]+]]:sgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)
354    ; CHECK: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY2]](s64)
355    ; CHECK: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UV]], [[UV2]]
356    ; CHECK: [[AND1:%[0-9]+]]:vgpr(s32) = G_AND [[UV1]], [[UV3]]
357    ; CHECK: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[AND]](s32), [[AND1]](s32)
358    ; CHECK: [[UV4:%[0-9]+]]:sgpr(s32), [[UV5:%[0-9]+]]:sgpr(s32) = G_UNMERGE_VALUES [[COPY1]](s64)
359    ; CHECK: [[UV6:%[0-9]+]]:vgpr(s32), [[UV7:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[MV]](s64)
360    ; CHECK: [[AND2:%[0-9]+]]:vgpr(s32) = G_AND [[UV4]], [[UV6]]
361    ; CHECK: [[AND3:%[0-9]+]]:vgpr(s32) = G_AND [[UV5]], [[UV7]]
362    ; CHECK: [[MV1:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[AND2]](s32), [[AND3]](s32)
363    ; CHECK: S_NOP 0, implicit [[MV1]](s64)
364    %0:_(s64) = COPY $sgpr0_sgpr1
365    %1:_(s64) = COPY $sgpr2_sgpr3
366    %2:_(s64) = COPY $vgpr0_vgpr1
367    %3:_(s64) = G_AND %0, %2
368    %4:_(s64) = G_AND %1, %3
369    S_NOP 0, implicit %4
370...
371
372---
373name: and_v2i32_ss
374legalized: true
375
376body: |
377  bb.0:
378    liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
379    ; CHECK-LABEL: name: and_v2i32_ss
380    ; CHECK: [[COPY:%[0-9]+]]:sgpr(<2 x s32>) = COPY $sgpr0_sgpr1
381    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(<2 x s32>) = COPY $sgpr2_sgpr3
382    ; CHECK: [[AND:%[0-9]+]]:sgpr(<2 x s32>) = G_AND [[COPY]], [[COPY1]]
383    ; CHECK: S_NOP 0, implicit [[AND]](<2 x s32>)
384    %0:_(<2 x s32>) = COPY $sgpr0_sgpr1
385    %1:_(<2 x s32>) = COPY $sgpr2_sgpr3
386    %2:_(<2 x s32>) = G_AND %0, %1
387    S_NOP 0, implicit %2
388...
389
390---
391name: and_v2i32_sv
392legalized: true
393
394body: |
395  bb.0:
396    liveins: $sgpr0_sgpr1, $vgpr0_vgpr1
397    ; CHECK-LABEL: name: and_v2i32_sv
398    ; CHECK: [[COPY:%[0-9]+]]:sgpr(<2 x s32>) = COPY $sgpr0_sgpr1
399    ; CHECK: [[COPY1:%[0-9]+]]:vgpr(<2 x s32>) = COPY $vgpr0_vgpr1
400    ; CHECK: [[UV:%[0-9]+]]:sgpr(s32), [[UV1:%[0-9]+]]:sgpr(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
401    ; CHECK: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)
402    ; CHECK: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UV]], [[UV2]]
403    ; CHECK: [[AND1:%[0-9]+]]:vgpr(s32) = G_AND [[UV1]], [[UV3]]
404    ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:vgpr(<2 x s32>) = G_BUILD_VECTOR [[AND]](s32), [[AND1]](s32)
405    ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<2 x s32>)
406    %0:_(<2 x s32>) = COPY $sgpr0_sgpr1
407    %1:_(<2 x s32>) = COPY $vgpr0_vgpr1
408    %2:_(<2 x s32>) = G_AND %0, %1
409    S_NOP 0, implicit %2
410...
411
412---
413name: and_v2i32_vs
414legalized: true
415
416body: |
417  bb.0:
418    liveins: $sgpr0_sgpr1, $vgpr0_vgpr1
419
420    ; CHECK-LABEL: name: and_v2i32_vs
421    ; CHECK: [[COPY:%[0-9]+]]:vgpr(<2 x s32>) = COPY $vgpr0_vgpr1
422    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(<2 x s32>) = COPY $sgpr0_sgpr1
423    ; CHECK: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
424    ; CHECK: [[UV2:%[0-9]+]]:sgpr(s32), [[UV3:%[0-9]+]]:sgpr(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)
425    ; CHECK: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UV]], [[UV2]]
426    ; CHECK: [[AND1:%[0-9]+]]:vgpr(s32) = G_AND [[UV1]], [[UV3]]
427    ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:vgpr(<2 x s32>) = G_BUILD_VECTOR [[AND]](s32), [[AND1]](s32)
428    ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<2 x s32>)
429    %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
430    %1:_(<2 x s32>) = COPY $sgpr0_sgpr1
431    %2:_(<2 x s32>) = G_AND %0, %1
432    S_NOP 0, implicit %2
433...
434
435---
436name: and_v2i32_vv
437legalized: true
438
439body: |
440  bb.0:
441    liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
442    ; CHECK-LABEL: name: and_v2i32_vv
443    ; CHECK: [[COPY:%[0-9]+]]:vgpr(<2 x s32>) = COPY $vgpr0_vgpr1
444    ; CHECK: [[COPY1:%[0-9]+]]:vgpr(<2 x s32>) = COPY $vgpr2_vgpr3
445    ; CHECK: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
446    ; CHECK: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)
447    ; CHECK: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[UV]], [[UV2]]
448    ; CHECK: [[AND1:%[0-9]+]]:vgpr(s32) = G_AND [[UV1]], [[UV3]]
449    ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:vgpr(<2 x s32>) = G_BUILD_VECTOR [[AND]](s32), [[AND1]](s32)
450    ; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<2 x s32>)
451    %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
452    %1:_(<2 x s32>) = COPY $vgpr2_vgpr3
453    %2:_(<2 x s32>) = G_AND %0, %1
454    S_NOP 0, implicit %2
455...
456
457---
458name: and_v4s16_ss
459legalized: true
460
461body: |
462  bb.0:
463    liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
464    ; CHECK-LABEL: name: and_v4s16_ss
465    ; CHECK: [[COPY:%[0-9]+]]:sgpr(<4 x s16>) = COPY $sgpr0_sgpr1
466    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(<4 x s16>) = COPY $sgpr2_sgpr3
467    ; CHECK: [[AND:%[0-9]+]]:sgpr(<4 x s16>) = G_AND [[COPY]], [[COPY1]]
468    %0:_(<4 x s16>) = COPY $sgpr0_sgpr1
469    %1:_(<4 x s16>) = COPY $sgpr2_sgpr3
470    %2:_(<4 x s16>) = G_AND %0, %1
471...
472
473---
474name: and_v4s16_sv
475legalized: true
476
477body: |
478  bb.0:
479    liveins: $sgpr0_sgpr1, $vgpr0_vgpr1
480    ; CHECK-LABEL: name: and_v4s16_sv
481    ; CHECK: [[COPY:%[0-9]+]]:sgpr(<4 x s16>) = COPY $sgpr0_sgpr1
482    ; CHECK: [[COPY1:%[0-9]+]]:vgpr(<4 x s16>) = COPY $vgpr0_vgpr1
483    ; CHECK: [[UV:%[0-9]+]]:sgpr(<2 x s16>), [[UV1:%[0-9]+]]:sgpr(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
484    ; CHECK: [[UV2:%[0-9]+]]:vgpr(<2 x s16>), [[UV3:%[0-9]+]]:vgpr(<2 x s16>) = G_UNMERGE_VALUES [[COPY1]](<4 x s16>)
485    ; CHECK: [[AND:%[0-9]+]]:vgpr(<2 x s16>) = G_AND [[UV]], [[UV2]]
486    ; CHECK: [[AND1:%[0-9]+]]:vgpr(<2 x s16>) = G_AND [[UV1]], [[UV3]]
487    ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:vgpr(<4 x s16>) = G_CONCAT_VECTORS [[AND]](<2 x s16>), [[AND1]](<2 x s16>)
488    %0:_(<4 x s16>) = COPY $sgpr0_sgpr1
489    %1:_(<4 x s16>) = COPY $vgpr0_vgpr1
490    %2:_(<4 x s16>) = G_AND %0, %1
491...
492
493---
494name: and_v4s16_vs
495legalized: true
496
497body: |
498  bb.0:
499    liveins: $sgpr0_sgpr1, $vgpr0_vgpr1
500    ; CHECK-LABEL: name: and_v4s16_vs
501    ; CHECK: [[COPY:%[0-9]+]]:vgpr(<4 x s16>) = COPY $vgpr0_vgpr1
502    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(<4 x s16>) = COPY $sgpr0_sgpr1
503    ; CHECK: [[UV:%[0-9]+]]:vgpr(<2 x s16>), [[UV1:%[0-9]+]]:vgpr(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
504    ; CHECK: [[UV2:%[0-9]+]]:sgpr(<2 x s16>), [[UV3:%[0-9]+]]:sgpr(<2 x s16>) = G_UNMERGE_VALUES [[COPY1]](<4 x s16>)
505    ; CHECK: [[AND:%[0-9]+]]:vgpr(<2 x s16>) = G_AND [[UV]], [[UV2]]
506    ; CHECK: [[AND1:%[0-9]+]]:vgpr(<2 x s16>) = G_AND [[UV1]], [[UV3]]
507    ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:vgpr(<4 x s16>) = G_CONCAT_VECTORS [[AND]](<2 x s16>), [[AND1]](<2 x s16>)
508    %0:_(<4 x s16>) = COPY $vgpr0_vgpr1
509    %1:_(<4 x s16>) = COPY $sgpr0_sgpr1
510    %2:_(<4 x s16>) = G_AND %0, %1
511...
512
513---
514name: and_v4s16_vv
515legalized: true
516
517body: |
518  bb.0:
519    liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
520    ; CHECK-LABEL: name: and_v4s16_vv
521    ; CHECK: [[COPY:%[0-9]+]]:vgpr(<4 x s16>) = COPY $vgpr0_vgpr1
522    ; CHECK: [[COPY1:%[0-9]+]]:vgpr(<4 x s16>) = COPY $vgpr2_vgpr3
523    ; CHECK: [[UV:%[0-9]+]]:vgpr(<2 x s16>), [[UV1:%[0-9]+]]:vgpr(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
524    ; CHECK: [[UV2:%[0-9]+]]:vgpr(<2 x s16>), [[UV3:%[0-9]+]]:vgpr(<2 x s16>) = G_UNMERGE_VALUES [[COPY1]](<4 x s16>)
525    ; CHECK: [[AND:%[0-9]+]]:vgpr(<2 x s16>) = G_AND [[UV]], [[UV2]]
526    ; CHECK: [[AND1:%[0-9]+]]:vgpr(<2 x s16>) = G_AND [[UV1]], [[UV3]]
527    ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:vgpr(<4 x s16>) = G_CONCAT_VECTORS [[AND]](<2 x s16>), [[AND1]](<2 x s16>)
528    %0:_(<4 x s16>) = COPY $vgpr0_vgpr1
529    %1:_(<4 x s16>) = COPY $vgpr2_vgpr3
530    %2:_(<4 x s16>) = G_AND %0, %1
531...
532
533---
534name: and_v2s16_ss
535legalized: true
536
537body: |
538  bb.0:
539    liveins: $sgpr0, $sgpr1
540    ; CHECK-LABEL: name: and_v2s16_ss
541    ; CHECK: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
542    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr1
543    ; CHECK: [[AND:%[0-9]+]]:sgpr(<2 x s16>) = G_AND [[COPY]], [[COPY1]]
544    %0:_(<2 x s16>) = COPY $sgpr0
545    %1:_(<2 x s16>) = COPY $sgpr1
546    %2:_(<2 x s16>) = G_AND %0, %1
547...
548
549---
550name: and_v2s16_sv
551legalized: true
552
553body: |
554  bb.0:
555    liveins: $sgpr0, $vgpr0
556    ; CHECK-LABEL: name: and_v2s16_sv
557    ; CHECK: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
558    ; CHECK: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
559    ; CHECK: [[COPY2:%[0-9]+]]:vgpr(<2 x s16>) = COPY [[COPY]](<2 x s16>)
560    ; CHECK: [[AND:%[0-9]+]]:vgpr(<2 x s16>) = G_AND [[COPY2]], [[COPY1]]
561    %0:_(<2 x s16>) = COPY $sgpr0
562    %1:_(<2 x s16>) = COPY $vgpr0
563    %2:_(<2 x s16>) = G_AND %0, %1
564...
565
566---
567name: and_v2s16_vs
568legalized: true
569
570body: |
571  bb.0:
572    liveins: $sgpr0, $vgpr0
573    ; CHECK-LABEL: name: and_v2s16_vs
574    ; CHECK: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
575    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
576    ; CHECK: [[COPY2:%[0-9]+]]:vgpr(<2 x s16>) = COPY [[COPY1]](<2 x s16>)
577    ; CHECK: [[AND:%[0-9]+]]:vgpr(<2 x s16>) = G_AND [[COPY]], [[COPY2]]
578    %0:_(<2 x s16>) = COPY $vgpr0
579    %1:_(<2 x s16>) = COPY $sgpr0
580    %2:_(<2 x s16>) = G_AND %0, %1
581...
582
583---
584name: and_v2s16_vv
585legalized: true
586
587body: |
588  bb.0:
589    liveins: $vgpr0, $vgpr1
590    ; CHECK-LABEL: name: and_v2s16_vv
591    ; CHECK: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
592    ; CHECK: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
593    ; CHECK: [[AND:%[0-9]+]]:vgpr(<2 x s16>) = G_AND [[COPY]], [[COPY1]]
594    %0:_(<2 x s16>) = COPY $vgpr0
595    %1:_(<2 x s16>) = COPY $vgpr1
596    %2:_(<2 x s16>) = G_AND %0, %1
597...
598
599