1# RUN: llc -march=amdgcn -amdgpu-enable-merge-m0 -verify-machineinstrs -run-pass si-fix-sgpr-copies %s -o - | FileCheck -check-prefix=GCN %s 2 3# GCN-LABEL: name: merge-m0-many-init 4# GCN: bb.0.entry: 5# GCN: SI_INIT_M0 -1 6# GCN-NEXT: IMPLICIT_DEF 7# GCN-NEXT: IMPLICIT_DEF 8# GCN-NEXT: DS_WRITE_B32 9# GCN-NEXT: DS_WRITE_B32 10# GCN-NEXT: SI_INIT_M0 65536 11# GCN-NEXT: DS_WRITE_B32 12# GCN-NEXT: DS_WRITE_B32 13# GCN-NEXT: SI_INIT_M0 -1 14# GCN-NEXT: DS_WRITE_B32 15# GCN-NEXT: SI_INIT_M0 65536 16# GCN-NEXT: DS_WRITE_B32 17 18# GCN: bb.1: 19# GCN: SI_INIT_M0 -1 20# GCN-NEXT: DS_WRITE_B32 21# GCN-NEXT: DS_WRITE_B32 22 23# GCN: bb.2: 24# GCN: SI_INIT_M0 65536 25# GCN-NEXT: DS_WRITE_B32 26 27# GCN: bb.3: 28# GCN: SI_INIT_M0 3 29 30# GCN: bb.4: 31# GCN-NOT: SI_INIT_M0 32# GCN: DS_WRITE_B32 33# GCN-NEXT: SI_INIT_M0 4 34# GCN-NEXT: DS_WRITE_B32 35 36# GCN: bb.5: 37# GCN-NOT: SI_INIT_M0 38# GCN: DS_WRITE_B32 39# GCN-NEXT: SI_INIT_M0 4 40# GCN-NEXT: DS_WRITE_B32 41 42# GCN: bb.6: 43# GCN: SI_INIT_M0 -1, 44# GCN-NEXT: DS_WRITE_B32 45# GCN: SI_INIT_M0 %2 46# GCN-NEXT: DS_WRITE_B32 47# GCN-NEXT: SI_INIT_M0 %2 48# GCN-NEXT: DS_WRITE_B32 49# GCN-NEXT: SI_INIT_M0 -1 50# GCN-NEXT: DS_WRITE_B32 51--- 52name: merge-m0-many-init 53registers: 54 - { id: 0, class: vgpr_32 } 55 - { id: 1, class: vgpr_32 } 56 - { id: 2, class: sreg_32_xm0 } 57body: | 58 bb.0.entry: 59 successors: %bb.1, %bb.2 60 61 %0 = IMPLICIT_DEF 62 %1 = IMPLICIT_DEF 63 SI_INIT_M0 -1, implicit-def $m0 64 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 65 SI_INIT_M0 -1, implicit-def $m0 66 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 67 SI_INIT_M0 65536, implicit-def $m0 68 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 69 SI_INIT_M0 65536, implicit-def $m0 70 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 71 SI_INIT_M0 -1, implicit-def $m0 72 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 73 SI_INIT_M0 65536, implicit-def $m0 74 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 75 S_CBRANCH_VCCZ %bb.1, implicit undef $vcc 76 S_BRANCH %bb.2 77 78 bb.1: 79 successors: %bb.2 80 SI_INIT_M0 -1, implicit-def $m0 81 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 82 SI_INIT_M0 -1, implicit-def $m0 83 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 84 S_BRANCH %bb.2 85 86 bb.2: 87 successors: %bb.3 88 SI_INIT_M0 65536, implicit-def $m0 89 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 90 S_BRANCH %bb.3 91 92 bb.3: 93 successors: %bb.4, %bb.5 94 S_CBRANCH_VCCZ %bb.4, implicit undef $vcc 95 S_BRANCH %bb.5 96 97 bb.4: 98 successors: %bb.6 99 SI_INIT_M0 3, implicit-def $m0 100 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 101 SI_INIT_M0 4, implicit-def $m0 102 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 103 S_BRANCH %bb.6 104 105 bb.5: 106 successors: %bb.6 107 SI_INIT_M0 3, implicit-def $m0 108 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 109 SI_INIT_M0 4, implicit-def $m0 110 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 111 S_BRANCH %bb.6 112 113 bb.6: 114 successors: %bb.0.entry, %bb.6 115 SI_INIT_M0 -1, implicit-def $m0 116 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 117 %2 = IMPLICIT_DEF 118 SI_INIT_M0 %2, implicit-def $m0 119 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 120 SI_INIT_M0 %2, implicit-def $m0 121 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 122 SI_INIT_M0 -1, implicit-def $m0 123 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 124 S_CBRANCH_VCCZ %bb.6, implicit undef $vcc 125 S_BRANCH %bb.0.entry 126 127... 128 129# GCN-LABEL: name: merge-m0-dont-hoist-past-init-with-different-initializer 130# GCN: bb.0.entry: 131# GCN: SI_INIT_M0 65536 132# GCN-NEXT: IMPLICIT_DEF 133# GCN-NEXT: IMPLICIT_DEF 134# GCN-NEXT: DS_WRITE_B32 135 136# GCN: bb.1: 137# GCN-NOT: SI_INIT_M0 65536 138# GCN-NOT: SI_INIT_M0 -1 139 140# GCN: bb.2: 141# GCN: SI_INIT_M0 -1 142 143# GCN: bb.3: 144# GCN: SI_INIT_M0 -1 145--- 146name: merge-m0-dont-hoist-past-init-with-different-initializer 147registers: 148 - { id: 0, class: vgpr_32 } 149 - { id: 1, class: vgpr_32 } 150body: | 151 bb.0.entry: 152 successors: %bb.1 153 154 %0 = IMPLICIT_DEF 155 %1 = IMPLICIT_DEF 156 SI_INIT_M0 65536, implicit-def $m0 157 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 158 S_BRANCH %bb.1 159 160 bb.1: 161 successors: %bb.2, %bb.3 162 163 SI_INIT_M0 65536, implicit-def $m0 164 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 165 S_CBRANCH_VCCZ %bb.2, implicit undef $vcc 166 S_BRANCH %bb.3 167 168 bb.2: 169 successors: %bb.4 170 171 SI_INIT_M0 -1, implicit-def $m0 172 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 173 S_BRANCH %bb.4 174 175 bb.3: 176 successors: %bb.4 177 178 SI_INIT_M0 -1, implicit-def $m0 179 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 180 S_BRANCH %bb.4 181 182 bb.4: 183 S_ENDPGM 0 184... 185 186# GCN-LABEL: name: merge-m0-after-prologue 187# GCN: bb.0.entry: 188# GCN-NOT: SI_INIT_M0 189# GCN: S_OR_B64 190# GCN-NEXT: SI_INIT_M0 191 192# GCN: bb.1: 193# GCN-NOT: SI_INIT_M0 -1 194 195# GCN: bb.2: 196# GCN-NOT: SI_INIT_MO -1 197--- 198name: merge-m0-after-prologue 199registers: 200 - { id: 0, class: vgpr_32 } 201 - { id: 1, class: vgpr_32 } 202body: | 203 bb.0.entry: 204 successors: %bb.1, %bb.2 205 liveins: $sgpr0_sgpr1 206 207 $exec = S_OR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc 208 %0 = IMPLICIT_DEF 209 %1 = IMPLICIT_DEF 210 S_CBRANCH_VCCZ %bb.1, implicit undef $vcc 211 S_BRANCH %bb.2 212 213 bb.1: 214 successors: %bb.3 215 216 SI_INIT_M0 -1, implicit-def $m0 217 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 218 S_BRANCH %bb.3 219 220 bb.2: 221 successors: %bb.3 222 223 SI_INIT_M0 -1, implicit-def $m0 224 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 225 S_BRANCH %bb.3 226 227 bb.3: 228 S_ENDPGM 0 229... 230 231# GCN-LABEL: name: move-m0-avoid-hazard 232# GCN: $m0 = S_MOV_B32 -1 233# GCN-NEXT: $vgpr0 = V_MOV_B32_e32 0, implicit $exec 234# GCN-NEXT: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec 235--- 236name: move-m0-avoid-hazard 237body: | 238 bb.0: 239 $vgpr0 = V_MOV_B32_e32 0, implicit $exec 240 $m0 = S_MOV_B32 -1 241 DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec 242... 243 244# GCN-LABEL: name: move-m0-with-prologue 245# GCN: $exec = S_OR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc 246# GCN: $m0 = S_MOV_B32 -1 247# GCN-NEXT: $vgpr0 = V_MOV_B32_e32 0, implicit $exec 248# GCN-NEXT: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec 249--- 250name: move-m0-with-prologue 251body: | 252 bb.0: 253 liveins: $sgpr0_sgpr1 254 255 $exec = S_OR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc 256 $vgpr0 = V_MOV_B32_e32 0, implicit $exec 257 $m0 = S_MOV_B32 -1 258 DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec 259... 260 261# GCN-LABEL: name: move-m0-different-initializer 262# GCN: SI_INIT_M0 -1 263# GCN-NEXT: %0:vgpr_32 = IMPLICIT_DEF 264# GCN: SI_INIT_M0 65536 265# GCN-NEXT: S_NOP 266--- 267name: move-m0-different-initializer 268registers: 269 - { id: 0, class: vgpr_32 } 270 - { id: 1, class: vgpr_32 } 271body: | 272 bb.0: 273 %0 = IMPLICIT_DEF 274 %1 = IMPLICIT_DEF 275 SI_INIT_M0 -1, implicit-def $m0 276 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 277 S_NOP 0 278 SI_INIT_M0 65536, implicit-def $m0 279 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 280... 281 282# GCN-LABEL: name: move-m0-schedule-boundary 283# GCN: S_SETREG 284# GCN-NEXT: SI_INIT_M0 -1 285--- 286name: move-m0-schedule-boundary 287registers: 288 - { id: 0, class: vgpr_32 } 289 - { id: 1, class: vgpr_32 } 290body: | 291 bb.0: 292 %0 = IMPLICIT_DEF 293 %1 = IMPLICIT_DEF 294 S_SETREG_IMM32_B32 0, 1, implicit-def $mode, implicit $mode 295 SI_INIT_M0 -1, implicit-def $m0 296 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 297... 298 299 300# GCN-LABEL: name: m0-in-loop-0 301# GCN: bb.0.entry: 302# GCN: SI_INIT_M0 -1 303# GCN-NEXT: IMPLICIT_DEF 304# GCN-NEXT: IMPLICIT_DEF 305# GCN-NEXT: IMPLICIT_DEF 306# GCN-NEXT: DS_WRITE_B32 307 308# GCN: bb.1: 309# GCN: SI_INIT_M0 -1 310# GCN-NEXT: DS_WRITE_B32 311# GCN-NEXT: $m0 = COPY %2 312 313--- 314name: m0-in-loop-0 315registers: 316 - { id: 0, class: vgpr_32 } 317 - { id: 1, class: vgpr_32 } 318 - { id: 2, class: sgpr_32 } 319body: | 320 bb.0.entry: 321 successors: %bb.1 322 323 %0 = IMPLICIT_DEF 324 %1 = IMPLICIT_DEF 325 %2 = IMPLICIT_DEF 326 SI_INIT_M0 -1, implicit-def $m0 327 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 328 S_BRANCH %bb.1 329 330 bb.1: 331 successors: %bb.1, %bb.2 332 333 SI_INIT_M0 -1, implicit-def $m0 334 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 335 $m0 = COPY %2:sgpr_32 336 S_SENDMSG 34, implicit $exec, implicit $m0 337 S_CBRANCH_VCCZ %bb.1, implicit undef $vcc 338 S_BRANCH %bb.2 339 340 bb.2: 341 S_ENDPGM 0 342... 343 344# GCN-LABEL: name: m0-in-loop-1 345# GCN: bb.0.entry: 346# GCN: SI_INIT_M0 -1 347# GCN-NEXT: IMPLICIT_DEF 348# GCN-NEXT: IMPLICIT_DEF 349# GCN-NEXT: IMPLICIT_DEF 350# GCN-NEXT: DS_WRITE_B32 351 352# GCN: bb.1: 353# GCN-NOT: SI_INIT_M0 -1 354# GCN: DS_WRITE_B32 355 356--- 357name: m0-in-loop-1 358registers: 359 - { id: 0, class: vgpr_32 } 360 - { id: 1, class: vgpr_32 } 361 - { id: 2, class: sgpr_32 } 362body: | 363 bb.0.entry: 364 successors: %bb.1 365 366 %0 = IMPLICIT_DEF 367 %1 = IMPLICIT_DEF 368 %2 = IMPLICIT_DEF 369 SI_INIT_M0 -1, implicit-def $m0 370 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 371 S_BRANCH %bb.1 372 373 bb.1: 374 successors: %bb.1, %bb.2 375 376 SI_INIT_M0 -1, implicit-def $m0 377 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 378 S_CBRANCH_VCCZ %bb.1, implicit undef $vcc 379 S_BRANCH %bb.2 380 381 bb.2: 382 S_ENDPGM 0 383... 384 385# GCN-LABEL: name: m0-in-loop-2 386# GCN: bb.0.entry: 387# GCN: SI_INIT_M0 -1 388# GCN-NEXT: IMPLICIT_DEF 389# GCN-NEXT: IMPLICIT_DEF 390# GCN-NEXT: IMPLICIT_DEF 391# GCN-NEXT: DS_WRITE_B32 392 393# GCN: bb.1: 394# GCN: $m0 = COPY %2 395# GCN-NEXT: SENDMSG 396# GCN-NEXT: SI_INIT_M0 -1 397# GCN-NEXT: DS_WRITE_B32 398 399--- 400name: m0-in-loop-2 401registers: 402 - { id: 0, class: vgpr_32 } 403 - { id: 1, class: vgpr_32 } 404 - { id: 2, class: sgpr_32 } 405body: | 406 bb.0.entry: 407 successors: %bb.1 408 409 %0 = IMPLICIT_DEF 410 %1 = IMPLICIT_DEF 411 %2 = IMPLICIT_DEF 412 SI_INIT_M0 -1, implicit-def $m0 413 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 414 S_BRANCH %bb.1 415 416 bb.1: 417 successors: %bb.1, %bb.2 418 419 $m0 = COPY %2:sgpr_32 420 S_SENDMSG 34, implicit $exec, implicit $m0 421 SI_INIT_M0 -1, implicit-def $m0 422 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 423 S_CBRANCH_VCCZ %bb.1, implicit undef $vcc 424 S_BRANCH %bb.2 425 426 bb.2: 427 S_ENDPGM 0 428... 429 430# GCN-LABEL: name: m0-in-loop-3 431# GCN: bb.0.entry: 432# GCN: SI_INIT_M0 -1 433# GCN-NEXT: IMPLICIT_DEF 434# GCN-NEXT: IMPLICIT_DEF 435# GCN-NEXT: IMPLICIT_DEF 436# GCN-NEXT: DS_WRITE_B32 437 438# GCN: bb.1: 439# GCN: $m0 = COPY %2 440# GCN-NEXT: SENDMSG 441# GCN-NEXT: SI_INIT_M0 -1 442# GCN-NEXT: DS_WRITE_B32 443# GCN-NEXT: DS_WRITE_B32 444 445--- 446name: m0-in-loop-3 447registers: 448 - { id: 0, class: vgpr_32 } 449 - { id: 1, class: vgpr_32 } 450 - { id: 2, class: sgpr_32 } 451body: | 452 bb.0.entry: 453 successors: %bb.1 454 455 %0 = IMPLICIT_DEF 456 %1 = IMPLICIT_DEF 457 %2 = IMPLICIT_DEF 458 SI_INIT_M0 -1, implicit-def $m0 459 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 460 S_BRANCH %bb.1 461 462 bb.1: 463 successors: %bb.1, %bb.2 464 465 $m0 = COPY %2:sgpr_32 466 S_SENDMSG 34, implicit $exec, implicit $m0 467 SI_INIT_M0 -1, implicit-def $m0 468 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 469 SI_INIT_M0 -1, implicit-def $m0 470 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 471 S_CBRANCH_VCCZ %bb.1, implicit undef $vcc 472 S_BRANCH %bb.2 473 474 bb.2: 475 S_ENDPGM 0 476... 477 478# GCN-LABEL: name: m0-in-loop-4 479# GCN: bb.0.entry: 480# GCN: SI_INIT_M0 -1 481# GCN-NEXT: IMPLICIT_DEF 482# GCN-NEXT: IMPLICIT_DEF 483# GCN-NEXT: IMPLICIT_DEF 484# GCN-NEXT: DS_WRITE_B32 485 486# GCN: bb.1: 487# GCN: SI_INIT_M0 -1 488# GCN-NEXT: DS_WRITE_B32 489# GCN-NEXT: DS_WRITE_B32 490# GCN-NEXT: $m0 = COPY %2 491# GCN-NEXT: SENDMSG 492 493--- 494name: m0-in-loop-4 495registers: 496 - { id: 0, class: vgpr_32 } 497 - { id: 1, class: vgpr_32 } 498 - { id: 2, class: sgpr_32 } 499body: | 500 bb.0.entry: 501 successors: %bb.1 502 503 %0 = IMPLICIT_DEF 504 %1 = IMPLICIT_DEF 505 %2 = IMPLICIT_DEF 506 SI_INIT_M0 -1, implicit-def $m0 507 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 508 S_BRANCH %bb.1 509 510 bb.1: 511 successors: %bb.1, %bb.2 512 513 SI_INIT_M0 -1, implicit-def $m0 514 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 515 SI_INIT_M0 -1, implicit-def $m0 516 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 517 $m0 = COPY %2:sgpr_32 518 S_SENDMSG 34, implicit $exec, implicit $m0 519 S_CBRANCH_VCCZ %bb.1, implicit undef $vcc 520 S_BRANCH %bb.2 521 522 bb.2: 523 S_ENDPGM 0 524... 525 526# GCN-LABEL: name: m0-in-loop-5 527# GCN: bb.0.entry: 528# GCN: SI_INIT_M0 -1 529# GCN-NEXT: IMPLICIT_DEF 530# GCN-NEXT: IMPLICIT_DEF 531# GCN-NEXT: IMPLICIT_DEF 532# GCN-NEXT: DS_WRITE_B32 533 534# GCN: bb.1: 535# GCN: SI_INIT_M0 65536 536# GCN-NEXT: DS_WRITE_B32 537# GCN-NEXT: SI_INIT_M0 -1 538# GCN-NEXT: DS_WRITE_B32 539# GCN-NEXT: $m0 = COPY %2 540# GCN-NEXT: SENDMSG 541 542--- 543name: m0-in-loop-5 544registers: 545 - { id: 0, class: vgpr_32 } 546 - { id: 1, class: vgpr_32 } 547 - { id: 2, class: sgpr_32 } 548body: | 549 bb.0.entry: 550 successors: %bb.1 551 552 %0 = IMPLICIT_DEF 553 %1 = IMPLICIT_DEF 554 %2 = IMPLICIT_DEF 555 SI_INIT_M0 -1, implicit-def $m0 556 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 557 S_BRANCH %bb.1 558 559 bb.1: 560 successors: %bb.1, %bb.2 561 562 SI_INIT_M0 65536, implicit-def $m0 563 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 564 SI_INIT_M0 -1, implicit-def $m0 565 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 566 $m0 = COPY %2:sgpr_32 567 S_SENDMSG 34, implicit $exec, implicit $m0 568 S_CBRANCH_VCCZ %bb.1, implicit undef $vcc 569 S_BRANCH %bb.2 570 571 bb.2: 572 S_ENDPGM 0 573... 574 575# GCN-LABEL: name: m0-in-loop-6 576# GCN: bb.0.entry: 577# GCN: SI_INIT_M0 -1 578# GCN-NEXT: IMPLICIT_DEF 579# GCN-NEXT: IMPLICIT_DEF 580# GCN-NEXT: IMPLICIT_DEF 581# GCN-NEXT: DS_WRITE_B32 582 583# GCN: bb.1: 584# GCN: SI_INIT_M0 -1 585# GCN-NEXT: DS_WRITE_B32 586# GCN-NEXT: DS_WRITE_B32 587# GCN-NEXT: $m0 = COPY %2 588# GCN-NEXT: SENDMSG 589 590--- 591name: m0-in-loop-6 592registers: 593 - { id: 0, class: vgpr_32 } 594 - { id: 1, class: vgpr_32 } 595 - { id: 2, class: sgpr_32 } 596body: | 597 bb.0.entry: 598 successors: %bb.1 599 600 %0 = IMPLICIT_DEF 601 %1 = IMPLICIT_DEF 602 %2 = IMPLICIT_DEF 603 SI_INIT_M0 -1, implicit-def $m0 604 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 605 S_BRANCH %bb.1 606 607 bb.1: 608 successors: %bb.2 609 610 SI_INIT_M0 -1, implicit-def $m0 611 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 612 SI_INIT_M0 -1, implicit-def $m0 613 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 614 $m0 = COPY %2:sgpr_32 615 S_SENDMSG 34, implicit $exec, implicit $m0 616 S_BRANCH %bb.2 617 618 bb.2: 619 successors: %bb.3, %bb.1 620 S_CBRANCH_VCCZ %bb.1, implicit undef $vcc 621 S_BRANCH %bb.3 622 623 624 bb.3: 625 S_ENDPGM 0 626... 627 628# GCN-LABEL: name: m0-in-loop-7 629# GCN: bb.0.entry: 630# GCN: SI_INIT_M0 -1 631# GCN-NEXT: IMPLICIT_DEF 632# GCN-NEXT: IMPLICIT_DEF 633# GCN-NEXT: IMPLICIT_DEF 634# GCN-NEXT: DS_WRITE_B32 635 636# GCN: bb.1: 637# GCN: SI_INIT_M0 -1 638# GCN-NEXT: DS_WRITE_B32 639# GCN-NEXT: DS_WRITE_B32 640 641# GCN: bb.2: 642# GCN: $m0 = COPY %2 643# GCN-NEXT: SENDMSG 644 645--- 646name: m0-in-loop-7 647registers: 648 - { id: 0, class: vgpr_32 } 649 - { id: 1, class: vgpr_32 } 650 - { id: 2, class: sgpr_32 } 651body: | 652 bb.0.entry: 653 successors: %bb.1 654 655 %0 = IMPLICIT_DEF 656 %1 = IMPLICIT_DEF 657 %2 = IMPLICIT_DEF 658 SI_INIT_M0 -1, implicit-def $m0 659 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 660 S_BRANCH %bb.1 661 662 bb.1: 663 successors: %bb.2 664 665 SI_INIT_M0 -1, implicit-def $m0 666 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 667 SI_INIT_M0 -1, implicit-def $m0 668 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 669 S_BRANCH %bb.2 670 671 bb.2: 672 successors: %bb.3, %bb.1 673 $m0 = COPY %2:sgpr_32 674 S_SENDMSG 34, implicit $exec, implicit $m0 675 S_CBRANCH_VCCZ %bb.1, implicit undef $vcc 676 S_BRANCH %bb.3 677 678 bb.3: 679 S_ENDPGM 0 680... 681