1# RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs -run-pass greedy,amdgpu-nsa-reassign,virtregrewriter,si-shrink-instructions -o - %s | FileCheck -check-prefix=GCN %s
2
3--- |
4  define amdgpu_kernel void @nsa_reassign() #0 { ret void }
5  define amdgpu_kernel void @do_not_reassign_spill() #0 { ret void }
6
7  attributes #0 = { "amdgpu-num-vgpr"="8" }
8...
9
10# GCN-LABEL: name: nsa_reassign
11# GCN: IMAGE_SAMPLE_C_L_V1_V5_gfx10
12---
13name:            nsa_reassign
14tracksRegLiveness: true
15machineFunctionInfo:
16  stackPtrOffsetReg:  $sgpr32
17stack:
18  - { id: 0, type: default, offset: 0, size: 4, alignment: 4 }
19registers:
20  - { id: 0, class: vgpr_32, preferred-register: '$vgpr0' }
21  - { id: 1, class: vgpr_32, preferred-register: '$vgpr1' }
22  - { id: 2, class: vgpr_32, preferred-register: '$vgpr2' }
23  - { id: 3, class: vgpr_32, preferred-register: '$vgpr3' }
24  - { id: 4, class: vgpr_32, preferred-register: '$vgpr4' }
25  - { id: 5, class: vgpr_32, preferred-register: '$vgpr5' }
26  - { id: 6, class: vgpr_32, preferred-register: '$vgpr6' }
27  - { id: 7, class: vgpr_32, preferred-register: '$vgpr7' }
28body:             |
29  bb.0:
30    %0 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
31    %1 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
32    %2 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
33    %3 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
34    %4 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
35    %5 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
36    %6 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
37    %7:vgpr_32 = IMAGE_SAMPLE_C_L_V1_V5_nsa_gfx10 %0, %2, %4, %5, %6, undef $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, undef $sgpr8_sgpr9_sgpr10_sgpr11, 1, 2, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32) from custom "ImageResource")
38    S_ENDPGM 0, implicit %7
39...
40
41# GCN-LABEL: do_not_reassign_spill
42# GCN: IMAGE_SAMPLE_C_L_V1_V5_nsa_gfx10
43---
44name:            do_not_reassign_spill
45tracksRegLiveness: true
46machineFunctionInfo:
47  stackPtrOffsetReg:  $sgpr32
48stack:
49  - { id: 0, type: default, offset: 0, size: 4, alignment: 4 }
50registers:
51  - { id: 0, class: vgpr_32, preferred-register: '$vgpr0' }
52  - { id: 1, class: vgpr_32, preferred-register: '$vgpr1' }
53  - { id: 2, class: vgpr_32, preferred-register: '$vgpr2' }
54  - { id: 3, class: vgpr_32, preferred-register: '$vgpr3' }
55  - { id: 4, class: vgpr_32, preferred-register: '$vgpr4' }
56  - { id: 5, class: vgpr_32, preferred-register: '$vgpr5' }
57  - { id: 6, class: vgpr_32, preferred-register: '$vgpr6' }
58  - { id: 7, class: vgpr_32, preferred-register: '$vgpr7' }
59body:             |
60  bb.0:
61    %0 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
62    %1 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
63    %2 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
64    %3 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
65    %4 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
66    %5 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
67    %6 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
68    S_NOP 0, implicit-def dead $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
69    S_NOP 0, implicit %0, implicit %1, implicit %2, implicit %3, implicit %4, implicit %5, implicit %6
70    %7:vgpr_32 = IMAGE_SAMPLE_C_L_V1_V5_nsa_gfx10 %0, %2, %4, %5, %6, undef $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, undef $sgpr8_sgpr9_sgpr10_sgpr11, 1, 2, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32) from custom "ImageResource")
71    S_ENDPGM 0, implicit %7
72...
73