1; RUN: llc -mv65 -mattr=+hvxv65,hvx-length64b -march=hexagon -O2 < %s | FileCheck %s 2 3; CHECK-LABEL: V6_vgathermw 4; CHECK: vtmp.w = vgather(r1,m{{[0-9]+}},v{{[0-9]+}}.w).w 5; CHECK: vmem(r{{[0-9]+}}+#0) = vtmp.new 6; CHECK-LABEL: V6_vgathermh 7; CHECK: vtmp.h = vgather(r1,m{{[0-9]+}},v{{[0-9]+}}.h).h 8; CHECK: vmem(r{{[0-9]+}}+#0) = vtmp.new 9; CHECK-LABEL: V6_vgathermhw 10; CHECK: vtmp.h = vgather(r1,m{{[0-9]+}},v{{[0-9]+}}:{{[0-9]+}}.w).h 11; CHECK: vmem(r{{[0-9]+}}+#0) = vtmp.new 12; CHECK-LABEL: V6_vgathermwq 13; CHECK: if (q{{[0-3]+}}) vtmp.w = vgather(r1,m{{[0-9]+}},v{{[0-9]+}}.w).w 14; CHECK: vmem(r{{[0-9]+}}+#0) = vtmp.new 15; CHECK-LABEL: V6_vgathermhq 16; CHECK: if (q{{[0-3]+}}) vtmp.h = vgather(r1,m{{[0-9]+}},v{{[0-9]+}}.h).h 17; CHECK: vmem(r{{[0-9]+}}+#0) = vtmp.new 18; CHECK-LABEL: V6_vgathermhwq 19; CHECK: if (q{{[0-3]+}}) vtmp.h = vgather(r1,m{{[0-9]+}},v{{[0-9]+}}:{{[0-9]+}}.w).h 20; CHECK: vmem(r{{[0-9]+}}+#0) = vtmp.new 21 22declare <64 x i1> @llvm.hexagon.V6.vandvrt(<16 x i32>, i32) 23 24declare void @llvm.hexagon.V6.vgathermw(i8*, i32, i32, <16 x i32>) 25define void @V6_vgathermw(i8* %a, i32 %b, i32 %c, <16 x i32> %d) { 26 call void @llvm.hexagon.V6.vgathermw(i8* %a, i32 %b, i32 %c, <16 x i32> %d) 27 ret void 28} 29 30declare void @llvm.hexagon.V6.vgathermh(i8*, i32, i32, <16 x i32>) 31define void @V6_vgathermh(i8* %a, i32 %b, i32 %c, <16 x i32> %d) { 32 call void @llvm.hexagon.V6.vgathermh(i8* %a, i32 %b, i32 %c, <16 x i32> %d) 33 ret void 34} 35 36declare void @llvm.hexagon.V6.vgathermhw(i8*, i32, i32, <32 x i32>) 37define void @V6_vgathermhw(i8* %a, i32 %b, i32 %c, <32 x i32> %d) { 38 call void @llvm.hexagon.V6.vgathermhw(i8* %a, i32 %b, i32 %c, <32 x i32> %d) 39 ret void 40} 41 42declare void @llvm.hexagon.V6.vgathermwq(i8*, <64 x i1>, i32, i32, <16 x i32>) 43define void @V6_vgathermwq(i8* %a, <16 x i32> %b, i32 %c, i32 %d, <16 x i32> %e) { 44 %1 = tail call <64 x i1> @llvm.hexagon.V6.vandvrt(<16 x i32> %b, i32 -1) 45 call void @llvm.hexagon.V6.vgathermwq(i8* %a, <64 x i1> %1, i32 %c, i32 %d, <16 x i32> %e) 46 ret void 47} 48 49declare void @llvm.hexagon.V6.vgathermhq(i8*, <64 x i1>, i32, i32, <16 x i32>) 50define void @V6_vgathermhq(i8* %a, <16 x i32> %b, i32 %c, i32 %d, <16 x i32> %e) { 51 %1 = tail call <64 x i1> @llvm.hexagon.V6.vandvrt(<16 x i32> %b, i32 -1) 52 call void @llvm.hexagon.V6.vgathermhq(i8* %a, <64 x i1> %1, i32 %c, i32 %d, <16 x i32> %e) 53 ret void 54} 55 56declare void @llvm.hexagon.V6.vgathermhwq(i8*, <64 x i1>, i32, i32, <32 x i32>) 57define void @V6_vgathermhwq(i8* %a, <16 x i32> %b, i32 %c, i32 %d, <32 x i32> %e) { 58 %1 = tail call <64 x i1> @llvm.hexagon.V6.vandvrt(<16 x i32> %b, i32 -1) 59 call void @llvm.hexagon.V6.vgathermhwq(i8* %a, <64 x i1> %1, i32 %c, i32 %d, <32 x i32> %e) 60 ret void 61} 62