1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx512f -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX
3; RUN: llc -verify-machineinstrs -mtriple=i686-unknown-unknown -mcpu=generic -mattr=+avx512f -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX_X86
4
5
6define double @int_to_double_rr(i32 %a) {
7; AVX-LABEL: int_to_double_rr:
8; AVX:       # %bb.0: # %entry
9; AVX-NEXT:    vcvtusi2sd %edi, %xmm0, %xmm0
10; AVX-NEXT:    retq
11;
12; AVX_X86-LABEL: int_to_double_rr:
13; AVX_X86:       # %bb.0: # %entry
14; AVX_X86-NEXT:    pushl %ebp
15; AVX_X86-NEXT:    .cfi_def_cfa_offset 8
16; AVX_X86-NEXT:    .cfi_offset %ebp, -8
17; AVX_X86-NEXT:    movl %esp, %ebp
18; AVX_X86-NEXT:    .cfi_def_cfa_register %ebp
19; AVX_X86-NEXT:    andl $-8, %esp
20; AVX_X86-NEXT:    subl $8, %esp
21; AVX_X86-NEXT:    vcvtusi2sdl 8(%ebp), %xmm0, %xmm0
22; AVX_X86-NEXT:    vmovsd %xmm0, (%esp)
23; AVX_X86-NEXT:    fldl (%esp)
24; AVX_X86-NEXT:    movl %ebp, %esp
25; AVX_X86-NEXT:    popl %ebp
26; AVX_X86-NEXT:    .cfi_def_cfa %esp, 4
27; AVX_X86-NEXT:    retl
28entry:
29  %0 = uitofp i32 %a to double
30  ret double %0
31}
32
33define double @int_to_double_rm(i32* %a) {
34; AVX-LABEL: int_to_double_rm:
35; AVX:       # %bb.0: # %entry
36; AVX-NEXT:    vcvtusi2sdl (%rdi), %xmm0, %xmm0
37; AVX-NEXT:    retq
38;
39; AVX_X86-LABEL: int_to_double_rm:
40; AVX_X86:       # %bb.0: # %entry
41; AVX_X86-NEXT:    pushl %ebp
42; AVX_X86-NEXT:    .cfi_def_cfa_offset 8
43; AVX_X86-NEXT:    .cfi_offset %ebp, -8
44; AVX_X86-NEXT:    movl %esp, %ebp
45; AVX_X86-NEXT:    .cfi_def_cfa_register %ebp
46; AVX_X86-NEXT:    andl $-8, %esp
47; AVX_X86-NEXT:    subl $8, %esp
48; AVX_X86-NEXT:    movl 8(%ebp), %eax
49; AVX_X86-NEXT:    vcvtusi2sdl (%eax), %xmm0, %xmm0
50; AVX_X86-NEXT:    vmovsd %xmm0, (%esp)
51; AVX_X86-NEXT:    fldl (%esp)
52; AVX_X86-NEXT:    movl %ebp, %esp
53; AVX_X86-NEXT:    popl %ebp
54; AVX_X86-NEXT:    .cfi_def_cfa %esp, 4
55; AVX_X86-NEXT:    retl
56entry:
57  %0 = load i32, i32* %a
58  %1 = uitofp i32 %0 to double
59  ret double %1
60}
61
62define double @int_to_double_rm_optsize(i32* %a) optsize {
63; AVX-LABEL: int_to_double_rm_optsize:
64; AVX:       # %bb.0: # %entry
65; AVX-NEXT:    vcvtusi2sdl (%rdi), %xmm0, %xmm0
66; AVX-NEXT:    retq
67;
68; AVX_X86-LABEL: int_to_double_rm_optsize:
69; AVX_X86:       # %bb.0: # %entry
70; AVX_X86-NEXT:    pushl %ebp
71; AVX_X86-NEXT:    .cfi_def_cfa_offset 8
72; AVX_X86-NEXT:    .cfi_offset %ebp, -8
73; AVX_X86-NEXT:    movl %esp, %ebp
74; AVX_X86-NEXT:    .cfi_def_cfa_register %ebp
75; AVX_X86-NEXT:    andl $-8, %esp
76; AVX_X86-NEXT:    subl $8, %esp
77; AVX_X86-NEXT:    movl 8(%ebp), %eax
78; AVX_X86-NEXT:    vcvtusi2sdl (%eax), %xmm0, %xmm0
79; AVX_X86-NEXT:    vmovsd %xmm0, (%esp)
80; AVX_X86-NEXT:    fldl (%esp)
81; AVX_X86-NEXT:    movl %ebp, %esp
82; AVX_X86-NEXT:    popl %ebp
83; AVX_X86-NEXT:    .cfi_def_cfa %esp, 4
84; AVX_X86-NEXT:    retl
85entry:
86  %0 = load i32, i32* %a
87  %1 = uitofp i32 %0 to double
88  ret double %1
89}
90
91define float @int_to_float_rr(i32 %a) {
92; AVX-LABEL: int_to_float_rr:
93; AVX:       # %bb.0: # %entry
94; AVX-NEXT:    vcvtusi2ss %edi, %xmm0, %xmm0
95; AVX-NEXT:    retq
96;
97; AVX_X86-LABEL: int_to_float_rr:
98; AVX_X86:       # %bb.0: # %entry
99; AVX_X86-NEXT:    pushl %eax
100; AVX_X86-NEXT:    .cfi_def_cfa_offset 8
101; AVX_X86-NEXT:    vcvtusi2ssl {{[0-9]+}}(%esp), %xmm0, %xmm0
102; AVX_X86-NEXT:    vmovss %xmm0, (%esp)
103; AVX_X86-NEXT:    flds (%esp)
104; AVX_X86-NEXT:    popl %eax
105; AVX_X86-NEXT:    .cfi_def_cfa_offset 4
106; AVX_X86-NEXT:    retl
107entry:
108  %0 = uitofp i32 %a to float
109  ret float %0
110}
111
112define float @int_to_float_rm(i32* %a) {
113; AVX-LABEL: int_to_float_rm:
114; AVX:       # %bb.0: # %entry
115; AVX-NEXT:    vcvtusi2ssl (%rdi), %xmm0, %xmm0
116; AVX-NEXT:    retq
117;
118; AVX_X86-LABEL: int_to_float_rm:
119; AVX_X86:       # %bb.0: # %entry
120; AVX_X86-NEXT:    pushl %eax
121; AVX_X86-NEXT:    .cfi_def_cfa_offset 8
122; AVX_X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
123; AVX_X86-NEXT:    vcvtusi2ssl (%eax), %xmm0, %xmm0
124; AVX_X86-NEXT:    vmovss %xmm0, (%esp)
125; AVX_X86-NEXT:    flds (%esp)
126; AVX_X86-NEXT:    popl %eax
127; AVX_X86-NEXT:    .cfi_def_cfa_offset 4
128; AVX_X86-NEXT:    retl
129entry:
130  %0 = load i32, i32* %a
131  %1 = uitofp i32 %0 to float
132  ret float %1
133}
134
135define float @int_to_float_rm_optsize(i32* %a) optsize {
136; AVX-LABEL: int_to_float_rm_optsize:
137; AVX:       # %bb.0: # %entry
138; AVX-NEXT:    vcvtusi2ssl (%rdi), %xmm0, %xmm0
139; AVX-NEXT:    retq
140;
141; AVX_X86-LABEL: int_to_float_rm_optsize:
142; AVX_X86:       # %bb.0: # %entry
143; AVX_X86-NEXT:    pushl %eax
144; AVX_X86-NEXT:    .cfi_def_cfa_offset 8
145; AVX_X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
146; AVX_X86-NEXT:    vcvtusi2ssl (%eax), %xmm0, %xmm0
147; AVX_X86-NEXT:    vmovss %xmm0, (%esp)
148; AVX_X86-NEXT:    flds (%esp)
149; AVX_X86-NEXT:    popl %eax
150; AVX_X86-NEXT:    .cfi_def_cfa_offset 4
151; AVX_X86-NEXT:    retl
152entry:
153  %0 = load i32, i32* %a
154  %1 = uitofp i32 %0 to float
155  ret float %1
156}
157