1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -run-pass=peephole-opt -mtriple=x86_64-- %s -o - | FileCheck %s 3 4--- | 5 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 6 target triple = "x86_64-unknown-linux-gnu" 7 8 define i32 @atomic(i8** %arg) { 9 %load = load atomic i8*, i8** %arg unordered, align 8 10 %cmp = icmp eq i8* %load, null 11 %zext = zext i1 %cmp to i32 12 ret i32 %zext 13 } 14 15 define i32 @nonatomic_unoptimized(i8** %arg) { 16 %load = load i8*, i8** %arg, align 8 17 %cmp = icmp eq i8* %load, null 18 %zext = zext i1 %cmp to i32 19 ret i32 %zext 20 } 21 22... 23--- 24name: atomic 25alignment: 16 26tracksRegLiveness: true 27registers: 28 - { id: 0, class: gr64 } 29 - { id: 1, class: gr64 } 30 - { id: 2, class: gr8 } 31 - { id: 3, class: gr32 } 32liveins: 33 - { reg: '$rdi', virtual-reg: '%0' } 34machineFunctionInfo: {} 35body: | 36 bb.0 (%ir-block.0): 37 liveins: $rdi 38 39 ; CHECK-LABEL: name: atomic 40 ; CHECK: liveins: $rdi 41 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 42 ; CHECK: CMP64mi8 [[COPY]], 1, $noreg, 0, $noreg, 0, implicit-def $eflags :: (load unordered (s64) from %ir.arg) 43 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags 44 ; CHECK: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 killed [[SETCCr]] 45 ; CHECK: $eax = COPY [[MOVZX32rr8_]] 46 ; CHECK: RET 0, $eax 47 %0:gr64 = COPY $rdi 48 %1:gr64 = MOV64rm %0, 1, $noreg, 0, $noreg :: (load unordered (s64) from %ir.arg) 49 TEST64rr %1, %1, implicit-def $eflags 50 %2:gr8 = SETCCr 4, implicit $eflags 51 %3:gr32 = MOVZX32rr8 killed %2 52 $eax = COPY %3 53 RET 0, $eax 54 55... 56--- 57name: nonatomic_unoptimized 58alignment: 16 59tracksRegLiveness: true 60registers: 61 - { id: 0, class: gr64 } 62 - { id: 1, class: gr64 } 63 - { id: 2, class: gr8 } 64 - { id: 3, class: gr32 } 65liveins: 66 - { reg: '$rdi', virtual-reg: '%0' } 67machineFunctionInfo: {} 68body: | 69 bb.0 (%ir-block.0): 70 liveins: $rdi 71 72 ; CHECK-LABEL: name: nonatomic_unoptimized 73 ; CHECK: liveins: $rdi 74 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 75 ; CHECK: CMP64mi8 [[COPY]], 1, $noreg, 0, $noreg, 0, implicit-def $eflags :: (load (s64) from %ir.arg) 76 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags 77 ; CHECK: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 killed [[SETCCr]] 78 ; CHECK: $eax = COPY [[MOVZX32rr8_]] 79 ; CHECK: RET 0, $eax 80 %0:gr64 = COPY $rdi 81 %1:gr64 = MOV64rm %0, 1, $noreg, 0, $noreg :: (load (s64) from %ir.arg) 82 TEST64rr %1, %1, implicit-def $eflags 83 %2:gr8 = SETCCr 4, implicit $eflags 84 %3:gr32 = MOVZX32rr8 killed %2 85 $eax = COPY %3 86 RET 0, $eax 87 88... 89